PCB and preparation method thereof
By employing a design that combines multiple copper foil layers and resin layers with ceramic modules in the PCB, the problems of poor heat dissipation and insulation performance in SiC chip packaging are solved, achieving efficient heat dissipation and structural stability, and improving processing yield and safety.
Patent Information
- Application Number
- CN202511088332.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-05
- Publication Date
- 2025-11-28
AI Technical Summary
Existing SiC chip packaging technology suffers from poor heat dissipation, inadequate insulation, easy separation and warping between layers, which affects the PCB processing yield and safe use.
The PCB structure consists of multiple layers of copper foil and resin, combined with ceramic modules and copper pillars to form a symmetrical lamination structure. The high thermal conductivity of the ceramic modules and the thermal conductivity of copper enhance the interlayer bonding force and prevent warping.
It improves the heat dissipation and insulation performance of PCBs, enhances structural stability, reduces warpage, and improves processing yield and safety.
Smart Images

Figure CN121038098A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of PCB, specifically relating to a PCB and its manufacturing method. Background Technology
[0002] The performance requirements for power semiconductor devices are increasing with the continuous innovation of power electronics technology, especially in key dimensions such as thermal management, electrical characteristics, and miniaturization design. Traditional packaging solutions using SiC chips as power components, whether surface mount or sintered onto ceramic substrates, while meeting basic packaging functions, have significant shortcomings in key performance aspects. Currently, advanced packaging technologies that directly embed SiC chips into the core of printed circuit boards are beginning to emerge. This technology, through vertical integration of physical space, significantly shortens the interconnection path between the chip and peripheral components, thereby reducing parasitic parameters and optimizing the system's electrical performance. Furthermore, it shortens the vertical distance from the SiC chip to the underlying water cooler, further reducing the system's thermal resistance.
[0003] However, this innovative packaging method encounters material bottlenecks in thermal management. Currently, the inner layers of the PCB board for embedded SiC chips typically utilize copper blocks and dense laser vias to transfer heat downwards, while the outer layer dissipates heat through a high thermal conductivity adhesive film. However, due to the limitations of PCB manufacturing processes on the performance of the adhesive filler, the thermal conductivity of existing thermal adhesive films is generally below 15 W / mK. Considering that SiC chips can generate temperatures exceeding 200°C under peak operating conditions, if the heat dissipation design cannot match its heat flux density, it will directly lead to uncontrolled junction temperature, resulting in performance degradation or even thermal failure. This contradiction between material-based heat dissipation management and power enhancement has become a key challenge restricting the further development of embedded SiC power modules. To solve the heat dissipation and insulation problem, ceramic substrates with high heat dissipation performance (>70 W / mK) can be used to replace the heat dissipation materials. Previously, some solutions were proposed to place the ceramic substrate at the bottom of the PCB and make direct contact with the water cooler. This design does improve heat dissipation performance, but for PCB manufacturing, when the ceramic substrate is directly laminated with the other layers of the PCB, board warping can occur, leading to a decrease in the PCB manufacturing yield.
[0004] Meanwhile, to reduce thermal resistance and accelerate heat dissipation, the thermal adhesive film is typically designed to be thin, generally less than 200 micrometers. However, with the increase in charging pile platform voltage, the voltage parameters of SiC chips are also constantly rising, from 400V to 800V, and even reaching 1200V. Under such circumstances, the thin thermal adhesive film may break down due to high voltage, leading to failure. Moreover, the adhesion between traditional thermal adhesive films and copper foil is relatively low, below 0.4N / mm, far below the adhesion requirements of conventional adhesive sheets and copper foil. During reliability testing, copper foil peeling can easily occur, affecting the safe use of the product. Summary of the Invention
[0005] In view of the problems of poor heat dissipation and insulation performance, separation and warping between layers in the PCBs with embedded SiC chips in the prior art, the present invention will provide a PCB and its manufacturing method.
[0006] To achieve the above objectives, the following technical solutions are specifically included:
[0007] On one hand, the present invention provides a PCB comprising, from top to bottom, a first copper foil layer, a second copper foil layer, a substrate layer, a fifth copper foil layer, a sixth copper foil layer, and a resin layer separating adjacent layers.
[0008] The substrate layer includes a core board, a third copper foil layer and a fourth copper foil layer respectively disposed on the upper and lower surfaces of the core board, and a through groove penetrating the substrate layer along the thickness direction. The through groove is filled with a resin layer, and the ceramic module is embedded in the resin layer in the through groove. The ceramic module includes a ceramic substrate and a chip disposed on the ceramic substrate.
[0009] Inner layer circuitry is provided on the second copper foil layer, the third copper foil layer, the fourth copper foil layer, and the fifth copper foil layer respectively; outer layer circuitry is provided on the first copper foil layer.
[0010] Between the first copper foil layer and the second copper foil layer, between the second copper foil layer and the ceramic module, between the ceramic module and the fifth copper foil layer, and between the fifth copper foil layer and the sixth copper foil layer, there are independently existing resin layers that penetrate between the two layers along the thickness direction and connect the two layers.
[0011] In the PCB of this invention, with the substrate layer as the center of symmetry, similar materials are used on the upper and lower layers, and a symmetrical lamination structure is presented. Similar materials can use the same lamination process to simplify the number of laminations and operations, improve the bonding force between layers, enhance structural stability, and the symmetrical lamination structure can avoid board warping during the lamination process. The overall board warping rate is less than 0.75%, which can avoid problems such as board jamming and vacuum abnormalities that cause scratches and holes on the PCB end and poor soldering on the downstream component end caused by board warping in subsequent processing, thereby improving the PCB processing yield.
[0012] Compared to the traditional method of placing a heat dissipation material layer (i.e., a high thermal conductivity adhesive film) under the chip in a PCB, although the heat dissipation performance of the resin layer is much lower than that of the heat dissipation material layer, there are multiple copper pillars connecting the ceramic module, the fifth copper foil layer, and the sixth copper foil layer between the bottom of the ceramic module and the fifth and sixth copper foil layers. Utilizing the high thermal conductivity of copper, heat in the ceramic module can be quickly transferred away, improving heat dissipation volume and efficiency. This ensures that the heat generated by the SiC chip under high-intensity operation can be quickly conducted away, preventing damage to the power module due to overheating. Simultaneously, the chip in the ceramic module is placed on a ceramic substrate, which has higher heat dissipation efficiency and insulation performance than traditional heat dissipation material layers, further improving the heat dissipation and insulation performance of the PCB. Furthermore, because the PCB of this invention does not require an additional traditional heat dissipation material layer, using a resin layer instead of bonding with copper foil, the bonding force between the two is typically above 1.2 N / mm, far exceeding the 0.4 N / mm bonding force of traditional heat dissipation materials and copper foil. This enhances the bonding strength of the layers under the ceramic module and improves the structural stability of the PCB.
[0013] Therefore, the PCB of the present invention can achieve efficient heat dissipation, good insulation performance, excellent structural stability and low warpage.
[0014] The third and fourth copper foil layers on the substrate primarily serve as a support and for placing the ceramic module. The fifth and sixth copper foil layers mainly form a symmetrical structure with the first and second copper foil layers to reduce board warping. The second copper foil layer connects the electrodes on the chip surface to the first copper foil layer, while the first copper foil layer connects the inner layer circuitry, the chip, and surface-mounted components.
[0015] Preferably, the resin layer comprises resin, fiberglass cloth, and other fillers.
[0016] Preferably, in the substrate layer, the thickness of the core board is 0.8-1.32 mm.
[0017] Preferably, the thickness of the third and fourth copper foil layers is greater than 10 μm.
[0018] More preferably, the thicknesses of the third copper foil layer and the fourth copper foil layer are each independently selected from 12-54 μm.
[0019] More preferably, the third copper foil layer and the fourth copper foil layer have the same thickness.
[0020] Preferably, the thickness of the core plate is greater than or equal to the thickness of the ceramic module.
[0021] More preferably, the thickness of the core plate is 0-20 μm greater than the thickness of the ceramic module.
[0022] More preferably, the thickness of the ceramic module is 0.2-2 mm.
[0023] More preferably, the length of the through groove is 30-100 μm longer than the length of the ceramic module.
[0024] More preferably, the width of the channel is 30-100 μm larger than the width of the ceramic module. Preferably, the thickness of the second copper foil layer and the fifth copper foil layer is greater than 10 μm.
[0025] More preferably, the thicknesses of the second copper foil layer and the fifth copper foil layer are each independently selected from 15-150 μm.
[0026] Preferably, the thickness of the first copper foil layer and the sixth copper foil layer is greater than 10 μm.
[0027] More preferably, the thicknesses of the first copper foil layer and the sixth copper foil layer are each independently selected from 10-80 μm.
[0028] More preferably, the second copper foil layer and the fifth copper foil layer have the same thickness, and the first copper foil layer and the sixth copper foil layer have the same thickness.
[0029] Preferably, the diameter of the copper pillar is 100-300 μm.
[0030] Preferably, the distance between two adjacent copper pillars is 0.2-5 mm.
[0031] Preferably, there are more than two copper pillars between the first copper foil layer and the second copper foil layer. The copper pillars connecting the first copper foil layer and the second copper foil layer serve as channels for electrical connection, conducting the inner layer circuitry and the outer layer circuitry.
[0032] Preferably, the number of copper pillars between the second copper foil layer and the ceramic module is greater than or equal to two. The copper pillars connecting the second copper foil layer and the ceramic module serve as channels for electrical connections to the chip and inner layer circuitry.
[0033] Preferably, the number of copper pillars between the ceramic module and the fifth copper foil layer is greater than or equal to 80.
[0034] Preferably, the number of copper pillars between the fifth copper foil layer and the sixth copper foil layer is greater than or equal to 80.
[0035] The copper pillars between the ceramic module and the fifth copper foil layer, and between the fifth copper foil layer and the sixth copper foil layer, serve as heat dissipation pathways, quickly transferring heat from the ceramic module and resulting in better thermal management of the PCB.
[0036] Preferably, in the ceramic module, the ceramic substrate includes a ceramic sheet and copper foil layers respectively disposed on the upper and lower sides of the ceramic sheet, and the chip is disposed on at least one side of the copper foil layer.
[0037] More preferably, the ceramic sheet comprises silicon nitride ceramic.
[0038] The aforementioned copper-clad ceramic substrate is selected, and SiC chips are sintered onto this ceramic substrate to obtain a ceramic module, which is then embedded into the substrate layer in an embedded manner. The copper plating serves to dissipate heat and increase the ability to withstand excessive current, while the ceramic sheet serves to provide insulation and heat dissipation. More preferably, the ceramic sheet is a Si3N4 sheet, and more specifically, it is a copper-clad Si3N4 ceramic substrate. Its thermal conductivity is much higher than that of PCB heat dissipation materials used in the prior art, typically reaching 70-120 W / (m·K). It has moderate thermal resistance but excellent toughness and superior thermal capacity parameters. Its reliability is better than that of AlN substrates (such as copper-clad AlN substrates) and Al2O3 substrates (such as copper-clad Al2O3 substrates), which greatly improves the heat dissipation capacity, current capacity, and power density of the power chip module, making it very suitable for automotive-grade silicon carbide module applications. In addition to rapid heat dissipation, the ceramic substrate also serves as an insulator, with a ceramic dielectric strength exceeding 15KV / mm.
[0039] More preferably, the copper foil layer is provided with a blind groove, the blind groove is filled with a resin layer, and the chip is embedded in the resin layer within the blind groove. Etching a groove in copper on the surface of the ceramic plate has the following two advantages: it ensures that the chip is 0-20μm lower than the surface of the ceramic substrate, so that the stress point during pressing is located on the ceramic substrate rather than on the chip, thereby protecting the chip from being damaged; the height of the chip surface and the copper surface of the ceramic substrate are close, which facilitates laser electroplating of the electrodes on the chip.
[0040] More preferably, the chip includes a SiC power chip, the ceramic sheet has a thickness of 0.2-0.4 mm, and the copper foil has a thickness of 0.3-0.5 mm.
[0041] Preferably, it further includes a channel penetrating the second copper foil layer, the substrate layer, the fifth copper foil layer, and the resin layer between the two adjacent layers, the diameter of the channel being 0.3-0.5 mm, the inner wall of the channel being deposited with a copper layer having a thickness greater than or equal to 25 μm, and the channel being filled with a heat dissipation material.
[0042] On the other hand, the present invention provides a method for manufacturing the PCB, comprising the following steps:
[0043] S1. Perform patterning on the third and fourth copper foil layers on the substrate layer respectively, so as to set the inner layer circuit on the third and fourth copper foil layers.
[0044] S2. A through groove is provided on the substrate layer, penetrating the substrate layer;
[0045] S3. An adhesive tape is placed on the underside of the substrate layer so that the underside of the through groove is blocked by the adhesive tape to form a blind groove;
[0046] S4. The ceramic module is fixed in the blind groove by the tape in the blind groove, and there is a gap between the side of the ceramic module and the substrate layer.
[0047] S5. A first adhesive sheet and a second copper foil layer are sequentially covered on the upper side of the substrate layer, with the first adhesive sheet close to the third copper foil layer on the substrate layer; then, a hot pressing process is performed so that the first adhesive sheet flows and fills the gap of the blind groove and forms a corresponding resin layer.
[0048] S6. Remove the tape;
[0049] S7. A second adhesive sheet and a fifth copper foil layer are sequentially stacked on the underside of the substrate layer, with the second adhesive sheet close to the fourth copper foil layer on the substrate layer; then, a hot-pressing process is performed to allow the second adhesive sheet to flow adhesive and form a resin layer.
[0050] S8. A plurality of connecting holes are respectively provided through the second copper foil layer and the resin layer between the second copper foil layer and the ceramic module, and through the fifth copper foil and the resin layer between the fifth copper foil and the ceramic module, and copper is filled in the connecting holes to form a plurality of copper pillars;
[0051] S9. Optionally, a channel is provided that penetrates the second copper foil layer, the substrate layer and the fifth copper foil layer, a copper layer is filled on the inner wall of the channel, and then the channel is filled with heat-dissipating resin.
[0052] S10. Perform patterning processing on the second copper foil layer and the fifth copper foil layer respectively, so as to set inner layer circuits on the second copper foil layer and the fifth copper foil layer respectively.
[0053] S11. A third adhesive sheet and a first copper foil layer are sequentially stacked on the second copper foil layer, and a fourth adhesive sheet and a sixth copper foil layer are sequentially stacked on the fifth copper foil layer; then, a hot pressing process is performed so that the third adhesive sheet and the fourth adhesive sheet are glued and form corresponding resin layers.
[0054] S12. A plurality of connecting holes are respectively provided through the first copper foil layer and the resin layer between the first copper foil layer and the second copper foil layer, and through the sixth copper foil layer and the resin layer between the sixth copper foil layer and the fifth copper foil layer, and copper is filled in the connecting holes to form a plurality of copper;
[0055] S13. The first copper foil layer is patterned to form an outer layer circuit on the first copper foil layer, and then subjected to solder resist treatment, immersion nickel-palladium-gold treatment and cutting to obtain the PCB.
[0056] Preferably, in steps S1, S10 and S13, the patterning process includes applying dry film, exposure, development, etching and film removal.
[0057] Preferably, in step S2, the through groove is set by at least one of steel die punching, mechanical milling, CO2 laser drilling or UV cutting.
[0058] Preferably, in steps S7 and S12, the connection hole is set by laser drilling.
[0059] Preferably, in step S10, the method of setting the channel includes laser drilling.
[0060] Preferably, in step S3, the tape sequentially comprises a polyimide layer with a thickness of 20-30 μm and an acrylic adhesive layer with a thickness of 20-30 μm. The tape is resistant to high temperatures above 230°C.
[0061] Preferably, in steps S5, S7 and S11, the thickness of the first adhesive sheet, the second adhesive sheet, the third adhesive sheet and the fourth adhesive sheet are each independently selected from 60-200 μm.
[0062] Preferably, in steps S5, S7 and S11, the first adhesive sheet, the second adhesive sheet, the third adhesive sheet and the fourth adhesive sheet are each independently selected from PP adhesive sheet or ABF semi-cured adhesive sheet.
[0063] Preferably, in steps S5, S7 and S11, the temperature of the hot pressing treatment is independently selected from 220-240°C, and the pressure of the hot pressing treatment is independently selected from 1-10 MPa.
[0064] Preferably, in steps S8 and S12, the method of filling copper includes electroplating, and in step S10, the method of depositing copper layer includes electroplating.
[0065] Preferably, in step S9, the diameter of the channel is 0.3-0.5 mm, and the thickness of the copper layer on the inner wall of the channel is greater than or equal to 25 μm and less than the diameter of the channel, that is, the copper layer does not fill the channel, and the channel is filled with heat dissipation resin.
[0066] Preferably, the method for preparing the ceramic module includes the following steps: soldering copper foil to two surfaces of a ceramic sheet using a metal solder to obtain a component; patterning and cutting the component sequentially to obtain a single ceramic substrate; and setting a chip on the ceramic substrate by sintering to obtain the ceramic module.
[0067] Compared to existing technologies, this invention offers the following advantages: In the PCB of this invention, with the substrate layer as the center of symmetry, similar materials and a symmetrical lamination structure are used on both the upper and lower layers. The similar materials allow for the use of the same lamination process, simplifying the number of lamination steps and operations, improving the bonding force between layers, enhancing structural stability, and preventing board warping defects during lamination. Furthermore, this invention embeds a chip-containing ceramic module within the substrate layer and places multiple copper pillars below the ceramic module for heat dissipation, enabling the PCB to possess both high heat dissipation and insulation performance. Attached Figure Description
[0068] Figure 1 A schematic diagram of the PCB fabrication process in Example 1;
[0069] Figure 2 This is a schematic diagram of the ceramic module preparation process in Example 1;
[0070] Figure 3 This is a schematic diagram of the PCB fabrication process in Comparative Example 1;
[0071] Figure 4 This is an image of the PCB in Example 1 where no warping has occurred;
[0072] Figure 5 This is an image showing the warped PCB in Comparative Example 1;
[0073] Figure 6 Images showing that the copper foil layer and resin layer inside the PCB in Example 1 did not separate using an ultra-high-definition microscope;
[0074] Figure 7 Images showing the delamination of the copper foil layer and heat dissipation material layer inside the PCB in Comparative Example 1, observed using an ultra-high-definition microscope;
[0075] Explanation of reference numerals in the attached diagram: L1 - first copper foil layer, L2 - second copper foil layer, L3 - third copper foil layer, L4 - fourth copper foil layer, L5 - fifth copper foil layer, L6 - sixth copper foil layer. Detailed Implementation
[0076] To better illustrate the purpose, technical solution, and advantages of this invention, specific embodiments will be used to further explain the invention below. Unless otherwise specified, the test methods used in the embodiments and / or comparative examples are conventional methods; the materials and reagents used, unless otherwise specified, are commercially available.
[0077] Example 1
[0078] A method for fabricating a PCB, the specific structural schematic diagram is as follows: Figure 1 As shown, it includes the following steps:
[0079] S1. Take the substrate layer, which includes a 1.067mm thick intermediate core board (copper-free, mainly composed of resin and inorganic fillers) and upper and lower third and fourth copper foil layers, each with a thickness of 36μm; perform dry film application, exposure, development, etching and film removal on the third and fourth copper foil layers on the substrate layer respectively to complete the pattern transfer, so as to set the inner layer circuit on the third and fourth copper foil layers;
[0080] S2. A through groove is milled into the substrate layer by punching with a steel die to form a through groove. The area of the through groove is the area where the ceramic module is embedded. The depth of the through groove is 1.14mm, and the length and width are both 11.1mm. The thickness of the ceramic module is 1.12mm, and the length and width are both 11×11mm.
[0081] S3. Use an adhesive applicator to apply high-temperature adhesive tape to the underside (back side) of the substrate layer so that the underside of the through groove is blocked by the tape to form a blind groove. The tape is a combination of a 25μm thick polyimide layer and a 25μm thick acrylic adhesive layer.
[0082] S4. The ceramic module is fixed in the blind groove area by the tape at the bottom of the blind groove, and there are gaps between the four sides of the ceramic module and the substrate layer, and the gap between the ceramic module and the through groove is 50μm.
[0083] S5. Two adhesive sheets and a second copper foil layer are sequentially covered on the upper side of the substrate layer. The adhesive sheets are close to the third copper foil layer on the substrate layer. Each adhesive sheet is a PP resin-based semi-cured sheet with a thickness of 65μm. The thickness of the second copper foil is 18μm. Then, it is hot-pressed at 4MPa and 235℃ to allow the adhesive sheet to fill the gaps in the blind groove and the space between the second and third copper foil layers. After cooling, a resin layer is formed.
[0084] S6. Remove the tape from the underside of the substrate layer;
[0085] S7. Two adhesive sheets and a fifth copper foil layer are sequentially stacked on the underside of the substrate layer. The adhesive sheets are close to the fourth copper foil layer on the substrate layer. Each adhesive sheet is a PP resin-based semi-cured sheet with a thickness of 65μm. The thickness of the second copper foil is 18μm. Then, it is subjected to hot pressing at 4MPa and 235℃ to allow the adhesive sheet to flow and fill the space between the fourth and fifth copper foil layers. After cooling, a resin layer is formed.
[0086] S8. Multiple connection holes are formed by laser drilling, penetrating the second copper foil layer and the resin layer between the second copper foil layer and the ceramic module, as well as penetrating the fifth copper foil and the resin layer between the fifth copper foil and the ceramic module, to expose the electrode connection points on the upper surface and the connection points on the lower surface of the ceramic module, respectively. The diameter of the connection holes is 200μm. Copper is electroplated into the connection holes to form multiple copper pillars. The multiple copper pillars between the second copper foil layer and the ceramic module form an electrical connection between the two. The multiple copper pillars between the ceramic module and the fifth copper foil connect the two so that the heat in the ceramic module can be transferred out through these copper pillars. In this embodiment, 80 copper pillars with a diameter of 200 micrometers are set in a space with a length and width of 10*10mm between the ceramic module and the fifth copper foil directly below the ceramic module, with a spacing of 1mm between the copper pillars, forming a dense copper pillar area.
[0087] S9. A 0.4 mm diameter channel is set through the second copper foil layer, the substrate layer and the fifth copper foil layer. A copper filling layer is electroplated on the inner wall of the channel. The copper thickness of the channel wall is 30 μm. The channel is not completely filled with copper. Then, heat dissipation resin is filled in the channel. The heat dissipation resin is a mixture of heat dissipation filler (generally aluminum nitride or boron nitride, etc.) and resin.
[0088] S10. Dry film is applied, exposed, developed, etched and stripped sequentially on the second copper foil layer and the fifth copper foil layer respectively to complete the pattern transfer, so as to set the inner layer circuit on the second copper foil layer and the fifth copper foil layer respectively.
[0089] S11. Two bonding sheets and the first copper foil layer are sequentially stacked on the second copper foil layer. Each bonding sheet is a PP resin-based prepreg with a thickness of 78 μm, and the second copper foil has a thickness of 12 μm. A bonding sheet and a sixth copper foil layer are sequentially stacked on the fifth copper foil layer. Each bonding sheet is a PP resin-based prepreg with a thickness of 78 μm, and the second copper foil has a thickness of 12 μm. The mixture is then subjected to hot pressing at 4 MPa and 235 °C to allow the bonding sheet to flow and fill the spaces between the first and second copper foil layers and between the fifth and sixth copper foil layers. After cooling, a resin layer is formed.
[0090] S12. Multiple connection holes are formed by laser drilling, penetrating the first copper foil layer and the resin layer between the first and second copper foil layers, as well as penetrating the sixth copper foil layer and the resin layer between the sixth and fifth copper foil layers, to expose the connection points on the second and fifth copper foil layers. The diameter of the connection holes is 150 μm. Copper is electroplated into the connection holes to form multiple copper pillars. The multiple copper pillars between the first and second copper foil layers electrically connect the two layers, enabling the two layers to... The circuit enables electrical connections that conduct large currents, and although it primarily serves as an electrical connection, it also has a certain heat dissipation function. The copper pillars between the sixth and fifth copper foil layers connect the two layers to further dissipate heat from the ceramic module. In this embodiment, 80 copper pillars with a diameter of 150 micrometers are arranged in a space of 10*10mm between the sixth and fifth copper foil layers, with a spacing of 1mm between the pillars, forming a dense copper pillar area that is more conducive to heat dissipation.
[0091] In steps S8, S9, and S12, during the electroplating process, copper metal is deposited not only in the corresponding holes but also on the corresponding copper foil layers, resulting in varying degrees of increase in the thickness of each copper foil layer. Subsequent measurements show that in the PCB product of this embodiment, the thickness of the first and sixth copper foil layers is approximately 60 μm, the thickness of the second and fifth copper foil layers is approximately 120 μm, and the thickness of the third and fourth copper foil layers is approximately 36 μm.
[0092] S13. Dry film is applied, exposed, developed, etched, and stripped sequentially on the first copper foil layer to complete the pattern transfer and form the outer layer circuit on the first copper foil layer. Then, solder resist treatment (green oil) is performed, and nickel-palladium-gold is deposited in the non-solder resist area to prevent oxidation and to solder components. Finally, the PCB is obtained by cutting.
[0093] The ceramic module used in this embodiment is manufactured in the following manner, and its structural diagram is shown below. Figure 3 As shown:
[0094] (1) Remove dirt and impurities from the surfaces of the silicon nitride ceramic sheet and the two copper foils, wherein the thickness of the ceramic sheet is 0.25 mm and the thickness of a single copper foil is 0.3 mm;
[0095] 2) The thawed and centrifuged active metal solder (generally silver, titanium, zirconium or copper metal and any combination thereof) is printed onto the surface of the ceramic sheet using a thick film screen printing method.
[0096] 3) Place the cleaned copper foil on both sides of the ceramic sheet coated with metal solder to form a structure of copper foil, brazing filler metal, ceramic sheet, brazing filler metal and copper. Place the assembled copper-clad ceramic board into a vacuum brazing furnace and melt the solder at high temperature to form a strong welded connection between the ceramic sheet and the two copper foil layers to obtain a ceramic substrate. The brazing temperature is generally controlled between 800℃ and 900℃, and the holding time is 5-10 minutes.
[0097] 4) Transfer patterns between the upper and lower layers of the ceramic substrate;
[0098] 5) Laser cutting forms a single ceramic substrate, and a blind trench is formed on the copper foil layer on the upper surface of the ceramic substrate to place the chip. The depth of the blind trench is greater than the thickness of the chip.
[0099] 6) The silicon carbide chip is sintered in the blind groove of the ceramic plate to form a ceramic module. The thickness of the ceramic module is 1.12mm and the length and width are both 11×11mm.
[0100] Comparative Example 1
[0101] A method for fabricating a PCB, the specific structural schematic diagram is as follows: Figure 3 As shown, it includes the following steps:
[0102] a. Take the substrate layer, which includes a 1.23mm thick intermediate core board and upper and lower third and fourth copper foil layers, each with a thickness of 30μm; perform dry film application, exposure, development, etching and film removal on the third and fourth copper foil layers on the substrate layer respectively to complete the pattern transfer, so as to set the inner layer circuit on the third and fourth copper foil layers;
[0103] b. A through-slot is milled into the substrate layer using a steel die punching method. The area of this through-slot is where the SiC chip module is embedded. The depth of the through-slot is 1.29 mm, and the length and width are both 11.1 mm.
[0104] c. Use an adhesive applicator to apply high-temperature adhesive tape to the underside (back side) of the substrate layer so that the underside of the through groove is blocked by the tape to form a blind groove. The tape is a combination of a 25μm thick polyimide layer and a 25μm thick acrylic adhesive layer.
[0105] d. The SiC chip is directly sintered onto a pure copper block with a thickness of 1.27 mm and a length and width of 11×11 mm to obtain a SiC chip module; the SiC chip module is fixed in the area inside the blind slot by the tape at the bottom of the blind slot, and there are gaps between the four sides of the SiC chip module and the substrate layer, and the gap between the SiC chip module and the through slot is 50 μm.
[0106] e. Two adhesive sheets and a second copper foil layer are sequentially covered on the upper side of the substrate layer. The adhesive sheets are close to the third copper foil layer on the substrate layer. Each adhesive sheet is a PP resin-based semi-cured sheet with a thickness of 65μm. The thickness of the second copper foil is 18μm. Then, it is hot-pressed at 4MPa and 235℃ to allow the adhesive sheet to fill the gaps in the blind groove and the space between the second and third copper foil layers. After cooling, a resin layer is formed.
[0107] f. Remove the tape from the underside of the substrate layer;
[0108] g. Two adhesive sheets and a fifth copper foil layer are sequentially stacked on the underside of the substrate layer. The adhesive sheets are close to the fourth copper foil layer on the substrate layer. Each adhesive sheet is a PP resin-based semi-cured sheet with a thickness of 65μm. The thickness of the second copper foil is 18μm. Then, it is subjected to hot pressing at 4MPa and 235℃ to allow the adhesive sheet to flow and fill the space between the fourth and fifth copper foil layers. After cooling, a resin layer is formed.
[0109] h. Multiple connection holes are formed by laser drilling, penetrating the second copper foil layer and the resin layer between the second copper foil layer and the SiC chip module, as well as penetrating the fifth copper foil and the resin layer between the fifth copper foil and the SiC chip module, to expose the electrode connection points on the upper surface and the connection points on the lower surface of the SiC chip module, respectively. The diameter of the connection holes is 200μm. Copper is electroplated into the connection holes to form multiple copper pillars. The multiple copper pillars between the second copper foil layer and the SiC chip module form an electrical connection between the two, and the multiple copper pillars between the SiC chip module and the fifth copper foil connect the two so that the heat in the SiC chip module can be transferred out through these copper pillars.
[0110] i. Set up a channel with a diameter of 0.4 mm that penetrates the second copper foil layer, the substrate layer and the fifth copper foil layer. Electroplat a copper filling layer on the inner wall of the channel. The copper thickness of the channel wall is 30 μm. The channel is not completely filled with copper. Then fill the channel with heat dissipation resin. The heat dissipation resin is a mixture of heat dissipation filler (generally aluminum nitride or boron nitride, etc.) and resin.
[0111] A channel is provided that penetrates the second copper foil layer, the substrate layer, and the fifth copper foil layer, and the inner wall of the channel is filled with a copper layer.
[0112] j. Dry film is applied, exposed, developed, etched and stripped sequentially on the second copper foil layer and the fifth copper foil layer to complete the pattern transfer, so as to set the inner layer circuit on the second copper foil layer and the fifth copper foil layer respectively.
[0113] k. Two bonding sheets and the first copper foil layer are sequentially stacked on the second copper foil layer. Each bonding sheet is a PP resin-based prepreg with a thickness of 78 μm, and the second copper foil has a thickness of 12 μm. A heat dissipation adhesive film and a sixth copper foil layer are sequentially stacked on the fifth copper foil layer. The heat dissipation adhesive film is a film composed of heat dissipation filler (generally aluminum nitride or boron nitride, etc.) and resin, with a thickness of 150 μm, and the second copper foil has a thickness of 12 μm. Then, a hot-pressing treatment is performed at 4 MPa and 235 °C to allow the bonding sheet to flow and fill the space between the first and second copper foil layers, and the space between the fifth and sixth copper foil layers. After cooling, a resin layer is formed.
[0114] 1. Multiple connection holes are drilled using laser drilling to penetrate the first copper foil layer and the resin layer between the first and second copper foil layers, respectively, to expose the connection points on the second copper foil layer. The diameter of the connection holes is 150 μm, and the diameter of the connecting holes is 0.2 μm. Copper is electroplated into the connection holes to form multiple copper pillars. The multiple copper pillars between the first and second copper foil layers electrically connect the first and second copper foil layers, thus achieving electrical connection between the circuits of the two layers.
[0115] Then, dry film is applied, exposed, developed, etched, and stripped onto the first copper foil layer in sequence to complete the pattern transfer and form the outer layer circuit on the first copper foil layer. After solder resist treatment (green oil), nickel-palladium-gold is deposited in the non-solder resist area to prevent oxidation and to solder components. Finally, after cutting, the PCB is obtained.
[0116] Example 1 and comparative PCB physical diagrams are as follows: Figure 4-5 As shown, the PCB warpage rate of Example 1 is <0.75%, which can be considered as no obvious warpage. In contrast, the PCB warpage rate of Comparative Example 1 is 2%-4%, and a significant degree of warpage can be clearly observed.
[0117] After reflow soldering the PCBs of Example 1 and the comparative example six times at 260°C, the resin layer formed by the prepreg and the copper foil layer of the PCB in Example 1 did not show obvious delamination. Figure 6 As shown; however, in Comparative Example 1, the heat dissipation material layer and copper foil layer in the PCB show obvious delamination, such as... Figure 7 As shown. Tests revealed that the bonding strength between the resin layer and the copper foil in Example 1 PCB is typically 1.2 N / mm, which is much greater than the bonding strength between the heat dissipation material layer and the copper foil in Comparative Example 1 (0.4 N / mm).
[0118] The thermal resistance (TRT) is a common indicator of PCB heat dissipation performance. A lower TRT indicates better heat dissipation, calculated from the temperature difference between the chip's working surface and the outermost water-cooled heatsink. Simulation results show that the TRT of the single-chip ceramic module in Example 1 is 0.53, while the TRT of the single-chip module in Comparative Example 1 is 0.76. This demonstrates that the PCB in Example 1 has a significantly lower TRT than that in Comparative Example 1, exhibiting superior heat dissipation performance. Furthermore, the silicon nitride ceramic sheet within the ceramic module achieves an insulation strength of 15KV / mm, which is superior to the insulation performance of existing thermal adhesive films, significantly reducing the insulation performance of the PCB.
[0119] In summary, the PCB prepared by the method of the present invention has high heat dissipation performance, structural stability and insulation performance, as well as low warpage, and has superior overall performance.
[0120] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the essence and scope of the technical solutions of the present invention.
Claims
1. A PCB, characterized in that, From top to bottom, it includes a first copper foil layer, a second copper foil layer, a substrate layer, a fifth copper foil layer, a sixth copper foil layer, and a resin layer separating the two adjacent layers. The substrate layer includes a core board, a third copper foil layer and a fourth copper foil layer respectively disposed on the upper and lower surfaces of the core board, and a through groove penetrating the substrate layer along the thickness direction. The through groove is filled with a resin layer, and the ceramic module is embedded in the resin layer in the through groove. The ceramic module includes a ceramic substrate and a chip disposed on the ceramic substrate. Inner layer circuitry is provided on the second copper foil layer, the third copper foil layer, the fourth copper foil layer, and the fifth copper foil layer respectively; outer layer circuitry is provided on the first copper foil layer. Between the first copper foil layer and the second copper foil layer, between the second copper foil layer and the ceramic module, between the ceramic module and the fifth copper foil layer, and between the fifth copper foil layer and the sixth copper foil layer, there are independently existing resin layers that penetrate between the two layers along the thickness direction and connect the two layers.
2. The PCB as described in claim 1, characterized in that, The substrate layer includes at least one of the following: The core board has a thickness of 0.8-1.32 mm, and the third and fourth copper foil layers have a thickness greater than 10 μm. The thickness of the core plate is greater than or equal to the thickness of the ceramic module, and the thickness of the ceramic module is 0.2-2mm.
3. The PCB as described in claim 1, characterized in that, Includes at least one of the following: The thicknesses of the second and fifth copper foil layers are greater than 10 μm; The thicknesses of the first copper foil layer and the sixth copper foil layer are greater than 10 μm; The diameter of the copper pillar is 100-300μm; In the ceramic module, the ceramic substrate includes a ceramic sheet and copper foil layers respectively disposed on the upper and lower sides of the ceramic sheet, and the chip is disposed on at least one side of the copper foil layer; The copper foil layer is provided with blind slots, which are filled with resin layers. The chip is embedded in the resin layer within the blind slots. The chip includes a SiC power chip. The thickness of the ceramic sheet is 0.2-0.4 mm, and the thickness of the copper foil is 0.3-0.5 mm.
4. The PCB as described in claim 1, characterized in that, It also includes channels that penetrate the second copper foil layer, the substrate layer, the fifth copper foil layer, and the resin layer between the two adjacent layers. The diameter of the channels is 0.3-0.5 mm, and a copper layer is deposited on the inner wall of the channels. The thickness of the copper layer is greater than or equal to 25 μm.
5. A method for manufacturing a PCB according to any one of claims 1-4, characterized in that, Includes the following steps: S1. Perform patterning on the third and fourth copper foil layers on the substrate layer respectively, so as to set the inner layer circuit on the third and fourth copper foil layers. S2. A through groove is provided on the substrate layer, penetrating the substrate layer; S3. An adhesive tape is placed on the underside of the substrate layer so that the underside of the through groove is blocked by the adhesive tape to form a blind groove; S4. The ceramic module is fixed in the blind groove by the tape in the blind groove, and there is a gap between the side of the ceramic module and the substrate layer. S5. A first adhesive sheet and a second copper foil layer are sequentially covered on the upper side of the substrate layer, with the first adhesive sheet close to the third copper foil layer on the substrate layer; then, a hot pressing process is performed so that the first adhesive sheet flows and fills the gap of the blind groove and forms a corresponding resin layer. S6. Remove the tape; S7. A second adhesive sheet and a fifth copper foil layer are sequentially stacked on the underside of the substrate layer, with the second adhesive sheet close to the fourth copper foil layer on the substrate layer; then, a hot-pressing process is performed to allow the second adhesive sheet to flow adhesive and form a resin layer. S8. A plurality of connecting holes are respectively provided through the second copper foil layer and the resin layer between the second copper foil layer and the ceramic module, and through the fifth copper foil and the resin layer between the fifth copper foil and the ceramic module, and copper is filled in the connecting holes to form a plurality of copper pillars; S9. Optionally, a channel is provided that penetrates the second copper foil layer, the substrate layer and the fifth copper foil layer, a copper layer is filled on the inner wall of the channel, and then the channel is filled with heat-dissipating resin. S10. Perform patterning processing on the second copper foil layer and the fifth copper foil layer respectively, so as to set inner layer circuits on the second copper foil layer and the fifth copper foil layer respectively. S11. A third adhesive sheet and a first copper foil layer are sequentially stacked on the second copper foil layer, and a fourth adhesive sheet and a sixth copper foil layer are sequentially stacked on the fifth copper foil layer; then, a hot pressing process is performed so that the third adhesive sheet and the fourth adhesive sheet are glued and form corresponding resin layers. S12. A plurality of connecting holes are respectively provided through the first copper foil layer and the resin layer between the first copper foil layer and the second copper foil layer, and through the sixth copper foil layer and the resin layer between the sixth copper foil layer and the fifth copper foil layer, and copper is filled in the connecting holes to form a plurality of copper; S13. The first copper foil layer is patterned to form an outer layer circuit on the first copper foil layer, and then subjected to solder resist treatment, immersion nickel-palladium-gold treatment and cutting to obtain the PCB.
6. The PCB fabrication method as described in claim 5, characterized in that, In steps S1, S10 and S13, the patterning process includes applying dry film, exposure, development, etching and film removal.
7. The PCB fabrication method as described in claim 5, characterized in that, Includes at least one of the following: In step S2, the through slot is set by at least one of steel die punching, mechanical milling, CO2 laser drilling or UV cutting; In steps S7 and S12, the connection hole is set by laser drilling; In step S10, the method of setting the channel includes laser drilling.
8. The PCB fabrication method as described in claim 5, characterized in that, In step S3, the tape sequentially comprises a polyimide layer with a thickness of 20-30 μm and an acrylic adhesive layer with a thickness of 20-30 μm.
9. The method for manufacturing a PCB as described in claim 5, characterized in that, Includes at least one of the following: In steps S5, S7 and S11, the thicknesses of the first adhesive sheet, the second adhesive sheet, the third adhesive sheet and the fourth adhesive sheet are each independently selected from 60-200 μm; In steps S5, S7 and S11, the first adhesive sheet, the second adhesive sheet, the third adhesive sheet and the fourth adhesive sheet are each independently selected from PP adhesive sheet or ABF semi-cured adhesive sheet; In steps S5, S7 and S11, the temperature of the hot pressing treatment is independently selected from 220-240°C, and the pressure of the hot pressing treatment is independently selected from 1-10 MPa.
10. The method for manufacturing a PCB as described in claim 5, characterized in that, Includes at least one of the following: In steps S8 and S12, the method of filling copper includes electroplating; in step S10, the method of depositing copper layer includes electroplating. The method for preparing the ceramic module includes the following steps: soldering copper foil to two surfaces of a ceramic sheet using a metal solder to obtain a component; patterning and cutting the component sequentially to obtain a single ceramic substrate; and setting a chip on the ceramic substrate by sintering to obtain the ceramic module.