A current multiplication type polycrystalline silicon light emitting device
By introducing a multiplier current and optimizing the doping concentration gradient in the space charge region of the PN junction in silicon-based light-emitting devices, the problem of low luminous efficiency of silicon-based light-emitting devices is solved, and a significant improvement in luminous efficiency is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-10-27
- Publication Date
- 2026-04-07
AI Technical Summary
The low luminous efficiency of existing silicon-based light-emitting devices is mainly due to the fact that silicon is an indirect bandgap material with low inherent luminous efficiency and the lack of external accelerating factors in the avalanche breakdown process.
Based on the reverse-biased diode light-emitting device, an additional multiplication current is introduced and the doping concentration gradient of the PN junction space charge region is optimized to form an electric field spike. The avalanche breakdown process is accelerated through device structure optimization.
It significantly improves the luminous efficiency of the device by increasing the number and generation efficiency of electron-hole pairs through the generation of multiplied current and optimization of electric field.
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Figure CN121038461B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the fields of optoelectronic sensing and optical communication, and relates to silicon-based light-emitting devices, specifically providing a current-multiplying polycrystalline silicon light-emitting device. Background Technology
[0002] Silicon-based light-emitting devices refer to light-emitting devices made of silicon materials. Their light-emitting mechanism is as follows: When a reverse bias voltage is applied across the silicon-based PN junction, as the voltage increases, the electric field strength in the space charge region of the PN junction gradually increases, causing valence band electrons in the silicon material to gain enough energy to jump into the conduction band, thereby forming electron-hole pairs. This results in an exponential increase in the number of charge carriers, leading to avalanche breakdown. After avalanche breakdown, photons are generated during the recombination process of electron-hole pairs. These photons are emitted from the material and become light, thus making the material emit light.
[0003] Currently, the biggest advantage of silicon-based light-emitting devices (LEDs) is that they can be manufactured using existing mature silicon-based CMOS or BCD processes, thus achieving process compatibility between the device and the driving circuit. This allows for the integration of the light-emitting device and the control circuit onto the same chip, enabling on-chip integration of optoelectronic chips such as photodetectors, microdisplay chips, and optical transmission chips. However, silicon-based LEDs also suffer from a fatal flaw: low luminous efficiency. The main reasons are: firstly, silicon is an indirect bandgap material, resulting in inherently low luminous efficiency; secondly, the avalanche breakdown of silicon diodes is essentially a current multiplication process, primarily generated by high-energy electrons colliding with the material's own crystal lattice, lacking external acceleration.
[0004] In summary, to address the shortcomings of low luminous efficiency in existing silicon-based light-emitting devices, this invention provides a current-multiplying polycrystalline silicon light-emitting device. Summary of the Invention
[0005] The purpose of this invention is to provide a current-multiplying polycrystalline silicon light-emitting device to solve the problem of low luminous efficiency in existing silicon-based light-emitting devices. This invention optimizes the structure of the light-emitting device by introducing an additional multiplying current on the basis of reverse-biased diode light emission, thereby accelerating the avalanche breakdown process of the light-emitting device. At the same time, it optimizes the doping concentration gradient in the space charge region of the PN junction, so that the electric field forms an electric field peak in the space charge region, which is conducive to the formation of high-energy charge carriers in the space charge region, and ultimately significantly improves the luminous efficiency of the device.
[0006] To achieve the above objectives, the technical solution adopted by the present invention is as follows:
[0007] A current-multiplying polycrystalline silicon light-emitting device includes: a substrate layer, a polycrystalline silicon layer, an encapsulation layer, a metal positive electrode, and a metal negative electrode; wherein, the polycrystalline silicon layer is grown on the substrate layer and formed by doping into P1 region, N1 region, Nx region, Px region, P2 region, and N2 region arranged sequentially from left to right, wherein P1 region, Px region, and P2 region are P-type doped regions, and N1 region, Nx region, and N2 region are N-type doped regions; the encapsulation layer covers the polycrystalline silicon layer, and the metal positive electrode and metal negative electrode are respectively disposed on the encapsulation layer, wherein the metal positive electrode is connected to the P1 region and the N1 region through metal vias, and the metal negative electrode is connected to the P2 region and the N2 region through metal vias.
[0008] Furthermore, in the top view, the Nx region and the Px region adopt a rectangular structure of the same size, and the P1 region, N1 region, P2 region, and N2 region adopt a right-angled trapezoidal structure of the same size; the P1 region is arranged facing forward, the N1 region is arranged in reverse, and the P1 region and the N1 region are joined along the diagonal waist to form a rectangular structure; the P2 region is arranged in reverse, the N2 region is arranged facing forward, and the P2 region and the N2 region are also joined along the diagonal waist to form a rectangular structure.
[0009] Furthermore, the metal positive electrode is disposed along the upper bottom of region P1, and the metal negative electrode is disposed along the upper bottom of region N2.
[0010] Furthermore, the doping concentrations of the Nx and Px regions exhibit a gradient distribution, decreasing linearly from the interface between the Nx and Px regions towards both sides.
[0011] Furthermore, the doping concentration at the interface between the Nx and Px regions is 1.4 × 10⁻⁶. 20 cm -3 ~1.6×10 20 cm -3 The doping concentration in the Nx region decreases linearly to the same level as that in the N1 region, and the doping concentration in the Px region decreases linearly to the same level as that in the P2 region.
[0012] Furthermore, the doping concentrations of regions P1, P2, N1, and N2 are uniformly distributed and have the same concentration.
[0013] Furthermore, the doping concentration of regions P1, P2, N1, and N2 is all 1.7 × 10⁻⁶. 17 cm -3 ~1.9×10 17 cm -3 .
[0014] Furthermore, both the substrate layer and the encapsulation layer are SiO2 layers.
[0015] Based on the above technical solution, the beneficial effects of the present invention are as follows:
[0016] This invention provides a current-multiplying polycrystalline silicon light-emitting device. On one hand, Nx and Px regions are introduced into the conventional PN junction space charge region, and gradient doping is performed in both regions, with a linear decrease from the interface between the Nx and Px regions towards both sides. This optimizes the doping concentration gradient in the PN junction space charge region, causing an electric field peak to form in the space charge region, which is beneficial for the formation of high-energy carriers. On the other hand, through device structure optimization, including the right-angled trapezoidal design of the P-type doped regions (P1 and P2 regions) and N-type doped regions (N1 and N2 regions) on both sides, and the optimization of matching electrodes (positive and negative electrodes), the parasitic resistance of the long base of the right-angled trapezoid is artificially increased to promote the generation of multiplication current paths. This allows avalanche currents to excite additional multiplication currents, which in turn continue to excite the generation of avalanche currents, thereby increasing the number and efficiency of electron-hole pair generation and improving the luminous efficiency of the light-emitting region. In summary, this invention significantly improves the luminous efficiency of the device through the above two improvement mechanisms. Attached Figure Description
[0017] Figure 1 This is a schematic diagram of the current-multiplying polycrystalline silicon light-emitting device in this invention.
[0018] Figure 2 This is an equivalent circuit model diagram of the current-multiplying polycrystalline silicon light-emitting device in this invention. Detailed Implementation
[0019] To make the objectives, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments.
[0020] This embodiment provides a current-multiplying polycrystalline silicon light-emitting device, the structure of which is as follows: Figure 1 As shown, it specifically includes: a SiO2 substrate layer, a polycrystalline silicon layer, a SiO2 encapsulation layer, a metal positive electrode, and a metal negative electrode; the polycrystalline silicon layer is grown on the SiO2 substrate layer and is doped to form P1 region, N1 region, Nx region, Px region, P2 region, and N2 region arranged sequentially from left to right; the SiO2 encapsulation layer covers the polycrystalline silicon layer, and the metal positive electrode and metal negative electrode are respectively disposed on the SiO2 encapsulation layer. The metal positive electrode is connected to the P1 region and the N1 region (ohmic contact) through metal vias, and the metal negative electrode is connected to the P2 region and the N2 region (ohmic contact) through metal vias.
[0021] The SiO2 substrate has a thickness of 0.5 μm, and the polycrystalline silicon layer has a length of 66 μm, a width of 10 μm, and a thickness of 0.3 μm.
[0022] Regions P1, Px, and P2 are P-type doped regions, and regions N1, Nx, and N2 are N-type doped regions. The doping concentration in regions P1, P2, N1, and N2 is uniformly distributed, with a doping concentration of 1.85 × 10⁻⁶. 17 cm -3 The doping concentrations in the Nx and Px regions exhibit a gradient distribution, decreasing linearly from the interface between the Nx and Px regions towards both sides. The maximum doping concentration (i.e., at the interface between the Nx and Px regions) is 1.58 × 10⁻⁶. 20 cm -3 The minimum doping concentration (i.e., at the interface between the Nx and N1 regions, and at the interface between the Px and P2 regions) is 1.85 × 10⁻⁶. 17 cm -3 .
[0023] In the top view, the Nx region and the Px region adopt a rectangular structure of the same size, and the P1 region, N1 region, P2 region, and N2 region adopt a right-angled trapezoidal structure of the same size; the P1 region is arranged facing forward, the N1 region is arranged in reverse, and the P1 region and the N1 region are joined along the diagonal waist to form a rectangular structure; the P2 region is arranged in reverse, the N2 region is arranged facing forward, and the P2 region and the N2 region are also joined along the diagonal waist to form a rectangular structure; furthermore, the metal positive electrode is arranged along the upper bottom of the P1 region, and the metal negative electrode is arranged along the upper bottom of the N2 region.
[0024] It should be noted that, in this invention, the "positive setting" refers to the lower base of the right trapezoidal structure being longer than the upper base, and correspondingly, the "reverse setting" refers to the lower base of the right trapezoidal structure being shorter than the upper base. The positive setting and the reverse setting are described in the same top view.
[0025] In terms of working principle:
[0026] When a positive voltage is applied between the positive and negative metal electrodes (positive electrode connected to positive potential, negative electrode connected to zero potential), the PN junction formed in the N1-Nx-Px-P2 region is reverse biased. As the voltage increases, avalanche breakdown occurs in the PN junction of the N1-Nx-Px-P2 region. The direction of the avalanche current is: positive electrode - N1-Nx-Px-P2 - negative electrode. During this process, electron-hole pair recombination generates photons, and the device emits light. The emitting region is located in the space charge region, such as... Figure 1 As shown; due to the gradient distribution of doping concentration in the Nx-Px region, the concentration is higher towards the center (at the interface between the Nx and Px regions), which causes electric field spikes to form in the luminescent region, making the energy of high-energy electrons more concentrated in the luminescent region, which is conducive to the occurrence of transitions.
[0027] Equivalent circuit model such as Figure 2As shown, Q1 is a PNP transistor formed in the P1-N1-Nx-Px-P2 region, Q2 is an NPN transistor formed in the N1-Nx-Px-P2-N3 region, R1 is the parasitic resistance of the P1 region connected to the metal positive terminal, and R2 is the parasitic resistance of the N2 region connected to the metal negative terminal. Since both the P1 and N2 regions adopt a forward-oriented right-angled trapezoidal structure, the longer lower base is conducive to forming a larger parasitic resistance. At the same time, the matching metal positive and metal negative terminals set along the upper base of the P1 and N2 regions respectively make the distance from the metal via used for connection to the parasitic resistance region farther, which is more conducive to forming a relatively large parasitic resistance. The larger parasitic resistances R1 and R2 can promote the generation of multiplied current paths.
[0028] As the avalanche current generated by avalanche breakdown gradually increases, a portion of the current generates a voltage drop across the parasitic resistor R1. This voltage drop forward-biases the emitter junction of the PNP transistor Q1, causing it to conduct. At this point, current flows into the parasitic resistor R2. As the voltage drop across the parasitic resistor R2 gradually increases, it also forward-biases the emitter junction of the NPN transistor Q2, causing it to conduct. This further increases the current flowing through the parasitic resistor R1, forming a positive cycle of current multiplication. Ultimately, the current flowing through this path becomes increasingly larger, which is called the multiplication current. After the multiplication current is formed, it is injected into the space charge region where Nx-Px is located, exciting the existing avalanche current and accelerating its generation. This increases the number and efficiency of electron-hole pairs, thereby improving the luminous efficiency of the light-emitting region.
[0029] The above description is merely a specific embodiment of the present invention. Any feature disclosed in this specification may be replaced by other equivalent or similar features unless otherwise specified. All disclosed features, or steps in all methods or processes, may be combined in any way except for mutually exclusive features and / or steps.
Claims
1. A current-multiplying polycrystalline silicon light-emitting device, comprising: The invention comprises a substrate layer, a polycrystalline silicon layer, a packaging layer, a metal positive electrode, and a metal negative electrode; characterized in that the polycrystalline silicon layer is grown on the substrate layer and formed by doping into regions P1, N1, Nx, Px, P2, and N2 arranged sequentially from left to right, wherein regions P1, Px, and P2 are P-type doped regions, and regions N1, Nx, and N2 are N-type doped regions; the packaging layer covers the polycrystalline silicon layer, and the metal positive electrode and metal negative electrode are respectively disposed on the packaging layer, wherein the metal positive electrode is connected to regions P1 and N1 respectively through metal vias, and the metal negative electrode is connected to regions P2 and N2 respectively through metal vias; In the top view, the Nx and Px regions are rectangular structures of the same size, and the P1, N1, P2, and N2 regions are right-angled trapezoidal structures of the same size. The P1 region is oriented forward, and the N1 region is oriented backward, with the P1 and N1 regions joined along a diagonal to form a rectangular structure. The P2 region is oriented backward, and the N2 region is oriented forward, with the P2 and N2 regions also joined along a diagonal to form a rectangular structure. The metal positive electrode is disposed along the upper bottom of region P1, and the metal negative electrode is disposed along the upper bottom of region N2; The doping concentrations in the Nx and Px regions exhibit a gradient distribution, decreasing linearly from the interface between the Nx and Px regions towards both sides.
2. The current-multiplying polycrystalline silicon light-emitting device according to claim 1, characterized in that, The doping concentration at the interface between the Nx and Px regions is 1.4 × 10⁻⁶. 20 cm -3 ~1.6×10 20 cm -3 The doping concentration in the Nx region decreases linearly to the same level as that in the N1 region, and the doping concentration in the Px region decreases linearly to the same level as that in the P2 region.
3. The current-multiplying polycrystalline silicon light-emitting device according to claim 1, characterized in that, The doping concentrations in regions P1, P2, N1, and N2 are uniformly distributed and have the same concentration.
4. The current-multiplying polycrystalline silicon light-emitting device according to claim 3, characterized in that, The doping concentration of regions P1, P2, N1, and N2 is 1.7 × 10⁻⁶. 17 cm -3 ~1.9×10 17 cm -3 .
5. The current-multiplying polycrystalline silicon light-emitting device according to claim 1, characterized in that, Both the substrate layer and the encapsulation layer use SiO2 layers.
Citation Information
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