Power supply fault detection circuit and method based on state monitoring, and electronic device

Abstract

The application discloses a power failure detection circuit and method based on state monitoring, and an electronic device. The power failure detection circuit comprises a motion detection module, an input end of the motion detection module being connected with a switch node of a voltage regulation module, and the motion detection module being used for detecting whether the switch node of the voltage regulation module generates a switch activity signal; a current detection module, the current detection module being connected in series in a core voltage output circuit, and the current detection module being used for detecting a load current of the core voltage output circuit; a failure determination module, input ends of the failure determination module being respectively connected with an output end of the motion detection module, an output end of the current detection module and a SLP_S5 signal output end of a CPU, and the failure determination module being used for determining a failure type; and an output module, an input end of the output module being connected with an output end of the failure determination module, and the output module being used for outputting a failure indication signal and / or a failure code. The application reduces the dependence on personnel skills, and greatly improves production debugging and after-sales maintenance efficiency.

Description

Technical Field

[0001] This application relates to electronic circuit fault detection technology, and more particularly to a power supply fault detection circuit, power supply fault detection method and electronic device based on condition monitoring. It is especially applicable to electronic devices such as servers and PCs, and is used to accurately locate CPU core power-on abnormal faults caused by abnormal CPU assembly or abnormal back-end power supply circuit. Background Technology

[0002] With the increasing demand for computing, especially the widespread adoption of AI technology, server shipments have surged. In the R&D and production of servers, abnormal power-on of the CPU core voltage output circuit (Vcore) after startup is a common fault. Currently, traditional methods for diagnosing such faults rely on technicians using specialized equipment such as oscilloscopes to sequentially monitor the status of various voltage levels, enable signals, and power-good signals to pinpoint the fault. This approach has significant drawbacks: First, it heavily relies on experienced R&D personnel, making it unfriendly to production line testing and maintenance staff; second, the troubleshooting process is cumbersome and time-consuming, failing to accurately locate the root cause of the fault in one go, severely impacting project progress and production efficiency; finally, traditional monitoring methods typically only focus on the presence or absence of the final Vcore voltage, unable to distinguish whether the fault originates from a fault in the power supply unit itself or is caused by abnormal CPU load. For example, when an abnormal SLP_S5 signal from the CPU is detected, current technology struggles to directly determine whether this abnormality is due to a fault in the back-end power supply circuit or an assembly error in the CPU itself, such as a short circuit or open circuit. This uncertainty necessitates investing significant time in in-depth measurements, resulting in low efficiency. Therefore, there is an urgent need for a technical solution that can intelligently, quickly, and accurately locate the root cause of power supply failures. Unfortunately, there is currently no relevant technology available for reference. Summary of the Invention

[0003] This application provides a power supply fault detection circuit, a power supply fault detection method, and an electronic device based on condition monitoring, so as to at least solve the above-mentioned technical problems existing in the prior art.

[0004] According to a first aspect of this application, a power supply fault detection circuit based on condition monitoring is provided, wherein the power supply fault detection circuit is connected to a voltage regulation module and a CPU core voltage output circuit (Vcore) in an electronic device, respectively; the power supply fault detection circuit includes:

[0005] An action detection module, whose input terminal is connected to the switching node of the voltage regulation module, is used to detect whether the switching node of the voltage regulation module generates a switching activity signal;

[0006] A current detection module is connected in series with the core voltage output circuit to detect the load current on the output path of the core voltage output circuit.

[0007] The fault determination module has its input terminals connected to the output terminals of the action detection module, the current detection module, and the CPU's SLP_S5 signal output terminal, respectively, and is used to determine the fault type based on the SLP_S5 signal, the action detection result of the voltage regulation module, and the current detection result.

[0008] An output module, whose input is connected to the output of the fault determination module, is used to output fault indication signals and / or fault codes.

[0009] In some alternative implementations, the motion detection module includes:

[0010] A coupling capacitor, the first end of which is connected to the switching node of the voltage regulation module, is used to couple out the AC signal from the switching node;

[0011] A rectifier diode, whose anode is connected to the second end of the coupling capacitor, is used to filter and half-wave rectify the coupled AC signal to generate a DC voltage signal representing the activity intensity of the switching node.

[0012] An RC filter circuit, whose input terminal is connected to the cathode of the rectifier diode, is used to filter the rectified pulsating DC signal and output DC voltage SW_ACTIVITY.

[0013] A voltage comparator, whose non-inverting input is connected to the output of the RC filter circuit, whose inverting input is connected to a reference voltage, and whose output outputs a detection signal to the fault determination module;

[0014] When SW_ACTIVITY is greater than the preset threshold voltage, the voltage comparator outputs a high-level signal, indicating that the voltage regulation module has started working; when SW_ACTIVITY is less than or equal to the preset threshold voltage, the voltage comparator outputs a low-level signal, indicating that the voltage regulation module has not worked.

[0015] In some alternative implementations, the coupling capacitor is used to isolate the high DC bias voltage on the switching node and couple only the AC switching signal;

[0016] The rectifier diode includes a Schottky diode, used to adapt to the processing of high-frequency pulse width modulation (PWM) signals;

[0017] The RC filter circuit includes a filter capacitor, a resistor R3, and a first capacitor. The filter capacitor is connected in parallel between the cathode of the rectifier diode and ground. One end of the resistor is connected to the cathode of the rectifier diode, and the other end is connected to one end of the first capacitor. The other end of the first capacitor is grounded to form an RC low-pass filter circuit.

[0018] In some alternative implementations, the current detection module includes:

[0019] The sampling resistor is connected in series in the output path of the CPU core voltage, and a differential voltage V_sense+ and V_sense- is generated across its two ends, which are proportional to the load current.

[0020] A current-sensing amplifier, whose input terminals are respectively connected to the two ends of the sampling resistor, is used to read the differential voltage and amplify it into a voltage signal V_ISENSE to ground. The V_ISENSE satisfies the formula V_ISENSE=I_load×R_sense×Gain, where I_load is the load current, R_sense is the resistance value of the sampling resistor, and Gain is the amplification factor of the current-sensing amplifier.

[0021] The output of the current sensing amplifier is connected to the fault determination module to transmit the V_ISENSE signal to the fault determination module.

[0022] In some optional embodiments, the fault determination module includes a complex programmable logic device (CPLD), which continuously monitors the SLP_S5 signal and starts a timer when it detects that the SLP_S5 signal has gone low.

[0023] Within the timer's operating window, the SW_DETECT and V_ISENSE signals are continuously sampled;

[0024] If the SW_DETECT signal remains low, the voltage regulation module is considered to be faulty.

[0025] If the SW_DETECT signal is high and the V_ISENSE signal momentarily exceeds the first set current and then returns to zero, it is determined that the CPU is short-circuited.

[0026] If the SW_DETECT signal is high and the V_ISENSE signal is always close to 0A, the CPU core voltage is abnormal, which indicates that the CPU is open-circuited or not installed.

[0027] If the SW_DETECT signal is high and the V_ISENSE signal shows a normal rising process and stabilizes, then the voltage regulation module is considered to have been successfully powered on.

[0028] In some alternative implementations, the reference voltage is obtained by resistor voltage division, and the value of the reference voltage includes 0.4V.

[0029] According to a second aspect of this application, a power fault detection method based on the aforementioned condition-monitoring-based power fault detection circuit is provided, comprising:

[0030] Detect whether the switching node of the voltage regulation module of the electronic device generates a switching activity signal, and detect the load current on the output path of the core voltage output circuit of the CPU of the electronic device;

[0031] The CPU's SLP_S5 signal is acquired and used to determine the fault type based on the SLP_S5 signal, the switching activity signal of the voltage regulation module, and the load current of the CPU's core voltage output circuit.

[0032] Output the corresponding fault indication signal and / or fault code according to the fault type.

[0033] In some alternative implementations, the method further includes:

[0034] The coupled pulsating DC signal of the switching node of the voltage regulation module is acquired, and the pulsating DC signal is filtered and half-wave rectified to generate a DC voltage signal representing the activity intensity of the switching node. When the DC voltage is greater than a preset threshold voltage, it indicates that the voltage regulation module has started working; when the DC voltage is less than or equal to the preset threshold voltage, it indicates that the voltage regulation module has not worked.

[0035] In some alternative implementations, the method further includes:

[0036] Continuously monitor the SLP_S5 signal, and start the timer when the SLP_S5 signal is detected to be low.

[0037] Within the timer's operating window, the SW_DETECT and V_ISENSE signals are continuously sampled;

[0038] If the SW_DETECT signal remains low, the voltage regulation module is considered to be faulty.

[0039] If the SW_DETECT signal is high and the V_ISENSE signal momentarily exceeds the first set current and then returns to zero, it is determined that the CPU is short-circuited.

[0040] If the SW_DETECT signal is high and the V_ISENSE signal is always close to 0A, the CPU core voltage is abnormal, which indicates that the CPU is open-circuited or not installed.

[0041] If the SW_DETECT signal is high and the V_ISENSE signal shows a normal rising process and stabilizes, then the voltage regulation module is considered to have been successfully powered on.

[0042] According to a third aspect of this application, an electronic device is provided, comprising the aforementioned condition monitoring-based power failure detection circuit.

[0043] According to a fourth aspect of this application, a non-transitory computer-readable storage medium is provided that stores computer instructions for causing a computer to perform the steps of the power failure detection method described above.

[0044] The technical solution of this application can accurately locate the root cause of a fault by analyzing the behavior and current characteristics of the VRM and observing the status of the indicator lights. It can even pinpoint the faulty module (VRM or CPU) and the specific fault type (short circuit or open circuit). For production line testing and maintenance personnel, faults can be quickly located by observing the color of the indicator lights, without the need for complex equipment such as oscilloscopes. This reduces reliance on personnel skills and greatly improves the efficiency of production debugging and after-sales maintenance. The design of the technical solution of this application realizes a leap from simple voltage monitoring to intelligent behavior diagnosis, which can accurately locate the root cause of the fault to the VRM or CPU and distinguish specific types such as short circuit or open circuit.

[0045] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of this application, nor is it intended to limit the scope of this application. Other features of this application will become readily apparent from the following description. Attached Figure Description

[0046] The above and other objects, features, and advantages of exemplary embodiments of this application will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings. Several embodiments of this application are illustrated in the drawings by way of example and not limitation, in which:

[0047] In the accompanying drawings, the same or corresponding reference numerals indicate the same or corresponding parts.

[0048] Figure 1 A schematic diagram of the composition structure of a power supply fault detection circuit based on condition monitoring according to an embodiment of this application is shown;

[0049] Figure 2 A schematic diagram of the composition structure of the motion detection module according to an embodiment of this application is shown;

[0050] Figure 3 This paper illustrates a schematic diagram of a power fault detection result indication process based on condition monitoring, according to an embodiment of this application.

[0051] Figure 4This is a schematic diagram illustrating the input signal acquisition and circuit processing logic determination in an embodiment of this application;

[0052] Figure 5 This is a schematic diagram of the composition structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0053] To make the objectives, features, and advantages of this application more apparent and understandable, the technical solutions in the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0054] The SLP_S5 signal is a critical CPU signal. It is active low by default, indicating that the CPU has entered S5 state. When the power button is pressed, this signal detects the falling edge of the power button, flips, and then remains high. This instructs the backend to push the power-up according to the set timing relationship and supply power to the CPU and other components. Abnormal power-up of the CPU Vcore is a common problem in electronic devices such as servers after power-on. Developers will first observe the SLP_S5 status light. However, even if the SLP_S5 signal is abnormal, it cannot determine whether the abnormal signal is caused by a problem with the backend power circuit or a CPU assembly error. To pinpoint the root cause, it is necessary to monitor the voltage, EN, and PG states sequentially to locate the fault point. After locating the fault location, further testing is needed to determine the fault type and the root cause. This method requires experienced developers, specialized testing equipment, and is inefficient due to its inability to pinpoint the problem accurately in one attempt.

[0055] The technical solution of this application goes beyond simply monitoring the presence or absence of power. Instead, by analyzing the behavior and current characteristics of the voltage regulator module (VRM) and observing the status of the set indicator lights, it can accurately pinpoint the root cause of a fault, and even precisely locate the faulty object, such as the VRM or CPU, as well as the specific fault type, such as a short circuit or open circuit. For production line testing and maintenance personnel, this eliminates the need for an oscilloscope to quickly locate the specific fault location, greatly improving debugging and maintenance efficiency and reducing reliance on highly skilled engineers. The design of this technical solution represents a leap from simple monitoring to intelligent diagnosis, improving the reliability and maintainability of electronic equipment such as server hardware.

[0056] The following specific examples further illustrate the essence of the technical solution of this application.

[0057] If the CPU in an electronic device is improperly assembled or the back-end power supply circuit is faulty, both of these faults will manifest as abnormal power-on of the CPU Vcore after powering on, but the underlying physical processes are different:

[0058] When the back-end power supply circuit malfunctions (VRM itself fails), the VRM will not attempt to operate at all after the SLP_S5 signal goes low. Alternatively, due to inherent defects such as a damaged controller, faulty MOSFETs, or an open inductor, it will fail to generate any voltage or current. In this case, the key observation point is that the VRM's switching node (SW node) will show no waveform and zero current. The SLP_S5 signal is the CPU's sleep control signal; a low level indicates that the CPU is starting the power-on process.

[0059] When the CPU is improperly assembled (short circuit or open circuit), the VRM attempts to operate after the SLP_S5 signal goes low, but immediately enters protection mode. For example, a CPU short circuit will cause the VRM to detect a large over-current at the moment of power-on, thereby triggering protection and shutting down the output. At this time, the key observation point is that the VRM's switching node (SW node) has a brief waveform (attempting to operate), but it disappears afterward, and the current spikes momentarily and then returns to zero.

[0060] Therefore, the key to judging power supply faults lies in monitoring whether the VRM takes an "attempt to work" action after receiving the SLP_S5 command, and the final current state.

[0061] Figure 1 A schematic diagram of the composition structure of a power supply fault detection circuit based on condition monitoring according to an embodiment of this application is shown, as follows: Figure 1 As shown, the power supply fault diagnosis circuit based on condition monitoring in this embodiment not only monitors the final core voltage output circuit (Vcore) voltage, but also monitors the switching activity (SW signal) and VRM current magnitude of the VRM. By observing the status indicator lights, the root cause can be quickly located when a fault occurs. The power supply fault diagnosis circuit based on condition monitoring in this embodiment is connected to the voltage regulation module and the CPU core voltage output circuit in the electronic device, respectively; the power supply fault detection circuit includes:

[0062] An action detection module, whose input terminal is connected to the switching node of the voltage regulation module, is used to detect whether the switching node of the voltage regulation module generates a switching activity signal;

[0063] A current detection module is connected in series with the core voltage output circuit to detect the load current on the output path of the core voltage output circuit.

[0064] The fault determination module has its input terminals connected to the output terminals of the action detection module, the current detection module, and the CPU's SLP_S5 signal output terminal, respectively, and is used to determine the fault type based on the SLP_S5 signal, the action detection result of the voltage regulation module, and the current detection result.

[0065] An output module, whose input is connected to the output of the fault determination module, is used to output fault indication signals and / or fault codes.

[0066] The input of the motion detection module is connected to the switch node (SW Node) of the VRM and is used to detect whether the VRM is attempting to work.

[0067] Figure 2 A schematic diagram of the composition structure of the motion detection module according to an embodiment of this application is shown, as follows: Figure 2 As shown, the action detection module of this application embodiment includes a coupling capacitor, a rectifier diode, an RC filter circuit, and a voltage comparator. This application embodiment uses a small capacitor to couple an AC signal from the switching node (SW, typically connected to an inductor and a MOSFET) of the VRM. The coupled signal is then rectified by a diode and filtered by an RC filter to generate a DC voltage SW_ACTIVITY. The level of this DC voltage represents the activity intensity of the SW node. The SW_ACTIVITY voltage is fed into a voltage comparator and compared with a low threshold V_ref_low. If it is higher than the threshold, a high level SW_DETECT is output, indicating that the VRM has started working; otherwise, the VRM has not attempted to work. V_ref_low is a preset value. The specific working principle is as follows:

[0068] Coupling capacitor: 10pF, one end connected to the switching node of the VRM, and the other end connected to the anode of the rectifier diode. Its function is to isolate the high DC bias voltage on the switching node, coupling only the AC signal from the switching node, thus preventing DC signals from interfering with subsequent circuits.

[0069] Rectifier diode: A Schottky diode is used, suitable for processing high-frequency PWM signals. Its anode is connected to the coupling capacitor, and its cathode is connected to the RC filter circuit. It is used to perform half-wave rectification on the coupled AC signal, converting the AC signal into a pulsating DC signal.

[0070] RC filter circuit: Includes filter capacitor C2, resistor R3, and first capacitor C3. For example, the capacitance of filter capacitor C2 can be 1f N, the resistance of resistor R3 can be 10k ohms, and the capacitance of first capacitor C3 can be 1uf. Filter capacitor C2 is connected in parallel between the cathode of the rectifier diode and ground, initially filtering out high-frequency impurities in the pulsating DC signal; one end of resistor R3 is connected to the cathode of the rectifier diode, and the other end is connected to one end of the first capacitor C3, with the other end of the first capacitor C3 grounded, forming an RC low-pass filter circuit, further filtering the pulsating DC signal and outputting a stable DC voltage SW_ACTIVITY.

[0071] Voltage comparator: The non-inverting input is connected to the output of the RC filter circuit to receive the SW_ACTIVITY signal; the inverting input is connected to the reference voltage V_ref_low. V_ref_low can be obtained by resistor division, such as a value of 0.4V. The output terminal sends the SW_DETECT signal to the fault diagnosis module. When SW_ACTIVITY is greater than 0.4V, the voltage comparator outputs a high-level SW_DETECT signal, indicating that the VRM has started working; when SW_ACTIVITY is less than or equal to 0.4V, it outputs a low-level SW_DETECT signal, indicating that the VRM has not attempted to work.

[0072] The coupling capacitor can be a surface-mount capacitor; the rectifier diode can be a Schottky diode of model SS34; in the RC filter circuit, C2 is a surface-mount capacitor, R3 is a surface-mount resistor, and C3 is a surface-mount capacitor; the voltage comparator can be a high-speed voltage comparator of model LM311; the reference voltage V_ref_low can be obtained by voltage division of two precision resistors (resistance ratio of 4:6).

[0073] In this application embodiment, the physical property parameter values ​​of the above-mentioned components are merely examples and are not intended to limit the technical solutions of this application embodiment.

[0074] In this embodiment, the current detection module is connected in series in the output path of Vcore to detect the magnitude of the current output by Vcore, providing current data support for fault diagnosis. The current detection module includes a sampling resistor and a current detection amplifier, and its specific structure and working principle are as follows:

[0075] Sampling resistor: Connected in series in the output path of Vcore, it generates differential voltages V_sense+ and V_sense- across its terminals when current flows through it. The high resistance accuracy of this sampling resistor ensures a linear relationship between the differential voltage and the load current, laying the foundation for accurate current detection.

[0076] Current-sense amplifier: Its input terminals are connected to both ends of the sampling resistor to read the differential voltages V_sense+ and V_sense-, and amplify them into a voltage signal V_ISENSE to ground. The relationship between V_ISENSE and the load current satisfies the formula: V_ISENSE = I_load × R_sense × Gain, where I_load is the load current, R_sense is the resistance of the sampling resistor, and Gain is the amplification factor of the current-sense amplifier. The output terminal of the current-sense amplifier is connected to the fault detection module, transmitting the V_ISENSE signal to this module for subsequent fault detection. As an example, the current-sense amplifier in this embodiment is an INA282 high-side current-sense amplifier, and its amplification factor Gain can be set to 50V / V.

[0077] The fault determination module can be implemented using a complex programmable logic device (CPLD). As the logic processing element of the entire fault detection circuit, it is responsible for receiving signals transmitted from each processing module and determining the fault according to preset logic. The CPLD can be a model EPM240T100C5, and the logic control program can be written using Quartus II software. Its specific workflow is as follows:

[0078] The CPLD continuously monitors the CPU's SLP_S5 signal. When it detects that the SLP_S5 signal has gone low, the CPLD starts its built-in timer. If the timer's timeout is set to 50ms, it ensures that signal sampling and fault determination are completed within the critical period of CPU power-on.

[0079] Within the 50ms window of the timer, the CPLD continuously samples the SW_DETECT signal output by the action detection module and the V_ISENSE signal output by the current detection module to obtain the real-time data of the VRM's operating status and the Vcore's output current.

[0080] The CPLD distinguishes the fault type based on the sampled SW_DETECT and V_ISENSE signals. Specifically, if the SW_DETECT signal is always low, it means that the VRM has not attempted to work, and it is determined to be a VRM fault.

[0081] If the SW_DETECT signal is high (VRM is working), and the V_ISENSE signal momentarily exceeds the first set current, such as 350A, and then returns to zero, it indicates that the Vcore output current is momentarily too large and then interrupted, which is determined to be a CPU short circuit.

[0082] If the SW_DETECT signal is high and the V_ISENSE signal is always close to 0A, and the Vcore voltage is abnormal (no voltage output or too low voltage), it indicates that the current cannot be transmitted to the CPU normally, and the CPU is determined to be open circuit or not installed.

[0083] If the SW_DETECT signal is high and the V_ISENSE signal shows a normal rising process and stabilizes within a reasonable range, it indicates that the CPU power-on process is normal and the power-on is considered successful.

[0084] In addition, the threshold parameters of the CPLD (such as the decision threshold of V_ISENSE of 350A) and the timer timeout (50ms) can be adjusted by software to adapt to the design requirements of different motherboard models and improve the compatibility and flexibility of the circuit.

[0085] The input terminal of the output module is connected to the output terminal of the fault determination module, and is used to output the fault determination results in an intuitive way, so that staff can quickly obtain fault information. The output module includes a four-color LED indicator and a digital signal output unit.

[0086] For example, a four-color LED indicator can be connected to a fault diagnosis module, using different colors to indicate different operating states or fault types, making it easier for on-site personnel to quickly identify them. As an example, the corresponding fault can be indicated in the following way.

[0087] Green (POWERGOOD): Indicates that the CPU has been successfully powered on and the device can start normally;

[0088] Red (VRM_FAULT): Indicates a VRM fault; the VRM needs to be checked or replaced.

[0089] Yellow (CPU_SHORT): Indicates a short circuit in the CPU or a short circuit during installation. The CPU installation needs to be checked or the CPU needs to be replaced.

[0090] Blue (CPU_OPEN): Indicates that the CPU is not installed or has poor contact. The CPU needs to be reinstalled and the contact ensured.

[0091] The digital signal output unit connects to the fault diagnosis module and the baseboard management controller (BMC) of the electronic equipment, converting the fault diagnosis result into a 2-bit fault code and sending it to the BMC. After receiving the fault code, the BMC can report the fault information to the remote administrator through the IPMI interface (Intelligent Platform Management Interface), realizing remote monitoring and management of faults and improving the convenience of equipment maintenance.

[0092] The status monitoring and fault detection module of this application embodiment is integrated on the server motherboard. It interacts with the CPU and VRM through the existing motherboard circuit interface (such as signal interface and power interface), without the need to modify the existing CPU and VRM hardware structure, thus minimizing the modification cost of existing equipment. At the same time, it ensures good compatibility of the circuit with different models of CPU and VRM, and can be widely used in various server and PC products.

[0093] Figure 3 This paper illustrates a schematic diagram of a power supply fault detection result indication process based on condition monitoring, as shown in the embodiment of this application. Figure 3 As shown, when the server starts and the system powers on, the PCH cancels the SLP_S5 signal, and the CPU's SLP_S5 signal changes from high to low. The CPLD detects this signal change and starts a 50ms timer. It monitors whether there is a waveform at the VRM switch node SW. If there is no waveform, it determines that the back-end power supply circuit is abnormal and the VRM is not working. Specifically, when the VRM fails, no switching signal is generated, the coupling capacitor has no AC signal output, the rectifier diode and RC filter circuit have no output, the SW_ACTIVITY signal is 0V, which is less than V_ref_low, and the voltage comparator outputs a low-level SW_DETECT signal.

[0094] If a waveform is present, it indicates that the VRM has started working and is monitoring whether the Vcore current exceeds the normal threshold. If it does not exceed the normal value and the current is extremely low, it indicates that the CPU assembly is abnormal, the CPU is not installed or is open-circuited. At this time, a blue light will illuminate to indicate that the CPU is open-circuited (CPU_open), and the CPU open-circuit (CPU_open) indication information will be output through the output module.

[0095] If the Vcore current exceeds the normal threshold, and the current is extremely high (e.g., exceeding 350A), it is determined that the CPU assembly is abnormal, currently short-circuited, and the VRM overcurrent protection is activated. At this time, a yellow light illuminates to indicate a CPU short circuit (CPU_short), and the CPU short circuit (CPU_short) indication information is output through the output module.

[0096] If the Vcore current is normal, the VRM is considered to have been successfully powered on. At this time, the green light will illuminate to indicate that the VRM has been successfully powered on, and the output module will output the indication information that the VRM is working normally (POWER_GOOD).

[0097] In this embodiment, when determining the operating state, it is determined whether the switching node generates a high-frequency AC signal. After coupling by a coupling capacitor, rectification by a rectifier diode, and filtering by an RC filter circuit, the SW_ACTIVITY signal (approximately 0.6V) is output. This signal is greater than V_ref_low (0.4V), and the voltage comparator outputs a high-level SW_DETECT signal. A differential voltage proportional to the load current is generated across the sampling resistor. After amplification by a current sensing amplifier, the V_ISENSE signal is output. As the CPU power-on process progresses, the V_ISENSE signal gradually rises from 0V to 0.8V (corresponding to a load current of approximately 16A) and stabilizes. When the CPLD samples the high-level SW_DETECT signal and the normally rising and stable V_ISENSE signal, it determines that the power-on is successful, controls the green LED indicator of the output module to light up, and simultaneously sends a 2-bit code "00" to the BMC. The BMC reports the power-on success information through the IPMI interface. When the VRM is working normally, the voltage comparator outputs a high-level SW_DETECT signal. When the CPU is short-circuited, the Vcore output current increases instantaneously to 400A, and the corresponding V_ISENSE signal rises instantaneously to 2V (400A×1mΩ×50=2V). Subsequently, due to short-circuit protection, the current returns to zero, and the V_ISENSE signal also returns to zero. The CPLD samples the high-level SW_DETECT signal and the V_ISENSE signal that "instantly exceeds 350A and then returns to zero", determines that the CPU is short-circuited, controls the yellow LED indicator to light up, sends code "10" to the BMC, and the BMC reports "CPU short-circuit" information.

[0098] When the electronic device starts up, the SLP_S5 signal goes low, and the CPLD starts the timer; the VRM is working normally, and the voltage comparator outputs a high-level SW_DETECT signal; the CPU is not installed (open circuit), the Vcore output current is close to 0A, the V_ISENSE signal is always close to 0V, and there is no output Vcore voltage (abnormal); the CPLD samples the high-level SW_DETECT signal, the V_ISENSE signal close to 0A, and the abnormal Vcore voltage, determines that the CPU is open circuit, controls the blue LED indicator to light up, sends code "11" to the BMC, and the BMC reports "CPU open circuit" information.

[0099] Figure 4 This is a schematic diagram illustrating the input signal acquisition and circuit processing logic determination in an embodiment of this application. Figure 4As shown, the CPLD continuously monitors the SLP_S5 signal (from the PCH). Once SLP_S5 goes low, a timer is started (e.g., 50ms timeout). Within the timer window, the current and voltage of the VRM switching node are continuously monitored. Fault decisions are made by sampling SW_DETECT and V_ISENSE. If SW_DETECT is always low: it is determined to be a VRM fault, because the VRM has not even attempted to work. If SW_DETECT is high, but V_ISENSE is momentarily much higher than normal (e.g., >350A) and then returns to zero: it is determined to be a CPU short circuit, triggering the VRM's overcurrent protection. If SW_DETECT is high, but V_ISENSE is always extremely low (≈0A), and the Vcore voltage is abnormal: it is determined to be a CPU open circuit / not installed, the VRM is working, but is in an unloaded state because there is no load. If SW_DETECT is high, and V_ISENSE has a normal rise process and stabilizes: it is determined to be a successful power-on.

[0100] Based on the judgment result, control the corresponding LED indicator and send the fault signal to the BMC.

[0101] The power supply fault detection circuit based on condition monitoring in this application embodiment can accurately detect and distinguish different types of abnormal CPU power-on faults, and the output indication is clear and the remote reporting function is normal, meeting the design requirements.

[0102] This application also describes a power supply fault detection method based on condition monitoring, including:

[0103] Detect whether the switching node of the voltage regulation module of the electronic device generates a switching activity signal, and detect the load current on the output path of the core voltage output circuit of the CPU of the electronic device;

[0104] The CPU's SLP_S5 signal is acquired and used to determine the fault type based on the SLP_S5 signal, the switching activity signal of the voltage regulation module, and the load current of the CPU's core voltage output circuit.

[0105] Output the corresponding fault indication signal and / or fault code according to the fault type.

[0106] For specific implementation details, please refer to the aforementioned embodiments; the implementation details will not be repeated here.

[0107] An electronic device and a readable storage medium are also described according to embodiments of this application.

[0108] Figure 5A schematic block diagram of an example electronic device that can be used to implement embodiments of this application is shown. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device may also represent various forms of mobile devices, such as servers, personal digital processors, cellular phones, smartphones, game consoles, smart vehicles, wearable devices, and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the application described and / or claimed herein. The electronic device of this application embodiment includes the condition monitoring-based power failure detection circuit of the foregoing embodiments.

[0109] like Figure 5 As shown, device 800 includes a computing unit 801, which can perform various appropriate actions and processes based on a computer program stored in read-only memory (ROM) 802 or a computer program loaded from storage unit 808 into random access memory (RAM) 803. RAM 803 may also store various programs and data required for the operation of device 800. The computing unit 801, ROM 802, and RAM 803 are interconnected via bus 804. Input / output (I / O) interface 805 is also connected to bus 804.

[0110] Multiple components in device 800 are connected to I / O interface 805, including: input unit 806, such as keyboard, mouse, etc.; output unit 807, such as various types of monitors, speakers, etc.; storage unit 808, such as disk, optical disk, etc.; and communication unit 809, such as network card, modem, wireless transceiver, etc. Communication unit 809 allows device 800 to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0111] The computing unit 801 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of computing unit 801 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various computing units running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc.

[0112] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), system-on-a-chip (SoCs), complex programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transferring data and instructions to the storage system, the at least one input device, and the at least one output device.

[0113] The program code used to implement the methods of this application may be written in any combination of one or more programming languages. This program code may be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the functions / operations specified in the flowcharts and / or block diagrams are implemented. The program code may be executed entirely on a machine, partially on a machine, as a standalone software package partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0114] In the context of this application, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can be, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0115] To provide interaction with a user, the systems and techniques described herein can be implemented on a computer having: a display device for displaying information to the user (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor); and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the computer. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0116] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as a data server), or computing systems that include middleware components (e.g., an application server), or computing systems that include frontend components (e.g., a user computer with a graphical user interface or web browser through which a user can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., a communication network). Examples of communication networks include local area networks (LANs), wide area networks (WANs), and the Internet.

[0117] Computer systems can include clients and servers. Clients and servers are generally located far apart and typically interact via communication networks. Client-server relationships are created by computer programs running on the respective computers and having a client-server relationship with each other. Servers can be cloud servers, servers in distributed systems, or servers incorporating blockchain technology.

[0118] It should be understood that the various forms of processes shown above can be used to rearrange, add, or delete steps. For example, the steps described in this disclosure can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution disclosed in this application can be achieved, and this is not limited herein.

[0119] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "a plurality of" means two or more, unless otherwise explicitly specified.

[0120] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power supply fault detection circuit based on condition monitoring, applied in electronic equipment, characterized in that, The power fault detection circuit is connected to the voltage regulation module and the core voltage output circuit of the CPU in the electronic device, respectively. The power supply fault detection circuit includes: An action detection module, whose input terminal is connected to the switching node of the voltage regulation module, is used to detect whether the switching node of the voltage regulation module generates a switching activity signal; A current detection module is connected in series with the core voltage output circuit to detect the load current on the output path of the core voltage output circuit. The fault determination module has its input terminals connected to the output terminals of the action detection module, the current detection module, and the CPU's SLP_S5 signal output terminal, respectively, and is used to determine the fault type based on the SLP_S5 signal, the action detection result of the voltage regulation module, and the current detection result. An output module, whose input is connected to the output of the fault determination module, is used to output fault indication signals and / or fault codes; The fault determination module includes a complex programmable logic device (CPLD). The CPLD continuously monitors the SLP_S5 signal and starts a timer when it detects that the SLP_S5 signal is low. Within the timer's operating window, the SW_DETECT and V_ISENSE signals are continuously sampled; If the SW_DETECT signal remains low, the voltage regulation module is considered to be faulty. If the SW_DETECT signal is high and the V_ISENSE signal momentarily exceeds the first set current and then returns to zero, it is determined that the CPU is short-circuited. If the SW_DETECT signal is high and the V_ISENSE signal is always close to 0A, the CPU core voltage is abnormal, which indicates that the CPU is open-circuited or not installed. If the SW_DETECT signal is high and the V_ISENSE signal shows a normal rising process and stabilizes, then the voltage regulation module is considered to have been successfully powered on.

2. The power supply fault detection circuit based on condition monitoring according to claim 1, characterized in that, The motion detection module includes: A coupling capacitor, the first end of which is connected to the switching node of the voltage regulation module, is used to couple out the AC signal from the switching node; A rectifier diode, whose anode is connected to the second end of the coupling capacitor, is used to filter and half-wave rectify the coupled AC signal to generate a DC voltage signal representing the activity intensity of the switching node. An RC filter circuit, whose input terminal is connected to the cathode of the rectifier diode, is used to filter the rectified pulsating DC signal and output DC voltage SW_ACTIVITY. A voltage comparator, whose non-inverting input is connected to the output of the RC filter circuit, whose inverting input is connected to a reference voltage, and whose output outputs a detection signal to the fault determination module; When SW_ACTIVITY is greater than the preset threshold voltage, the voltage comparator outputs a high-level signal, indicating that the voltage regulation module has started working; when SW_ACTIVITY is less than or equal to the preset threshold voltage, the voltage comparator outputs a low-level signal, indicating that the voltage regulation module has not worked.

3. The power supply fault detection circuit based on condition monitoring according to claim 2, characterized in that, The coupling capacitor is used to isolate the high DC bias voltage on the switching node and to couple only the AC switching signal. The rectifier diode includes a Schottky diode, used to adapt to the processing of high-frequency pulse width modulation (PWM) signals; The RC filter circuit includes a filter capacitor, a resistor (R3), and a first capacitor. The filter capacitor is connected in parallel between the cathode of the rectifier diode and ground. One end of the resistor is connected to the cathode of the rectifier diode, and the other end is connected to one end of the first capacitor. The other end of the first capacitor is grounded to form an RC low-pass filter circuit.

4. The power supply fault detection circuit based on condition monitoring according to claim 1, characterized in that, The current detection module includes: The sampling resistor is connected in series in the output path of the CPU core voltage, and a differential voltage V_sense+ and V_sense- is generated across its two ends, which are proportional to the load current. A current-sensing amplifier, whose input terminals are respectively connected to the two ends of the sampling resistor, is used to read the differential voltage and amplify it into a voltage signal V_ISENSE to ground. The V_ISENSE satisfies the formula V_ISENSE=I_load×R_sense×Gain, where I_load is the load current, R_sense is the resistance value of the sampling resistor, and Gain is the amplification factor of the current-sensing amplifier. The output of the current sensing amplifier is connected to the fault determination module to transmit the V_ISENSE signal to the fault determination module.

5. The power supply fault detection circuit based on condition monitoring according to claim 2 or 3, characterized in that, The reference voltage is obtained by resistor voltage division, and the value of the reference voltage includes 0.4V.

6. A power fault detection method based on the power fault detection circuit based on condition monitoring as described in any one of claims 1 to 5, characterized in that, The method includes: Detect whether the switching node of the voltage regulation module of the electronic device generates a switching activity signal, and detect the load current on the output path of the core voltage output circuit of the CPU of the electronic device; The CPU's SLP_S5 signal is acquired and used to determine the fault type based on the SLP_S5 signal, the switching activity signal of the voltage regulation module, and the load current of the CPU's core voltage output circuit. Output the corresponding fault indication signal and / or fault code according to the fault type.

7. The power supply fault detection method according to claim 6, characterized in that, The method further includes: The coupled pulsating DC signal of the switching node of the voltage regulation module is acquired, and the pulsating DC signal is filtered and half-wave rectified to generate a DC voltage signal representing the activity intensity of the switching node. When the DC voltage is greater than a preset threshold voltage, it indicates that the voltage regulation module has started working; when the DC voltage is less than or equal to the preset threshold voltage, it indicates that the voltage regulation module has not worked.

8. An electronic device, characterized in that, It includes a power supply fault detection circuit based on condition monitoring as described in any one of claims 1 to 5.

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