Vertical cavity surface emitting laser and method for manufacturing the same

Abstract

The application relates to the technical field of optoelectronic devices, and discloses a vertical cavity surface emitting laser and a preparation method thereof. The preparation method comprises the following steps: providing a substrate layer; forming an epitaxial structure on one side surface of the substrate layer, the epitaxial structure being a gallium arsenide-based structure and comprising a first mirror layer, a first confinement layer, an active layer, a second confinement layer and a second mirror layer which are arranged in a stack mode; performing selective arsenic ion implantation on one side of the second mirror layer to form a ring-shaped ion modulation layer which penetrates into a partial thickness of the second mirror layer, a first light hole for current injection and light emission is formed in the ion modulation layer, the ion modulation layer has a resistivity greater than that of the second mirror layer and a refractive index less than that of the second mirror layer; forming a contact layer on the epitaxial structure to cover the second mirror layer and the ion modulation layer; and forming a first electrode on the contact layer, the first electrode being in electrical communication with the contact layer and being misaligned with the first light hole. In the application, the ion modulation layer formed by arsenic ion implantation is high-resistance, stable and stress-free, and can meet the demand of high-speed optical communication.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of optoelectronic devices, in particular to a vertical cavity surface emitting laser and a preparation method thereof. BACKGROUND

[0002] The vertical cavity surface emitting laser (VCSEL) in the semiconductor laser has low threshold current, narrow spectral width, good temperature characteristics, circular output beam and easy integration, and has many advantages such as wide application in emerging fields such as quantum sensing, high-power laser source and high-speed optical communication. With the rapid rise of various artificial intelligence big models, the high-speed optical communication technology applied in the models is also developing rapidly, and higher requirements are put forward for the performance and reliability of the VCSEL products used in the optical communication technology.

[0003] At present, most of the VCSEL products are prepared by a wet oxidation process, that is, an annular oxidation confinement layer, that is, an oxidation ring, with an oxidation hole is formed in the p-DBR layer by a wet oxidation method to achieve current focusing, optical confinement, mode control and other functions, that is, to realize the functions of the oxidation confinement type VCSEL product. However, this oxidation confinement type VCSEL product has many disadvantages due to the oxidation preparation process:

[0004] (1) First, the wet oxidation process relies on wet oxidation of high Al component materials to form an insulating oxidation confinement layer. This process naturally accompanies volume expansion and increased interface stress, so that the oxidation confinement layer naturally has stress-induced defects, which can degrade the reliability of the laser and affect the long-term performance.

[0005] (2) Secondly, the wet oxidation process is a wet chemical process. On the one hand, the oxidation rate is sensitive, and it is difficult to accurately control the width and depth of the oxidation ring, and the consistency of devices in the same batch is poor, and the production yield is low. On the other hand, there is an edge effect that the oxidation rate of the edge region is faster than that of the center region, so that the oxidation ring forms irregularly shaped oxidation holes such as "bell mouth", which aggravates the performance difference. Such an oxidation ring can affect the carrier confinement and cause large optical field defects, thereby affecting the performance and reliability of the laser and limiting the current diversified application requirements. SUMMARY

[0006] The present application provides a vertical cavity surface emitting laser and a preparation method thereof to solve the problem that the oxidation ring formed by wet oxidation in the existing oxidation confinement type vertical cavity surface emitting laser has poor reliability, which can affect the carrier confinement and cause large optical field defects, thereby affecting the performance and reliability of the laser and limiting the current diversified application requirements.

[0007] In a first aspect, the present application provides a preparation method of a vertical cavity surface emitting laser, comprising:

[0008] a substrate layer is provided;

[0009] an epitaxial structure is formed on one side surface of the substrate layer, the epitaxial structure is a gallium arsenide-based structure, and includes a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer which are stacked;

[0010] selective arsenic ion implantation is performed on one side of the epitaxial structure to form an ion-modulated layer which penetrates into a partial thickness of the second mirror layer; the ion-modulated layer is annular, and a first light hole for current injection and light emission is formed in the inside of the ion-modulated layer; the ion-modulated layer has a resistivity greater than that of the second mirror layer, and a refractive index less than that of the second mirror layer;

[0011] a contact layer is formed on the side of the epitaxial structure away from the substrate layer, and the contact layer covers the second mirror layer and the ion-modulated layer;

[0012] a first electrode is formed on the side of the contact layer away from the substrate layer, and the first electrode is in electrical communication with the contact layer and is arranged in a staggered manner with the first light hole.

[0013] Beneficial effects: the ion modulation layer formed by arsenic ion implantation in the application has the characteristics of high resistance, stability and no stress. Specifically, first, the arsenic ions of the ion modulation layer and the gallium arsenide-based material of the second mirror layer belong to the same group of elements. The arsenic ions implanted into the second mirror layer act as "donor impurities" to provide electrons, which are permanently neutralized by the acceptor impurities in the second mirror material. The p-type doping hole concentration in the peripheral region of the original second mirror layer is effectively reduced, thereby significantly increasing the resistivity of the region, achieving similar "electrical isolation" without relying on additional defects, and forming a high-resistance region that is almost non-conductive. Moreover, the arsenic ions can also act as "donor impurities" to fill defects such as As interstitial atoms and Ga vacancies in the original material, thereby forming stable deep level defects and a stable and reliable high resistance region. Second, the lattice constant of arsenic ions and the material of the second mirror layer, such as the gallium arsenide layer, is almost completely matched, and they are the same group of elements. Therefore, the diffusion coefficient of arsenic ions in the second mirror layer material is extremely low, so the high resistance region formed by the implantation of arsenic ions into the second mirror layer will not diffuse under high temperature and high current conditions, further enhancing the high resistance stability of the ion modulation layer. Third, the ion modulation layer formed by ion implantation is a dry process. On the one hand, there is no difference in process consistency and uniformity, avoiding stress defects and irregularities in the first light hole during the formation of the ion modulation layer, which helps to improve the device preparation yield, thereby ensuring efficient carrier confinement and lateral light field confinement. On the other hand, the ion modulation layer is formed in the second mirror layer away from the active layer, which can form a stable high resistance region with deep level defects in the second mirror layer, and will not damage the active layer and affect the light field. The stable high resistance region also means that the ion modulation layer is formed with high precision, which ensures the performance and reliability of the only channel for carrier injection and light output - the first light hole.

[0014] The ion modulation layer obtained from the above, on the one hand, the stable and reliable high resistance region effectively limits the carrier path, reduces non-radiative recombination, and thus improves the effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer, the first mirror upper layer with high central refractive index and low peripheral refractive index is formed, which can effectively and stably suppress high-order modes while reliably reducing junction capacitance to improve modulation bandwidth, ultimately achieving light field optimization. Therefore, through the stable and reliable ion modulation layer, carrier confinement and light field constraint are achieved in coordination, which fundamentally suppresses mode competition, achieves power stability, and meets the needs of high-speed optical communication.

[0015] In an optional embodiment, the second mirror layer includes a plurality of periodically stacked low refractive index layers and high refractive index layers; the implantation peak depth of the ion modulation layer is between 1 / 5 and 2 / 5 groups of periods of the second mirror layer.

[0016] Beneficial effects: The modification depth of the ion modulation layer formed by arsenic ion implantation is between 1 / 5 and 2 / 5 of the number of second mirror layer material periods, so that the ion modulation layer formed by arsenic ion implantation has the dual characteristics of deep energy level defects and doping compensation, a long-term stable semi-insulating region is formed in the second mirror layer, while avoiding damage to the underlying active layer, and the production requirements of long-life demand products such as automobiles and data centers are met.

[0017] In an optional embodiment, selective arsenic ion implantation is performed on the side of the second mirror layer of the epitaxial structure to form an ion modulation layer extending into the second mirror layer, including:

[0018] A patterned mask is formed on the side surface of the second mirror layer away from the substrate layer, the patterned mask covers a first region of the second mirror layer and exposes a second region surrounding the first region, the first region is used to form a first light hole, and the second region is used to form an ion modulation layer;

[0019] Arsenic ion implantation is performed on the surface of the second mirror layer with the patterned mask to form an initial ion modulation layer in the second region of the second mirror layer exposed by the patterned mask;

[0020] Annealing treatment is performed on the initial ion modulation layer to form an annular ion modulation layer extending into a partial thickness of the second mirror layer;

[0021] The patterned mask is removed.

[0022] Beneficial effects: In the present application, the arsenic ion implantation to form the ion modulation layer is a pure physical ion bombardment and thermal annealing. The ion implantation is a dry process and does not involve liquid chemical reagents, so the interface cleanliness is higher. Moreover, only the lattice defects and doping compensation are used to change the electrical properties, and the ion modulation layer formed has high resistance, stability, and no stress, and high reliability. The deep energy level traps retained by the annealing treatment are thermodynamically stable at device operating temperatures such as -40°C to 85°C, and do not diffuse over time like oxide layer defects, so the process compatibility is strong. Actual tests show that the VCSEL device formed by the physical modification process of arsenic ion implantation and annealing has greatly improved reliability, and the service life can be more than twice that of traditional oxidation-limited VCSEL devices, and is particularly suitable for long-life demand scenarios such as laser radar and data centers.

[0023] In an optional embodiment, the ion source of the arsenic ion implantation is a monovalent arsenic ion source, the energy is 100 keV, the dose is 2x10 15 ions / cm 2 , and the injection angle is 7° for inclined injection.

[0024] Beneficial effects: The monovalent arsenic ions are more stable in the ion source and have higher beam intensity, which is beneficial to production efficiency; under the same acceleration voltage, the As+ The kinetic energy and mass matching is better, allowing for precise control of the implantation depth and ensuring the peak value is located above the p-type DBR layer; the lower the charge state, the milder the Coulomb interaction with lattice atoms during implantation, reducing excessive surface damage and balancing the requirement of "room temperature implantation to enhance lattice damage". + After implantation of the p-type DBR layer, in addition to forming defects through lattice collisions, its positive charge characteristics will also generate a charge compensation effect with p-type dopants, such as beryllium cations. + As a donor impurity, it provides electrons to neutralize Be. + The provided holes further enhance the high-resistivity characteristics of the p-type DBR layer, thus forming a semi-insulating ion modulation layer, which is one of the key mechanisms for achieving carrier confinement. In addition, the 7° tilted injection angle can reduce ion channel effects and prevent ions from penetrating too deeply along the crystal orientation. Room temperature injection helps to enhance lattice damage and promote amorphization.

[0025] In one optional embodiment, after forming a contact layer on the side of the epitaxial structure opposite to the substrate layer, and before forming a first electrode on the side of the contact layer opposite to the substrate layer, the method further includes:

[0026] A passivation layer is formed on the side of the contact layer away from the substrate layer. The passivation layer is disposed correspondingly to the ion modulation layer. The passivation layer has a first opening and a second opening. The first opening corresponds to the first optical aperture, and the second opening exposes a portion of the contact layer located on the ion modulation layer.

[0027] A seed gold layer is formed in the second opening, and the first electrode is disposed on the passivation layer and electrically connected to the contact layer through the seed gold layer.

[0028] Beneficial effects: The passivation layer is disposed on the contact layer, having a first opening corresponding to the first optical aperture and a second opening corresponding to a portion of the ion modulation layer. The first opening prevents light output from being blocked, while the second opening is used to connect the electrode to the contact layer. The passivation layer changes its refractive index by controlling the film thickness, thus adjusting optical properties, and also protects the device from reacting with air and causing oxidation. A seed gold layer is formed within the second opening of the passivation layer; it can be made of gold, a metallic material, to achieve excellent conductivity between the first electrode and the contact layer, facilitating the introduction of external current and improving the reliability of the metal contact.

[0029] In one alternative embodiment, after the seed gold layer is formed in the first opening and before the first electrode is formed on the side of the contact layer away from the substrate layer, the method further includes: forming a dielectric layer on the surface of the passivation layer away from the substrate layer, wherein the dielectric layer is offset from the seed gold layer.

[0030] Beneficial effects: the medium layer is filled between part of the first electrode and the passivation layer, reduces the parasitic parameters of the device itself, and the seed gold layer is arranged in a staggered manner to avoid affecting the current injection of the first electrode to the seed gold layer and then to the contact layer.

[0031] In an optional embodiment, after the first electrode is formed on the side of the contact layer away from the substrate layer, the method further comprises: forming a protective layer on the side of the first electrode away from the substrate layer, the protective layer covering the first electrode and extending to the side wall surface of the epitaxial structure and the surface of the substrate layer, the protective layer forming a first window exposing part of the first electrode, the first window being arranged corresponding to the medium layer.

[0032] Beneficial effects: the protective layer can be made of aluminum oxide material with electrical insulation, chemical stability, high hardness, wear resistance, high temperature and high pressure resistance, self-repairing property, and good optical performance, and is arranged at the outermost side of the device to protect the internal device from water vapor erosion and improve the reliability of the device.

[0033] In an optional embodiment, after the first electrode is formed on the side of the contact layer away from the substrate layer, and before the protective layer is formed on the side of the first electrode away from the substrate layer, the method further comprises:

[0034] forming a second electrode on the side surface of the substrate layer where the epitaxial structure is formed, and / or forming a third electrode on the side surface of the substrate layer away from the epitaxial structure; the protective layer further covers the second electrode and forms a second window exposing part of the second electrode.

[0035] Beneficial effects: the second electrode is formed on the other area of the side surface of the substrate layer where the first electrode is formed, or the back metal is formed on the other side of the substrate layer as the third electrode, the polarity of the second electrode and the third electrode is the same, which helps the laser to adapt to different packaging scenarios at the application end and improves the compatibility of the laser at the application end.

[0036] In a second aspect, the application further provides a vertical cavity surface emitting laser, which is prepared by the above method and comprises a substrate layer, an epitaxial structure, an ion modulation layer, a contact layer, and a first electrode, wherein the epitaxial structure is formed on one side surface of the substrate layer, the epitaxial structure is a gallium arsenide-based structure and comprises a first mirror layer, a first confinement layer, an active layer, a second confinement layer, and a second mirror layer arranged in layers; the ion modulation layer is formed on the side of the second mirror layer away from the substrate layer and comprises a ring-shaped arsenic ion layer, a first light hole for current injection and light emission is formed in the inside of the ion modulation layer, the resistivity of the ion modulation layer is greater than the resistivity of the second mirror layer, and the refractive index of the ion modulation layer is less than the refractive index of the second mirror layer; the contact layer is arranged on the side of the epitaxial structure away from the substrate layer and covers the second mirror layer and the ion modulation layer; and the first electrode is arranged on the side of the contact layer away from the substrate layer, the first electrode is in electrical communication with the contact layer and is arranged in a staggered manner with the first light hole.

[0037] Beneficial effects: The vertical cavity surface emitting laser of the present application, relative to the upper layer of the second mirror layer close to the light-emitting side of the device, has a ring-shaped ion modulation layer formed by selective arsenic ion implantation, which is deep into the partial thickness of the second mirror layer, and has the characteristics of high resistance, stability, stress-free, etc. On the one hand, the stable and reliable high-resistance region effectively limits the carrier path and reduces non-radiative recombination, thereby improving the effective light output. On the other hand, due to the presence of the stable and reliable ion modulation layer, the upper layer of the first mirror layer with high central refractive index and low peripheral refractive index can effectively and stably suppress high-order modes, while ensuring reliable reduction of junction capacitance to improve modulation bandwidth, and finally realizing light field optimization. Therefore, through the stable and reliable ion modulation layer to realize the cooperation of carrier limitation and light field constraint, the mode competition is fundamentally suppressed, the power is stabilized, and the demand of high-speed optical communication is met.

[0038] In an optional embodiment, further comprising: a passivation layer, a seed gold layer, a dielectric layer, a protective layer, a second electrode and / or a third electrode, the passivation layer is formed on the side surface of the contact layer away from the substrate layer, the passivation layer covers at least part of the ion modulation layer, and has a first opening and a second opening, the first opening corresponds to the first light hole, and the second opening exposes part of the contact layer on the ion modulation layer; the seed gold layer is formed in the first opening, the first electrode is arranged on the passivation layer and is in electrical communication with the contact layer through the seed gold layer; the dielectric layer is formed between the passivation layer and the first electrode, and the dielectric layer is arranged in a staggered manner with the seed gold layer; the protective layer is formed on the side of the first electrode away from the substrate layer, the protective layer covers the first electrode and extends to the side wall surface of the epitaxial structure and the surface of the substrate layer, the protective layer forms a first window exposing part of the first electrode, and the first window is arranged corresponding to the dielectric layer; the second electrode is formed on the side surface of the substrate layer where the epitaxial structure is formed, and the third electrode is formed on the side surface of the substrate layer away from the substrate layer, and the protective layer also covers the second electrode and forms a second window exposing part of the second electrode.

[0039] Beneficial effects: The passivation layer is arranged on the contact layer, has a first opening corresponding to the first light hole and a second opening corresponding to the partial ion modulation layer, the first opening avoids shielding the light output, and the second opening is used to realize the connection between the electrode and the contact layer. The passivation layer changes the refractive index by controlling the film thickness, adjusts the optical properties, and also protects the device from reacting with air and causing oxidation. The seed gold layer is formed in the second opening of the passivation layer, which can be selected from metal material gold, realizes excellent conductive effect between the first electrode and the contact layer, helps external current introduction and improves metal contact reliability. The dielectric layer is filled between part of the first electrode and the passivation layer, reduces the parasitic parameters of the device itself, is arranged in a staggered manner with the seed gold layer to avoid affecting the current injection from the first electrode to the seed gold layer to the contact layer. The protective layer can be selected from aluminum oxide material with electrical insulation, chemical stability, high hardness, wear resistance, high temperature and pressure resistance, self-repairing property and good optical performance, arranged on the outermost side of the device, protecting the internal device from water vapor erosion and improving the reliability of the device. The second electrode is formed on the other area of the one side surface of the substrate layer with the first electrode, or the back metal is formed on the other side of the substrate layer as the third electrode, and the polarities of the second electrode and the third electrode are the same, which helps the laser to adapt to different packaging scenes at the application end and improves the compatibility of the laser at the application end. BRIEF DESCRIPTION OF DRAWINGS

[0040] In order to more clearly illustrate the specific embodiments of the present application or the technical solutions in the prior art, the following will briefly introduce the drawings needed to be used in the specific embodiments or prior art description. Obviously, the drawings described below are some embodiments of the present application, and those skilled in the art can also obtain other drawings according to these drawings without creative labor.

[0041] Figure 1 The flowchart of the preparation method of the vertical cavity surface emitting laser of the embodiment of the present application;

[0042] Figure 2 The structure diagram after forming the epitaxial structure on the substrate layer of the embodiment of the present application;

[0043] Figure 3 The structure diagram after forming the ion modulation layer in the second mirror layer of the embodiment of the present application;

[0044] Figure 4 The structure diagram after forming the contact layer on the second mirror layer of the embodiment of the present application;

[0045] Figure 5 The structure diagram after forming the passivation layer and the seed gold layer on the contact layer of the embodiment of the present application;

[0046] Figure 6 Figure 9 is a schematic diagram of a structure after forming a dielectric layer on the passivation layer according to an embodiment of the present application;

[0047] Figure 7 Figure 10 is a schematic diagram of a structure after forming a first electrode on a side of the device away from the substrate layer according to an embodiment of the present application;

[0048] Figure 8 Figure 11 is a schematic diagram of a structure after forming a second electrode and a third electrode on the substrate layer according to an embodiment of the present application;

[0049] Figure 9 Figure 12 is a schematic diagram of a structure of a vertical cavity surface emitting laser after forming a protective layer on the surface of the device according to an embodiment of the present application.

[0050] BRIEF DESCRIPTION OF DRAWINGS

[0051] 1, substrate layer; 2, first mirror layer; 3, first confinement layer; 4, active layer; 5, second confinement layer; 6, second mirror layer; 7, ion modulation layer; 701, first optical hole; 8, contact layer; 9, first electrode; 901, second optical hole; 10, passivation layer; 1001, first opening; 1002, second opening; 11, seed gold layer; 12, dielectric layer; 13, protective layer; 1301, first window; 1302, second window; 14, second electrode; 15, third electrode. DETAILED DESCRIPTION

[0052] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work fall within the scope of protection of the present application.

[0053] The vertical cavity surface emitting laser (hereinafter referred to as VCSEL) products in the related art are all formed by a wet oxidation method, that is, a ring-shaped oxidation confinement layer with an oxidation hole is formed in a p-type DBR layer, that is, a ring-shaped oxidation is formed in the p-type DBR layer, to achieve the effects of current focusing, optical confinement, mode control, etc. However, the oxidation confinement type VCSEL product prepared by the wet oxidation process has many disadvantages:

[0054] (1) First, the wet oxidation process is to form AlO by wet oxidation of a high Al component p-type AlGaAs, such as Al 0.9 Ga 0.1 As. xThe oxidation reaction process (2AlGaAs+3H2O→Al2O3+2GaAs+3H2) is usually accompanied by a large volume expansion (Al2O3 is 30% larger than AlGaAs in volume), which increases the stress between the oxidation confinement layer and the interface with other materials, thereby causing interface cracks or pinholes in the oxidation confinement layer, resulting in an increase in leakage current, and this stress condition can also accelerate the diffusion of material layer defects in long-term high-temperature and high-current operation, causing device failure and reducing the service life; moreover, the chemical stability of the formed oxidation confinement layer is poor and is easily hygroscopic, thereby gradually degrading in a humid environment and affecting the long-term performance of the device.

[0055] (2) Secondly, the wet oxidation process is a wet chemical process, and there are problems of oxidation rate sensitivity and edge effect. The oxidation depth and width are strongly related to temperature, humidity, and Al component uniformity, and the oxidation ring width deviation of devices in the same batch can reach ±0.5 μm, resulting in a threshold current fluctuation of more than 20%, and the oxidation ring width and depth are difficult to accurately control, resulting in a low production yield; the edge effect is that the oxidation rate of the edge region is faster than that of the center region, so that the oxidation hole of the oxidation ring will form an irregular shape such as a “bell mouth”, thereby exacerbating the performance difference between different devices. Based on the oxidation ring formed by this wet chemical process, on the one hand, the “carrier confinement ability” of the oxidation confinement layer depends on the accuracy of the oxidation ring, and if the oxidation depth is uneven or the ring width is too large, the carriers will diffuse to the edge (i.e., “current spreading”), and the carriers diffused to the edge do not reach the active region, but occur non-radiative recombination at impurities or defects in the p-DBR, and the invalid current ratio can reach 30%, the slope efficiency (optical power / current) is low and the energy consumption is high, thereby affecting the carrier confinement. On the other hand, the lateral confinement of the light field of the oxidation confinement type VCSEL also depends on the refractive index difference of the oxidation ring, but this irregular oxidation ring will cause high-order mode competition, and mode jumping is easy to occur, and the beam divergence angle is also in a large range of 15-20°, so that the efficiency is low when coupled with an optical fiber, thereby affecting the performance and reliability of the laser and limiting the current diversified application requirements.

[0056] Based on this, with reference to Figures 1 to 9 The embodiment provides a preparation method of a vertical cavity surface emitting laser, Figure 1 A flowchart of the preparation method is shown, and the preparation method comprises the following steps:

[0057] In step S101, a substrate layer 1 is provided.

[0058] Exemplarily, the substrate layer 1 can be an n-type GaAs substrate with a crystal direction <100> and a tilt angle of 2°, and a Si doping concentration of 1×1018 cm-3. 18 cm -3and the substrate layer 1 is preprocessed to ensure the cleanliness of the substrate layer 1, reduce the dislocation density of the epitaxial structure formed thereon, ensure the lattice matching of the subsequent semiconductor layer, and achieve a dislocation density less than 10 4 cm -2 The lattice mismatch rate of the GaAs substrate layer 1 and the AlGaAs material layer is less than 0.1%.

[0059] The specific process steps of the preprocessing include: first, ultrasonic cleaning with acetone and isopropyl alcohol for 10 minutes in sequence to remove organic contaminants; then, after washing with deionized water, immersing in a 10% HF solution for 30 seconds to remove the surface natural oxide layer; and then, blowing dry with nitrogen; and then, placing the substrate layer 1 into a metal organic chemical vapor deposition (MOCVD) reaction chamber, annealing at 800°C for 10 minutes in an H2 atmosphere to further remove the surface residual oxide and adsorbed impurities.

[0060] In step S102, an epitaxial structure is formed on one side surface of the substrate layer 1, the epitaxial structure being a gallium arsenide-based structure including a first mirror layer 2, a first confinement layer 3, an active layer 4, a second confinement layer 5, and a second mirror layer 6 stacked in sequence.

[0061] Referring to Figure 2 The first mirror layer 2 and the first confinement layer 3 constitute a first semiconductor layer, and the second mirror layer 6 and the second confinement layer 5 constitute a second semiconductor layer, one of the first semiconductor layer and the second semiconductor layer being of an n-type conductivity type and the other being of a p-type conductivity type. In this embodiment, the first semiconductor layer is of the n-type conductivity type and the second semiconductor layer is of the p-type conductivity type.

[0062] Each structure layer of the epitaxial structure is made of a gallium arsenide-based material. For example, the active layer 4 includes quantum well layers and barrier layers alternately grown, the quantum well layers can be indium gallium arsenide layers (InGaAs layers), and the barrier layers can be aluminum gallium arsenide layers (AlGaAs layers). The first mirror layer 2 and the second mirror layer 6 are both distributed Bragg reflector layers (DBR layers), which include multiple groups of periodically alternately grown high refractive index layers and low refractive index layers. The order of the low refractive index layers and the high refractive index layers is specifically set according to different situations. For example, the high refractive index layers can be gallium arsenide layers (GaAs layers) or low-aluminum-component aluminum gallium arsenide layers (such as Al 0.3 Ga 0.7 As layers), and the low refractive index layers can be high-aluminum-component aluminum gallium arsenide layers (Al 0.9 Ga 0.1As layer), the first mirror layer 2 and the second mirror layer 6 form a vertical resonant cavity, reflecting the non-emitted photons back to the active layer 4 for further stimulated radiation, and the second mirror layer 6 at the top also serves as a passage for the holes to transmit from the top to the active layer 4. The first confinement layer 3 can be a high-aluminum component aluminum arsenide gallium layer, which separates the first mirror layer 2 from the active layer 4, avoids the high-doping of the first mirror layer 2 from affecting the carrier recombination efficiency of the active layer 4, and also serves as a buffer layer for the light field distribution, ensuring that the active layer 4 is at the maximum light field intensity, thereby improving the light emitting efficiency. The second confinement layer 5 can be a low-aluminum component aluminum arsenide gallium layer, which separates the active layer 4 from the second mirror layer 6, guides the holes to inject into the active layer 4, and together with the first confinement layer 3 forms part of the optical resonant cavity, with a total length of an integer multiple of half a wavelength, satisfying the light interference enhancement condition.

[0063] In step S103, selective arsenic ion implantation is performed on the second mirror layer 6 side of the epitaxial structure to form an ion-modulated layer 7 that penetrates part of the thickness of the second mirror layer 6; the ion-modulated layer 7 is annular, with a first light hole 701 formed in the inside for current injection and light emission, the resistivity of the ion-modulated layer 7 is greater than that of the second mirror layer 6, and the refractive index of the ion-modulated layer 7 is less than that of the second mirror layer 6.

[0064] Reference Figure 3, the second mirror layer 6 is selectively implanted with arsenic ions on the side surface away from the substrate layer 1, so as to form an ion modulation layer 7 in the upper portion of the second mirror layer 6 away from the active layer 4, the ion modulation layer 7 is shaped as a ring and has a higher resistivity relative to the central region without ion implantation, that is, the ion modulation layer 7 in the upper portion of the second mirror layer 6 is formed as a ring-shaped high-resistance layer, and the region where the first light hole 701 is located in the central region without arsenic ion implantation retains a low-resistance characteristic. Specifically, the ion modulation layer 7 formed by arsenic ion implantation in the embodiment has the performance advantages of high resistance, stability, and stress-free. First, the arsenic ions of the ion modulation layer 7 and the gallium arsenide-based material of the epitaxial structure or the second mirror layer 6 belong to the same group of elements, and the peripheral region of the second mirror layer 6 implanted with arsenic ions, that is, the ion modulation layer 7, the implanted arsenic ions act as “donor impurities” to provide electrons, which are permanently neutralized by the acceptor impurities in the second mirror material, and the p-type doping hole concentration in the peripheral region of the original second mirror layer 6 is effectively reduced, so that the resistivity of this region is significantly improved, and similar “electrical isolation” can be achieved without relying on additional defects, forming a high-resistance region that is almost non-conductive; on the other hand, after being implanted into the second mirror layer 6, the arsenic ions can also act as “donor impurities” to fill defect traps such as As interstitial atoms and Ga vacancies in the original material, thereby forming stable deep-level defects and forming a stable and reliable high-resistance region. Second, the lattice constant of arsenic ions and the material of the second mirror layer 6, such as the gallium arsenide layer, is almost completely matched, and they are of the same group of elements, so the diffusion coefficient of arsenic ions in the material of the second mirror layer 6 is extremely low, less than 1e -18 cm 2 / s at room temperature, so the high-resistance region formed after the arsenic ions are implanted into the second mirror layer 6 will not ionize under high temperature and high current conditions, further enhancing the high-resistance stability of the ion modulation layer 7. Third, the ion modulation layer 7 formed by ion implantation is a dry process, on the one hand, there is no difference in consistency and uniformity in the process, avoiding stress defects and irregularities of the first light hole 701 in the ion modulation layer 7 during shaping, which helps to improve the device preparation yield, thereby ensuring efficient carrier confinement and lateral light field confinement; on the other hand, the ion modulation layer 7 is formed in the partial thickness of the second mirror layer 6 away from the active layer 4, which can form a stable high-resistance region with deep-level defects in the second mirror layer 6, and will not damage the active layer 4 and affect the light field, and the stable high-resistance region also means the shaping accuracy of the ion modulation layer 7, that is, to ensure the performance and reliability of the only channel for carrier injection and light output, the first light hole 701.

[0065] Based on this, a stable and reliable ion modulation layer 7 is obtained. First, the stable high-resistance characteristic of the ion modulation layer 7 forcibly restricts the carrier path, and the high-resistance region is less than 1e 14 cm -3The extremely low carrier concentration of the high resistance region forms a similar "insulating wall" barrier. Once the holes diffuse to the edge, they will be blocked by the barrier and cannot obtain enough energy to overcome the high resistance region. They can only gather in the central first light hole 701 area, so that more than 90% of the injected current is concentrated on the active layer 4 corresponding to the central first light hole 701. The carriers realize efficient radiation recombination in the active layer 4, and the photon generation rate is improved. At the same time, the high resistance region effectively limits the non-radiative recombination of carriers in the transmission process, that is, reduces the "leakage current" between the second mirror layer 6 and the active layer 4, further reduces the proportion of invalid current, and finally improves the slope efficiency by at least 10-20%. The optical power output under the same injection current is higher, and the device energy consumption is reduced. In addition, the stable high resistance region can also ensure the stability of the effective conductive area of the first light hole 701. The reduction of the effective conductive area directly leads to the reduction of the junction capacitance, thereby effectively improving the modulation bandwidth. For example, compared with the junction capacitance of the oxidation limiting layer formed by the wet oxidation method, the junction capacitance of the embodiment is reduced by at least 30%, the modulation bandwidth is increased from 15-20GHz to 25-30GHz, and the application requirements of high-speed optical communication are met.

[0066] In the second aspect, the refractive index of the peripheral ion modulation layer 7 is low and the refractive index of the central first light hole 701 is high, so that a cylindrical waveguide similar to an optical fiber is formed on the upper layer of the second mirror layer 6. The central first light hole 701 region is the first mirror layer 2 without arsenic ion injection, which has the characteristics of low resistance, high carrier concentration and no obvious defects. The peripheral ion modulation layer 7 has defects such as lattice distortion and local amorphization due to ion injection, and the light absorption loss increases significantly due to the increase of defects. According to the optical waveguide theory, the light field propagating in the waveguide must satisfy the total reflection condition, and the distribution characteristics of different modes of light field determine whether it can be stably transmitted in the waveguide. For example, the fundamental mode light field is in Gaussian distribution, the energy is concentrated in the central region, the lateral extension range is small, and it is completely constrained in the central high refractive index region, which satisfies the total reflection condition and almost does not enter the peripheral low refractive index region. The high-order mode light field distribution is in "dumbbell shape", the lateral extension range is large, and it will inevitably penetrate into the peripheral low refractive index region. On the one hand, the low refractive index of the periphery cannot satisfy the total reflection condition, which will cause the light field to leak; on the other hand, the high defect density of the periphery will quickly absorb the energy of the high-order mode, so that it cannot obtain sufficient gain to compensate for the loss, and finally it is suppressed. Therefore, the stable ion modulation layer 7 formed by ion injection opens a dedicated channel for the fundamental mode and sets a reliable "loss barrier" for the high-order mode, so as to realize single-mode output. In addition, there will be "mode jump" under high injection current, that is, the fundamental mode jumps to high-order mode, and the reason is that the carrier diffusion causes the high-order mode to obtain gain. In the embodiment, the high-resistance region of the upper layer of the second mirror layer 6 forms an "electrical barrier", and even if the injection current is increased to 30 mA, the carriers are still strictly limited in the central first light hole 701 region. The edge region cannot produce stimulated radiation gain due to the absence of carrier injection, and the high-order mode quickly decays due to the lack of gain support and cannot compete with the fundamental mode. That is, through the stable and reliable ion modulation layer 7, the carrier limitation and the light field constraint are coordinated, the mode competition is fundamentally suppressed, and the power is stabilized.

[0067] It should be known that the refractive index waveguide is determined by physical defects and is thermodynamically stable within the working temperature (-40~85°C) and current range (1~50mA), so the stable and reliable ion modulation layer 7 makes the lateral Gaussian distribution of the light field not distorted due to changes in external conditions. The light field of the fundamental mode always maintains an overlap degree of more than 90% with the active layer 4, and the gain utilization efficiency is much higher than that of the high-order mode with an overlap degree of less than 50%. Even if the current is increased, the gain of the fundamental mode is always higher than the loss, and the output power increases linearly with the current without saturation or jump.

[0068] In step S104, a contact layer 8 is formed on the side of the epitaxial structure away from the substrate layer 1, and the contact layer 8 covers the second mirror layer 6 and the ion modulation layer 7.

[0069] Reference Figure 4The contact layer 8 can be of the same conductivity type as the second mirror layer 6, such as a GaAs layer with a thickness of 95-100 nm. The process steps for forming the contact layer 8 include: using metal organic chemical vapor deposition (MOCVD), controlling the reaction cavity growth temperature to be 650°C, the pressure to be 200 Torr, and only passing in trimethyl gallium (TMGa) and arsine (AsH3) to form a GaAs layer, wherein beryllium dodecyl (DEBe) is used as a doping source to obtain a heavily doped p-type contact layer 8 with a beryllium doping concentration of about 5x10 18 cm -3 The heavily doped p-type contact layer 8 is adapted to the high resistance limit of the ion modulation layer 7, helps to eliminate the Schottky barrier of the metal-semiconductor contact, forms a low-resistance ohmic contact, and ensures good contact between the metal electrode and the semiconductor, so that the current can bypass the high-resistance region and be injected into the active layer 4 from the first light hole 701 region.

[0070] In step S105, a first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1, the first electrode 9 is in electrical communication with the contact layer 8 and is arranged in a staggered manner with the first light hole 701.

[0071] For example, the first electrode 9 can be formed on the contact layer 8 by electroplating, and the first electrode 9 can be made of one or more of Ti / Pt / Au metals, serving as an external P-type electrode of the laser, as shown in FIG. 4. Figures 7 to 9 The first electrode 9 forms a good ohmic contact with the contact layer 8, so that the active layer 4 is input with electrical excitation through the contact layer 8, and the first electrode 9 should not block the first light hole 701 to avoid affecting the laser output.

[0072] In summary, in the preparation method of the vertical cavity surface emitting laser of the embodiment, the ion modulation layer 7 with high resistance, stability, and no stress is formed in the partial thickness of the upper layer of the second mirror layer 6 by selective arsenic ion implantation. On the one hand, the stable and reliable high-resistance region effectively limits the carrier path and reduces non-radiative recombination, thereby improving the effective light output. On the other hand, the upper layer of the first mirror with high central refractive index and low peripheral refractive index formed by the stable and reliable ion modulation layer 7 can effectively and stably suppress high-order modes, while ensuring reliable reduction of junction capacitance to improve modulation bandwidth, and finally realizing light field optimization. Therefore, the carrier limitation and light field constraint are realized by the stable and reliable ion modulation layer 7, the mode competition is fundamentally suppressed, the power is stabilized, and the demand for high-speed optical communication is met.

[0073] Reference is made to Figures 2 to 9In one embodiment, the first mirror layer 2 is of n-type conductivity, i.e. an n-type DBR layer, and includes a plurality of pairs of high and low refractive index layers, e.g. a high refractive index layer of gallium arsenide and a low refractive index layer of aluminum gallium arsenide with a high aluminum component, and a refractive index difference of about 0.6, to maximize light reflection. The thickness of each of the gallium arsenide and aluminum gallium arsenide layers is set to λ / 4n, where λ is the wavelength of the laser light and n is the refractive index of the material, to ensure that the phases of the light reflected at the interfaces add up, forming an optical mirror with high reflectivity. Specifically, the process steps for forming the n-type DBR layer include: selecting a metal organic chemical vapor deposition (MOCVD) method, controlling the growth temperature to be 700°C, which is beneficial to reduce interface roughness, and maintaining a pressure of 200 Torr with H2as the carrier gas; then introducing a group III source (including trimethyl gallium TMGa and trimethyl aluminum TMAl) and a group V source (arsine AsH3) into the reaction chamber, and doping with silane (SiH4), and adjusting the flow ratio of TMAl to TMGa to control the Al component to obtain the corresponding structure layer, e.g. first adjusting the flow ratio of TMAl to TMGa to be 9:1 to obtain an Al component of 0.9 and a refractive index of about 3.0 for Al 0.9 Ga 0.1 As; then stopping TMAl and introducing TMGa only to form a gallium arsenide layer with an Al component of 0 and a refractive index of about 3.6, and alternately growing 25 pairs of the low refractive index aluminum gallium arsenide layer and the high refractive index gallium arsenide layer, with each layer having a thickness strictly controlled to be λ / 4n, and when the wavelength λ of the laser light is 850 nm, the thickness of the Al 0.9 Ga 0.1 As layer is about 70 nm and the thickness of the GaAs layer is about 58 nm, with an error of less than 1 nm, to form the n-type doped first mirror layer 2 with a silicon doping concentration of about 1 x 1018cm 18 cm -3 , to ensure good conductivity.

[0074] In one embodiment, the first confinement layer 3 is also of n-type conductivity and is located on the side of the n-type DBR layer away from the substrate layer 1, and the active layer 4 is formed on the first confinement layer 3. The first confinement layer 3 is used to isolate the active layer 4 from the n-type DBR layer and can also assist in light field confinement. The wide bandgap characteristic of the high Al component material can reduce the absorption of photons by the active layer 4, and the low p-type doping can reduce the non-radiative recombination of carriers. Specifically, the process steps for forming the first confinement layer 3 include: using a metal organic chemical vapor deposition (MOCVD) method, reducing the temperature of the reaction chamber to 680°C, and continuing to maintain a pressure of 200 Torr; then introducing TMAl, TMGa and AsH3, and setting the flow ratio of TMAl to TMGa to be 9:1 to obtain a p-type high Al component Al 0.9 Ga 0.1As layer as the first confinement layer 3, wherein the doping source is n-type silicon material, the flow rate is set to 8 sccm, forming an n-type first confinement layer 3 with a silicon doping concentration of about 1 × 10 17 cm -3 The thickness of the first confinement layer 3 ranges from 78 nm to 82 nm.

[0075] In one embodiment, the active layer 4 is arranged on the side of the first confinement layer 3 away from the substrate layer 1, and is the core region of laser generation. The active layer 4 of the present embodiment has a multi-quantum well structure, including alternating quantum well layers and barrier layers. The quantum well layers include indium gallium arsenide layers (InGaAs layers), and the barrier layers include gallium arsenide layers (GaAs layers). The light gain is generated by carrier recombination. By controlling the well width and In component to match the laser wavelength, the quantum confinement effect of the quantum well layer quantizes the carrier energy, and only specific energy such as 850 nm wavelength photons can be amplified. A thin well width of, for example, 8 nm, can enhance the quantum confinement and improve the gain coefficient. Specifically, the process steps for forming the active layer 4 include: using metal organic chemical vapor deposition (MOCVD) method, reducing the growth temperature of the reaction chamber to 600°C, inhibiting In atom diffusion at low temperature, ensuring the interface flatness of the quantum well layer, and reducing the pressure to 100 Torr to reduce the gas phase reaction and improve the layer thickness uniformity; then introducing trimethyl indium (TMIn, In source), TMGa and AsH3, adjusting the In component to 0.15 by controlling the flow ratio of TMIn / (TMIn+TMGa), obtaining an In 0.15 Ga 0.85 As layer as the quantum well layer, the band gap width corresponds to 850 nm wavelength, and the width of the quantum well layer is 8 nm; then TMIn is turned off, and only TMGa and AsH3 are introduced to form a GaAs layer with an In component of 0 as the barrier layer, the thickness of the barrier layer is 15 nm, and the barrier layer is located between the quantum well layers and the outermost layer. The active layer 4 of the present embodiment includes four barrier layers and three quantum well layers.

[0076] On the basis of the above scheme, the second confinement layer 5 is of p-type conductivity, formed on the side of the active layer 4 away from the substrate layer 1, and used for forming the p-type second mirror layer 6. The second confinement layer 5 is located between the active layer 4 and the p-type DBR layer, and used for isolating the active layer 4 and the p-type DBR layer, reducing the non-radiative recombination of holes in the p-type DBR layer. The second confinement layer 5 is made of a low-Al component AlGaAs layer with a refractive index of about 3.3, which is closer to the refractive index of the InGaAs quantum well layer 3.6 in the active layer 4, and can effectively reduce the interface reflection loss and improve the light field overlap with the active layer 4. Specifically, the process steps for forming the second confinement layer 5 include: again using the metal organic chemical vapor deposition (MOCVD) method, increasing the growth temperature of the reaction chamber to 680°C and the pressure to 200 Torr; then introducing TMAl, TMGa and AsH3, and setting the flow ratio of TMAl / TMGa to 3:7 to form a low-Al component Al 0.3 Ga 0.7 As as the second confinement layer 5, which reduces the absorption of photons. In this step, DEBe with a flow rate of 8 sccm is also introduced, so that the doping concentration of p-type Be ions in the second confinement layer 5 is about 1×10 17 cm -3 The thickness of the second confinement layer 5 ranges from 78 nm to 82 nm, and is symmetrical with the first confinement layer 3, ensuring that the light field is symmetrically distributed on both sides of the active layer 4.

[0077] In one embodiment, the p-type second mirror layer 6, i.e., the p-type DBR layer, is formed on the side of the second confinement layer 5 away from the substrate layer 1. The p-type DBR layer and the n-type DBR layer are symmetrically arranged about the active layer 4, and together form a closed vertical resonant cavity with a high reflectivity of more than 99%, so that the photons are reflected back and forth in the active layer 4 to continuously obtain gain until laser is formed. The p-type DBR layer of the present embodiment includes high-Al component Al 0.9 Ga 0.1 As layers and low-Al component Al 0.3 Ga 0.7As layer, consistent with the n-type DBR layer, can be set to 25 pairs of periods, each layer thickness λ / 4n, error less than 1nm. Specifically, the process steps for forming the p-type DBR layer include: using metal organic chemical vapor deposition (MOCVD) method, consistent with the n-type DBR layer growth, the growth temperature of the reaction cavity is controlled at 700°C, the pressure is 200Torr, and the carrier gas is H2; then the reaction gas group III source (including trimethyl gallium TMGa, trimethyl aluminum TMAl) and group V source (arsine AsH3) are introduced into the reaction cavity, the doping source is DEBe with a flow rate of 10sccm, the Al composition is controlled by adjusting the flow ratio of TMAl and TMGa to obtain different refractive index aluminum gallium arsenide layers, for example, adjusting the flow ratio of TMAl / TMGa to 9:1, obtaining Al 0.9 Ga 0.1 As layer; adjusting the flow ratio of TMAl / TMGa to 3:7, obtaining Al 0.3 Ga 0.7 As layer, finally obtaining Be doping concentration of about 1×10 18 cm -3 , the p-type DBR layer composed of layers of different refractive index materials, high doping helps to ensure efficient transmission of holes.

[0078] It should be known that the junction capacitance of the VCSEL device is mainly derived from the heterojunction barrier capacitance between the p-type second mirror layer 6 and the active layer 4, and its size is determined by the formula C=ε*S / d, where ε is the dielectric constant of the material, which is usually a constant value, about 12.9 for AlGaAs / GaAs system; S is the effective conduction area of the junction region, that is, the area of the region through which the carriers can pass; d is the fixed junction region thickness obtained by epitaxial growth, about 100~200nm in the embodiment. In the related oxidation limited type VCSEL device, the whole p-type DBR layer is low resistance p-type doped, and the Be doping concentration is less than 1e18cm -3The effective conductive area S of the junction region is difficult to guarantee due to the large difference in the ring width of the oxidation confinement layer and poor performance reliability, resulting in a high junction capacitance C, usually greater than 10 fF. High-speed modulation of 100 Gb / s or more usually requires a signal switching time much smaller than the RC charging time constant τ, where R is the series resistance, and τ = R*C. According to the formula, an excessively large junction capacitance C increases the charging time constant τ, and the bandwidth is positively correlated with 1 / τ, that is, an excessively large junction capacitance limits the modulation bandwidth, thereby limiting the application of high-speed modulation. In the present embodiment, the ion modulation layer 7 obtained by selective arsenic ion implantation on the surface of the second mirror layer 6, that is, the p-type DBR layer, has a high resistance region formed by deep level defects and permanent doping compensation, and the low resistance first light hole 701 region with a diameter of 3-8 μm in the middle which is not subjected to arsenic ion implantation becomes the only channel for carrier injection and light output. At this time, the effective conductive area S has high reliability, which is equivalent to 1 / 10-1 / 20 of the conventional structure. According to the capacitance formula, the reduction of the effective conductive area S directly leads to a reduction of the junction capacitance C by more than 30%, for example, to 5-7 fF. The RC time constant τ is reduced synchronously, and the modulation bandwidth is increased from 15-20 GHz of the conventional structure to 25-30 GHz, effectively meeting the application requirements of high-speed optical communication.

[0079] That is, the present embodiment forms a high-resistance ion modulation layer 7 by arsenic ion implantation, which can effectively reduce the junction capacitance and thereby increase the modulation bandwidth to meet the demand of high-speed optical communication. In addition, the physical forming method of arsenic ion implantation can accurately obtain an ion modulation layer 7 with a target modulation depth and ring width. First, the stress problem is eliminated from the root; second, the electrical barrier formed can also forcibly constrain the carrier path, achieving an increase in carrier concentration, and more than 90% of the injected current is limited to the first light hole 701 region in the middle, which is then directly injected into the active layer 4. The non-radiative recombination loss of the edge region can also be reduced from 30% to less than 5%, the slope efficiency is increased by 10-20%, and the energy consumption is reduced by more than 15%; third, the uniform refractive index waveguide induced by arsenic ion implantation can greatly optimize the optical field, and the refractive index distribution is more uniform. The refractive index of the region where the ion modulation layer 7 is located is reduced by 0.5%-1% due to lattice defects, so that the first light hole 701 region with high refractive index in the middle forms a regular cylindrical waveguide, and the optical field is strictly constrained in the fundamental mode, the relative intensity noise is significantly improved, and the beam divergence angle is reduced to less than 10°, the coupling efficiency with a single-mode fiber is increased to more than 80%, and the single-mode is stable at high power. Even if the injected current reaches 30 mA, single-mode output can still be maintained. Compared with the conventional structure, which has multiple modes at 15 mA or more, the present embodiment has a more excellent optical field mode, and has a performance advantage far superior to the conventional oxidation confinement type VCSEL device in application fields such as data center optical interconnection and vehicle-mounted laser radar.

[0080] In one embodiment, the second mirror layer 6 described above comprises a plurality of groups of periodically stacked low refractive index layers and high refractive index layers; the implantation peak depth of the ion modulation layer 7 is between 1 / 5 and 2 / 5 of the groups of periods of the second mirror layer 6.

[0081] Specifically, the first mirror layer 2 and the second mirror layer 6 together constitute a vertical resonant cavity, the p-type DBR layer comprises alternately grown low refractive index layers and high refractive index layers, the low refractive index layers can be Al 0.9 Ga 0.1 As layers with high Al component, and the high refractive index layers can be Al 0.3 Ga 0.7 As layers with low Al component, and in the present embodiment, a total of 25 pairs of periods are provided, of which 5-10 groups of periods on the side away from the substrate layer 1, i.e. the top layer, are used as a modification region for subsequent ion implantation to form the ion modulation layer 7 and the first light hole 701. In other embodiments, the second mirror layer 6 can also comprise low refractive index layers and high refractive index layers of other number of groups of periods, but the modification depth for forming the ion modulation layer 7 should be between 1 / 5 and 2 / 5 of the number of periods, so that the ion modulation layer 7 formed by arsenic ion implantation has the dual characteristics of deep energy level defects and doping compensation, forming a long-term stable semi-insulating region in the second mirror layer 6, while avoiding damage to the underlying active layer 4, meeting the mass production requirements of long-life demand products such as automobiles, data centers, etc.

[0082] In one embodiment, the step S103 of selectively implanting arsenic ions on the side of the second mirror layer 6 of the epitaxial structure to form the ion modulation layer 7 deep into the second mirror layer 6 comprises:

[0083] Step S1031, forming a patterned mask on the side surface of the second mirror layer 6 away from the substrate layer 1, the patterned mask covers a first region of the second mirror layer 6 and exposes a second region surrounding the first region, the first region is used to form the first light hole 701, and the second region is used to form the ion modulation layer 7.

[0084] The patterned mask is formed on the surface of the second mirror layer 6 by using a photolithography process, and the specific steps include: spin coating a positive photoresist with a thickness of 1 μm, setting the temperature to 110°C for pre-baking for 90 seconds; setting a high-precision mask plate with a ring-shaped hollow inside diameter of 3-8 μm and an outside diameter of 20-40 μm above it, exposing the positive photoresist in the unshielded ring-shaped area with an energy of 80 mJ / cm2, and after development, the photoresist in the central first region is retained, and the second region in the peripheral ring-shaped area is exposed, serving as a window for subsequent arsenic ion implantation; then baking the retained positive photoresist at 120°C for 30 minutes to enhance the ion bombardment resistance of the photoresist.

[0085] The patterned mask formed by the positive photoresist can withstand high-dose ion implantation, such as greater than 1e14 ions / cm 2 , which helps to improve its thermal stability and mechanical strength.

[0086] Step S1032, arsenic ion implantation is performed on the surface of the second mirror layer 6 with the patterned mask to form an initial ion modulation layer 7 in the second region of the second mirror layer 6 exposed by the patterned mask.

[0087] The high-dose arsenic ion implantation performed on the surface of the second mirror layer 6 is a dry process of pure physical process, which fundamentally solves the reliability problem related to surface oxidation, has no volume change, and only through arsenic ion implantation, on one hand, lattice atom collision with the aluminum gallium arsenide material of the second mirror layer 6 is formed to form vacancies, interstitial atoms and other lattice defects, without introducing new phases, without stress generation, on the other hand, arsenic ions as n-type donors compensate p-type doping to form stable deep level defects, both of which change the electrical characteristics in coordination, which is convenient for forming a stable and reliable annular high resistance region.

[0088] Step S1033, annealing treatment is performed on the initial ion modulation layer 7 to form an annular ion modulation layer 7 extending into part of the thickness of the second mirror layer 6.

[0089] Exemplarily, the stable ion modulation layer 7 can be obtained by rapid thermal annealing of the initial ion modulation layer 7, specifically including: using a rapid thermal annealing furnace with nitrogen as a protective gas, a heating rate of 100°C / s, thermal annealing at 450°C for 45 seconds, and then naturally cooling to room temperature to obtain the ion modulation layer 7. By rapid thermal annealing, part of the lattice damage is repaired, material degradation is avoided, but enough deep level traps (such as As-Ga anti-site defects) are reserved, which further improve the resistivity to more than 1e 6 Ω·cm; the annealing temperature of 450°C is the balance point, below 400°C, it is easy to cause insufficient defect repair, that is, material damage is too large, and above 500°C, defects are annihilated, and the resistivity decreases.

[0090] Step S1034, the patterned mask is removed. The patterned mask can be removed by physical or chemical methods, which will not be described here.

[0091] In summary, in the embodiment, the arsenic ion implantation to form the ion modulation layer 7 is a pure physical ion bombardment and thermal annealing. The ion implantation is a dry process and does not involve liquid chemical reagents, thereby avoiding impurity pollution such as metal ions in the oxidation process, and the interface cleanliness is higher. Moreover, the electrical characteristics are changed only by lattice defects and doping compensation, and the ion modulation layer 7 formed has high resistance, stability, no stress, and high reliability. The deep level traps retained by the annealing process are thermodynamically stable at a device operating temperature such as -40% to 85°C, and do not diffuse over time like oxide layer defects, and the process compatibility is strong. Actual tests show that the VCSEL device formed by using the arsenic ion implantation and annealing physical modification process to form the ion modulation layer 7 has a service life of more than 10 6 hours, which is more than twice that of a traditional oxidation limited VCSEL device, and is particularly suitable for long-life demand scenarios such as laser radar and data centers.

[0092] In one embodiment, the ion source for the above-mentioned arsenic ion implantation is a monovalent arsenic ion source, the energy is 100 keV, the dose is 2 x 10 15 ions / cm 2 , and the injection angle is 7° oblique injection.

[0093] In the ion source, the arsenic atom (As) loses an outer electron through electron bombardment or plasma ionization to form an ion with a unit positive charge, that is, a monovalent arsenic ion (As + ). As + is selected instead of higher valence ions such as As 2+ , because: monovalent arsenic ions are more stable to produce in the ion source, and have higher beam intensity, which is beneficial to mass production efficiency; under the same acceleration voltage, the kinetic energy and mass of As + have better matching, the injection depth can be accurately controlled, and the peak value is ensured to be located at the upper layer of the p-type DBR layer; the lower the charge state, the more moderate the Coulomb interaction with the lattice atoms during the implantation process, which can reduce excessive surface damage and balance the requirement of "room temperature implantation to enhance lattice damage".

[0094] After the As + is implanted into the p-type DBR layer, in addition to the formation of defects through lattice collision, its positive charge characteristics will also have a charge compensation effect with p-type dopants such as beryllium positive ions. As + serves as a donor impurity to provide electrons, neutralizing the holes provided by Be + , further enhancing the high resistance characteristics of the p-type DBR layer, that is, forming a semi-insulating ion modulation layer 7, which is one of the key mechanisms to realize carrier confinement.

[0095] The arsenic element in this embodiment belongs to the same group of GaAs-based semiconductors, and has the characteristics of "donor doping compensation" and "low diffusion". The dopant of the p-type DBR layer is beryllium, which is an acceptor impurity, used to provide holes to achieve low resistance, and the arsenic element is a group V element of GaAs, which is easy to exist in the form of a "donor impurity" in GaAs / AlGaAs. After arsenic ion implantation, the free electrons provided by the arsenic ions will be charge-compensated with the holes provided by beryllium to be electrically neutral, directly reducing the hole carrier concentration in the p-type DBR layer, thereby increasing the resistivity of the p-type DBR layer from 1e -3 Ω·cm low resistance to 1e 6 Ω·cm high resistance, without relying on additional defects to achieve electrical isolation. Secondly, the lattice constant of arsenic ions and GaAs (5.653 Å) is almost completely matched, and as a group element, its diffusion coefficient in GaAs is extremely low, less than 1e -18 cm 2 / s at room temperature, and the high resistance region formed after ion implantation will not diffuse due to high temperature and high current for a long time, effectively avoiding the degradation of high resistance characteristics due to moisture absorption and diffusion, which is the key to breaking through the device life to 10 6 hours. Furthermore, the atomic weight of arsenic ions is moderate, which can accurately control the lattice defects in the p-type DBR layer without damaging the active layer 4; the damage degree of ion implantation to the material is positively correlated with the atomic weight of the ion. The greater the atomic weight, the higher the energy of the collision with the lattice atoms, and the more significant the defects. The atomic weight of 75 arsenic ions is in the optimal interval of "effective defect formation and not excessive damage". Such arsenic ions can achieve a projected range in AlGaAs at an energy of 100 keV, which is located in the upper 5-10 periods of the p-type DBR layer, with a thickness range of about 80-150 nm. For example, the implantation depth is about 100 nm, which will not penetrate the p-type DBR layer into the active layer 4 below. If a smaller atomic weight ion is selected, such as P + with an atomic weight of 31, the range will increase to 180 nm at the same energy, which may damage the active layer 4; if a larger atomic weight ion is selected, such as Sb + with an atomic weight of 122, the range is only 60 nm, which cannot meet the thickness requirement of the high resistance region in the p-type DBR layer.

[0096] As for some other doping ions, such as hydrogen ions (H + ), phosphorus ions (P + ), boron ions (B + ), and antimony ions (Sb + ): the modification effect of hydrogen ion implantation completely depends on "temporary defects". The shallow level traps formed by H + collision can only temporarily capture carriers, and H + itself is easy to diffuse and easy to react with Be +form unstable complexes, leading to high resistance characteristics failure at high temperature; while arsenic ion implantation is through the dual mechanism of "doping compensation (permanent charge neutralization) and deep level traps (stability defects)", which can realize long-term stability of high resistance region, and its atomic weight matches the thickness of p-type DBR layer, and does not damage the active layer 4, so H + implantation is only applicable to short-term, low-temperature scenarios, such as temporary electrical isolation, while As + implantation can meet the mass production requirements of VCSEL, especially the long-life requirements of automobiles, data centers, etc.

[0097] In addition to H + , the ions commonly used in semiconductor processes also include (P + ), (B + ), (Sb + ), but none of them are suitable for modification of the p-type DBR layer of the VCSEL. For P + with an atomic weight of 31, although it is a group V donor impurity, it can achieve doping compensation, but the small atomic weight will lead to a too long range, about 180 nm in AlGaAs at 100 keV, which is easy to penetrate the p-type DBR layer into the active layer 4, resulting in an increase in non-radiative recombination of the quantum well layer, and an increase in threshold current of more than 50%. For B + with an atomic weight of 11, it is a group III acceptor impurity, which will increase the hole concentration of the p-type DBR layer after implantation, and will instead reduce the resistivity, such as from 1e -3 Ω·cm to 1e -4 Ω·cm, which completely contradicts the high resistance goal. For Sb + with an atomic weight of 122, although it has a large atomic weight and a short range, about 60 nm at 100 keV, but Sb + has a high lattice mismatch with GaAs, and the lattice constant of Sb + is 5.87 Å, while the lattice constant of GaAs is 5.65 Å, which is easy to form dislocation defects after implantation, resulting in an increase in optical absorption loss of the p-type DBR layer, such as an increase in absorption rate from 1% to 5%, a 20% decrease in device output power. Therefore, monovalent arsenic ion is the optimal solution for modification of the p-type DBR layer in VCSEL devices, and the three characteristics of "group V donor doping, moderate atomic weight, and low diffusivity" perfectly match the core requirements of "forming a stable high resistance region, protecting the active region, and being compatible with mass production". Compared with H + , its high resistance region stability is improved by more than 10 times, and the active layer 4 is not damaged; compared with P + / B + / Sb + , its range is precisely controllable, and does not introduce additional carriers or lattice mismatch defects.

[0098] In addition, the injection angle of 7° oblique injection can reduce ion channel effect, avoid ion penetration along the crystal direction too deep, room temperature injection helps to enhance the lattice damage, and promote amorphization.

[0099] Reference Figure 5 In one embodiment, after the step S104 of forming the contact layer 8 on the side of the epitaxial structure away from the substrate layer 1, and before the step S105 of forming the first electrode 9 on the side of the contact layer 8 away from the substrate layer 1, the method further comprises:

[0100] A passivation layer 10 is formed on the surface of the side of the contact layer 8 away from the substrate layer 1, the passivation layer 10 is arranged corresponding to the ion modulation layer 7, and the passivation layer 10 has a first opening 1001 and a second opening 1002, the first opening 1001 corresponds to the first light hole 701, and the second opening 1002 exposes the part of the contact layer 8 on the ion modulation layer 7.

[0101] Specifically, the passivation layer 10 can be a low-stress silicon nitride layer, which is first formed on the contact layer 8 by plasma-enhanced chemical vapor deposition; then the silicon nitride layer above the first light hole 701 and part of the silicon nitride layer on the ion modulation layer 7 are removed by dry etching process to form the first opening 1001 and the second opening 1002, the first opening 1001 corresponds to the first light hole 701, and the second opening 1002 corresponds to part of the ion modulation layer 7, and the second opening 1002 is used for depositing metal material to realize electrical conduction between the first electrode 9 and the contact layer 8. The passivation layer 10 can change the refractive index by controlling the film thickness, adjust the optical properties, and also protect the device from reacting with air and causing oxidation.

[0102] A seed gold layer 11 is formed in the second opening 1002, and the first electrode 9 is arranged on the passivation layer 10 and electrically connected to the contact layer 8 through the seed gold layer 11.

[0103] Specifically, as shown in Figure 5 The seed gold layer 11 can be formed in the second opening 1002 by magnetron sputtering process, the material of the seed gold layer 11 is selected as metal gold, which realizes excellent electrical conductivity between the first electrode 9 and the contact layer 8, helps to import external current and improve metal contact reliability.

[0104] Reference Figure 6 In one embodiment, after the seed gold layer 11 is formed in the first opening 1001, and before the first electrode 9 is formed on the side of the contact layer 8 away from the substrate layer 1, a dielectric layer 12 is formed on the surface of the side of the passivation layer 10 away from the substrate layer 1, and the dielectric layer 12 is arranged in a staggered manner with the seed gold layer 11.

[0105] Exemplarily, the medium layer 12 can be a benzocyclobutene (BCB) material, filled between the partial first electrode 9 and the passivation layer 10, to reduce the parasitic parameters of the device itself. The medium layer 12 is arranged in a staggered manner with the seed gold layer 11, to avoid affecting the current injection from the first electrode 9 to the seed gold layer 11 and then to the contact layer 8.

[0106] With reference to Figure 9 In one embodiment, after forming the first electrode 9 on the side of the contact layer 8 away from the substrate layer 1, further comprising: forming a protective layer 13 on the side of the first electrode 9 away from the substrate layer 1, the protective layer 13 covering the first electrode 9 and extending to the side wall surface of the epitaxial structure and the surface of the substrate layer 1, the protective layer 13 forming a first window 1301 exposing a part of the first electrode 9, the first window 1301 being arranged correspondingly to the medium layer 12.

[0107] Exemplarily, the protective layer 13 can be formed by an atomic layer deposition (ALD) process, and the protective layer 13 can be selected from an aluminum oxide material, to protect the inside of the device from water vapor erosion and improve the reliability of the device.

[0108] With reference to Figures 7 to 9 In one embodiment, after forming the first electrode 9 on the side of the contact layer 8 away from the substrate layer 1, and before forming the protective layer 13 on the side of the first electrode 9 away from the substrate layer 1, further comprising: forming a second electrode 14 on the side surface of the substrate layer 1 where the epitaxial structure is formed, and / or forming a third electrode 15 on the side surface of the substrate layer 1 away from the epitaxial structure; the protective layer 13 further covering the second electrode 14 and forming a second window 1302 exposing a part of the second electrode 14.

[0109] Specifically, the p-type first electrode 9 can be formed on the light-emitting side by an evaporation process, and the n-type second electrode 14 can be formed on the other area of the side surface of the substrate layer 1 where the first electrode 9 is formed, or a back metal can be formed on the other side of the substrate layer 1 as the n-type third electrode 15, as shown in Figure 8 This helps the laser to adapt to different packaging scenarios at the application end and improves the compatibility of the laser at the application end.

[0110] In one embodiment, finally further comprising: performing rapid thermal annealing on the whole device to improve the reliability.

[0111] With reference to Figures 2 to 9The embodiment also provides a vertical cavity surface emitting laser, which is prepared by the preparation method of the vertical cavity surface emitting laser, and comprises a substrate layer 1, an epitaxial structure, an ion modulation layer 7, a contact layer 8 and a first electrode 9. The epitaxial structure is formed on one side surface of the substrate layer 1, and the epitaxial structure is a gallium arsenide-based structure and comprises a first mirror layer 2, a first confinement layer 3, an active layer 4, a second confinement layer 5 and a second mirror layer 6 which are stacked. The ion modulation layer 7 is formed on one side of the second mirror layer 6 away from the substrate layer 1, and comprises a ring-shaped arsenic ion layer, a first light hole 701 for current injection and light emission is formed in the inside of the ring-shaped arsenic ion layer, the resistivity of the ion modulation layer 7 is greater than the resistivity of the second mirror layer 6, and the refractive index of the ion modulation layer 7 is less than the refractive index of the second mirror layer 6. The contact layer 8 is arranged on one side of the epitaxial structure away from the substrate layer 1, and the contact layer 8 covers the second mirror layer 6 and the ion modulation layer 7. The first electrode 9 is arranged on one side of the contact layer 8 away from the substrate layer 1, and the first electrode 9 is in electrical communication with the contact layer 8 and is arranged in a staggered manner with the first light hole 701.

[0112] The vertical cavity surface emitting laser of the embodiment has the ring-shaped ion modulation layer 7 formed by selective arsenic ion injection and penetrating into a partial thickness of the second mirror layer 6 on the upper layer of the second mirror layer 6 close to the light emission side of the device, and the ion modulation layer 7 has characteristics of high resistance, stability and no stress. On one hand, the stable and reliable high-resistance region effectively limits the carrier path and reduces non-radiative recombination, thereby improving the effective light output. On the other hand, the upper layer of the first mirror with high central refractive index and low peripheral refractive index is formed due to the presence of the stable and reliable ion modulation layer 7, which can effectively and stably suppress high-order modes, while ensuring reliable reduction of junction capacitance to improve modulation bandwidth, and finally realizing light field optimization. Therefore, the carrier limitation and light field constraint are realized by the stable and reliable ion modulation layer 7, mode competition is fundamentally suppressed, power stability is realized, and the demand of high-speed optical communication is met.

[0113] Reference Figure 9In one embodiment, the vertical cavity surface emitting laser described above further comprises: a passivation layer 10, a seed gold layer 11, a dielectric layer 12, a protective layer 13, a second electrode 14 and / or a third electrode 15, the passivation layer 10 is formed on the side surface of the contact layer 8 away from the substrate layer 1, the passivation layer 10 covers at least part of the ion modulation layer 7, and has a first opening 1001 corresponding to the first light hole 701 and a second opening 1002 exposing part of the contact layer 8 on the ion modulation layer 7; the seed gold layer 11 is formed in the first opening 1001, the first electrode 9 is arranged on the passivation layer 10 and is in electrical communication with the contact layer 8 through the seed gold layer 11; the dielectric layer 12 is formed between the passivation layer 10 and the first electrode 9, and the dielectric layer 12 is arranged in a staggered manner with the seed gold layer 11; the protective layer 13 is formed on the side of the first electrode 9 away from the substrate layer 1, the protective layer 13 covers the first electrode 9 and extends to the side wall surface of the epitaxial structure and the surface of the substrate layer 1, the protective layer 13 forms a first window 1301 exposing part of the first electrode 9, and the first window 1301 is arranged corresponding to the dielectric layer 12; the second electrode 14 is formed on the side surface of the substrate layer 1 where the epitaxial structure is formed, and the third electrode 15 is formed on the side surface of the substrate layer 1 away from the substrate layer 1, and the protective layer 13 also covers the second electrode 14 and forms a second window 1302 exposing part of the second electrode 14.

[0114] Specifically, the passivation layer 10 is arranged on the contact layer 8, has a first opening 1001 corresponding to the first light hole 701 and a second opening 1002 corresponding to part of the ion modulation layer 7, the first opening 1001 avoids shielding light output, and the second opening 1002 is used to realize the connection between the electrode and the contact layer 8. The passivation layer 10 changes the refractive index by controlling the film thickness, adjusts the optical properties, and also protects the device from reacting with air and causing oxidation. The seed gold layer 11 is formed in the second opening 1002 of the passivation layer 10, which can be selected from metal material gold, realizes excellent conductive effect between the first electrode 9 and the contact layer 8, helps external current injection and improves metal contact reliability. The dielectric layer 12 is filled between part of the first electrode 9 and the passivation layer 10, reduces the parasitic parameters of the device itself, and is arranged in a staggered manner with the seed gold layer 11 to avoid affecting the current injection from the first electrode 9 to the seed gold layer 11 and then to the contact layer 8. The protective layer 13 can be selected from aluminum oxide material with good weather resistance, arranged on the outermost side of the device, protects the internal part of the device from water vapor erosion, and improves the reliability of the device. The second electrode 14 of n-type is formed on the other area of the side surface of the substrate layer 1 where the first electrode 9 is arranged, or the back metal is formed on the other side of the substrate layer 1 as the third electrode 15 of n-type, which helps the laser to adapt to different packaging scenes at the application end and improves the compatibility of the laser at the application end.

[0115] Further function description of each structure above is the same as the corresponding embodiment above, and will not be described here again.

[0116] Although the embodiments of the present application have been described in conjunction with the accompanying drawings, various modifications and changes can be suggested by those skilled in the art, and it is intended that the appended claims encompass such modifications and changes as fall within the scope of the present application.

Claims

1. A method of fabricating a vertical cavity surface emitting laser, characterized in that, The application relates to a substrate layer and an epitaxial structure formed on one side of the substrate layer. The epitaxial structure is a gallium arsenide-based structure, which comprises a first mirror layer, a first confinement layer, an active layer, a second confinement layer and a second mirror layer stacked in sequence from the substrate layer, and the second mirror layer comprises a plurality of groups of periodically stacked low-refractive-index layers and high-refractive-index layers. Selective arsenic ion implantation is performed on one side of the second mirror layer of the epitaxial structure to form an ion modulation layer penetrating a partial thickness of the second mirror layer, and the implantation peak depth of the ion modulation layer is between 1 / 5 and 2 / 5 of the number of material period groups of the second mirror layer; the ion modulation layer is annular, a first light hole for current injection and light emission is formed in the inside of the ion modulation layer, the resistivity of the ion modulation layer is greater than that of the second mirror layer, and the refractive index of the ion modulation layer is less than that of the second mirror layer. A contact layer is formed on the side of the epitaxial structure away from the substrate layer, and the contact layer covers the second mirror layer and the ion modulation layer. A first electrode is formed on the side of the contact layer away from the substrate layer, and the first electrode is in electrical communication with the contact layer and is arranged in a position deviated from the first light hole. The selective arsenic ion implantation performed on one side of the second mirror layer of the epitaxial structure to form an ion modulation layer penetrating the second mirror layer comprises the following steps.

2. The method of fabricating a vertical cavity surface emitting laser according to claim 1, wherein A patterned mask is formed on the side surface of the second mirror layer away from the substrate layer, the patterned mask covers a first region of the second mirror layer and exposes a second region surrounding the first region, the first region is used for forming a first light hole, and the second region is used for forming an ion modulation layer. Arsenic ion implantation is performed on the surface of the second mirror layer with the patterned mask to form an initial ion modulation layer in the second region of the second mirror layer exposed by the patterned mask. Annealing treatment is performed on the initial ion modulation layer to form an annular ion modulation layer penetrating a partial thickness of the second mirror layer. The patterned mask is removed. After the contact layer is formed on the side of the epitaxial structure away from the substrate layer, and before the first electrode is formed on the side of the contact layer away from the substrate layer, the method further comprises the following steps.

3. The method of producing a vertical cavity surface emitting laser according to claim 2, wherein The ion source of the arsenic ion implantation is a monovalent arsenic ion source, the energy is 100 keV, the dose is 2 x 1013 ions / cm2, and the implantation angle is 7° oblique implantation. 15 . 2 ​ 4. The method of producing a vertical cavity surface emitting laser according to any one of claims 1 to 3, characterized by, A passivation layer is formed on the side surface of the contact layer away from the substrate layer, the passivation layer is arranged in correspondence with the ion modulation layer, the passivation layer has a first opening and a second opening, the first opening corresponds to the first light hole, and the second opening exposes part of the contact layer on the ion modulation layer. A seed gold layer is formed in the second opening, and the first electrode is arranged on the passivation layer and is in electrical communication with the contact layer through the seed gold layer. After the seed gold layer is formed in the first opening, and before the first electrode is formed on the side of the contact layer away from the substrate layer, the method further comprises the following steps.

5. The method of producing a vertical cavity surface emitting laser according to claim 4, wherein A dielectric layer is formed on the side surface of the passivation layer away from the substrate layer, and the dielectric layer is arranged in a position deviated from the seed gold layer. After the first electrode is formed on the side of the contact layer away from the substrate layer, the method further comprises the following steps.

6. The method of producing a vertical cavity surface emitting laser according to claim 5, wherein ​ A protection layer is formed on the side of the first electrode away from the substrate layer, the protection layer covers the first electrode and extends to the sidewall surface of the epitaxial structure and the surface of the substrate layer, the protection layer forms a first window exposing part of the first electrode, and the first window is arranged corresponding to the dielectric layer.

7. The method of producing a vertical cavity surface emitting laser according to claim 6, wherein After the contact layer is formed on the side of the substrate layer away from the epitaxial structure, and before the first electrode is formed on the side of the contact layer away from the substrate layer, the method further comprises: A second electrode is formed on the side surface of the substrate layer on which the epitaxial structure is formed, and / or a third electrode is formed on the side surface of the substrate layer away from the epitaxial structure; the protection layer further covers the second electrode and forms a second window exposing part of the second electrode.

8. A vertical cavity surface emitting laser fabricated by the method of any one of claims 1 to 7, characterized in that Comprise: a substrate layer; an epitaxial structure formed on a side surface of the substrate layer, the epitaxial structure being a gallium arsenide-based structure comprising a first mirror layer, a first confinement layer, an active layer, a second confinement layer and a second mirror layer arranged in layers, the second mirror layer comprising a plurality of groups of periodically stacked low refractive index layers and high refractive index layers; an ion modulation layer formed on the side of the second mirror layer away from the substrate layer, the ion modulation layer having an implantation peak depth between 1 / 5 and 2 / 5 of the number of material period groups of the second mirror layer; the ion modulation layer comprises an annular arsenic ion layer, an inner part of which forms a first light hole for current injection and light emission, the ion modulation layer having a resistivity greater than that of the second mirror layer, and the ion modulation layer having a refractive index less than that of the second mirror layer; a contact layer arranged on the side of the epitaxial structure away from the substrate layer, the contact layer covering the second mirror layer and the ion modulation layer; a first electrode arranged on the side of the contact layer away from the substrate layer, the first electrode being in electrical communication with the contact layer and being arranged out of position with the first light hole.

9. The vertical cavity surface emitting laser of claim 8, wherein, Further comprise: a passivation layer formed on the side surface of the contact layer away from the substrate layer, the passivation layer covering at least part of the ion modulation layer and having a first opening and a second opening, the first opening corresponding to the first light hole, and the second opening exposing part of the contact layer on the ion modulation layer; a seed gold layer formed in the first opening, the first electrode being arranged on the passivation layer and being in electrical communication with the contact layer through the seed gold layer; a dielectric layer formed between the passivation layer and the first electrode, the dielectric layer being arranged out of position with the seed gold layer; a protection layer formed on the side of the first electrode away from the substrate layer, the protection layer covering the first electrode and extending to the sidewall surface of the epitaxial structure and the surface of the substrate layer, the protection layer forming a first window exposing part of the first electrode, and the first window being arranged corresponding to the dielectric layer. A second electrode is formed on a side surface of the substrate layer on which the epitaxial structure is formed, and a third electrode is formed on a side surface of the substrate layer opposite to the epitaxial structure. The protective layer also covers the second electrode and forms a second window exposing a part of the second electrode.

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