Display panel, preparation method of display panel and electronic equipment

Abstract

The embodiment of the invention provides a display panel, a preparation method of the display panel and electronic equipment, and relates to the technical field of display, the display panel comprises a plurality of connecting structures, and the display panel comprises a substrate, an isolation structure layer and a light emitting unit; the isolation structure layer comprises an isolation structure, the isolation structure is located on one side of the substrate, an isolation opening is defined by the isolation structure, and the orthographic projection of the isolation structure on the substrate is located outside the orthographic projection of the connecting structure on the substrate; at least part of the light-emitting units are located in the isolation openings. According to the invention, the cathode of the light-emitting unit can continuously and completely cover the connecting structure, and the cathode of the light-emitting unit can better protect the connecting structure in the preparation process of the light-emitting unit, so that the reliability of the connecting structure can be improved.

Description

[0001] This application claims priority to Chinese Patent Application No. 2024107448347, filed on June 7, 2024, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0002] This application relates to the field of display technology, and more specifically, to a display panel, a method for manufacturing the display panel, and an electronic device. Background Technology

[0003] Organic light-emitting diodes (OLEDs) and flat panel displays based on light-emitting diodes (LEDs) are widely used in various consumer electronics products such as mobile phones, televisions, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body, and wide range of applications, becoming the mainstream of display panels.

[0004] However, there are still some problems with the display panel that need to be addressed. Summary of the Invention

[0005] To overcome the technical problems mentioned in the above background, embodiments of this application provide a display panel, the display panel including a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area, the display panel including a plurality of connection structures located in the bonding area, the display panel including:

[0006] Substrate;

[0007] An isolation structure layer located on one side of the substrate, the isolation structure layer including an isolation structure, the isolation structure enclosing an isolation opening;

[0008] The light-emitting unit is located at least partially within the isolation opening;

[0009] Wherein, the orthographic projection of the isolation structure layer on the substrate is outside the orthographic projection of the connection structure on the substrate.

[0010] In some possible implementations, the connection structure includes a bonding structure comprising a signal trace located on one side of the substrate, wherein a first insulating layer is covered on the side of the film layer containing the signal trace away from the substrate, and the first insulating layer has a first opening that exposes at least a portion of the signal trace.

[0011] Preferably, the side of the signal trace away from the substrate includes a flat surface;

[0012] Preferably, the side of the first insulating layer away from the substrate includes a flat surface;

[0013] Preferably, the display panel further includes a control module, and the bonding structure is electrically connected to the control module;

[0014] Preferably, the control module includes a chip.

[0015] In some possible implementations, along a direction away from the substrate, there are a first trace, a second trace, and a third trace sequentially stacked on one side of the substrate, the first insulating layer is located on the side of the film layer containing the third trace away from the substrate, the first opening exposes at least a portion of the third trace, and the third trace is electrically connected to the chip;

[0016] Preferably, the side of the third trace away from the substrate includes a flat surface, and / or the side of the second trace away from the substrate includes a flat surface, and / or the side of the first trace away from the substrate includes a flat surface.

[0017] Preferably, the first trace is electrically connected to the gate of the display panel;

[0018] Preferably, the second trace includes a power supply voltage trace;

[0019] Preferably, the third trace includes a data trace or a light emission control signal trace.

[0020] In some possible implementations, the bonding structure further includes a fourth insulating layer located on the side of the third trace away from the substrate and between the third trace and the first insulating layer, wherein the fourth insulating layer has a fourth opening exposing at least a portion of the third trace along the thickness direction of the substrate;

[0021] Preferably, the orthographic projection of the fourth opening on the substrate is located within the orthographic projection of the first opening on the substrate;

[0022] Preferably, the fourth insulating layer extends from the non-display area to the display area;

[0023] Preferably, the light-emitting unit includes a first electrode, a light-emitting part, and a second electrode stacked sequentially along a direction away from the substrate, and the fourth insulating layer located in the display area is located on the side of the first electrode closer to the substrate;

[0024] Preferably, the material of the fourth insulating layer includes inorganic materials;

[0025] Preferably, the material of the fourth insulating layer includes at least one of silicon nitride, silicon oxide, or silicon oxynitride;

[0026] Preferably, along the thickness direction of the substrate, the thickness of the fourth insulating layer is greater than or equal to... and less than or equal to

[0027] In some possible implementations, the bonding structure further includes a fifth insulating layer located on the side of the third trace and the first insulating layer away from the substrate, wherein the fifth insulating layer has a fifth opening exposing at least a portion of the third trace along the thickness direction of the substrate;

[0028] Preferably, the orthographic projection of the fifth opening on the substrate is located within the orthographic projection of the first opening on the substrate;

[0029] Preferably, the bonding structure further includes a sixth insulating layer located on the side of the fifth insulating layer away from the substrate, and the sixth insulating layer has a sixth opening exposing at least a portion of the third trace along the thickness direction of the substrate;

[0030] Preferably, the orthographic projection of the sixth opening on the substrate is located within the orthographic projection of the fifth opening on the substrate;

[0031] Preferably, the bonding structure further includes a bonding trace located on the side of the sixth insulating layer away from the substrate, the bonding trace being electrically connected to the third trace through the sixth opening, the fifth opening and the first opening, and the third trace being electrically connected to the chip through the bonding trace.

[0032] In some possible implementations, the fifth insulating layer extends from the non-display area to the display area, and the fifth insulating layer located in the display area is located on the side of the light-emitting unit away from the substrate;

[0033] Preferably, the display panel further includes a first touch layer located on the side of the fifth insulating layer away from the substrate, the first touch layer including a first touch trace located in the display area;

[0034] Preferably, the sixth insulating layer extends from the non-display area to the display area, and the sixth insulating layer located in the display area is located on the side of the first touch layer away from the substrate;

[0035] Preferably, the display panel further includes a second touch layer located on the side of the sixth insulating layer away from the substrate, the second touch layer including a second touch trace located in the display area;

[0036] Preferably, the material of the bonding trace is the same as the material of the second touch trace;

[0037] Preferably, the bonding trace is disposed on the same layer as the second touch trace.

[0038] In some possible implementations, the display panel includes a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer sequentially stacked along a side away from the substrate, wherein the fourth conductive layer includes the third trace;

[0039] Preferably, the third conductive layer includes the second trace;

[0040] Preferably, the first conductive layer includes the first trace.

[0041] In some possible implementations, the display panel includes a second insulating layer and a third insulating layer located between the film layer containing the first trace and the film layer containing the third trace, wherein the second insulating layer and the third insulating layer are sequentially stacked in a direction away from the substrate;

[0042] Preferably, along a direction perpendicular to the substrate, the second insulating layer has a second opening, the third insulating layer has a third opening, and the second trace is electrically connected to the first trace through the third opening and the second opening in sequence;

[0043] Preferably, a capacitor dielectric layer is provided between the first conductive layer and the second conductive layer, and the second insulating layer includes the capacitor dielectric layer;

[0044] Preferably, an interlayer insulating layer is provided between the second conductive layer and the third conductive layer, and the third insulating layer includes the interlayer insulating layer.

[0045] In some possible implementations, the orthographic projection of the second opening onto the substrate lies within the orthographic projection of the third opening onto the substrate;

[0046] Preferably, the center of the orthographic projection of the second opening onto the substrate coincides with the center of the orthographic projection of the third opening onto the substrate;

[0047] Preferably, the orthographic projection of the third opening on the substrate is located within the orthographic projection of the first opening on the substrate;

[0048] Preferably, the center of the orthographic projection of the third opening onto the substrate coincides with the center of the orthographic projection of the first opening onto the substrate;

[0049] Preferably, at least a portion of the third trace is in contact with the side of the second trace away from the substrate.

[0050] In some possible implementations, the display panel further includes a first encapsulation layer located on the side of the light-emitting unit away from the substrate. The first encapsulation layer includes a plurality of spaced-apart encapsulation units, at least a portion of which extend from the side of the isolation structure toward the isolation opening to the side of the isolation structure away from the substrate.

[0051] In some possible implementations, the packaging units are spaced apart on the side of the isolation structure away from the substrate;

[0052] Preferably, there is a gap between the packaging unit located on the side of the isolation structure away from the substrate and the side of the isolation structure away from the substrate;

[0053] Preferably, the orthographic projection of the packaging unit on the substrate covers the orthographic projection of the isolation opening on the substrate and the orthographic projection of a portion of the isolation structure on the substrate.

[0054] In some possible implementations, the light-emitting unit includes a first electrode, a light-emitting portion, and a second electrode sequentially stacked along a direction away from the substrate;

[0055] Preferably, the display panel further includes a pixel defining layer located on the side of the first electrode away from the substrate, and the isolation structure is located on the side of the pixel defining layer away from the substrate; the pixel defining layer includes pixel openings that expose at least a portion of the first electrode, and the orthographic projection of the isolation structure on the substrate is located between the orthographic projections of two adjacent pixel openings on the substrate;

[0056] Preferably, the orthographic projection of the pixel opening on the substrate lies within the orthographic projection of the isolation opening on the substrate;

[0057] Preferably, the first insulating layer includes the pixel defining layer.

[0058] In some possible implementations, the isolation structure includes a first isolation portion and a second isolation portion stacked sequentially in a direction away from the substrate, wherein the orthographic projection of the side of the first isolation portion away from the substrate on the substrate is located within the orthographic projection of the second isolation portion on the substrate;

[0059] Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or, the isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion;

[0060] Preferably, the material of the third isolation portion includes molybdenum metal; and / or, the material of the first isolation portion includes aluminum metal; and / or, the material of the second isolation portion includes titanium metal.

[0061] In some possible implementations, this application also provides another display panel, the display panel including a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area, the display panel including a substrate and a plurality of bonding structures located in the bonding area;

[0062] The bonding structure includes a signal trace located on one side of the substrate and a first insulating layer located on the side of the film layer containing the signal trace away from the substrate. The first insulating layer has a first opening that exposes at least a portion of the signal trace, and at least a portion of the signal trace is exposed through the first opening.

[0063] In some possible implementations, the side of the signal trace away from the substrate includes a flat surface, and / or, the side of the first insulating layer away from the substrate includes a flat surface.

[0064] In some possible embodiments, this application also provides a method for manufacturing a display panel, the display panel including a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area, the display panel including a plurality of connection structures located in the bonding area, the method comprising:

[0065] Provide a substrate;

[0066] An isolation structure layer is formed on one side of the substrate. The isolation structure layer includes an isolation structure that encloses an isolation opening. The orthographic projection of the isolation structure layer on the substrate is outside the orthographic projection of the connection structure on the substrate.

[0067] Light-emitting units are prepared, with at least a portion of the light-emitting units located within the isolation opening.

[0068] In some possible implementations, the connection structure includes a bonding structure, and the step of forming an isolation structure layer on one side of the substrate includes:

[0069] A first conductive material layer is formed on one side of the substrate, and the first conductive material layer is patterned to form the first trace of the bonding structure;

[0070] A second conductive material layer is formed on the side of the first trace away from the substrate, and the second conductive material layer is patterned to form a second trace of the bonding structure, wherein the second trace is electrically connected to the first trace;

[0071] A third conductive material layer is formed on the side of the second trace away from the substrate, and the third conductive material layer is patterned to form the third trace of the bonding structure, wherein the third trace is electrically connected to the second trace;

[0072] A fourth insulating layer of the bonding structure is formed on the side of the third trace away from the substrate, and a fourth opening is provided on the fourth insulating layer along the thickness direction of the substrate to expose at least a portion of the third trace;

[0073] A pixel defining material layer and an isolation material layer are sequentially formed on the side of the fourth insulating layer away from the substrate, and the isolation material layer and the pixel defining material layer are patterned respectively to form the first insulating layer of the isolation structure and the bonding structure. The first insulating layer has a first opening that exposes at least a portion of the third trace. The orthographic projection of the fourth opening on the substrate is located within the orthographic projection of the first opening on the substrate. The orthographic projection of the isolation material layer on the substrate covers the orthographic projections of the bonding area and the display area on the substrate. When the isolation material layer is patterned, the isolation material layer of the bonding area is removed; or, the orthographic projection of the isolation material layer on the substrate is located outside the orthographic projection of the bonding area on the substrate.

[0074] Preferably, after the step of preparing the light-emitting unit, the method further includes:

[0075] A fifth insulating material layer, a first touch layer, and a sixth insulating material layer are sequentially formed on the side of the light-emitting unit away from the substrate;

[0076] Along the thickness direction of the substrate, a sixth opening and a fifth opening are sequentially formed on the sixth insulating material layer and the fifth insulating material layer to form the sixth insulating layer and the fifth insulating layer of the bonding structure, respectively.

[0077] A second touch layer is formed on the side of the sixth insulating layer away from the substrate. The second touch layer includes a second touch trace located in the display area and a bonding trace located in the bonding area. The bonding trace is electrically connected to the third trace in sequence through the sixth opening, the fifth opening, the first opening and the fourth opening.

[0078] In some possible implementations, the connection structure includes a bonding structure, the isolation opening includes a first isolation opening and a second isolation opening, and the step of fabricating the light-emitting unit includes:

[0079] A light-emitting material layer of a first light-emitting unit is formed within the first isolation opening, the light-emitting material layer extends into the second isolation opening, and the light-emitting material layer includes a light-emitting portion;

[0080] A second electrode layer is formed on the side of the light-emitting material layer of the first light-emitting unit away from the substrate, the second electrode layer covers the bonding structure, and the second electrode layer includes a second electrode;

[0081] A first encapsulation layer is formed on the side of the second electrode layer away from the substrate;

[0082] A first etched protective layer is formed in the first isolation opening corresponding to the first light-emitting unit, and the first etched protective layer extends to cover a portion of the isolation structure;

[0083] Remove the first encapsulation layer, the light-emitting material layer, and the second electrode layer that are not covered by the first etch protection layer, and remove the first etch protection layer to form a light-emitting part, a second electrode, and an encapsulation unit within the first isolation opening corresponding to the first light-emitting unit.

[0084] In some possible implementations, after the steps of removing the first encapsulation layer, the light-emitting material layer, and the second electrode layer not covered by the first etch protective layer, and removing the first etch protective layer, the method further includes:

[0085] A light-emitting material layer of a second light-emitting unit is formed within the second isolation opening, and the light-emitting material layer of the second light-emitting unit covers the side of the encapsulation unit corresponding to the first light-emitting unit away from the substrate;

[0086] A second electrode layer is formed on the side of the light-emitting material layer of the second light-emitting unit away from the substrate, and the second electrode layer covers the bonding structure;

[0087] A first encapsulation layer is formed on the side of the second electrode layer away from the substrate;

[0088] A second etched protective layer is formed in the second isolation opening corresponding to the second light-emitting unit, and the second etched protective layer extends to cover a portion of the isolation structure;

[0089] Remove the first encapsulation layer, the light-emitting material layer, and the second electrode layer that are not covered by the second etch protection layer, and remove the second etch protection layer to form a light-emitting part, a second electrode, and an encapsulation unit in the second isolation opening corresponding to the second light-emitting unit.

[0090] In some possible implementations, this application also provides an electronic device, characterized in that the electronic device includes the display panel described in this application, or includes a display panel prepared by the method for preparing the display panel described in this application.

[0091] Compared with the prior art, this application has the following beneficial effects:

[0092] This application provides a display panel, a method for fabricating the display panel, and an electronic device. By setting the orthogonal projection of the isolation structure layer on the substrate to be outside the orthogonal projection of the connecting structure on the substrate, the cathode of the light-emitting unit can continuously and completely cover the connecting structure. During the fabrication of the light-emitting unit, the cathode of the light-emitting unit can better protect the connecting structure, thereby improving the reliability of the connecting structure. Attached Figure Description

[0093] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of this application and should not be regarded as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0094] Figure 1 A top view of the display panel provided in an embodiment of this application;

[0095] Figure 2 A partial top view of the display area of ​​the display panel provided in an embodiment of this application;

[0096] Figure 3 Provided for the embodiments of this application Figure 2 One of the cross-sectional views at point AA in the middle;

[0097] Figure 4 Provided for the embodiments of this application Figure 1 One of the cross-sectional views at the middle BB section;

[0098] Figure 5 Provided for the embodiments of this application Figure 2 Second sectional view at point AA;

[0099] Figure 6 Provided for the embodiments of this application Figure 2 Schematic diagram of the cross section at point AA (part 3);

[0100] Figure 7 Provided for the embodiments of this application Figure 1 Second sectional view at point BB;

[0101] Figure 8 Provided for the embodiments of this application Figure 2 Fourth sectional view at point AA;

[0102] Figure 9 Provided for the embodiments of this application Figure 1 Schematic diagram of the cross section at point BB (part 3);

[0103] Figure 10 Provided for the embodiments of this application Figure 1 Fourth sectional view at point BB;

[0104] Figure 11 Provided for the embodiments of this application Figure 1 Fifth sectional view at point BB;

[0105] Figure 12 Provided for the embodiments of this application Figure 1 Sixth sectional view at the middle BB section;

[0106] Figure 13 Provided for the embodiments of this application Figure 2 Fifth sectional view at point AA;

[0107] Figure 14 A schematic flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application;

[0108] Figure 15 A cross-sectional schematic diagram of the light-emitting material layer forming the first light-emitting unit within the first isolation opening, provided as an embodiment of this application;

[0109] Figure 16 A schematic cross-sectional view showing the light-emitting material layer extending to the side of the bonding structure away from the substrate, as provided in an embodiment of this application.

[0110] Figure 17 A schematic cross-sectional view of the second electrode layer formed on the side of the light-emitting material layer of the first light-emitting unit away from the substrate, provided in an embodiment of this application;

[0111] Figure 18 A schematic cross-sectional view of the second electrode layer extending to the bonding structure provided in an embodiment of this application;

[0112] Figure 19 One of the cross-sectional schematic diagrams provided in this application shows the formation of a first encapsulation layer on the side of the second electrode layer away from the substrate;

[0113] Figure 20 A cross-sectional schematic diagram showing the first encapsulation layer extending to the bonding structure, as provided in an embodiment of this application;

[0114] Figure 21 A cross-sectional schematic diagram of a first etched protective layer formed within a first isolation opening corresponding to a first light-emitting unit, provided in an embodiment of this application;

[0115] Figure 22 A cross-sectional schematic diagram of the first encapsulation layer after removing the first encapsulation layer not covered by the first etch protective layer, provided in an embodiment of this application;

[0116] Figure 23A top view of the bonding structure after removing the first encapsulation layer, provided for an embodiment of this application;

[0117] Figure 24 A cross-sectional schematic diagram of the luminescent material layer and the second electrode layer not covered by the first etch protective layer, provided for an embodiment of this application, after removing the first etch protective layer;

[0118] Figure 25 A schematic cross-sectional view of the bonding structure after removing the light-emitting material layer and the second electrode layer together, as provided in an embodiment of this application;

[0119] Figure 26 A cross-sectional schematic diagram of the light-emitting material layer forming the second light-emitting unit within the second isolation opening, provided as an embodiment of this application;

[0120] Figure 27 A schematic cross-sectional view of the second electrode layer formed on the side of the light-emitting material layer of the second light-emitting unit away from the substrate, as provided in an embodiment of this application;

[0121] Figure 28 A second cross-sectional schematic diagram showing the formation of a first encapsulation layer on the side of the second electrode layer away from the substrate, provided in an embodiment of this application;

[0122] Figure 29 A cross-sectional schematic diagram of the formation of a second etched protective layer within the second isolation opening corresponding to the second light-emitting unit, provided in an embodiment of this application;

[0123] Figure 30 A cross-sectional schematic diagram of the first encapsulation layer after removing the first encapsulation layer not covered by the second etch protection layer, provided in an embodiment of this application;

[0124] Figure 31 A cross-sectional schematic diagram showing a first conductive layer, a second conductive layer, a third conductive layer, and a fourth conductive layer sequentially formed in a display area, provided for an embodiment of this application;

[0125] Figure 32 A cross-sectional schematic diagram of a first trace, a second trace, and a third trace that sequentially form a bonding structure in the bonding area, provided for an embodiment of this application;

[0126] Figure 33 A cross-sectional schematic diagram of a fourth insulating layer formed in the display area, provided as an embodiment of this application;

[0127] Figure 34a A cross-sectional schematic diagram of a fourth insulating layer forming a bonding structure in the bonding region is provided for embodiments of this application;

[0128] Figure 34b A cross-sectional schematic diagram showing the insulating material layer extending to the bonding area is provided for an embodiment of this application;

[0129] Figure 34c A cross-sectional schematic diagram is provided for embodiments of this application, showing that the isolation material layer does not extend to the bonding area;

[0130] Figure 35 A cross-sectional schematic diagram showing the sequential formation of a pixel-defining material layer and an isolation material layer, provided in an embodiment of this application;

[0131] Figure 36 A cross-sectional schematic diagram of the sequentially patterned isolation material layer and pixel defining material layer provided in an embodiment of this application;

[0132] Figure 37 A cross-sectional schematic diagram showing a fifth insulating layer, a first touch layer, and a sixth insulating layer sequentially formed on the side of the light-emitting unit away from the substrate, provided for an embodiment of this application;

[0133] Figure 38 This is a cross-sectional schematic diagram showing the fifth and sixth insulating layers sequentially formed in the bonding region, as provided in an embodiment of this application.

[0134] Reference numerals: 1. Substrate; 2. Trace; 3. Insulating layer; 31. Opening; 4. Isolation unit; 5. Bonding structure; 6. Isolation structure; 61. First isolation portion; 62. Second isolation portion; 63. Third isolation portion; 7. Isolation opening; 71. First isolation opening; 72. Second isolation opening; 8. Light-emitting unit; 9. Pixel defining layer; 91. Pixel opening; 10. First encapsulation layer; 101. Encapsulation unit; 11. First electrode; 12. Light-emitting material layer; 121. Light-emitting portion; 13. Second electrode layer; 131. Second electrode; 14. Second insulating layer; 141. Second opening; 15. Third insulating layer; 151. Third opening; 16. First insulating layer; 161. First opening; 17. Signal trace ; 171, First trace; 172, Second trace; 173, Third trace; 18, First conductive layer; 19, Capacitor dielectric layer; 20, Interlayer insulating layer; 21, Third conductive layer; 211, Drain; 212, Source; 22, Fourth conductive layer; 23, Semiconductor layer; 24, Second conductive layer; 25, First etch protection layer; 26, Second etch protection layer; 27, Fourth insulating layer; 271, Fourth opening; 28, Fifth insulating layer; 281, Fifth opening; 29, Sixth insulating layer; 291, Sixth opening; 30, First touch layer; 301, First touch trace; 31, Second touch layer; 311, Second touch trace; 32, Bonding trace; 33, Pixel defining material layer; 34, Isolation material layer. Detailed Implementation

[0135] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0136] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0137] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0138] In the description of this application, it should be noted that the terms "center," "upper," "lower," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship commonly used when the product of the invention is in use. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, the terms "first," "second," and "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0139] It should be noted that, where there is no conflict, different features in the embodiments of this application can be combined with each other.

[0140] The display panel in the related art includes a display area and a non-display area that at least partially surrounds the display area. The non-display area includes a bonding area. The display panel includes a connection structure that may be located in the display area or in the bonding area.

[0141] Through long-term research, the inventors discovered that the reliability of the bridging traces in the connection structure located in the display area and the reliability of the bonding traces in the connection structure located in the bonding area are not good enough, thus making the reliability of the connection structure of the display panel not good enough.

[0142] In view of this, this embodiment provides a solution that can improve the reliability of the connection structure. The solution provided in this embodiment will be described in detail below.

[0143] Please see Figures 1-3This embodiment provides a display panel, which includes a display area AA and a non-display area AB that at least partially surrounds the display area AA. The non-display area AB includes a bonding area AC. The display panel includes a plurality of connection structures located in the bonding area AC. The display panel includes a substrate 1, an isolation structure layer and a light-emitting unit 8.

[0144] The isolation structure layer includes an isolation structure 6, which is located on one side of the substrate 1. The isolation structure 6 encloses and forms an isolation opening 7. The orthographic projection of the isolation structure layer on the substrate 1 is outside the orthographic projection of the connecting structure on the substrate 1. At least some of the light-emitting units 8 are located within the isolation opening 7.

[0145] The composition and preparation of isolation structure 6 are detailed in the patent.

[0146] Further descriptions are provided in CN118251982A, 202410864269.8, PCT / CN2024 / 098407, PCT / CN2024 / 102783, PCT / CN2024 / 098217, PCT / CN2024 / 100935, PCT / CN2024 / 102785, PCT / CN2024 / 099419, PCT / CN2024 / 099072, and CN116685174A for reference.

[0147] The light-emitting unit 8 may include a first light-emitting unit and a second light-emitting unit; the first light-emitting unit and the second light-emitting unit emit different colors, for example, the first light-emitting unit may emit red and the second light-emitting unit may emit blue.

[0148] In this embodiment, the isolation structure layer does not extend to the location of the connecting structure. The cathode of the light-emitting unit 8 will continuously form a film at the connecting structure, which can completely cover the connecting structure. Therefore, during the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the connecting structure, the liquid medicine is not easy to reach the connecting structure, and the connecting structure is not easy to be damaged, thereby improving the electrical connection effect of the connecting structure.

[0149] Based on the above design, this embodiment sets the orthographic projection of the isolation structure layer on the substrate 1 to be outside the orthographic projection of the connection structure on the substrate 1, so that the cathode of the light-emitting unit 8 can continuously and completely cover the connection structure. During the fabrication of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the connection structure, thereby improving the reliability of the connection structure.

[0150] In some possible implementations, the connection structure includes a bonding structure 5, and the display panel also includes a chip. The bonding structure 5 is electrically connected to the chip, and the orthographic projection of the isolation structure layer on the substrate 1 is outside the orthographic projection of the bonding structure 5 on the substrate 1. Thus, the isolation structure layer does not extend to the location of the bonding structure 5, and the cathode of the light-emitting unit 8 is continuously formed at the bonding structure 5, completely covering the bonding structure 5. Therefore, during the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the bonding structure 5, making it less likely for the chemical solution to reach the bonding structure 5 and for the bonding structure 5 to be damaged, thereby improving the electrical connection effect between the bonding structure 5 and the chip.

[0151] In some possible implementations, please refer again. Figure 3 The light-emitting unit 8 includes a first electrode 11, a light-emitting part 121, and a second electrode 131 stacked sequentially along a direction away from the substrate 1. The display panel also includes a pixel defining layer 9 located on the side of the first electrode 11 away from the substrate 1, and an isolation structure 6 located on the side of the pixel defining layer 9 away from the substrate 1. The pixel defining layer 9 includes a pixel opening 91 that exposes at least part of the first electrode 11. The orthographic projection of the isolation structure 6 on the substrate 1 is located between the orthographic projections of two adjacent pixel openings 91 on the substrate 1, and the orthographic projection of the pixel openings 91 on the substrate 1 is located within the orthographic projection of the isolation openings 7 on the substrate 1.

[0152] When forming the light-emitting material layer 12, the light-emitting material layer 12 is separated by the isolation structure 6 to form a plurality of spaced-apart light-emitting portions 121. When forming the second electrode layer 13, the second electrode layer 13 is separated by the isolation structure 6 to form a plurality of spaced-apart second electrodes 131. The isolation structure 6 includes a conductive material, and the second electrodes 131 are electrically connected to the isolation structure 6. A first electrode 11, a light-emitting portion 121, and a second electrode 131 form a light-emitting unit 8. The first electrode 11 can be an anode, and the second electrode 131 can be a cathode.

[0153] In some possible implementations, please refer again. Figure 3 The display panel also includes a first encapsulation layer 10 located on the side of the light-emitting unit 8 away from the substrate 1. The first encapsulation layer 10 includes a plurality of spaced-apart encapsulation units 101, at least a portion of which extend from the side of the isolation structure 6 toward the isolation opening 7 to the side of the isolation structure 6 away from the substrate 1. The encapsulation units 101 are spaced-apart on the side of the isolation structure 6 away from the substrate 1, and there is a gap between the encapsulation units 101 on the side of the isolation structure 6 away from the substrate 1 and the side of the isolation structure 6 away from the substrate 1. The orthographic projection of the encapsulation units 101 on the substrate 1 covers the orthographic projection of the isolation opening 7 on the substrate 1 and covers the orthographic projection of a portion of the isolation structure 6 on the substrate 1.

[0154] During the patterning process of the light-emitting unit 8, the first encapsulation layer 10 is disconnected at the isolation structure 6 to form an encapsulation unit 101. The encapsulation unit 101 can completely and independently encapsulate the corresponding light-emitting unit 8, thereby improving the reliability of the display panel.

[0155] For some possible implementations, please refer to Figure 4 The bonding structure 5 includes a signal trace 17 located on one side of the substrate 1. The side of the film layer where the signal trace 17 is located away from the substrate 1 is covered by a first insulating layer 16. The first insulating layer 16 has a first opening 161 that exposes at least a portion of the signal trace 17.

[0156] The display panel also includes a control module. The bonding structure 5 is electrically connected to the control module, which includes a chip. When the chip is electrically connected to the bonding structure 5, it can also be electrically connected to the signal trace 17. Since the isolation structure 6 of the display area AA does not extend to the location of the bonding structure 5, the cathode of the light-emitting unit 8 can completely cover the first insulating layer 16 and the signal trace 17 of the bonding structure 5. During the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the first insulating layer 16 and the signal trace 17 of the bonding structure 5. The liquid is less likely to reach the first insulating layer 16 and the signal trace 17, and the first insulating layer 16 and the signal trace 17 are less likely to be damaged, thereby improving the electrical connection effect between the bonding structure 5 and the chip.

[0157] Preferably, please see again. Figure 4 The signal trace 17 is flat on the side away from the substrate 1; and / or the first insulating layer 16 is flat on the side away from the substrate 1.

[0158] The side of the signal trace 17 and the first insulating layer 16 away from the substrate 1 includes a flat surface, that is, the side of the signal trace 17 and the first insulating layer 16 away from the substrate 1 is flat. The signal trace 17 and the first insulating layer 16 are less likely to form pits or other defects, thereby improving the quality of the signal trace 17 and the first insulating layer 16, and ultimately improving the quality of the bonding structure 5.

[0159] In some possible implementations, please refer again. Figure 4 Along the direction away from the substrate 1, the signal trace 17 includes a first trace 171, a second trace 172 and a third trace 173 stacked sequentially on one side of the substrate 1. The first insulating layer 16 is located on the side of the film layer where the third trace 173 is located away from the substrate 1. The first opening 161 exposes at least part of the third trace 173. The third trace 173 is electrically connected to the chip.

[0160] At least a portion of the third trace 173 is exposed by the first opening 161. When the chip is electrically connected to the bonding structure 5, the chip is electrically connected to the third trace 173 exposed by the first opening 161. Since the isolation structure 6 of the display area AA does not extend to the location of the bonding structure 5, the cathode of the light-emitting unit 8 can completely cover the third trace 173 of the bonding structure 5. During the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the third trace 173, the second trace 172, and the first trace 171 of the bonding structure 5. The liquid is less likely to reach the third trace 173, the second trace 172, and the first trace 171, and the third trace 173, the second trace 172, and the first trace 171 are less likely to be damaged.

[0161] Preferably, the side of the third trace 173 away from the substrate 1 includes a flat surface, and / or, the side of the second trace 172 away from the substrate 1 includes a flat surface, and / or, the side of the first trace 171 away from the substrate 1 includes a flat surface. Since pits and other defects are less likely to form on the third trace 173, the second trace 172, and the first trace 171, the quality of the third trace 173, the second trace 172, and the first trace 171 can be improved, ultimately improving the quality of the bonding structure 5.

[0162] Specifically, the first trace 171 can be electrically connected to the gate of the display panel to provide a signal to the gate; the second trace 172 can include a power supply voltage trace, and the second trace 172 can provide a voltage signal to the anode of the light-emitting unit 8; the third trace 173 includes a data trace or a light-emitting control signal trace 17, and the third trace 173 can provide data signals or light-emitting signals to the transistors of the display panel.

[0163] For some possible implementations, please refer to Figure 4 and Figure 5 The display panel includes a first conductive layer 18, a second conductive layer 24, a third conductive layer 21 and a fourth conductive layer 22 stacked sequentially along the side away from the substrate 1. The fourth conductive layer 22 includes a third trace 173, the third conductive layer 21 includes a second trace 172, and the first conductive layer 18 includes a first trace 171.

[0164] The display panel also includes a buffer layer located on one side of the substrate 1 and a semiconductor layer 23 located on the side of the buffer layer away from the substrate 1. The semiconductor layer 23 includes a source region, a drain region, and a channel region. The first conductive layer 18 also includes a gate and a first capacitor plate. The second conductive layer 24 also includes a second capacitor plate. The first capacitor plate and the second capacitor plate form a capacitor. The third conductive layer 21 also includes a drain 211 and a source 212. The drain 211 is electrically connected to the drain region, and the source 212 is electrically connected to the source region. The gate, source 212, and drain 211 form a switching device. The conductive trace of the fourth conductive layer 22 is connected to the drain 211, and the conductive trace of the fourth conductive layer 22 is then electrically connected to the first electrode 11.

[0165] In this embodiment, the fourth conductive layer 22 includes a third trace 173, the third conductive layer 21 includes a second trace 172, and the first conductive layer 18 includes a first trace 171. That is, the third trace 173 is located in the fourth conductive layer 22, the second trace 172 is located in the third conductive layer 21, and the first trace 171 is located in the first conductive layer 18. The first trace 171 can be formed simultaneously with the formation of the first conductive layer 18, the second trace 172 can be formed simultaneously with the formation of the third conductive layer 21, and the third trace 173 can be formed simultaneously with the formation of the fourth conductive layer 22. Thus, there is no need to specifically set up processes for forming the first trace 171, the second trace 172, and the third trace 173, thereby reducing the cost of forming the first trace 171, the second trace 172, and the third trace 173.

[0166] In some possible implementations, please refer again. Figure 4 The bonding structure 5 also includes a second insulating layer 14 and a third insulating layer 15 located between the film layer where the first trace 171 is located and the film layer where the third trace 173 is located. The second insulating layer 14 and the third insulating layer 15 are stacked sequentially in a direction away from the substrate 1. In a direction perpendicular to the substrate 1, the second insulating layer 14 has a second opening 141 and the third insulating layer 15 has a third opening 151. The second trace 172 is electrically connected to the first trace 171 in sequence through the third opening 151 and the second opening 141.

[0167] A second insulating layer 14 and a third insulating layer 15 are provided between the first trace 171 and the second trace 172. The second trace 172 is electrically connected to the first trace 171 through a third opening 151 on the third insulating layer 15 and a second opening 141 on the second insulating layer 14. At least a portion of the third trace 173, on the side closer to the substrate 1, contacts the side of the second trace 172 away from the substrate 1. In this way, the third trace 173, the second trace 172, and the first trace 171 are electrically connected in sequence. After the chip is electrically connected to the third trace 173, it is easier to transmit different signals to the third trace 173, the second trace 172, and the first trace 171.

[0168] Preferably, please see again. Figure 4 and Figure 5 A capacitor dielectric layer 19 is provided between the first conductive layer 18 and the second conductive layer 24. The second insulating layer 14 includes the capacitor dielectric layer 19. An interlayer insulating layer 20 is provided between the second conductive layer 24 and the third conductive layer 21. The third insulating layer 15 includes the interlayer insulating layer 20. The first insulating layer 16 includes a pixel defining layer 9.

[0169] Pixel defining layer 9 extends from display area AA to bonding area AC and forms the first insulating layer 16 of bonding structure 5. Capacitor dielectric layer 19 extends from display area AA to bonding area AC and forms the second insulating layer 14 of bonding structure 5. Interlayer insulating layer 20 extends from display area AA to bonding area AC and forms the third insulating layer 15 of bonding structure 5. Thus, there is no need to specifically set up processes for forming the first insulating layer 16, the second insulating layer 14, and the third insulating layer 15, thereby reducing the cost of forming the first insulating layer 16, the second insulating layer 14, and the third insulating layer 15.

[0170] In some possible implementations, please refer again. Figure 4 The orthographic projection of the second opening 141 on the substrate 1 is located within the orthographic projection of the third opening 151 on the substrate 1, and the orthographic projection of the third opening 151 on the substrate 1 is located within the orthographic projection of the first opening 161 on the substrate 1.

[0171] Setting the size of the orthographic projection of the third opening 151 on the substrate 1 to be larger than the size of the orthographic projection of the second opening 141 on the substrate 1 makes it easier for the second trace 172 to be electrically connected to the first trace 171 through the third opening 151 and the second opening 141. Setting the size of the orthographic projection of the first opening 161 on the substrate 1 to be larger than the size of the orthographic projection of the third opening 151 on the substrate 1 allows for a larger exposed size of the third trace 173, thereby making it easier for the chip to be electrically connected to the third trace 173.

[0172] Preferably, the center of the orthographic projection of the second opening 141 on the substrate 1 coincides with the center of the orthographic projection of the third opening 151 on the substrate 1, and the center of the orthographic projection of the third opening 151 on the substrate 1 coincides with the center of the orthographic projection of the first opening 161 on the substrate 1. This improves the electrical connection between the second trace 172 and the first trace 171, and between the third trace 173 and the second trace 172.

[0173] For some possible implementations, please refer to Figure 6 The isolation structure 6 includes a first isolation portion 61 and a second isolation portion 62 stacked sequentially along the direction away from the substrate 1. The orthographic projection of the side of the first isolation portion 61 away from the substrate 1 on the substrate 1 is located within the orthographic projection of the second isolation portion 62 on the substrate 1.

[0174] Since the second isolation portion 62 is located on the side of the first isolation portion 61 away from the array substrate, and the lateral width of the second isolation portion 62 is greater than the lateral width of the first isolation portion 61, the second isolation portion 62 will disconnect the light-emitting material layer 12 and the second electrode layer 13 at the isolation structure 6. In this way, the isolation structure 6 formed by the first isolation portion 61 and the second isolation portion 62 can more easily allow each light-emitting unit 8 to be packaged independently.

[0175] For some possible implementations, please refer to Figure 6 The second electrode 131 of the light-emitting unit 8 is electrically connected to the first isolation part 61. The first isolation part 61 includes a conductive material, and the second electrode 131 corresponding to the light-emitting unit 8 extends to contact the side wall of the first isolation part 61 so as to realize the electrical connection between the second electrode 131 corresponding to the light-emitting unit 8 and the first isolation part 61.

[0176] Please see again Figure 3 The isolation structure 6 also includes a third isolation section 63 located on the side of the first isolation section 61 facing the array substrate, and the second electrode 131 of the light-emitting unit 8 is electrically connected to the third isolation section 63.

[0177] The third isolation section 63 includes a conductive material, and the second electrode 131 corresponding to the light-emitting unit 8 extends to contact the side wall of the third isolation section 63 so as to realize the electrical connection between the second electrode 131 corresponding to the light-emitting unit 8 and the third isolation section 63.

[0178] Specifically, the material of the third isolation portion 63 includes molybdenum metal; and / or, the material of the first isolation portion 61 includes aluminum metal; and / or, the material of the second isolation portion 62 includes titanium metal. Thus, when the isolation structure 6 isolates the second electrode layer 13 into the second electrode 131, the second electrode 131 is more easily electrically connected to the first isolation portion 61 and / or the third isolation portion 63.

[0179] For some possible implementations, please refer to Figure 7 The bonding structure 5 also includes a fourth insulating layer 27 located on the side of the third trace 173 away from the substrate 1 and between the third trace 173 and the first insulating layer 16. Along the thickness direction of the substrate 1, the fourth insulating layer 27 has a fourth opening 271 that exposes at least a portion of the third trace 173.

[0180] When the chip is electrically connected to the bonding structure 5, the chip is electrically connected to the third trace 173 exposed by the first opening 161 and the fourth opening 271. The fourth insulating layer 27 is formed before the first insulating layer 16. The fourth insulating layer 27 can cover part of the third trace 173. Therefore, during the patterning of the light-emitting unit, the fourth insulating layer 27 can protect the third trace 173 and prevent it from being damaged, thereby further improving the reliability of the bonding structure 5.

[0181] Preferably, please see again. Figure 7 The orthographic projection of the fourth opening 271 onto the substrate 1 lies within the orthographic projection of the first opening 161 onto the substrate 1. Thus, the fourth insulating layer 27 can better protect the third trace 173.

[0182] Preferably, please refer to Figure 8 The fourth insulating layer 27 extends from the non-display area AB to the display area AA, and the fourth insulating layer 27 located in the display area AA is located on the side of the first electrode 11 close to the substrate 1.

[0183] A fourth insulating layer 27 is also provided in the display area AA, so that the fourth insulating layer 27 can be provided on the entire surface of the display panel.

[0184] Preferably, the material of the fourth insulating layer 27 includes inorganic materials.

[0185] The fourth insulating layer 27 can prevent moisture from entering the third wiring 173, thereby providing better protection for the third wiring 173. Specifically, the material of the fourth insulating layer 27 includes at least one of silicon nitride, silicon oxide, or silicon oxynitride.

[0186] Preferably, along the thickness direction of the substrate 1, the thickness H of the fourth insulating layer 27 is greater than or equal to... and less than or equal to For example, the thickness H can be or Etc. Properly setting the thickness H can improve the protection effect of the fourth insulation layer 27 on the third trace 173.

[0187] Please see Figures 9-12 The bonding structure 5 also includes a fifth insulating layer 28 located on the side of the third trace 173 and the first insulating layer 16 away from the substrate 1. Along the thickness direction of the substrate 1, the fifth insulating layer 28 has a fifth opening 281 that exposes at least a portion of the third trace 173.

[0188] The bonding structure 5 also includes a sixth insulating layer 29 located on the side of the fifth insulating layer 28 away from the substrate 1, and along the thickness direction of the substrate 1, the sixth insulating layer 29 has a sixth opening 291 that exposes at least part of the third trace 173.

[0189] The bonding structure 5 also includes a bonding trace 32 located on the side of the sixth insulating layer 29 away from the substrate 1.

[0190] In the first embodiment, please refer again. Figure 9A fourth insulating layer 27 is provided between the first insulating layer 16 and the third trace 173, and a fifth insulating layer 28 is provided between the bonding trace 32 and the first insulating layer 16. The fifth insulating layer 28 can extend to the side of the fourth insulating layer 27 exposed by the first opening 161 away from the substrate 1. The bonding trace 32 is electrically connected to the third trace 173 through the fifth opening 281 and the first opening 161, and the third trace 173 is electrically connected to the chip through the bonding trace 32.

[0191] Thus, before and during the patterning of the light-emitting unit, the fourth insulating layer 27 can protect the third trace 173. After the patterning of the light-emitting unit, if there are pits on the first insulating layer 16, the fifth insulating layer 28 can improve the pits on the first insulating layer 16, thereby further improving... Figure 9 The reliability of the bonding structure 5.

[0192] In the second embodiment, please refer again. Figure 10 A fourth insulating layer 27 is provided between the first insulating layer 16 and the third trace 173. A fifth insulating layer 28 and a sixth insulating layer 29 are provided between the bonding trace 32 and the first insulating layer 16. The fifth insulating layer 28 and the sixth insulating layer 29 can extend to the side of the fourth insulating layer 27 exposed by the first opening 161 away from the substrate 1. The bonding trace 32 is electrically connected to the third trace 173 through the sixth opening 291, the fifth opening 281 and the first opening 161. The third trace 173 is electrically connected to the chip through the bonding trace 32.

[0193] Thus, before and during the patterning of the light-emitting unit, the fourth insulating layer 27 can protect the third trace 173. After the patterning of the light-emitting unit, if there are pits on the first insulating layer 16, the fifth insulating layer 28 and the sixth insulating layer 29 can improve the pits on the first insulating layer 16, thereby further improving... Figure 10 The reliability of the bonding structure 5.

[0194] In the third embodiment, please refer again. Figure 11 A fifth insulating layer 28 and a sixth insulating layer 29 are provided between the bonding trace 32 and the first insulating layer 16. The fifth insulating layer 28 and the sixth insulating layer 29 can extend to the side of the fourth insulating layer 27 exposed by the first opening 161 away from the substrate 1. The bonding trace 32 is electrically connected to the third trace 173 through the sixth opening 291, the fifth opening 281 and the first opening 161. The third trace 173 is electrically connected to the chip through the bonding trace 32.

[0195] Thus, before and during the patterning of the light-emitting unit, the fourth insulating layer 27 can protect the third trace 173. After the patterning of the light-emitting unit, if there are pits on the first insulating layer 16, the fifth insulating layer 28 and the sixth insulating layer 29 can improve the pits on the first insulating layer 16, thereby further improving... Figure 11 The reliability of the bonding structure 5.

[0196] In the fourth embodiment, please refer again. Figure 12 A fifth insulating layer 28 and a sixth insulating layer 29 are provided between the bonding trace 32 and the first insulating layer 16. The fifth insulating layer 28 and the sixth insulating layer 29 can extend to the side of the fourth insulating layer 27 exposed by the first opening 161 away from the substrate 1. The bonding trace 32 is electrically connected to the third trace 173 through the sixth opening 291, the fifth opening 281 and the first opening 161. The third trace 173 is electrically connected to the chip through the bonding trace 32.

[0197] Thus, after the patterned light-emitting unit, if there are pits on the first insulating layer 16, the fifth insulating layer 28 and the sixth insulating layer 29 can improve the pits on the first insulating layer 16, thereby further enhancing the light-emitting unit. Figure 10 The reliability of the bonding structure 5.

[0198] Preferably, the orthographic projection of the fifth opening 281 on the substrate 1 lies within the orthographic projection of the first opening 161 on the substrate 1, and the orthographic projection of the sixth opening 291 on the substrate 1 lies within the orthographic projection of the fifth opening 281 on the substrate 1. In this way, the fifth insulating layer 28 and the sixth insulating layer 29 can better protect the first insulating layer 16 and the third trace 173.

[0199] For some possible implementations, please refer to Figure 10 and Figure 13 The fifth insulating layer 28 extends from the non-display area AB to the display area AA, and the fifth insulating layer 28 located in the display area AA is located on the side of the light-emitting unit away from the substrate 1.

[0200] Optionally, the display panel further includes a first touch layer 30 located on the side of the fifth insulating layer 28 away from the substrate 1, the first touch layer 30 including a first touch trace 301 located in the display area AA.

[0201] Optionally, the sixth insulating layer 29 extends from the non-display area AB to the display area AA, and the sixth insulating layer 29 located in the display area AA is located on the side of the first touch layer 30 away from the substrate 1.

[0202] Optionally, the display panel further includes a second touch layer 31 located on the side of the sixth insulating layer 29 away from the substrate 1. The second touch layer 31 includes a second touch trace 311 located in the display area AA.

[0203] Optionally, the bonding trace 32 is made of the same material as the second touch trace 311.

[0204] Optionally, the bonding trace 32 is disposed on the same layer as the second touch trace 311.

[0205] Thus, while the fifth insulating layer 28 is formed in the display area AA, the fifth insulating layer 28 of the bonding structure 5 is also formed in the bonding area AC. While the sixth insulating layer 29 is formed in the display area AA, the sixth insulating layer 29 of the bonding structure 5 is also formed in the bonding area AC. While the second touch layer 31 is formed in the display area AA, the bonding trace 32 of the bonding structure 5 is also formed in the bonding area AC. Therefore, there is no need to specially set up a process to form the fifth insulating layer 28, the sixth insulating layer 29 and the bonding trace 32 of the bonding structure 5, thereby reducing the cost of forming the fifth insulating layer 28, the sixth insulating layer 29 and the bonding trace 32.

[0206] In some possible implementations, please refer again. Figure 1 and Figure 4 This application also provides another display panel, which includes a display area AA and a non-display area AB that at least partially surrounds the display area AA. The non-display area AB includes a bonding area AC. The display panel includes a substrate 1 and a plurality of bonding structures 5 located in the bonding area AC.

[0207] The bonding structure 5 includes a signal trace 17 located on one side of the substrate 1 and a first insulating layer 16 located on the side of the film layer where the signal trace 17 is located away from the substrate 1. Along a direction perpendicular to the substrate 1, the first insulating layer 16 has a first opening 161 that exposes at least a portion of the signal trace 17, and at least a portion of the signal trace 17 is exposed through the first opening 161.

[0208] The side of the signal trace 17 away from the substrate 1 includes a flat surface, and / or the side of the first insulating layer 16 away from the substrate 1 includes a flat surface.

[0209] In this embodiment, the isolation structure 6 of the display area AA does not extend to the position of the bonding structure 5. The cathode of the light-emitting unit 8 will be continuously filmed at the bonding structure 5, which can completely cover the first insulating layer 16 and the signal trace 17 of the bonding structure 5. Therefore, during the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the first insulating layer 16 and the signal trace 17. The liquid is not easy to reach the first insulating layer 16 and the signal trace 17, and the first insulating layer 16 and the signal trace 17 are not easily damaged. Therefore, the side of the signal trace 17 and / or the first insulating layer 16 away from the substrate 1 is flat. In this way, the electrical connection effect between the bonding structure 5 and the chip can be improved.

[0210] In summary, by setting the orthogonal projection of the isolation structure 6 on the substrate 1 to be outside the orthogonal projection of the bonding structure 5 on the substrate 1, the cathode of the light-emitting unit 8 can continuously and completely cover the bonding structure 5. During the fabrication of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the bonding structure 5, thereby improving the reliability of the bonding structure 5.

[0211] In some possible implementations, please refer again. Figure 1 This application also provides a method for manufacturing a display panel, the display panel including a display area AA and a non-display area AB at least partially surrounding the display area AA, the non-display area AB including a bonding area AC, and the display panel including a plurality of connection structures located in the bonding area AC. See [link to relevant documentation]. Figure 14 The method includes:

[0212] S10: Provide a substrate 1.

[0213] S11: An isolation structure layer is formed on one side of the substrate 1. The isolation structure layer includes an isolation structure 6. The isolation structure 6 encloses and forms an isolation opening 7. The orthogonal projection of the isolation structure layer on the substrate 1 is outside the orthogonal projection of the connecting structure on the substrate 1.

[0214] S12: Prepare light-emitting units 8, with at least a portion of the light-emitting units 8 located within the isolation opening 7.

[0215] The isolation structure layer of the display area AA of the display panel formed by the method of this embodiment does not extend to the position of the connection structure. The cathode of the light-emitting unit 8 will be continuously filmed at the connection structure, which can completely cover the connection structure. Therefore, during the formation of the light-emitting unit 8, the cathode of the light-emitting unit 8 can better protect the connection structure. The liquid medicine is not easy to reach the connection structure, and the connection structure is not easy to be damaged, thereby improving the electrical connection effect of the connection structure.

[0216] In some possible implementations, the connection structure includes a bonding structure 5, and the display panel further includes a chip, with the bonding structure 5 electrically connected to the chip; the isolation opening 7 includes a first isolation opening 71 and a second isolation opening 72; the step of fabricating the light-emitting unit 8 includes:

[0217] Please see Figure 15 A light-emitting material layer 12 of the first light-emitting unit is formed in the first isolation opening 71, and the light-emitting material layer 12 extends into the second isolation opening 72. The light-emitting material layer 12 includes a light-emitting part 121.

[0218] The light-emitting material layer 12 is broken at the isolation structure 6, so that at least part of the light-emitting material layer 12 is located in the isolation opening 7 to form the light-emitting part 121. By controlling the evaporation angle, the light-emitting part 121 can be prevented from contacting the isolation structure 6.

[0219] Please see Figure 16 The light-emitting material layer 12 of the first light-emitting unit also extends to the side of the bonding structure 5 away from the substrate 1. Specifically, the light-emitting material layer 12 of the first light-emitting unit can be continuously filmed on the side of the bonding structure 5 away from the substrate 1.

[0220] Please see Figure 17 A second electrode layer 13 is formed on the side of the light-emitting material layer 12 of the first light-emitting unit away from the substrate 1. The second electrode layer 13 covers the bonding structure 5 and includes a second electrode 131.

[0221] The second electrode layer 13 is broken at the isolation structure 6, so that at least a portion of the second electrode layer 13 is located within the isolation opening 7 to form the second electrode 131. By controlling the vapor deposition angle, the second electrode 131 can extend from the isolation opening 7 to make electrical contact with the isolation structure 6, so as to connect adjacent second electrodes 131 or connect the second electrode 131 to other circuits. In this way, the manufacturing difficulty of the display panel can be reduced.

[0222] Please see Figure 18 The second electrode layer 13 of the first light-emitting unit extends to the bonding structure 5, and the light-emitting material layer 12 at the bonding structure 5 is continuously filmed on the side away from the substrate 1.

[0223] Please see Figure 19 A first encapsulation layer 10 is formed on the side of the second electrode layer 13 away from the substrate 1.

[0224] Please see Figure 20 The first encapsulation layer 10 of the first light-emitting unit extends to the bonding structure 5, and the second electrode layer 13 at the bonding structure 5 is continuously formed on the side away from the substrate 1.

[0225] Please see Figure 21A first etched protective layer 25 is formed in the first isolation opening 71 corresponding to the first light-emitting unit, and the first etched protective layer 25 extends to cover the partial isolation structure 6.

[0226] The first etched protective layer 25 can protect the corresponding light-emitting material layer 12, the second electrode layer 13, and the first encapsulation layer 10 of the first light-emitting unit.

[0227] Please see Figure 22 Remove the first encapsulation layer 10 that is not covered by the first etched protective layer 25.

[0228] Please see Figure 23 At the same time, the first encapsulation layer 10 of the first light-emitting unit at the bonding structure 5 is removed. When the first encapsulation layer 10 at the bonding structure 5 is removed, the second electrode 131 at the bonding structure 5 can protect the insulating layer and signal trace 17 of the bonding structure 5 to prevent the liquid from damaging the insulating layer and signal trace 17 of the bonding structure 5.

[0229] Please see Figure 24 Remove the light-emitting material layer 12 and the second electrode layer 13 that are not covered by the first etch protection layer 25, and remove the first etch protection layer 25 to form the light-emitting part 121, the second electrode 131 and the encapsulation unit 101 in the first isolation opening 71 corresponding to the first light-emitting unit.

[0230] Please see Figure 25 The light-emitting material layer 12 and the second electrode layer 13 of the first light-emitting unit at the bonding structure 5 are removed together.

[0231] Please see Figure 26 A light-emitting material layer 12 of the second light-emitting unit is formed in the second isolation opening 72, and the light-emitting material layer 12 of the second light-emitting unit covers the side of the encapsulation unit 101 corresponding to the first light-emitting unit away from the substrate 1.

[0232] Based on the formation of the first light-emitting unit, a light-emitting material layer 12 of the second light-emitting unit is formed. The light-emitting material layer 12 of the second light-emitting unit will cover the encapsulation unit 101 corresponding to the first light-emitting unit. At the same time, a light-emitting part 121 of the second light-emitting unit will be formed in the second isolation opening 72 corresponding to the second light-emitting unit.

[0233] Please see again Figure 16 The light-emitting material layer 12 of the second light-emitting unit also extends to the side of the bonding structure 5 away from the substrate 1. Specifically, the light-emitting material layer 12 of the second light-emitting unit can be continuously filmed on the side of the bonding structure 5 away from the substrate 1.

[0234] Please see Figure 27A second electrode layer 13 is formed on the side of the light-emitting material layer 12 of the second light-emitting unit away from the substrate 1, and the second electrode layer 13 covers the bonding structure 5.

[0235] When the second electrode layer 13 is formed, the second electrode layer 13 will be broken at the isolation structure 6, and the second electrode 131 of the second light-emitting unit will be formed in the second isolation opening 72 corresponding to the second light-emitting unit. The second electrode 131 of the second light-emitting unit is connected to the electrode of the corresponding isolation structure 6.

[0236] Please see again Figure 18 The second electrode layer 13 of the second light-emitting unit extends to the bonding structure 5, and the light-emitting material layer 12 at the bonding structure 5 is continuously filmed on the side away from the substrate 1.

[0237] Please see Figure 28 A first encapsulation layer 10 is formed on the side of the second electrode layer 13 away from the substrate 1.

[0238] Please see again Figure 20 The first encapsulation layer 10 of the second light-emitting unit extends to the bonding structure 5, and the second electrode layer 13 at the bonding structure 5 is continuously filmed on the side away from the substrate 1.

[0239] Please see Figure 29 A second etched protective layer 26 is formed in the second isolation opening 72 corresponding to the second light-emitting unit, and the second etched protective layer 26 extends to cover the partial isolation structure 6.

[0240] The second etched protective layer 26 can protect the corresponding light-emitting layer, the second electrode layer 13, and the first encapsulation layer 10 of the second light-emitting unit.

[0241] Please see Figure 30 Remove the first encapsulation layer 10 that is not covered by the second etched protective layer 26.

[0242] Please see again Figure 20 and Figure 23 At the same time, the first encapsulation layer 10 of the second light-emitting unit at the bonding structure 5 is removed. When the first encapsulation layer 10 at the bonding structure 5 is removed, the second electrode layer 13 at the bonding structure 5 can protect the insulating layer and signal trace 17 of the bonding structure 5, preventing the liquid from damaging the insulating layer and signal trace 17 of the bonding structure 5.

[0243] Please see again Figure 3 Remove the light-emitting material layer 12 and the second electrode layer 13 that are not covered by the second etch protection layer 26, and remove the second etch protection layer 26 to form the light-emitting part 121, the second electrode 131 and the encapsulation unit 101 in the second isolation opening 72 corresponding to the second light-emitting unit.

[0244] Please see again Figure 4 The light-emitting material layer 12 and the second electrode layer 13 of the second light-emitting unit at the bonding structure 5 are removed together.

[0245] If the display panel also includes other light-emitting units 8, such as a third light-emitting unit 8, the preparation and light emission of the third light-emitting unit 8 are the same as described above, and will not be repeated here.

[0246] As can be seen from the above method, the cathode of the light-emitting unit 8 can better protect the bonding structure 5. The liquid solution is less likely to reach the signal trace 17 on the side of the cathode of the light-emitting unit 8 near the substrate 1, thus making it less likely to damage the signal trace 17 of the bonding structure 5. This can improve the electrical connection between the chip and the signal trace 17 of the bonding structure 5, thereby improving the reliability of the bonding structure 5.

[0247] In some possible implementations, the connection structure includes a bonding structure 5, and the step of forming an isolation structure layer on one side of the substrate 1 includes:

[0248] Please see Figure 31 and Figure 32 A first conductive material layer is formed on one side of the substrate and patterned to form a first trace 171 of the bonding structure 5. A second conductive material layer is formed on the side of the first trace 171 away from the substrate 1 and patterned to form a second trace 172 of the bonding structure 5. The second trace is electrically connected to the first trace 171. A third conductive material layer is formed on the side of the second trace 172 away from the substrate 1 and patterned to form a third trace 173 of the bonding structure 5. The third trace 173 is electrically connected to the second trace 172.

[0249] Please see Figure 33 and Figure 34a A fourth insulating layer 27 for bonding structure 5 is formed on the side of the third trace 173 away from the substrate 1. Along the thickness direction of the substrate 1, the fourth insulating layer 27 has a fourth opening 271 that exposes at least part of the third trace 173.

[0250] Please see Figure 7 , Figure 35 and Figure 36 A pixel defining material layer 33 and an isolation material layer 34 are sequentially formed on the side of the fourth insulating layer 27 away from the substrate 1, and the isolation material layer 34 and the pixel defining material layer 33 are patterned respectively to form the first insulating layer 16 of the isolation structure 6 and the bonding structure 5 respectively. The first insulating layer 16 has a first opening 161 that exposes at least part of the third trace 173. The orthographic projection of the fourth opening 271 on the substrate 1 is located within the orthographic projection of the first opening 161 on the substrate 1.

[0251] In some embodiments, see Figure 34b and Figure 35 The orthographic projection of the isolation material layer 34 on the substrate 1 covers the orthographic projection of the bonding area AC and the display area AA on the substrate 1. When patterning the isolation material layer 34, the isolation material layer 34 of the bonding area AC is removed.

[0252] That is, the pixel defining material layer 33 and the isolation material layer 34 are disposed on the entire surface of the panel, and both the pixel defining material layer 33 and the isolation material layer 34 extend from the display area AA to the bonding area AC.

[0253] Please see again Figure 7 When patterning the isolation material layer 34, the isolation material layer 34 of the bonding area AC is removed, and the pixel defining material layer 33 of the bonding area AC is patterned as the first insulating layer 16.

[0254] Please see Figure 36 The isolation material layer 34 of the display area AA is patterned into an isolation structure 6 including an isolation opening 7, and the pixel defining material layer 33 of the display area AA is patterned into a pixel defining layer 9 including a pixel opening 91.

[0255] In other embodiments, please refer to Figure 34c and Figure 35 The orthogonal projection of the isolation material layer 34 on the substrate 1 is outside the orthogonal projection of the bonding region AC on the substrate 1.

[0256] That is, the pixel defining material layer 33 is disposed on the entire surface of the panel, and the pixel defining material layer 33 extends from the display area AA to the bonding area AC, while the isolation material layer 34 is not located in the bonding area AC.

[0257] Please see again Figure 7 The pixel-defining material layer 33 of the bonding area AC is patterned as the first insulating layer 16.

[0258] Please see Figure 36 The isolation material layer 34 of the display area AA is patterned into an isolation structure 6 including an isolation opening 7, and the pixel defining material layer 33 of the display area AA is patterned into a pixel defining layer 9 including a pixel opening 91.

[0259] The bonding structure 5 formed in this embodiment can protect the third trace 173 through the fourth insulating layer 27 before step S12, making it less likely to be damaged. This further improves the bonding structure formed by the above method. Figure 7 The reliability of the bonding structure 5 shown.

[0260] In some possible implementations, after the step of fabricating the light-emitting unit, the method further includes:

[0261] Please see Figure 37 and Figure 38 A fifth insulating material layer, a first touch layer 30, and a sixth insulating material layer are sequentially formed on the side of the light-emitting unit away from the substrate 1. A sixth opening 291 and a fifth opening 281 are sequentially provided on the sixth insulating material layer and the fifth insulating material layer along the thickness direction of the substrate 1, so as to form the sixth insulating layer 29 and the fifth insulating layer 28 of the bonding structure 5, respectively.

[0262] Please see again Figure 10 and Figure 14 A second touch layer 31 is formed on the side of the sixth insulating layer 29 away from the substrate 1. The second touch layer 31 includes a second touch trace 311 located in the display area AA and a bonding trace 32 located in the bonding area AC. The bonding trace 32 is electrically connected to the third trace 173 through the sixth opening 291, the fifth opening 281, the first opening 161 and the fourth opening 271 in sequence.

[0263] The bonding structure 5 formed in this embodiment can protect the third trace 173 by the fourth insulating layer 27 before step S12, and improve the pits on the first insulating layer 16 by the fifth insulating layer 28 and the sixth insulating layer 29 after step S12, thereby further improving the bonding structure formed by the above method. Figure 10 The reliability of the bonding structure 5.

[0264] In some possible implementations, this application also provides an electronic device that includes the display panel described in this application, or includes a display panel prepared by the method described in this application. This electronic device may include a device with image processing capabilities, such as a server, personal computer, laptop computer, etc. Because this electronic device includes the display panel described in this application, the reliability of the chip bonding structure of this electronic device is higher.

[0265] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0266] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A display panel, characterized by, The display panel comprises a display area and a non-display area at least partially surrounding the display area, the non-display area comprises a bonding area, the display panel comprises a plurality of connection structures, the connection structures are located in the bonding area, and the display panel comprises: a substrate; an isolation structure layer located on one side of the substrate, the isolation structure layer comprises an isolation structure, and the isolation structure forms an isolation opening; a light-emitting unit at least partially located in the isolation opening; a normal projection of the isolation structure layer on the substrate is located outside a normal projection of the connection structure on the substrate.

2. The display panel of claim 1, wherein, The connection structure comprises a bonding structure, the bonding structure comprises a signal trace located on one side of the substrate, a film layer where the signal trace is located is covered with a first insulating layer away from one side of the substrate, and a first opening exposing at least part of the signal trace is formed in the first insulating layer; Preferably, one side of the signal trace away from the substrate comprises a flat surface; Preferably, one side of the first insulating layer away from the substrate comprises a flat surface; Preferably, the display panel further comprises a control module, and the bonding structure is electrically connected with the control module; Preferably, the control module comprises a chip.

3. The display panel of claim 2, wherein, In a direction away from the substrate, a first trace, a second trace and a third trace are sequentially stacked on one side of the substrate, the first insulating layer is located on a film layer where the third trace is located away from one side of the substrate, the first opening exposes at least part of the third trace, and the third trace is electrically connected with the chip; Preferably, one side of the third trace away from the substrate comprises a flat surface, and / or one side of the second trace away from the substrate comprises a flat surface, and / or one side of the first trace away from the substrate comprises a flat surface; Preferably, the first trace is electrically connected with a gate electrode of the display panel; Preferably, the second trace comprises a power voltage trace; Preferably, the third trace comprises a data trace or a light-emitting control signal trace.

4. The display panel of claim 3, wherein, The bonding structure further comprises a fourth insulating layer located on one side of the third trace away from the substrate and between the third trace and the first insulating layer, and a fourth opening exposing at least part of the third trace is formed in the fourth insulating layer in a thickness direction of the substrate; Preferably, a normal projection of the fourth opening on the substrate is located within a normal projection of the first opening on the substrate; Preferably, the fourth insulating layer extends from the non-display area to the display area; Preferably, the light-emitting unit comprises a first electrode, a light-emitting part and a second electrode which are sequentially stacked in a direction away from the substrate, and the fourth insulating layer located in the display area is located on one side of the first electrode close to the substrate; Preferably, a material of the fourth insulating layer comprises an inorganic material; Preferably, the material of the fourth insulating layer comprises at least one of silicon nitride, silicon oxide or silicon oxynitride; Preferably, along the thickness direction of the substrate, the thickness of the fourth insulating layer is greater than or equal to and less than or equal to 5. The display panel of claim 3, wherein, The bonding structure further comprises a fifth insulating layer located on one side of the third trace and the first insulating layer away from the substrate, and a fifth opening exposing at least part of the third trace is formed in the fifth insulating layer in a thickness direction of the substrate; Preferably, a projection of the fifth opening on the substrate is located within a projection of the first opening on the substrate; Preferably, the bonding structure further comprises a sixth insulating layer located on a side of the fifth insulating layer away from the substrate, and a sixth opening is formed in the sixth insulating layer to expose at least part of the third trace in the thickness direction of the substrate; Preferably, a projection of the sixth opening on the substrate is located within a projection of the fifth opening on the substrate; Preferably, the bonding structure further comprises a bonding trace located on a side of the sixth insulating layer away from the substrate, and the bonding trace is electrically connected to the third trace through the sixth opening, the fifth opening and the first opening, and the third trace is electrically connected to the chip through the bonding trace.

6. The display panel of claim 5, wherein, The fifth insulating layer extends from the non-display area to the display area, and the fifth insulating layer located in the display area is located on a side of the light emitting unit away from the substrate; Preferably, the display panel further comprises a first touch layer located on a side of the fifth insulating layer away from the substrate, and the first touch layer comprises a first touch trace, and the first touch trace is located in the display area; Preferably, the sixth insulating layer extends from the non-display area to the display area, and the sixth insulating layer located in the display area is located on a side of the first touch layer away from the substrate; Preferably, the display panel further comprises a second touch layer located on a side of the sixth insulating layer away from the substrate, and the second touch layer comprises a second touch trace, and the second touch trace is located in the display area; Preferably, the material of the bonding trace is the same as the material of the second touch trace; Preferably, the bonding trace and the second touch trace are arranged in the same layer.

7. The display panel according to any one of claims 3-6, characterized in that, The display panel comprises a first conductive layer, a second conductive layer, a third conductive layer and a fourth conductive layer arranged in sequence from a side away from the substrate, and the fourth conductive layer comprises the third trace; Preferably, the third conductive layer comprises the second trace; Preferably, the first conductive layer comprises the first trace.

8. The display panel of claim 7, wherein, The display panel comprises a second insulating layer and a third insulating layer between the film layer where the first trace is located and the film layer where the third trace is located, and the second insulating layer and the third insulating layer are arranged in sequence from a direction away from the substrate; Preferably, in a direction perpendicular to the substrate, a second opening is formed in the second insulating layer, a third opening is formed in the third insulating layer, and the second trace is electrically connected to the first trace through the third opening and the second opening in sequence; Preferably, a capacitor dielectric layer is arranged between the first conductive layer and the second conductive layer, and the second insulating layer comprises the capacitor dielectric layer; Preferably, an interlayer insulating layer is arranged between the second conductive layer and the third conductive layer, and the third insulating layer comprises the interlayer insulating layer.

9. The display panel of claim 8, wherein, A projection of the second opening on the substrate is located within a projection of the third opening on the substrate; Preferably, the center of the projection of the second opening on the substrate coincides with the center of the projection of the third opening on the substrate; Preferably, the orthographic projection of the third opening on the substrate is located within the orthographic projection of the first opening on the substrate; Preferably, the center of the orthographic projection of the third opening onto the substrate coincides with the center of the orthographic projection of the first opening onto the substrate; Preferably, at least a portion of the third trace is in contact with the side of the second trace away from the substrate.

10. The display panel of any one of claims 1-6, wherein, The display panel further includes a first encapsulation layer located on the side of the light-emitting unit away from the substrate. The first encapsulation layer includes a plurality of spaced-apart encapsulation units, at least a portion of which extend from the side of the isolation structure toward the isolation opening to the side of the isolation structure away from the substrate.

11. The display panel of claim 10, wherein, The packaging units are spaced apart on the side of the isolation structure away from the substrate; Preferably, there is a gap between the packaging unit located on the side of the isolation structure away from the substrate and the side of the isolation structure away from the substrate; Preferably, the orthographic projection of the packaging unit on the substrate covers the orthographic projection of the isolation opening on the substrate and the orthographic projection of a portion of the isolation structure on the substrate.

12. The display panel according to any one of claims 2-6, wherein, The light-emitting unit includes a first electrode, a light-emitting part, and a second electrode that are sequentially stacked along a direction away from the substrate; Preferably, the display panel further includes a pixel defining layer located on the side of the first electrode away from the substrate, and the isolation structure is located on the side of the pixel defining layer away from the substrate; the pixel defining layer includes pixel openings that expose at least a portion of the first electrode, and the orthographic projection of the isolation structure on the substrate is located between the orthographic projections of two adjacent pixel openings on the substrate; Preferably, the orthographic projection of the pixel opening on the substrate lies within the orthographic projection of the isolation opening on the substrate; Preferably, the first insulating layer includes the pixel defining layer.

13. The display panel according to any one of claims 1-6, wherein, The isolation structure includes a first isolation portion and a second isolation portion stacked sequentially along a direction away from the substrate, wherein the orthogonal projection of the side of the first isolation portion away from the substrate on the substrate is located within the orthogonal projection of the second isolation portion on the substrate. Preferably, the second electrode of the light-emitting unit is electrically connected to the first isolation portion; and / or, the isolation structure further includes a third isolation portion located on the side of the first isolation portion facing the substrate, and the second electrode of the light-emitting unit is electrically connected to the third isolation portion; Preferably, the material of the third isolation portion includes molybdenum metal; and / or, the material of the first isolation portion includes aluminum metal; and / or, the material of the second isolation portion includes titanium metal.

14. A display panel, characterized by The display panel includes a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area, and the display panel including a substrate and a plurality of bonding structures located in the bonding area; The bonding structure includes a signal trace located on one side of the substrate and a first insulating layer located on the side of the film layer containing the signal trace away from the substrate. The first insulating layer has a first opening that exposes at least a portion of the signal trace, and at least a portion of the signal trace is exposed through the first opening.

15. The display panel of claim 14, wherein, The side of the signal trace away from the substrate includes a flat surface, and / or the side of the first insulating layer away from the substrate includes a flat surface.

16. A method for manufacturing a display panel, characterized by, The display panel includes a display area and a non-display area at least partially surrounding the display area, the non-display area including a bonding area, the display panel including a plurality of connection structures located in the bonding area, the method comprising: Provide a substrate; An isolation structure layer is formed on one side of the substrate. The isolation structure layer includes an isolation structure that encloses an isolation opening. The orthographic projection of the isolation structure layer on the substrate is outside the orthographic projection of the connection structure on the substrate. Light-emitting units are prepared, with at least a portion of the light-emitting units located within the isolation opening.

17. The method of producing a display panel according to claim 16, wherein The connection structure includes a bonding structure, and the step of forming an isolation structure layer on one side of the substrate includes: A first conductive material layer is formed on one side of the substrate, and the first conductive material layer is patterned to form the first trace of the bonding structure; A second conductive material layer is formed on the side of the first trace away from the substrate, and the second conductive material layer is patterned to form a second trace of the bonding structure, wherein the second trace is electrically connected to the first trace; A third conductive material layer is formed on the side of the second trace away from the substrate, and the third conductive material layer is patterned to form the third trace of the bonding structure, wherein the third trace is electrically connected to the second trace; A fourth insulating layer of the bonding structure is formed on the side of the third trace away from the substrate, and a fourth opening is provided on the fourth insulating layer along the thickness direction of the substrate to expose at least a portion of the third trace; A pixel defining material layer and an isolation material layer are sequentially formed on the side of the fourth insulating layer away from the substrate, and the isolation material layer and the pixel defining material layer are patterned respectively to form the first insulating layer of the isolation structure and the bonding structure. The first insulating layer has a first opening that exposes at least a portion of the third trace. The orthographic projection of the fourth opening on the substrate is located within the orthographic projection of the first opening on the substrate. The orthographic projection of the isolation material layer on the substrate covers the orthographic projections of the bonding area and the display area on the substrate. When the isolation material layer is patterned, the isolation material layer of the bonding area is removed; or, the orthographic projection of the isolation material layer on the substrate is located outside the orthographic projection of the bonding area on the substrate. Preferably, after the step of preparing the light-emitting unit, the method further includes: A fifth insulating material layer, a first touch layer, and a sixth insulating material layer are sequentially formed on the side of the light-emitting unit away from the substrate; Along the thickness direction of the substrate, a sixth opening and a fifth opening are sequentially formed on the sixth insulating material layer and the fifth insulating material layer to form the sixth insulating layer and the fifth insulating layer of the bonding structure, respectively. A second touch layer is formed on the side of the sixth insulating layer away from the substrate. The second touch layer includes a second touch trace located in the display area and a bonding trace located in the bonding area. The bonding trace is electrically connected to the third trace in sequence through the sixth opening, the fifth opening, the first opening and the fourth opening.

18. The method of manufacturing a display panel according to claim 16, wherein, The connection structure includes a bonding structure, the isolation opening includes a first isolation opening and a second isolation opening, and the step of fabricating the light-emitting unit includes: A light-emitting material layer of a first light-emitting unit is formed within the first isolation opening, the light-emitting material layer extends into the second isolation opening, and the light-emitting material layer includes a light-emitting portion; A second electrode layer is formed on the side of the light-emitting material layer of the first light-emitting unit away from the substrate, the second electrode layer covers the bonding structure, and the second electrode layer includes a second electrode; A first encapsulation layer is formed on the side of the second electrode layer away from the substrate; A first etched protective layer is formed in the first isolation opening corresponding to the first light-emitting unit, and the first etched protective layer extends to cover a portion of the isolation structure; Remove the first encapsulation layer, the light-emitting material layer, and the second electrode layer that are not covered by the first etch protection layer, and remove the first etch protection layer to form a light-emitting part, a second electrode, and an encapsulation unit within the first isolation opening corresponding to the first light-emitting unit.

19. The method of producing a display panel according to claim 18, wherein After the steps of removing the first encapsulation layer, the light-emitting material layer, and the second electrode layer not covered by the first etch protective layer, and removing the first etch protective layer, the method further includes: A light-emitting material layer of a second light-emitting unit is formed within the second isolation opening, and the light-emitting material layer of the second light-emitting unit covers the side of the encapsulation unit corresponding to the first light-emitting unit away from the substrate; A second electrode layer is formed on the side of the light-emitting material layer of the second light-emitting unit away from the substrate, and the second electrode layer covers the bonding structure; A first encapsulation layer is formed on the side of the second electrode layer away from the substrate; A second etched protective layer is formed in the second isolation opening corresponding to the second light-emitting unit, and the second etched protective layer extends to cover a portion of the isolation structure; Remove the first encapsulation layer, the light-emitting material layer, and the second electrode layer that are not covered by the second etch protection layer, and remove the second etch protection layer to form a light-emitting part, a second electrode, and an encapsulation unit in the second isolation opening corresponding to the second light-emitting unit.

20. An electronic device, comprising: The electronic device includes a display panel as described in any one of claims 1-15, or a display panel prepared by the method for preparing a display panel as described in any one of claims 16-19.

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