Nanoscale three-dimensional imaging method and device

Abstract

The invention provides a nanoscale three-dimensional imaging method, which is applied to the crossing field of X-ray microscopic imaging and integrated circuit testing, and comprises the following steps: pretreating a sample to obtain a sample with a platinum conversion layer as a surface layer, and obtaining a pretreated sample; sequentially arranging a silicon spacing layer and a chromium adhesion layer on the pretreated sample from the surface of the sample to the platinum conversion layer; building a three-dimensional imaging device and arranging the three-dimensional imaging device in a vacuum environment; the pretreated sample is placed on a displacement unit in a three-dimensional imaging device, the height of the sample is adjusted so that an electron beam generation unit in the three-dimensional imaging device can be aligned with the to-be-measured area of the pretreated sample, and an imaging experiment is started. And the requirements of reverse engineering and defect analysis of integrated circuits are met.

Description

Technical Field

[0001] This invention relates to the field of X-ray microscopy and integrated circuit testing, and particularly to nanoscale three-dimensional imaging methods and devices. Background Technology

[0002] As semiconductor process nodes continue to evolve towards the nanometer scale, the structural complexity of integrated circuits is increasing exponentially. Advanced architectures such as multilayer metal interconnects, three-dimensional stacking, and FinFETs pose unprecedented challenges to detection technologies. Traditional detection methods are gradually revealing limitations in terms of spatial resolution, penetration, and material identification capabilities, necessitating the development of high-precision, non-destructive three-dimensional imaging technologies to support integrated circuit process development, failure analysis, and quality control.

[0003] Non-destructive testing methods for integrated circuits mainly include synchrotron radiation imaging, electron microscopy combined with focused ion beam (FIB-SEM) tomography, and laboratory X-ray CT systems. The existing technology system in the field of integrated circuit testing has the following common limitations: First, although synchrotron radiation sources can achieve nanometer-level ultra-high resolution, they rely on large scientific research facilities such as circular accelerators. High-energy X-rays are prone to radiation damage, leading to chip performance degradation. At the same time, the cost of a single test is high and the annual effective machine time is less than 2,000 hours, which is difficult to meet the timeliness and economic requirements of industrial-grade online testing. Second, focused ion beam scanning electron microscopy (FIB-SEM) tomography requires physical etching to peel off the sample layer by layer, which causes structural damage to the sample, making it impossible to retest the electrical properties and verify the reliability of the same sample. Third, conventional laboratory X-ray CT systems are limited by the micron-level focal spot size (>500 nm) of the external X-ray source and the low energy resolution (~130 eV@5.9 keV) of the silicon drift detector. This results in a significant spatial aliasing effect when imaging copper / tungsten interconnect structures with processes below 130 nm, with a material resolution of less than 70%. The aforementioned technical bottlenecks have created an irreconcilable contradiction between resolution, non-destructive testing, and cost-effectiveness in existing testing methods, which seriously hinders the large-scale testing application and process optimization of advanced process integrated circuits.

[0004] The literature (Holler M et al. High-resolution non-destructive three-dimensional imaging of integrated circuits. Nature 2017, 543:71-76) discloses a synchrotron radiation coherent diffraction imaging system that achieves 7 nm resolution three-dimensional reconstruction through multilayer stacked imaging technology. Although this technology can achieve sub-10 nm resolution, it relies on large-scale synchrotron radiation scientific facilities, with a single experiment costing over 500,000 RMB, and an annual machine time supply of less than 2,000 hours, which cannot meet the daily testing needs of industry. In addition, the high-throughput characteristics of synchrotron radiation X-rays (>10^12 phs / s / mm²) can easily cause radiation damage to sensitive circuit components.

[0005] The literature (Liao Y et al. Laboratory-based nano-CT with sub-50 nm resolution. Opt. Express 2020, 28:12345-12358) discloses a nano-CT system employing a rotating anode X-ray source and a multilayer focusing lens. It uses a 7 μm thick molybdenum target to generate characteristic radiation at 40 kV, achieving a spatial resolution of 45 nm by combining Zernike phase contrast technology. However, the X-ray flux density of this system is only 1.2 × 10^6 phs / s / mm², resulting in a single tomographic scan taking up to 72 hours. More critically, its optical system is extremely sensitive to mechanical vibration; when the stage positioning error exceeds 50 nm, significant artifacts appear in the reconstructed images, making stable operation in non-constant temperature industrial environments difficult. Summary of the Invention

[0006] To address the aforementioned issues, this invention provides a high-resolution imaging system based on a component thickness detection method and excitation and superconducting energy-resolved detection. By directly constructing a nanoscale X-ray source on the surface of the integrated circuit under test, and combining it with a multi-energy spectral Bayesian reconstruction algorithm, it achieves non-destructive analysis of interlayer structures with a feature size of 160 nm. Its spatial resolution is several times higher than that of traditional laboratory CT, with high material identification sensitivity and a short detection cycle. This provides an economical and efficient solution for integrated circuit reverse engineering and process defect analysis, specifically including:

[0007] A nanoscale three-dimensional imaging method, comprising: the method comprising:

[0008] S1. The sample is pretreated to obtain a sample with a platinum conversion layer on the surface. The pretreated sample is then provided with a silicon spacer layer and a chromium adhesion layer from the sample surface to the platinum conversion layer.

[0009] S2. Construct a three-dimensional imaging device and place it in a vacuum environment;

[0010] S3. Place the pretreated sample on the displacement unit in the three-dimensional imaging device, adjust the height of the sample so that the electron beam generating unit in the three-dimensional imaging device is aligned with the area to be measured of the pretreated sample, and start the imaging experiment.

[0011] When the pretreated sample is used for imaging experiments:

[0012] The electron beam emitted by the electron beam generating unit is adjusted to bombard multiple different positions on the platinum conversion layer to generate nanoscale X-ray spots. The generated platinum Lα characteristic X-rays penetrate the lower silicon spacer layer and the IC structure of the sample and form an attenuation projection corresponding to the three-dimensional structural features of the sample.

[0013] The silicon spacer layer is used to adjust the geometric magnification.

[0014] Optionally, the pretreatment of the sample in S1 to obtain a sample with a platinum conversion layer on the surface includes:

[0015] S101. Deposit a silicon spacer layer on the surface of the sample, wherein the sample is an IC wafer;

[0016] The thickness of the silicon spacer layer is 5μm-15μm, and the surface roughness of the silicon spacer layer is ≤2nm;

[0017] S102, Deposit a chromium adhesion layer on the surface of the silicon spacer layer;

[0018] S103. A platinum conversion layer is deposited on the chromium adhesion layer using a sputtering process.

[0019] Optionally, the sputtering-based deposition of the platinum conversion layer onto the chromium adhesion layer in S103 includes:

[0020] A 5μm × 5μm array window was etched in a designated area using reactive ion etching, and a platinum layer was deposited using a low-stress magnetron sputtering process.

[0021] The grain size is ≤20nm; the platinum conversion layer is a platinum film with a thickness of 100nm±2nm, and the surface roughness of the platinum conversion layer is <0.5nm.

[0022] Optionally, the step S2 of setting up the three-dimensional imaging device and placing it in a vacuum environment includes:

[0023] A three-dimensional imaging device was built inside the target cavity, and a vacuum environment was created inside the target cavity by using a molecular pump.

[0024] Optionally, step S3, which involves placing the pretreated sample on a displacement unit within the three-dimensional imaging device and adjusting the sample height so that the electron beam generating unit within the three-dimensional imaging device is aligned with the test area of ​​the pretreated sample, and then starting the imaging experiment, includes:

[0025] S301. The pretreated sample is placed onto the sample displacement unit in the vacuum environment by a robotic arm.

[0026] S302, The detection unit in the three-dimensional imaging device completes coarse positioning so that the detection unit automatically aligns with the sample on the sample displacement unit.

[0027] S303, The electron beam generating unit in the driving three-dimensional imaging device is aligned with the sample on the sample displacement unit, and the electron beam generating unit emits a nanoscale focal spot electron beam to the test area of ​​the sample.

[0028] The detection unit acquires image information and energy spectrum data of the sample irradiated by the nanoscale focal spot electron beam. When using energy spectrum data, the sample displacement unit is driven to rotate the sample according to a preset angle sequence. At each angle, the nanoscale focal spot electron beam is scanned and energy spectrum data is acquired simultaneously.

[0029] S304 The host computer driving the three-dimensional imaging device analyzes the energy spectrum data, image information and electron beam generation data of the detection unit to obtain a three-dimensional density distribution map of the sample at the nanoscale.

[0030] Optionally, the vacuum level of the vacuum environment is not less than 5 Pa.

[0031] Optionally, the host computer analyzes the energy spectrum data, image information and electron beam generation data of the detection unit and the electron beam generation unit based on the multi-energy spectrum Bayesian reconstruction algorithm to obtain a three-dimensional density distribution map of the sample at the nanoscale.

[0032] A nanoscale three-dimensional imaging device, applied to the above-mentioned nanoscale three-dimensional imaging method, the device comprising:

[0033] An electron beam generating unit is used to emit a nanoscale focal spot electron beam toward the sample according to a set route.

[0034] The sample displacement unit is used to clamp the sample and adjust its position so that the test area of ​​the sample is aligned with the electron beam sound generation unit.

[0035] The detection unit includes a superconducting transition edge sensor and an energy spectrum detector;

[0036] The energy spectrum detector and the electron beam generating unit are arranged on the same side of the sample. The axis of the energy spectrum detector is aligned with the test area of ​​the sample, and the axis of the energy spectrum detector forms an angle with the nanoscale focal spot electron beam. The sample is placed between the sample displacement unit and the superconducting transition edge sensor.

[0037] Optionally, the electron beam generating unit is a rotating transmission target microfocus X-ray source.

[0038] Optionally, the sample displacement unit includes a sample clamp and a five-axis piezoelectric displacement stage;

[0039] The five-axis piezoelectric displacement stage is equipped with a sample fixture, which supports the rotation of the sample fixture, adjustment of the height of the sample fixture, and adjustment of the angle of the sample fixture.

[0040] The above technical solution has at least the following advantages compared with the existing technology:

[0041] 1. This invention improves imaging resolution compared to existing similar inventions or products. By directly integrating the metal conversion layer onto the surface of the integrated circuit and combining it with a superconducting transition edge sensor array, it achieves the resolution of interlayer interconnect structures with a feature size of 160 nanometers. Compared to traditional laboratory X-ray CT systems (focal spot size above 500 nm), the resolution is improved several times, and it does not require sample destruction, meeting the high-precision requirements of integrated circuit reverse engineering.

[0042] 2. Compared with existing similar inventions or products, this invention improves cost-effectiveness and industrial applicability: it eliminates the dependence on synchrotron radiation sources, avoiding the drawbacks of high cost and insufficient time per experiment. It achieves nanoscale imaging through laboratory-grade equipment, significantly reducing detection costs and making it suitable for routine online detection and process optimization in industry.

[0043] 3. Compared with existing similar inventions or products, this invention improves imaging stability and positioning accuracy. It adopts a five-axis piezoelectric displacement stage combined with a closed-loop feedback mechanism (laser interferometer monitoring) and a platinum target surface feature point registration algorithm. The three-dimensional spatial positioning error is less than 50 nanometers, which solves the artifact problem caused by mechanical vibration in traditional systems and ensures stable operation in non-constant temperature industrial environments.

[0044] 4. Compared with existing similar inventions or products, this invention improves the material discrimination. By using a multi-energy spectrum joint optimization algorithm, the energy spectrum collected by the detector is divided into multiple feature windows. Combined with Bayesian scattering modeling and deep learning reconstruction algorithm, the discrimination of high-density metal materials such as copper / tungsten is greatly improved, effectively overcoming the limitation of low energy resolution of traditional silicon drift detectors.

[0045] This invention achieves highly efficient and low-damage detection compared to existing similar inventions or products. It utilizes a nanoscale electron beam focal spot to excite an X-ray spot, combined with the ultra-high energy resolution of a superconducting detector, enabling rapid data acquisition at low throughput and avoiding high-energy radiation damage. Simultaneously, the single detection cycle is significantly shortened compared to traditional nano-CT systems, reducing the risk of prolonged radiation damage to sensitive circuit components.

[0046] 5. The core innovation of this invention lies in the in-situ platinum conversion layer design. By directly fabricating a silicon spacer layer, a chromium adhesion layer, and a platinum conversion layer on the surface of the integrated circuit wafer under test, the traditional external X-ray target source is integrated in-situ onto the sample surface. The electron beam generating unit generates a nanometer-scale focal spot electron beam, which is precisely deflected and controlled by the electron beam scanning coil to bombard different positions on the platinum conversion layer, exciting the generation of nanometer-scale X-ray spots, and achieving full-field scanning of the sample. This design fundamentally eliminates the problem of insufficient geometric magnification caused by the millimeter-level spacing between the traditional external target source and the sample, and avoids the resulting geometric distortion and spatial aliasing effects. Attached Figure Description

[0047] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0048] Figure 1 This is a schematic diagram illustrating the principle of one embodiment of the present invention;

[0049] exist Figure 1 In the middle, 10, electron beam generating unit; 20, sample; 30, sample displacement unit; 31, sample fixture; 32, five-axis piezoelectric displacement stage; 40, detection unit; 41, energy spectrum detector; 42, superconducting transition edge sensing detector; 50, host computer; 60, vacuum environment;

[0050] Figure 2 This is a flowchart of sample pretreatment according to one embodiment of the present invention. In the figure, marking two linear lasers means that the positions of the two linear lasers overlap in the direction shown in the figure.

[0051] exist Figure 2 In the diagram, 201 is the test sample; 202 is the silicon spacer layer; 203 is the chromium adhesion layer; and 204 is the platinum conversion layer. Detailed Implementation

[0052] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. All other embodiments obtained by those skilled in the art based on the described embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0053] Unless otherwise defined, the technical or scientific terms used in this invention shall have the ordinary meaning understood by one of ordinary skill in the art to which this invention pertains. The terms “first,” “second,” and similar terms used in this invention do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Similarly, the terms “an,” “a,” or “the,” and similar terms do not indicate a quantity limitation, but rather indicate the presence of at least one. The terms “comprising,” “including,” or “including,” and similar terms mean that the element or object preceding the word encompasses the element or object listed following the word and its equivalents, without excluding other elements or objects. The terms “connected,” “linked,” or “connected,” and similar terms are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0054] like Figures 1-2 As shown, to address the accuracy issues in existing detection technologies, this invention provides a nanoscale three-dimensional imaging method. By directly integrating a metal conversion layer onto the surface of an integrated circuit wafer, using a scanning electron beam to excite a nanoscale X-ray spot, and combining this with a superconducting transition edge sensor array to achieve high-precision data acquisition, three-dimensional reconstruction is performed using Bayesian scattering modeling and a fully variational regularization algorithm. This method can achieve the analysis of interlayer interconnect structures with a feature size of 160 nm without damaging the sample, meeting the needs of integrated circuit reverse engineering and defect analysis. The invention specifically includes the following steps:

[0055] S1. The sample is pretreated to obtain a sample with a platinum conversion layer on the surface. The pretreated sample is then provided with a silicon spacer layer and a chromium adhesion layer from the sample surface to the platinum conversion layer.

[0056] S2. Construct a three-dimensional imaging device and place it in a vacuum environment;

[0057] S3. Place the pretreated sample on the displacement unit in the three-dimensional imaging device, adjust the height of the sample so that the electron beam generating unit in the three-dimensional imaging device is aligned with the area to be measured of the pretreated sample, and start the imaging experiment.

[0058] When the pretreated sample is used for imaging experiments:

[0059] The electron beam emitted by the electron beam generating unit is adjusted to bombard multiple different positions on the platinum conversion layer to generate nanoscale X-ray spots. The generated platinum Lα characteristic X-rays penetrate the lower silicon spacer layer and the IC structure of the sample and form an attenuation projection corresponding to the three-dimensional structural features of the sample.

[0060] The silicon spacer layer is used to adjust the geometric magnification.

[0061] In one specific embodiment, the pretreatment of the sample in step S1 to obtain a sample with a platinum conversion layer on the surface includes:

[0062] S101. Deposit a silicon spacer layer on the surface of the sample, wherein the sample is an IC wafer;

[0063] The thickness of the silicon spacer layer is 5μm-15μm, and the surface roughness of the silicon spacer layer is ≤2nm;

[0064] S102, Deposit a chromium adhesion layer on the surface of the silicon spacer layer;

[0065] S103. Deposit the platinum conversion layer onto the chromium adhesion layer using a sputtering process:

[0066] A 5μm × 5μm array window was etched in a designated area using reactive ion etching, and a platinum layer was deposited using a low-stress magnetron sputtering process.

[0067] The residual stress of the membrane layer is controlled between compressive stress (-100 MPa) and slight tensile stress (+90 MPa);

[0068] Method: Low-power magnetron sputtering was used to avoid stress accumulation in the film caused by high-energy particle bombardment. Immediately after sputtering, a short annealing process of 5–10 minutes was performed in an inert atmosphere to promote grain boundary relaxation and release stress in the film.

[0069] The grain size is ≤20nm; the platinum conversion layer is a platinum film with a thickness of 100nm±2nm, and the surface roughness of the platinum conversion layer is <0.5nm.

[0070] The main operations in this step are: growing a 10 μm thick silicon spacer layer on the surface of the sample to be tested; depositing a 10 nm thick chromium (Cr) adhesion layer on the surface of the silicon spacer layer; and depositing a 50 nm thick platinum layer on the surface of the adhesion layer by sputtering.

[0071] The principle of this step is as follows: The core architecture of this invention is based on an in-situ integrated X-ray source generation system. By constructing a functional platinum metal conversion layer on the surface of the integrated circuit wafer under test, an integrated design of electron beam excitation and sample detection is achieved. Specifically, the platinum conversion layer is directly prepared on the IC passivation layer using a thin film deposition process. A silicon spacer layer of a specific thickness is provided below it to adjust the geometric magnification. Preferably, the thickness of the silicon spacer layer is set between 5-15 μm, and the setting of the silicon spacer layer is based on minimizing its impact on imaging. In optional technical solutions, its thickness only needs to be below 100 μm. When the focused electron beam bombards the platinum layer, the generated Pt Lα characteristic X-rays penetrate the underlying silicon spacer layer and the IC structure, forming an attenuated projection that accurately corresponds to the three-dimensional features of the sample. The revolutionary breakthrough of this design lies in integrating the X-ray source and the sample under test on the same plane, which effectively eliminates the insufficient geometric magnification caused by spatial arrangement compared to traditional external target source systems. In a preferred embodiment of this invention, the platinum metal conversion layer is prepared by using magnetron sputtering combined with photolithography patterning technology to construct a functional target layer with a nanometer-thickness on the surface of the integrated circuit wafer. Unlike conventional external target source fabrication processes, this method first deposits a 5-15 μm thick silicon spacer layer on the wafer passivation layer surface. The surface roughness is controlled to Ra ≤ 2 nm through chemical mechanical polishing. Then, reactive ion etching (RIE) is used to etch a 5 μm × 5 μm array window in a designated area. Finally, a platinum layer is deposited using low-stress magnetron sputtering. This process, by precisely controlling sputtering power, working gas pressure, and substrate temperature, obtains a dense platinum film with a grain size ≤ 20 nm, maximizing X-ray yield. In addition to sputtering, this invention also includes a technique for preparing the conversion layer using atomic layer deposition (ALD). Using a Pt precursor, 300 cycles of deposition are performed at a substrate temperature of 250 °C to obtain a platinum film with a thickness of 100 ± 2 nm and a surface roughness < 0.5 nm. This process is particularly suitable for conformal deposition of high aspect ratio structures, increasing the target layer coverage on three-dimensional FinFET structures to 99.8%. Another alternative approach employs electrochemical deposition, first depositing a 5 nm nickel catalyst layer on a silicon substrate, followed by applying a constant potential of -0.2 V in a chloroplatinic acid electrolyte to obtain a platinum nanocone array with preferred crystal orientation, effectively increasing the secondary electron emission area. During this process, a specially designed Cr / TiN composite stress buffer layer structure effectively suppresses film cracking caused by differences in thermal expansion coefficients, ensuring the integrity of the target layer structure after 10⁵ electron beam bombardment cycles.

[0072] In one specific implementation, step S2, which involves setting up the three-dimensional imaging device and placing it in a vacuum environment, includes:

[0073] A three-dimensional imaging device is built inside the target cavity, and a vacuum environment is created inside the target cavity by a molecular pump. The vacuum environment contains a vacuum chamber with reserved mounting holes or mounting flanges for each component. Each component can be assembled in the vacuum environment as needed. The vacuum degree of the vacuum environment is not less than 5 Pa.

[0074] Optionally, step S3, which involves placing the pretreated sample on a displacement unit within the three-dimensional imaging device and adjusting the sample height so that the electron beam generating unit within the three-dimensional imaging device is aligned with the test area of ​​the pretreated sample, and then starting the imaging experiment, includes:

[0075] S301. The pretreated sample is placed onto the sample displacement unit in the vacuum environment by a robotic arm.

[0076] S302, The detection unit in the three-dimensional imaging device completes coarse positioning so that the detection unit automatically aligns with the sample on the sample displacement unit.

[0077] S303, The electron beam generating unit in the driving three-dimensional imaging device is aligned with the sample on the sample displacement unit, and the electron beam generating unit emits a nanoscale focal spot electron beam to the test area of ​​the sample.

[0078] The detection unit acquires image information and energy spectrum data of the sample irradiated by the nanoscale focal spot electron beam. When using energy spectrum data, the sample displacement unit is driven to rotate the sample according to a preset angle sequence. At each angle, the nanoscale focal spot electron beam is scanned and energy spectrum data is acquired simultaneously.

[0079] S304 The host computer driving the three-dimensional imaging device analyzes the energy spectrum data, image information and electron beam generation data of the detection unit to obtain a three-dimensional density distribution map of the sample at the nanoscale.

[0080] The specific principle of step three is as follows: By sequentially fabricating a silicon spacer layer, a chromium adhesion layer, and a platinum conversion layer on the surface of the integrated circuit wafer under test, a traditional external X-ray target source is integrated in situ onto the sample surface. The electron beam generating unit produces a nanometer-scale focal spot electron beam, which, after precise deflection control by the electron beam scanning coil, bombards different positions on the platinum conversion layer, exciting the generation of nanometer-scale X-ray spots and achieving full-field scanning of the sample. This design fundamentally eliminates the problem of insufficient geometric magnification caused by the millimeter-level spacing between the traditional external target source and the sample, avoiding the resulting geometric distortion and spatial aliasing effects.

[0081] The highly sensitive superconducting transition edge sensor detector array works synergistically with the aforementioned nanoscale X-ray spot: the excited X-rays penetrate the sample and its interlayer interconnect structure, and the TES detector array captures the attenuated signal with a high signal-to-noise ratio after penetration. Thanks to the ultra-high energy resolution of TES and the optimized array design, combined with a multi-energy spectrum joint optimization algorithm, the system significantly improves material discrimination and effectively overcomes the limitation of low energy resolution of traditional silicon drift detectors.

[0082] Ultimately, the device achieved high-resolution, high-precision, and high-discrimination non-destructive 3D imaging in an industrial environment. Simultaneously, this solution eliminates the reliance on expensive and scarce synchrotron radiation sources, significantly reducing the cost of nanoscale CT inspection and shortening the single inspection cycle to several hours. This provides a cost-effective, stable, reliable, and industrial-grade online solution for reverse engineering, defect analysis, and process optimization of advanced process chips.

[0083] The host computer analyzes the energy spectrum data, image information and electron beam generation data of the detection unit and the electron beam generation unit based on the multi-energy spectrum Bayesian reconstruction algorithm to obtain a three-dimensional density distribution map of the nanoscale sample.

[0084] To address the ±45° scanning angle limitation caused by the dense spatial arrangement of components, this invention proposes a hybrid reconstruction algorithm based on a physical scattering model and deep learning priors. This method first calculates the X-ray propagation path in the multilayer interconnect structure using Monte Carlo simulation, establishing a forward model incorporating Compton scattering and fluorescence effects. Secondly, it uses an improved maximum likelihood expectation-maximization (MLEM) algorithm for initial iteration, rapidly converging to near the global optimum. Finally, it loads the Bayesian TomoScatt framework and combines it with a Bouman-Sauer prior function to sharpen the edges of the metal-dielectric interface. An innovative multi-energy spectrum joint optimization strategy is introduced, dividing the energy spectrum acquired by the detector into three feature windows (5.0-6.5 keV, 7.0-8.5 keV, 9.0-10.5 keV). Dynamic weighted fusion generates a material-specific attenuation coefficient map, increasing the discrimination accuracy of copper / tungsten materials from 70% in traditional single-energy imaging to over 95%. Specifically, the energy spectrum acquired by the TES detector is divided into three feature windows: low-energy window I... low (5.0-6.5keV) is used to analyze low-Z materials (such as SiO2 dielectric layers) and medium-energy windows I. mid (7.0-8.5keV) Enhanced contrast of copper interconnect structure, high energy window I high (9.0-10.5keV) Improves the recognition sensitivity of tungsten fillers. Data from each energy window, after normalization, are weighted and fused using the following formula:

[0085] I total = w1·Ilow + w2·I mid + w3·I high

[0086] The weighting coefficients w1-w3 are dynamically adjusted based on the material absorption coefficient. For example, when the detection region contains copper, the weight of the medium-energy window is automatically increased to 0.6, while the weight of the low-energy window is suppressed to 0.2; the opposite adjustment is made for tungsten-rich regions. During the iterative reconstruction process, a consistency constraint term between channels is introduced to penalize non-physical analytical differences between different energy windows.

[0087] The preferred algorithm of this invention combines the robustness of MLEM (Maximum Likelihood Expectation Maximization) with the advantages of TomoScatt's physical model. The implementation consists of two stages: the first stage uses MLEM for 50 rapid iterations to initially determine the structural profile using its fast convergence speed; the second stage switches to the TomoScatt algorithm, loading the Bouman-Sauer prior model for fine optimization, with a specially designed anisotropic regularization parameter:

[0088] ;

[0089] This parameter is in the material interface region (gradient) (For larger areas) The algorithm automatically reduces the smoothing intensity to maintain edge sharpness and enhances noise suppression in uniform regions. To address the issue of missing data in limited-angle scanning, the algorithm integrates a deep learning prior module to generate virtual projection data to complete the sine curve through a pre-trained 3D U-Net network.

[0090] Beyond standard digital processing solutions, this invention encompasses analog preprocessor design. This solution integrates a transimpedance amplifier and a dual-path filter bank at the TES detector output: a low-pass branch extracts energy spectrum amplitude information, and a high-pass branch analyzes pulse rise time to distinguish overlapping events. Hard-decision logic is implemented using a field-programmable gate array (FPGA).

[0091] To ensure the stability of nanoscale imaging, this invention constructs a multi-layered environmental control system:

[0092] External magnetic field interference is suppressed to ≤5μT by using a μ-metal magnetic shielding layer;

[0093] Combining negative stiffness vibration isolators with an active air-bearing platform reduces the vibration transmissibility in the 10-200 Hz frequency band by 40 dB.

[0094] The three-stage Peltier temperature control system maintains the cavity temperature fluctuation ≤ ±0.01℃.

[0095] The system integrates self-developed control software to automate the entire process from sample loading, parameter optimization, data acquisition to 3D reconstruction. Non-professionals can complete the standard testing process within 30 minutes.

[0096] A nanoscale three-dimensional imaging device, applied to the above-mentioned nanoscale three-dimensional imaging method, the device comprising:

[0097] An electron beam generating unit is used to emit a nanoscale focal spot electron beam toward the sample according to a set route.

[0098] The sample displacement unit is used to clamp the sample and adjust its position so that the test area of ​​the sample is aligned with the electron beam sound generation unit.

[0099] The detection unit includes a superconducting transition edge sensor and an energy spectrum detector;

[0100] The energy spectrum detector and the electron beam generating unit are arranged on the same side of the sample. The axis of the energy spectrum detector is aligned with the test area of ​​the sample, and the axis of the energy spectrum detector forms an angle with the nanoscale focal spot electron beam. The sample is placed between the sample displacement unit and the superconducting transition edge sensor.

[0101] The electron beam generating unit is a rotating transmission target microfocus X-ray source. This device is existing technology, and it adds an additional X-ray source based on existing technology, including a cathode, an electron beam focusing coil, and an electron beam scanning coil arranged coaxially in sequence. The cathode is connected to a high voltage to generate the electron beam. The electron beam focusing coil focuses the diverging electron beam to generate a nanometer-scale electron beam focal spot. The electron beam scanning coil controls the deflection of the electron beam, and combined with the control system, the electron beam can be scanned along a set path. Preferably, a two-stage focusing coil is used for electron beam focusing to achieve a nanometer-scale electron beam focal spot; alternatively, a single-stage or multi-stage focusing coil can be used. Preferably, an octet magnetic coil is used for electron beam deflection, making the electron beam scanning path smoother and / or achieving higher deflection control accuracy; alternatively, a quadrupole magnetic coil or a saddle-shaped coil, etc., that can generate a specific magnetic field to deflect the electron beam, can be used. Those skilled in the art can assemble the deflection coil in conjunction with existing X-ray sources according to their needs.

[0102] In one specific embodiment, the sample displacement unit includes a sample clamp and a five-axis piezoelectric displacement stage; the sample clamp is mounted on the five-axis piezoelectric displacement stage, and the five-axis piezoelectric displacement stage supports rotating the sample clamp, adjusting the height of the sample clamp, and adjusting the angle of the sample clamp.

[0103] In one specific implementation, this invention constructs a five-axis piezoelectric displacement stage. The system comprises: a piezoelectrically driven nanopositioning stage, a tilting angle stage, a height adjustment stage, and a high-precision air-floating rotary stage. The five-axis piezoelectric displacement stage is existing technology. A specially designed dual-closed-loop feedback mechanism monitors displacement errors in real time using a laser interferometer, combined with an image registration algorithm based on feature points on the platinum target surface, maintaining three-dimensional spatial positioning accuracy within ±5 nm. The first-stage compensation is based on real-time monitoring of the sample stage displacement using a laser interferometer, and a PID controller drives the piezoelectric ceramic actuator for nanopositioning correction. The second-stage compensation employs an image feature matching algorithm to extract the characteristic microstructures of the platinum target layer from each frame of energy dispersive spectroscopy data, calculates the positioning offset through cross-correlation calculations, and feeds it back to the positioning correction system.

[0104] In one specific implementation, to achieve high-sensitivity data acquisition, this invention employs a superconducting transition-edge sensor (TES) array. Each pixel unit of this array is composed of a superconducting molybdenum (Mo) / copper (Cu) multilayer film structure, and its operating temperature is maintained below 100 mK to preserve the superconducting critical state. The TES array sensor array plane is perpendicular to the electron beam axis, and the electron beam axis passes through the array's center point. To address the issue of inconsistent edge pixel responses in the TES array, this invention optimizes the detector layout using a ring gradient distribution design. Specifically, on a 25mm diameter silicon substrate, 192 effective pixel units are divided into three concentric regions: a central region with a radius ≤5mm has 64 pixels, using a 50μm×50μm size to achieve a high spatial sampling rate; a middle ring with a radius of 5-8mm has 96 pixels, enlarged to 80μm×80μm to accommodate high throughput acquisition; and an outer ring with a radius of 8-12mm has 32 pixels, with a size of 120μm×120μm, for background noise monitoring. Each pixel unit is connected to a low-temperature readout circuit via a superconducting aluminum lead with a linewidth ≤2μm. The energy spectrum detector 41 and the electron beam generating unit 10 used in this invention are positioned on the same side of the sample. The axis of the energy spectrum detector 41 passes through the real-time detected area of ​​the sample and is arranged at a certain angle to the electron beam axis to detect the sample's energy spectrum signal.

[0105] The implementation process of this technical solution follows a standardized procedure: First, a vacuum robotic arm loads the IC wafer under test onto the sample stage, and an optical camera automatically identifies alignment marks to complete coarse positioning. Second, the electron beam system performs automatic centering calibration, scanning the platinum target surface to acquire a reference image. Next, the displacement stage rotates in a preset angle sequence, performing nanometer-level high-precision scanning at each angle and simultaneously acquiring energy spectrum data. The raw data, after preprocessing, is input into a hybrid reconstruction algorithm to generate a three-dimensional density distribution map. Throughout the process, a dynamic drift compensation system continuously operates to ensure the spatiotemporal consistency of the coordinated operation of all subsystems.

[0106] In this method:

[0107] The electron beam generation unit, consisting of a cathode, focusing coil, and scanning coil, is used to generate, focus, and deflect a high-energy electron beam. The cathode generates the initial electron beam under high voltage, which is then compressed into a nanoscale focal spot (approximately 160 nm) by the focusing coil through a multi-stage magnetic field. The scanning coil controls the electron beam to precisely scan the platinum conversion layer on the sample surface along a preset path, exciting a nanoscale X-ray spot and providing a high-resolution light source for imaging. The pretreatment sample unit contains the surface-modified integrated circuit sample to be tested, including a deposited silicon spacer layer, a chromium adhesion layer, and a platinum conversion layer. The silicon spacer layer adjusts the geometric magnification and reduces electron beam damage to the sample body; the platinum layer acts as the electron beam bombardment target, directly exciting characteristic X-rays that penetrate the sample structure to form a projection signal, enabling in-situ non-destructive testing. The sample displacement unit includes a five-axis piezoelectric displacement stage and a sample fixture, responsible for high-precision sample positioning and multi-angle scanning. A five-axis piezoelectric displacement stage (translation, rotation, tilt) combined with real-time monitoring and closed-loop feedback using a laser interferometer ensures a 3D spatial positioning error of less than ±5 nm. Machine vision markings on the fixtures and samples assist in rapid alignment and support full-angle data acquisition for complex structures. The detection unit consists of a superconducting transition edge sensor 42 (TES) array and an energy dispersive detector. The TES array captures sample attenuation signals; the energy dispersive detector is positioned on the same side as the electron beam, using multi-energy window division (e.g., 5.0-10.5 keV) to improve the discrimination accuracy of metals such as copper / tungsten to over 95%. The vacuum unit uses a molecular pump to maintain a vacuum chamber pressure ≤10. -5 Pa reduces electron beam scattering and gas molecule interference; integrated magnetic shielding, vibration isolation platform, and temperature control system ensure stable operation of the superconducting detector and avoid the impact of environmental vibration and thermal drift on imaging accuracy. The data processing unit integrates data transmission, optimization algorithms, and 3D reconstruction modules. Based on Bayesian scattering modeling and total variational regularization algorithms, noise and artifacts are eliminated. Combined with multi-energy spectral joint optimization of dynamically weighted fused data, deep learning is used to complete the finite-angle projection, ultimately generating a 160 nm resolution 3D density distribution map, clearly resolving the interlayer interconnect structure. All units work together to achieve nanoscale 3D imaging of integrated circuits under non-destructive conditions.

[0108] This invention achieves 160nm resolution 3D imaging of integrated circuits under non-destructive conditions by integrating electron beam excitation and superconducting energy-resolved detection technologies. This represents a resolution improvement several times compared to traditional laboratory X-ray CT systems, and the in-situ platinum conversion layer design avoids sample damage. Through multi-energy spectrum joint optimization algorithms and a superconducting detector array, the discrimination accuracy of materials such as copper / tungsten is improved to over 95%. Furthermore, the use of a five-axis piezoelectric displacement stage and laser interferometer closed-loop feedback technology ensures 3D positioning accuracy better than ±5 nm. This device eliminates reliance on synchrotron radiation sources, reducing detection costs by over 90%. Combined with vacuum magnetic shielding and precise temperature control, it can operate stably in industrial environments, shortening the single detection cycle to several hours. This provides an efficient, economical, and reliable solution for reverse engineering, defect analysis, and process optimization of advanced process chips.

[0109] This invention improves imaging resolution compared to existing similar inventions or products by directly integrating a metal conversion layer onto the surface of an integrated circuit and combining it with a superconducting transition edge sensor array, achieving the resolution of interlayer interconnect structures with a feature size of 160 nanometers. Compared to traditional laboratory X-ray CT systems (focal spot size above 500 nm), the resolution is improved several times, and it does not damage the sample, meeting the high-precision requirements of integrated circuit reverse engineering. This invention also improves cost-effectiveness and industrial applicability compared to existing similar inventions or products: it eliminates the dependence on synchrotron radiation sources, avoiding the drawbacks of high cost and insufficient time per experiment. Achieving nanoscale imaging with a laboratory-grade device significantly reduces detection costs, making it suitable for routine online detection and process optimization in industry.

[0110] This invention improves imaging stability and positioning accuracy compared to existing similar inventions or products. It employs a five-axis piezoelectric displacement stage combined with a closed-loop feedback mechanism (monitored by a laser interferometer) and a platinum target surface feature point registration algorithm, achieving a three-dimensional spatial positioning error of less than 50 nanometers. This solves the artifact problem caused by mechanical vibration in traditional systems and ensures stable operation in non-constant temperature industrial environments. Furthermore, this invention improves material discrimination compared to existing similar inventions or products. Utilizing a multi-energy spectrum joint optimization algorithm, the energy spectrum acquired by the detector is divided into multiple feature windows. Combined with Bayesian scattering modeling and deep learning reconstruction algorithms, the discrimination of high-density metal materials such as copper / tungsten is significantly enhanced, effectively overcoming the limitation of low energy resolution in traditional silicon drift detectors.

[0111] This invention achieves highly efficient and low-damage detection compared to existing similar inventions or products. It utilizes a nanoscale electron beam focal spot to excite an X-ray spot, combined with the ultra-high energy resolution of a superconducting detector, enabling rapid data acquisition at low throughput and avoiding high-energy radiation damage. Simultaneously, the single detection cycle is significantly shortened compared to traditional nano-CT systems, reducing the risk of long-term radiation damage to sensitive circuit components. The core innovation of this invention lies in the in-situ platinum conversion layer design. By directly fabricating a silicon spacer layer, a chromium adhesion layer, and a platinum conversion layer on the surface of the integrated circuit wafer under test, the traditional external X-ray target source is in-situ integrated onto the sample surface. The electron beam generating unit produces a nanoscale focal spot electron beam, which, through precise deflection control by the electron beam scanning coil, bombards different locations on the platinum conversion layer, exciting the generation of nanoscale X-ray spots and achieving full-field scanning of the sample. This design fundamentally eliminates the problem of insufficient geometric magnification caused by the millimeter-level spacing between the traditional external target source and the sample, avoiding the resulting geometric distortion and spatial aliasing effects.

[0112] The following points need to be explained:

[0113] (1) The accompanying drawings of the embodiments of the present invention only involve the structures involved in the embodiments of the present invention. Other structures can refer to the general design.

[0114] (2) For clarity, the thickness of layers or regions is enlarged or reduced in the drawings used to describe embodiments of the invention, i.e., these drawings are not drawn to scale. It is understood that when an element such as a layer, film, region or substrate is referred to as being “above” or “below” another element, the element may be “directly” located “above” or “below” the other element or there may be intermediate elements.

[0115] (3) Where there is no conflict, the embodiments of the present invention and the features in the embodiments can be combined with each other to obtain new embodiments.

[0116] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. The scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A nanoscale three-dimensional imaging method, characterized in that, The method comprises: The method comprises: S1, pretreating the sample to obtain a sample with a platinum conversion layer on the surface, obtaining a pretreated sample, and sequentially arranging a silicon spacer layer and a chromium adhesion layer on the pretreated sample from the surface of the sample to the platinum conversion layer; S2, building a three-dimensional imaging device and setting the three-dimensional imaging device in a vacuum environment; S3, placing the pretreated sample on a displacement unit in the three-dimensional imaging device, adjusting the height of the sample to align the electron beam generating unit in the three-dimensional imaging device with the to-be-measured region of the pretreated sample, and starting the imaging experiment; Wherein, when the pretreated sample is subjected to the imaging experiment: Adjust the nanoscale focal spot electron beam emitted by the electron beam generating unit to bombard multiple different positions on the platinum conversion layer, and excite to generate a nanoscale X-ray spot, wherein the excited platinum Lα characteristic X-ray penetrates the lower silicon spacer layer and the IC structure of the sample and forms an attenuation projection corresponding to the three-dimensional structure characteristics of the sample; Wherein, the silicon spacer layer is used to adjust the geometric magnification.

2. The nanometer scale three-dimensional imaging method of claim 1, wherein, The S1 of the method comprises: S101, depositing a silicon spacer layer on the surface of the sample, wherein the sample is an IC wafer; Wherein, the thickness of the silicon spacer layer is 5-15 μm, and the surface roughness of the silicon spacer layer is ≤2 nm; S102, depositing a chromium adhesion layer on the surface of the silicon spacer layer; S103, depositing a platinum conversion layer on the chromium adhesion layer based on a sputtering process.

3. The nanometer scale three-dimensional imaging method of claim 2, wherein, The S103 of the method comprises: Etching an array window of 5 μm x 5 μm in a specified area by using a reactive ion etching, and depositing a platinum layer by using a low-stress magnetron sputtering process; Wherein, the grain size is ≤20 nm; the thickness of the platinum conversion layer is a platinum film of 100 nm±2 nm, and the surface roughness of the platinum conversion layer is <0.5 nm.

4. The nanometer scale three-dimensional imaging method of claim 3, wherein, The S2 of the method comprises: Building a three-dimensional imaging device in a target cavity, and forming a vacuum environment in the target cavity by using a molecular pump.

5. The nanometer scale three-dimensional imaging method of claim 4, wherein, The S3 of the method comprises: S301, placing the pretreated sample on a sample displacement unit in the vacuum environment by using a mechanical hand; S302, completing coarse positioning by using a detection unit in the three-dimensional imaging device to automatically align the sample on the sample displacement unit; S303, driving an electron beam generating unit in the three-dimensional imaging device to align the sample on the sample displacement unit, and emitting a nanoscale focal spot electron beam from the electron beam generating unit to the to-be-measured region of the sample; The detection unit collects image information and energy spectrum data of the sample irradiated by the nanoscale focal spot electron beam, wherein, when the energy spectrum data is used, the sample displacement unit is driven to rotate the sample according to a preset angle sequence, and the nanoscale focal spot electron beam is scanned and energy spectrum data is collected synchronously at each angle; S304, the host computer driving the three-dimensional imaging device analyzes the energy spectrum data, image information and data of the electron beam generating unit of the detection unit, and obtains a three-dimensional density distribution map of the nanoscale sample.

6. The nanometer scale three-dimensional imaging method of claim 5, wherein, The vacuum degree of the vacuum environment is not less than 5 Pa.

7. The nanometer scale three-dimensional imaging method of claim 5, wherein, The host computer analyzes the energy spectrum data, image information and data of the electron beam generating unit of the detection unit based on a multi-spectrum Bayesian reconstruction algorithm, and obtains a three-dimensional density distribution map of the nanoscale sample.

8. A nanoscale three-dimensional imaging device, characterized by, The device is applied to the nanoscale three-dimensional imaging method in any one of claims 1 to 7, and the device comprises: An electron beam generating unit for emitting a nanoscale focal spot electron beam to the sample according to a set route; A sample displacement unit for clamping the sample and adjusting the position of the sample to align the to-be-measured region of the sample with the electron beam generating unit; A detection unit comprising a superconducting transition edge sensor and an energy spectrum detector; The energy spectrum detector and the electron beam generating unit are arranged on the same side of the sample, the axis of the energy spectrum detector is aligned with the to-be-measured region of the sample, and the axis of the energy spectrum detector forms an angle with the nanoscale focal spot electron beam, and the sample is arranged between the sample displacement unit and the superconducting transition edge sensor.

9. The nanometer-scale three-dimensional imaging device of claim 8, wherein, The electron beam generating unit is a rotating transmission target microfocus X-ray source.

10. The nanometer-scale three-dimensional imaging device of claim 7, wherein, The sample displacement unit comprises a sample clamp and a five-axis piezoelectric displacement table. The five-axis piezoelectric displacement table supports the rotation of the sample clamp, adjusts the height of the sample clamp, and adjusts the angle of the sample clamp. The five-axis piezoelectric displacement table supports the rotation of the sample clamp, adjusts the height of the sample clamp, and adjusts the angle of the sample clamp.

Images