Current limiting circuit and battery management system

Abstract

The invention discloses a current limiting circuit and a battery management system, and relates to the technical field of battery management. The circuit comprises an inductor, an MOS tube and a sampling resistor which are connected in series between a battery negative end and a load negative end of the battery management system to form a main loop; the system also comprises a differential mode operational amplifier circuit and a PWM modulation circuit. The differential mode operational amplifier circuit collects the voltage difference between the two ends of the sampling resistor and outputs the adjusted voltage to the PWM modulation circuit. When the current of the main loop is increased, the sampling voltage difference is increased, and the PWM modulation circuit reduces the duty ratio of the PWM signal output to the MOS tube according to the sampling voltage difference, so that the conduction state of the MOS tube is controlled to limit the current. According to the invention, through hardware closed-loop control, rapid, dynamic and adaptive limitation of the impact current is realized, the battery pack and the power device are effectively protected, and the method has the advantages of rapid response, high reliability and good flexibility.

Description

Technical Field

[0001] This invention relates to the fields of electronic circuits and energy storage control technology, and in particular to an automatically adjusting current limiting circuit and a battery management system. Background Technology

[0002] In power systems composed of battery management systems and inverters, such as in new energy vehicles and energy storage systems, the battery pack may experience a sudden surge of large current in the circuit during charging or discharging due to sudden load changes, system failures, or other external factors. This current surge can not only damage the battery pack itself and shorten its lifespan, but may also cause permanent damage to the battery management system (BMS), inverter, and other components in the circuit, or even lead to safety accidents.

[0003] Currently, common overcurrent protection solutions include using fuses or traditional current protection chips. However, fuses are one-time components that need to be replaced after blowing, making maintenance inconvenient and unable to cope with continuous current fluctuations. Traditional protection chips may have problems such as slow response speed, fixed protection thresholds, and poor flexibility, making it difficult to suppress instantaneous current spikes while ensuring the continuous and stable operation of the system.

[0004] Therefore, there is an urgent need in the field for a current limiting solution that can respond quickly, adjust automatically, and is highly reliable. Summary of the Invention

[0005] (a) Purpose of the invention The purpose of this invention is to provide a current limiting circuit to address the problems of slow response speed, poor flexibility, and inability to effectively suppress transient inrush currents in existing technologies. This invention aims to achieve a dynamic, automatic, and rapid current limiting mechanism to protect the safety of the battery pack and associated electronic devices.

[0006] (II) Technical Solution To achieve the above objectives, the present invention provides the following technical solution: In a first aspect, the present invention provides a current limiting circuit, including a PWM modulation circuit, a MOSFET, an inductor, a sampling resistor, and a differential-mode operational amplifier circuit; The inductor, MOSFET, and sampling resistor are connected in series between the negative terminal of the battery and the negative terminal of the load in the battery management system, forming the main circuit for current limiting. The two input terminals of the differential operational amplifier circuit are respectively connected to the two ends of the sampling resistor to collect the voltage difference across the sampling resistor. The output terminal of the differential operational amplifier circuit is connected to the feedback input terminal of the PWM modulation circuit to provide an adjustment voltage to the PWM modulation circuit. The output terminal of the PWM modulation circuit is connected to the control terminal of the MOS transistor, and is used to output a PWM control signal to the MOS transistor; When the current flowing through the main circuit increases, the voltage difference across the sampling resistor increases, and the adjustment voltage output by the differential operational amplifier circuit increases accordingly. The PWM modulation circuit reduces the duty cycle of its output PWM control signal according to the increased adjustment voltage, thereby limiting the current in the main circuit by controlling the conduction state of the MOS transistor.

[0007] Furthermore, the differential operational amplifier circuit includes an operational amplifier, the non-inverting input terminal and the inverting input terminal of which are respectively connected to the two ends of the sampling resistor.

[0008] Furthermore, the PWM modulation circuit is configured such that the higher the voltage at its feedback input terminal, the lower the duty cycle of its output PWM signal.

[0009] Furthermore, the MOS transistor is a power MOSFET, and its control electrode is the gate.

[0010] Furthermore, there are multiple MOS transistors connected in parallel.

[0011] Furthermore, the inductor is connected in series in the main circuit and is configured to suppress sudden changes in current by generating a reverse electromotive force.

[0012] Furthermore, it also includes a power supply circuit that draws power from the positive terminal of the battery in the battery management system and supplies power to the differential operational amplifier circuit and PWM modulation circuit after DC-DC conversion.

[0013] Furthermore, the power supply circuit includes an NTC resistor and a power management chip. The enable pin of the power management chip is grounded through the NTC resistor and is configured to shut down the output of the power management chip when the temperature exceeds a safe threshold.

[0014] In a second aspect, the present invention also provides a battery management system, including a current limiting circuit as described in any of the preceding claims; the current limiting circuit is connected in series between the negative terminal of the battery and the negative terminal of the load in the battery management system, for limiting the charging and discharging current flowing through the battery.

[0015] (III) Beneficial Effects Compared with the prior art, the present invention has the following significant advantages: Rapid Response and Dual Protection: This invention combines the passive suppression of inductors with the active control of MOSFETs. The inductor can instantly respond to sudden current changes, generating a back electromotive force for initial buffering; while the active control loop based on sampling and PWM can quickly follow up and perform precise current clamping, forming a multi-layered protection.

[0016] Dynamic adaptive adjustment: The system acquires current signals in real time through a differential-mode operational amplifier and feeds them back to the PWM modulation circuit, achieving closed-loop control. The system can dynamically and continuously adjust the conduction level of the MOSFET according to the actual current magnitude, achieving "soft" current limiting rather than simple "hard" shutdown, thus ensuring continuous operation of the system within a safe range.

[0017] High reliability: This circuit is primarily hardware-based, without relying on complex software algorithms, resulting in a direct and stable response and strong anti-interference capabilities. The power MOSFETs, as the actuators, have long lifespans and can be switched frequently, making them ideal for this type of application.

[0018] High flexibility: By adjusting the resistance value of the sampling resistor, the amplification factor of the differential operational amplifier, or the feedback reference of the PWM modulation circuit, different current limit thresholds can be flexibly set to adapt to various battery pack specifications and power requirements. Attached Figure Description

[0019] Figure 1 This is an overall block diagram of the current limiting circuit of the present invention; Figure 2 This is a block diagram of the current limiting circuit of the present invention; Figure 3 This is a circuit diagram of a power supply circuit according to an embodiment of the current limiting circuit of the present invention; Figure 4 This is a differential-mode operational amplifier and PWM modulation circuit diagram of an embodiment of the current limiting circuit of the present invention; Figure 5 This is a dual MOS transistor protection circuit diagram of an embodiment of the current limiting circuit of the present invention. Detailed Implementation

[0020] To further illustrate the various embodiments, the present invention provides accompanying drawings. These drawings are part of the disclosure of the present invention, primarily used to illustrate the embodiments and to explain the operating principles of the embodiments in conjunction with the relevant descriptions in the specification. With reference to these drawings, those skilled in the art should be able to understand other possible implementations and the advantages of the present invention. Components in the drawings are not drawn to scale, and similar component symbols are generally used to represent similar components.

[0021] The present invention will now be further described in conjunction with the accompanying drawings and specific embodiments.

[0022] like Figure 1 and Figure 2 As shown, in a preferred embodiment of the present invention: Main circuit: The power path starts from the B- terminal of the BMS, flows sequentially through inductor 3, MOSFET 2 (an N-channel power MOSFET is selected in this embodiment), and sampling resistor 4, and finally reaches the P- terminal connected to the inverter or load.

[0023] Current sampling unit: Sampling resistor 4 is a precision resistor in the milliohm range, and its resistance value is selected according to the current range to be detected. When current flows through it, a tiny voltage difference V_sense = I * R_sense is generated.

[0024] Signal amplification and conditioning unit: The differential operational amplifier circuit 5 is constructed using an operational amplifier with a high common-mode rejection ratio. Its non-inverting and inverting inputs are connected to the two ends of the sampling resistor 4, respectively, amplifying the weak sampling voltage difference V_sense to a voltage level V_adj suitable for subsequent circuit processing.

[0025] Control Logic Unit: PWM Modulation Circuit 1 can be a dedicated PWM controller IC (such as UC3843). Its feedback pin receives the V_adj voltage from the differential operational amplifier output. Internally, it typically contains an error amplifier and a comparator. When V_adj increases, the internal circuitry reduces the duty cycle of its output PWM signal.

[0026] Execution unit: The gate of MOSFET 2 is driven by the PWM signal. When the duty cycle decreases, the average on-time of MOSFET 2 in one switching cycle becomes shorter, and the equivalent impedance increases, thereby limiting the average current in the main circuit.

[0027] The circuit also includes a power supply unit: it draws power from the B+ terminal of the BMS, converts it to DC-DC, and then outputs a step-down DC 12V to power circuits including the differential mode operational amplifier circuit 5, the PWM modulation circuit 1, and other circuits.

[0028] Working principle: Assume the system is charging a battery pack, with current flowing from B- to P-. If, for some reason, the loop current I suddenly increases, then: Inductor 3 will immediately generate a reverse electromotive force, which will hinder the sudden change in current and act as the first buffer.

[0029] At the same time, the voltage difference V_sense across the sampling resistor 4 increases proportionally.

[0030] The differential-mode operational amplifier circuit 5 amplifies V_sense and outputs a higher adjustment voltage V_adj to the PWM modulation circuit 1.

[0031] After receiving the increased V_adj, the PWM modulation circuit 1 immediately reduces the duty cycle D of its output PWM wave.

[0032] The reduced duty cycle shortens the conduction time of MOSFET 2, effectively limiting the current flowing through it.

[0033] The entire closed-loop system continuously performs the above adjustments, eventually stabilizing the loop current near a preset safe maximum value, thereby protecting the entire system.

[0034] Example 2: Figure 3 An embodiment of the power supply unit is given. The battery pack voltage B+ is stepped down from 41-60V to 12V by a DC-DC step-down circuit to power the PWM modulation circuit 1 and the differential operational amplifier circuit 5. Preferably, to prevent the internal temperature of the battery pack from becoming too high, an NTC resistor RT1 is placed at the enable pin of the power management chip U1 for over-temperature protection. When the temperature rises abnormally, the NTC resistance decreases, the enable of the DC power chip is disconnected, and the current limiting circuit is protected from burning out.

[0035] Figure 4 An embodiment of PWM modulation circuit 1 and differential operational amplifier circuit 5 is given. Chip U2 integrates differential operational amplifier and PWM modulation functions, including two operational amplifiers (or an error amplifier and a comparator). It can check the B+ terminal voltage of BMS (i.e., the total voltage of the battery pack) by voltage division, and adjust the PWM frequency in real time by sampling the value of the sampling resistor, thereby accurately controlling the switching speed of the NMOS transistor.

[0036] like Figure 5 As shown, two NMOS transistors are connected in parallel between the B- terminal of the BMS and the P- terminal of the inverter to increase circuit reliability and heat dissipation. The inductor acts to block current increases and retain current decreases. The two sampling resistors are connected in parallel to increase heat dissipation and overcurrent capability, while the diode and capacitor components ensure more complete NMOS turn-on and turn-off.

[0037] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A current limiting circuit, characterized in that, This includes a PWM modulation circuit, MOSFETs, inductors, sampling resistors, and differential operational amplifier circuits. The inductor, MOSFET, and sampling resistor are connected in series between the negative terminal of the battery and the negative terminal of the load in the battery management system, forming the main circuit for current limiting. The two input terminals of the differential operational amplifier circuit are respectively connected to the two ends of the sampling resistor to collect the voltage difference across the sampling resistor. The output terminal of the differential operational amplifier circuit is connected to the feedback input terminal of the PWM modulation circuit to provide an adjustment voltage to the PWM modulation circuit. The output terminal of the PWM modulation circuit is connected to the control terminal of the MOS transistor, and is used to output a PWM control signal to the MOS transistor; When the current flowing through the main circuit increases, the voltage difference across the sampling resistor increases, and the adjustment voltage output by the differential operational amplifier circuit increases accordingly. The PWM modulation circuit reduces the duty cycle of its output PWM control signal according to the increased adjustment voltage, thereby limiting the current in the main circuit by controlling the conduction state of the MOS transistor.

2. The current limiting circuit according to claim 1, characterized in that, The differential operational amplifier circuit includes an operational amplifier, whose non-inverting input and inverting input are respectively connected to the two ends of the sampling resistor.

3. The current limiting circuit according to claim 1, characterized in that, The PWM modulation circuit is configured such that the higher the voltage at its feedback input terminal, the lower the duty cycle of its output PWM signal.

4. The current limiting circuit according to claim 1, characterized in that, The MOS transistor is a power MOSFET, and its control electrode is the gate.

5. The current limiting circuit according to claim 1, characterized in that, The MOS transistors are multiple and connected in parallel.

6. The current limiting circuit according to claim 1, characterized in that, The inductor is connected in series in the main circuit and is configured to suppress sudden changes in current by generating a reverse electromotive force.

7. The current limiting circuit according to claim 1, characterized in that, It also includes a power supply circuit that draws power from the positive terminal of the battery in the battery management system and supplies power to the differential operational amplifier circuit and PWM modulation circuit after DC-DC conversion.

8. The current limiting circuit according to claim 7, characterized in that, The power supply circuit includes an NTC resistor and a power management chip. The enable pin of the power management chip is grounded through the NTC resistor and is configured to shut down the output of the power management chip when the temperature exceeds a safe threshold.

9. A battery management system, comprising a current limiting circuit as described in any one of claims 1-8; the current limiting circuit is connected in series between the negative terminal of the battery and the negative terminal of the load in the battery management system, for limiting the charging and discharging current flowing through the battery.

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