A high-power IGBT rectification system and method

Abstract

The application discloses a kind of high-power IGBT rectifying system and method, it is related to the technical field of IGBT rectification, including active front-end rectification main circuit is constructed;Integrated dc side hybrid harmonic modulation auxiliary circuit;Multiple delay signal elimination operation is carried out to the signal obtained by sampling, filter harmonic interference signal, the frequency and phase of grid fundamental voltage are locked by phase-locked loop;Establish the control structure of voltage outer loop and current inner loop, generate the instruction amplitude of net side active current and ideal sine current reference waveform, and real-time control IGBT in active front-end rectification main circuit;Actual input current of net side is analyzed in real time by fast fourier transform, and residual harmonic component is identified;Realize the feedback management of regenerative energy.The application proposes a kind of active front-end IGBT rectification method and system with high adaptability of fusion type, which can operate stably under grid voltage distortion conditions, and realize deep harmonic suppression and high efficient energy bidirectional flow.

Description

Technical Field

[0001] This invention relates to the technical field of IGBT rectification, and more particularly to a high-power IGBT rectification system and method. Background Technology

[0002] In modern industry, new energy grid connection, and high-power drive applications, rectifiers serve as a crucial interface connecting the AC grid and DC loads, and their performance directly impacts the power quality and operational stability of the entire system. Traditional rectification technologies primarily employ uncontrolled or phase-controlled rectifier bridges based on diodes or thyristors. While these technologies are simple in structure and low in cost, their nonlinear operating characteristics inject a large amount of harmonic current into the grid, such as 5th and 7th harmonics, severely polluting the grid environment, reducing the power factor, and failing to meet increasingly stringent power quality standards. To address this issue, large-capacity passive or active filters are typically installed, but this not only increases the system's size, cost, and losses but may also resonate with the system impedance, posing a risk of secondary pollution. To fundamentally solve the harmonic problem, active front-end (AFE) rectification technology, composed of fully controllable devices such as insulated-gate bipolar transistors (IGBTs), has emerged. This technology, through high-frequency pulse width modulation (PWM) control, can actively shape the grid-side current into a sine wave, achieving unity power factor operation and bidirectional energy flow. However, most existing AFE (Active Front-End) rectifier technologies are designed based on ideal grid conditions. When the actual grid voltage exhibits distortions such as background harmonics, three-phase imbalance, or transient drops, its control core—the phase-locked loop (PLL)—struggles to accurately track the fundamental phase of the grid voltage. Incorrect phase information leads to erratic current control, not only failing to effectively suppress harmonics but potentially introducing new harmonic components, even causing system oscillations and, in severe cases, equipment shutdown. Furthermore, some improved solutions attempt to introduce harmonic injection technology on the DC side of the rectifier circuit to cancel specific harmonics by multiplying the pulse number. However, such solutions are mostly applied to traditional diode rectifiers, and their harmonic suppression capabilities are limited, their structures are complex, and they struggle to cope with the dynamic changes in grid background harmonics. Therefore, a completely new rectification technology solution is urgently needed. This solution must not only possess the advantages of active front-end rectification technology in fundamentally suppressing harmonics and achieving energy feedback but also effectively address the challenges of harsh grid environments and provide deep and refined management of residual harmonics, thereby offering a highly integrated, adaptable, and power-quality AC / DC conversion solution.

[0003] Currently, Chinese invention application CN202410679964.7 discloses an IGBT application method for a six-pulse rectifier system in a high-current generator. This method solves the problems of high harmonic content, low efficiency, large size, and high reactive power consumption in existing six-pulse rectifier systems for DC high-current generators, which use thyristors to output large DC currents. The method includes a three-phase six-pulse rectifier bridge, with each bridge arm composed of an IGBT module. Multiple IGBTs can be connected in series and parallel to form the IGBT module, depending on the output requirements of the DC high-current generator. The method primarily addresses the issues of high harmonic content, low efficiency, and large size in the output current of the six-pulse rectifier system through IGBTs. Furthermore, it proposes designs for switching timing, soft-switching technology, drive modules, and protection mechanisms to further reduce current ripple and switching losses. However, existing rectification technologies have poor adaptability to grid voltage distortion conditions, incomplete harmonic suppression, and lack energy feedback management. They do not provide a mechanism to deal with grid pollution, cannot cope with high-order harmonics remaining in the system caused by factors such as switching dead time and device nonlinearity, and cannot handle the dynamically changing background harmonics brought by the grid itself. The harmonic suppression level has an upper limit that is difficult to overcome, and there is a lack of closed-loop control description for DC voltage stability and AC current accurate tracking. Summary of the Invention

[0004] The technical problems solved by this invention are: existing rectification technologies have poor adaptability under grid voltage distortion conditions, incomplete harmonic suppression, lack of energy feedback management, no mechanism to deal with grid pollution, and are unable to deal with high-order harmonics remaining in the system caused by factors such as switching dead time and device nonlinearity. Furthermore, they are unable to handle the dynamically changing background harmonics brought by the grid itself. The harmonic suppression level has an upper limit that is difficult to overcome, and there is a lack of closed-loop control description for DC voltage stability and AC current accurate tracking.

[0005] To solve the above-mentioned technical problems, the present invention provides the following technical solution: a high-power IGBT rectification method, comprising the following steps:

[0006] Step S1: Construct the active front-end rectifier main circuit;

[0007] Step S2: Integrate DC-side hybrid harmonic modulation auxiliary circuit;

[0008] Step S3: Sample the grid voltage in real time, perform multiple delay signal elimination operations on the sampled signal to filter out harmonic interference signals, obtain a pure fundamental voltage signal, and use the fundamental voltage signal as input to lock the frequency and phase of the grid fundamental voltage through a phase-locked loop;

[0009] Step S4: Establish the control structure of the voltage outer loop and the current inner loop, generate the command amplitude of the grid-side active current and the ideal sinusoidal current reference waveform, and control the IGBT in the active front-end rectifier main circuit in real time to force the actual input current to accurately track the sinusoidal current reference waveform.

[0010] Step S5: Perform real-time fast Fourier transform analysis on the actual input current on the grid side to identify residual harmonic components;

[0011] Step S6: Implement feedback management of renewable energy.

[0012] Preferably, step S1 includes:

[0013] The construction of an active front-end rectifier main circuit specifically includes:

[0014] A fully controlled three-phase rectifier bridge composed of six IGBTs is used as the main power topology. Each IGBT is connected in reverse parallel with a freewheeling diode. An LCL filter is configured at the AC side of the fully controlled three-phase rectifier bridge where it is connected to the power grid for active current waveform control and bidirectional energy flow. The grid-side inductance, filter capacitor and machine-side inductance parameters of the LCL filter are designed according to the system switching frequency and the desired harmonic attenuation rate.

[0015] The design process for the parameters of the grid-side inductor, filter capacitor, and machine-side inductor includes:

[0016] The design process of machine-side inductors includes:

[0017] The machine-side inductor is directly connected to the AC terminal of the active front-end rectifier main circuit to suppress high-frequency current ripple generated by pulse width modulation chopping. When the modulation ratio of the fully controlled three-phase rectifier bridge is 0.5, the required minimum inductance value is calculated based on the DC bus voltage, system switching frequency and maximum allowable current ripple peak-to-peak value. The machine-side inductor is the minimum inductance value plus a preset redundancy value.

[0018] The design process of the filter capacitor includes:

[0019] The entire rectifier system is considered as a whole, and a reactive power threshold is set. The reactive power threshold is the proportion of reactive power drawn from the grid that is not used for useful work that cannot be exceeded. The reactive power is evenly distributed to three filter capacitors, and each filter capacitor obtains a first reactive power threshold, a second reactive power threshold, and a third reactive power threshold, respectively.

[0020] Based on fundamental physical formulas, the capacitive reactance of each filter capacitor is calculated according to the first, second, and third reactive power thresholds and the grid frequency. The current flowing through each filter capacitor is calculated based on the phase voltage and capacitive reactance. The reactive power absorbed by each filter capacitor is calculated based on the phase voltage and the current flowing through it. During the calculation process, the capacitance value of each filter capacitor is set as an unknown, and the upper limit of the capacitance value of each filter capacitor is obtained by solving the equations.

[0021] Preferably, step S2 includes:

[0022] The integrated DC-side hybrid harmonic modulation auxiliary circuit includes:

[0023] On the DC bus of the active front-end rectifier main circuit, a harmonic injection unit consisting of a single-phase injection transformer and an auxiliary IGBT is connected in parallel. The harmonic injection unit is used for fine harmonic compensation.

[0024] The harmonic injection unit is connected in parallel across the DC bus capacitor, and an auxiliary IGBT is connected in series on the primary side of the transformer and connected to the DC bus.

[0025] The secondary side of the transformer is directly connected to the DC bus. The switching of the auxiliary IGBT is controlled by a high-frequency pulse width modulation signal, which induces a pulse voltage on the secondary side of the transformer and injects or absorbs harmonic current into the DC bus.

[0026] Preferably, step S3 includes:

[0027] The three-phase grid voltage is sampled by a digital signal processor through a high-precision analog-to-digital converter. The sampled signal data is subjected to multiple delay signal cancellation operations to obtain a pure fundamental voltage signal, which includes a first-phase pure fundamental sinusoidal voltage, a second-phase pure fundamental sinusoidal voltage, and a third-phase pure fundamental sinusoidal voltage. The fundamental voltage signal is input into a phase-locked loop based on a synchronous rotating coordinate system. The d-axis component of the phase-locked loop is stabilized to zero by a PI regulator, and the output phase angle is completely synchronized with the grid fundamental voltage without jitter.

[0028] Preferably, the specific process of multiple delay signal cancellation includes:

[0029] Step S301: Obtain discrete voltage sequences from real-time sampling of the power grid. Each voltage sequence includes the instantaneous voltage values ​​of the first phase, the second phase, and the third phase. Perform a Clarke transform operation on each of the synchronously sampled instantaneous voltage values ​​of the first, second, and third phases using a digital signal processor to output new independent first and second discrete voltage sequences.

[0030] Step S302: Open a first-in-first-out digital buffer in the memory of the digital signal processor, set the length of the digital buffer to be able to store sampled data equal to one-tenth of the fundamental period of the power grid, obtain a digital delay chain with a delay time, input the first discrete voltage sequence and the second discrete voltage sequence into the digital delay chain, and simultaneously obtain the current α-β voltage vector and the past α-β voltage vector after a delay of one-tenth of the fundamental period of the power grid, directly perform vector addition on the current α-β voltage vector and the past α-β voltage vector, and output the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated;

[0031] Step S303: Set the length of the digital buffer in step S302 to be able to store sampled data equal to one-fourteenth of the fundamental period of the power grid, and output the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated as a second discrete voltage sequence with harmonic components eliminated based on the processing in step S302.

[0032] Step S304: Pre-set the gain of the multiple delay signal cancellation operation, multiply the first discrete voltage sequence and the second discrete voltage sequence of the second harmonic cancellation component by the reciprocal of the gain, and obtain the first discrete voltage sequence and the second discrete voltage sequence of the second harmonic cancellation component whose amplitude is completely consistent with the original fundamental component of the power grid.

[0033] The phase delay angle caused by the power grid to the fundamental frequency is preset. By using a digital phase shifting algorithm, the phases of the first discrete voltage sequence and the second discrete voltage sequence are advanced by the same angle to obtain the first discrete voltage sequence and the second discrete voltage sequence with second-order harmonic component elimination that fully compensates for the delay.

[0034] The output includes a first pure discrete voltage sequence and a second pure discrete voltage sequence, both with amplitude and phase completely consistent with the fundamental component of the original grid voltage after compensation for delay.

[0035] Step S305: Perform Clarke inverse transform operation on the first pure discrete voltage sequence and the second pure discrete voltage sequence of each group to output the first phase pure fundamental sinusoidal voltage, the second phase pure fundamental sinusoidal voltage and the third phase pure fundamental sinusoidal voltage.

[0036] Preferably, step S4 includes:

[0037] The voltage outer loop specifically includes:

[0038] The real-time sampled DC bus voltage is compared with a preset voltage threshold. The difference between the DC bus voltage and the preset voltage threshold is used as the error input to the proportional-integral controller, which outputs the first reference value of the d-axis current.

[0039] The inner current loop specifically includes:

[0040] The real-time sampled three-phase AC current is transformed into a synchronous rotating coordinate system based on the phase angle obtained in step S3 through Park transformation to obtain the actual d-axis current and q-axis current. The actual d-axis current is subtracted from the reference value of the d-axis current to obtain the first current error. The q-axis current is set as the second current error. The first current error and the second current error are respectively input into the proportional-integral controller, which outputs the second reference value of the d-axis current and the first reference value of the q-axis current. Through inverse Park transformation, the second reference value of the d-axis current and the first reference value of the q-axis current are converted back into the three-phase AC reference voltage. The three-phase AC reference voltage is then input into the space vector pulse width modulation unit to generate the pulse width modulation signal driving the six IGBTs of the main circuit.

[0041] Preferably, generating the pulse width modulation signal to drive the six IGBTs of the main circuit specifically includes:

[0042] Step S401: The current inner loop controller outputs a discrete reference value sequence, which includes a first phase reference voltage sequence, a second phase reference voltage sequence, and a third phase reference voltage sequence, to represent the expected voltage at the next moment. Clarke transform operation is performed on each set of synchronously sampled reference value sequences to output a spatial reference voltage vector, which includes amplitude and phase angle.

[0043] Step S402: Define a switching function for each arm of the fully controlled three-phase rectifier bridge. When the upper arm is on, the value of the switching function is 1, and when the lower arm is on, the value of the switching function is 0. Map all possible combinations of switching function values ​​to the α-β coordinate system to obtain 8 basic space voltage vectors. The basic space voltage vectors include six non-zero vectors and two zero vectors.

[0044] Step S403: Determine the range of the phase angle of the space reference voltage vector, determine the sector to which the space reference voltage vector belongs, and output an integer representing the current sector number, which is represented by the numbers 1 to 6;

[0045] Step S404: According to the vector composition rule, establish the two-dimensional vector equation as: Space reference voltage vector * switching period = first non-zero vector * duration of action of the first non-zero vector + second non-zero vector * duration of action of the second non-zero vector. Solve the two-dimensional vector equation to obtain the duration of action of the first non-zero vector and the duration of action of the second non-zero vector, and output the duration of action of the first non-zero vector, the duration of action of the second non-zero vector and the total duration of action of the zero vector. The total duration of action of the zero vector is the remaining value after subtracting the duration of action of the first non-zero vector and the duration of action of the second non-zero vector from the switching period. The total duration of action of the zero vector is evenly distributed to the two zero vectors.

[0046] Step S405: Within a switching cycle, arrange the appearance order of the basic space voltage vector in a centrally symmetrical manner, and output a timing table, wherein the timing table specifies the basic space voltage vector applied for a certain time period within a switching cycle.

[0047] Step S406: Translate each basic space voltage vector in the timing table back to the corresponding three-phase switching function. Based on the timing and duration, calculate the total time that the upper transistor of each of the three bridge arms needs to remain on within one switching cycle. Convert the total time into a comparison register value corresponding to the counting cycle of the pulse width modulation timer inside the digital signal processor. Load the calculated comparison register values ​​into the comparison registers of the three independent pulse width modulation channels of the digital signal processor. Automatically compare the count value of the pulse width modulation timer with the comparison register value, generate a pulse width modulation signal with periodic high and low level changes on the corresponding GPIO pin, and output six independent pulse width modulation gate drive signals that can be directly sent to the IGBT driver chip.

[0048] Preferably, step S5 includes:

[0049] The required harmonic current is dynamically calculated based on the higher harmonic components, and the drive signal of the IGBT in the auxiliary circuit is generated based on the harmonic current. The reverse harmonic is injected into the DC bus through the single-phase injection transformer to cancel the residual harmonic.

[0050] In each control cycle, the digital signal processor performs a fast Fourier transform operation on the grid-side current sampled in real time to obtain the amplitude and phase of each harmonic in the grid-side current. The actual value of the target harmonic to be eliminated is subtracted from the expected value to obtain the harmonic difference. Based on the harmonic difference, the harmonic PI regulator calculates the magnitude and phase of the compensation current to be injected. The control command for the magnitude and phase of the compensation current to be injected is converted into the modulation of the duty cycle and phase of the pulse width modulation signal of the auxiliary IGBT.

[0051] Preferably, step S6 includes:

[0052] The DC bus voltage is continuously monitored. When the regenerative energy generated by the DC bus due to load braking increases and exceeds the preset increase threshold, the voltage outer loop controller automatically outputs a current command with a negative sign. The current command drives the current inner loop controller to smoothly transition the main circuit's operating state from rectification to inversion, and feeds the regenerative energy back to the grid in the form of a high-quality sinusoidal current.

[0053] The specific feedback process includes:

[0054] When the load motor decelerates, kinetic energy is converted into electrical energy and fed back to the DC bus. The DC bus voltage rises, and the proportional-integral controller in the outer voltage loop detects an error that becomes negative. At the same time, the second reference value of the output d-axis current also becomes negative. After the inner current loop receives the negative second reference value of the d-axis current, it forces the actual d-axis current to track the negative second reference value of the d-axis current until the DC bus voltage recovers to the first reference value of the d-axis current and the second reference value of the d-axis current returns to a positive value.

[0055] A high-power IGBT rectification system, which performs a high-power IGBT rectification method, includes a main circuit module, an auxiliary circuit module, a mains voltage purification module, and a dual closed-loop collaborative control module.

[0056] The main circuit module is used to construct the active front-end rectifier main circuit to perform AC-DC power conversion. The fully controlled three-phase rectifier bridge composed of six IGBTs serves as the main power topology. The AC side is connected to the power grid through a filter inductor, and the DC side is connected to the DC bus.

[0057] The auxiliary circuit module is used to integrate the DC-side hybrid harmonic modulation auxiliary circuit, including a harmonic injection unit for fine harmonic compensation, which includes a single-phase injection transformer and an auxiliary IGBT connected in parallel across the DC bus.

[0058] The power grid voltage purification module is used to sample the power grid voltage in real time, perform multiple delay signal elimination operations on the sampled signal to filter out harmonic interference signals, obtain a pure fundamental voltage signal, and use the fundamental voltage signal as input to lock the frequency and phase of the power grid fundamental voltage through a phase-locked loop.

[0059] The dual-loop collaborative control module is used to generate drive signals for all IGBTs in the main circuit module and auxiliary circuit module, establish a control structure of voltage outer loop and current inner loop, generate the command amplitude of grid-side active current and ideal sinusoidal current reference waveform, and control the IGBTs in the active front-end rectifier main circuit in real time to force the actual input current to accurately track the sinusoidal current reference waveform.

[0060] The energy feedback module is integrated into the dual closed-loop collaborative control module and is used to realize the feedback management of regenerated energy.

[0061] The beneficial effects of this invention are: this application achieves immunity to grid voltage distortion, deep suppression of grid-side current harmonics, and efficient bidirectional energy management. Through its built-in grid voltage purification module, this application can accurately extract fundamental phase information under severe grid voltage distortion and asymmetry conditions, ensuring the synchronization stability of the control system and the accuracy of current control, minimizing the dependence of rectification technology on grid quality. It integrates the fundamental harmonic suppression capability of the active front-end main circuit with the refined compensation capability of the DC-side hybrid harmonic modulation module. The former eliminates the main low-order harmonics, while the latter dynamically and accurately cancels residual high-order harmonics, achieving full-spectrum purification of the grid-side current, with its total harmonic distortion rate controlled at an extremely low level. The unified dual-loop control architecture seamlessly integrates rectification and energy feedback functions, automatically identifying regenerative conditions and smoothly switching operating modes to efficiently feed regenerative energy back to the grid. This replaces the traditional solution that requires additional braking units and energy-consuming resistors, significantly improving system energy efficiency and reducing hardware costs and size. It constructs a complete technology chain from "severe grid signal purification" to "main circuit coarse adjustment" and then to "auxiliary circuit fine adjustment," forming a logically rigorous, functionally complete, and self-consistent closed-loop control system. It not only solves the limitations of a single technical solution, but also organically combines a variety of advanced control strategies, providing a brand-new, systematic methodology for the field of high-power power conversion, and raising the system's robustness, power quality and energy efficiency to a new level. Attached Figure Description

[0062] Figure 1 This is a basic flowchart illustrating a high-power IGBT rectification method according to an embodiment of the present invention.

[0063] Figure 2 This is a detailed flowchart illustrating a high-power IGBT rectifier system according to an embodiment of the present invention. Detailed Implementation

[0064] To make the above-mentioned objects, features and advantages of the present invention more apparent and understandable, the specific embodiments of the present invention will be described in detail below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments.

[0065] Reference Figure 1 As an embodiment of the present invention, a high-power IGBT rectification method is provided, comprising the following steps:

[0066] Step S1: Construct the active front-end rectifier main circuit;

[0067] Step S2: Integrate DC-side hybrid harmonic modulation auxiliary circuit;

[0068] Step S3: Sample the grid voltage in real time, perform multiple delay signal cancellation operations on the sampled signal to filter out harmonic interference signals, obtain a pure fundamental voltage signal, and use the fundamental voltage signal as input to lock the frequency and phase of the grid fundamental voltage through a phase-locked loop;

[0069] Step S4: Establish the control structure of the voltage outer loop and the current inner loop, generate the command amplitude of the grid-side active current and the ideal sinusoidal current reference waveform, and control the IGBT in the active front-end rectifier main circuit in real time to force the actual input current to accurately track the sinusoidal current reference waveform.

[0070] Step S5: Perform real-time fast Fourier transform analysis on the actual input current on the grid side to identify residual harmonic components;

[0071] Step S6: Implement feedback management of renewable energy.

[0072] This application proposes a highly adaptable active front-end IGBT rectification method that integrates deep harmonic suppression and efficient bidirectional energy flow, enabling stable operation under grid voltage distortion conditions. Accurate extraction of the fundamental phase information ensures the synchronization stability of the control system and the accuracy of current control. A unified dual-loop control architecture seamlessly integrates rectification and energy feedback functions, constructing a complete technical chain from "poor grid signal purification" to "coarse adjustment of the main circuit" and then to "fine adjustment of the auxiliary circuit," forming a logically rigorous, functionally complete, and self-consistent closed-loop control system.

[0073] Step S1 includes:

[0074] The construction of an active front-end rectifier main circuit specifically includes:

[0075] A fully controlled three-phase rectifier bridge composed of six IGBTs is used as the main power topology. Each IGBT is connected in parallel with a freewheeling diode in reverse. An LCL filter is configured at the AC side of the fully controlled three-phase rectifier bridge where it is connected to the power grid for active current waveform control and bidirectional energy flow. The grid-side inductance, filter capacitor and machine-side inductance parameters of the LCL filter are designed according to the system switching frequency and the desired harmonic attenuation rate.

[0076] Active current waveform control does not care about the instantaneous level of the grid voltage. Instead, it uses a pre-set, perfect sine wave target and high-precision, millisecond-level operation to force the actual current drawn from the grid to always be consistent with this perfect target.

[0077] The core idea of ​​bidirectional energy flow is to upgrade the connection between the rectifier and the power grid from a one-way street to a two-way channel with intelligent scheduling.

[0078] The desired harmonic attenuation rate is determined based on the grid connection standards (such as GB / T 14549-93 or IEEE Std 519) for specific harmonics (mainly referring to harmonics at the switching frequency and its harmonics), and the attenuation decibels that the filter needs to provide are determined.

[0079] Compared to traditional L filters, LCL filters have a stronger attenuation capability for switching frequency ripple and can achieve better filtering effects with a smaller inductance value. On the DC side, a large-capacity electrolytic capacitor is connected in parallel to form a DC bus, providing a stable DC voltage to the load.

[0080] This step aims to fundamentally establish an active and controllable power conversion foundation. The uncontrolled rectifier bridge composed of diodes in traditional rectifier devices is replaced with a fully controlled three-phase rectifier bridge composed of six insulated-gate bipolar transistors (IGBTs). These six power transistors, as the core of the circuit, no longer passively conduct based on voltage levels, but instead receive high-speed commands from the control system to precisely turn on and off. This controlled high-speed switching behavior allows the rectifier to actively shape the waveform of the current drawn from the grid according to predetermined goals. To support this high-speed switching and obtain a smooth current at the grid interface, a filter composed of inductors and capacitors is also required at the AC input. This filter can filter out subtle high-frequency disturbances caused by the high-speed operation of the power transistors, ensuring that the current ultimately entering the grid is smooth. By constructing such a main circuit, the problem of traditional rectification methods generating a large number of fifth and seventh harmonics is structurally eliminated, and a physical foundation is laid for subsequent reverse energy transfer to the grid.

[0081] The design process for the parameters of the grid-side inductor, filter capacitor, and machine-side inductor includes:

[0082] The design process of machine-side inductors includes:

[0083] The machine-side inductor is directly connected to the AC terminal of the active front-end rectifier main circuit to suppress the high-frequency current ripple generated by pulse width modulation chopping. When the modulation ratio of the fully controlled three-phase rectifier bridge is 0.5, the minimum required inductance value is calculated based on the DC bus voltage, system switching frequency and maximum allowable peak-to-peak current ripple. The machine-side inductor is the minimum inductance value plus a preset redundancy value.

[0084] During a switching cycle, the voltage across the inductor is approximately the difference between the DC bus voltage and the grid phase voltage. This voltage acts on the inductor to generate a current change. In order to limit the peak-to-peak value of the current ripple within a preset range, the value of the machine-side inductor needs to be large enough.

[0085] When the modulation ratio is around 0.5, the time the IGBT is in the "on" state and the time it is in the "off" state are roughly equal in one switching cycle. This state causes the inductor to experience the largest amplitude and longest duration of positive and reverse voltage pulses in one cycle. According to the inductor volt-second balance principle, this operating condition will generate the highest peak-to-peak high-frequency current ripple in the inductor.

[0086] The maximum permissible current ripple rate refers to the percentage of the peak-to-peak value of the high-frequency ripple generated by the switching action in the output current of the machine-side inductor, which is set between 10% and 20% in this embodiment.

[0087] The design process of the filter capacitor includes:

[0088] The entire rectifier system is considered as a whole. A reactive power threshold is set. The reactive power threshold is the proportion of reactive power drawn from the grid that is not used for useful work that cannot be exceeded. The reactive power is evenly distributed to three filter capacitors. Each filter capacitor obtains a first reactive power threshold, a second reactive power threshold, and a third reactive power threshold, respectively.

[0089] Based on fundamental physical formulas, the capacitive reactance of each filter capacitor is calculated according to the first, second, and third reactive power thresholds and the grid frequency. The current flowing through each filter capacitor is calculated based on the phase voltage and capacitive reactance. The reactive power absorbed by each filter capacitor is calculated based on the phase voltage and the current flowing through it. During the calculation process, the capacitance value of each filter capacitor is set as an unknown, and the upper limit of the capacitance value of each filter capacitor is obtained by solving the equation.

[0090] The reactive power absorbed by a capacitor in an AC circuit is uniquely determined by three physical quantities: the AC voltage across its terminals, the frequency of the AC current, and its own capacitance. The inherent physical relationship is as follows: the reactive power absorbed is proportional to the square of the effective value of the voltage applied across its terminals, proportional to the frequency of the power grid, and also proportional to its own capacitance.

[0091] The phase voltage of the power grid is the voltage applied across each filter capacitor;

[0092] Since the rectifier system is three-phase, this total budget will be evenly distributed across the three filter capacitors, so that each individual capacitor gets its own smaller reactive power budget limit.

[0093] A fundamental physical characteristic of a filter capacitor is that it will inevitably absorb reactive power when connected to an AC power grid. The amount it absorbs depends mainly on two factors: one is the voltage and frequency of the power grid itself, which are constant; the other is the rated capacitance of the capacitor itself. Under fixed power grid conditions, the larger the capacitance of the capacitor, the more reactive power it absorbs.

[0094] When selecting components, the capacitance of the selected filter capacitor must not exceed this calculated upper limit. Although an excessively large capacitor has a better filtering effect, it will absorb too much reactive power at the fundamental frequency (50 Hz), affecting system efficiency and power factor.

[0095] The filter capacitor and the machine-side inductor work together to provide a low-impedance bypass path for the high-frequency harmonic current of the switching frequency, preventing it from flowing into the power grid.

[0096] The LCL filter has an inherent resonant frequency, which is determined by the total inductance and capacitance. The total inductance is the sum of the grid-side inductance and the machine-side inductance. To ensure the stability of the fully controlled three-phase rectifier bridge, the resonant frequency must be placed within a specific range: it must be much higher than the grid fundamental frequency to avoid amplifying low-order background harmonics, and at the same time, it must be much lower than the system switching frequency to avoid interfering with the stability of the control loop. In this embodiment, the resonant frequency is between 500 Hz and 5 kHz.

[0097] The harmonic attenuation capability of an LCL filter mainly depends on its gain at the switching frequency. After determining the initial range of the machine-side inductor and filter capacitor, the value of the grid-side inductor needs to be precisely selected so that the attenuation of the entire filter at the switching frequency meets the design target.

[0098] In this embodiment, there is a proportional relationship between the grid-side inductance and the machine-side inductance: k = grid-side inductance / machine-side inductance. The ratio k affects the height of the resonant peak and the attenuation characteristics. Based on the transfer function of the LCL filter, the value of the grid-side inductance under a given attenuation target is derived. The optimal grid-side inductance value is selected by manually considering the attenuation effect and the voltage drop caused by the total inductance.

[0099] The combination of grid-side inductors and filter capacitors is key to achieving the desired harmonic attenuation rate by performing secondary attenuation on high-frequency harmonic currents that cannot be completely bypassed by the capacitors.

[0100] The design of LCL filters is not a simple matter of parameter selection, but rather follows a rigorous, multi-objective, and systematic design process. Its core objective is to minimize the size, cost, and power loss of the filter while meeting harmonic suppression requirements, and to ensure the stable operation of the entire system.

[0101] Step S2 includes:

[0102] The integrated DC-side hybrid harmonic modulation auxiliary circuit includes:

[0103] On the DC bus of the active front-end rectifier main circuit, a harmonic injection unit consisting of a single-phase injection transformer and an auxiliary IGBT is connected in parallel. The harmonic injection unit is used for fine harmonic compensation.

[0104] The harmonic injection unit is connected in parallel across the DC bus capacitor, and an auxiliary IGBT is connected in series on the primary side of the transformer and connected to the DC bus.

[0105] The secondary side of the transformer is directly connected to the DC bus. The switching of the auxiliary IGBT is controlled by a high-frequency pulse width modulation signal, which induces a pulse voltage on the secondary side of the transformer and injects or absorbs harmonic current into the DC bus.

[0106] The primary circuit of a transformer is the drive circuit or control execution terminal. Its function is to receive commands, obtain energy from the DC bus through the high-speed switching action of the IGBT, and convert it into a high-frequency changing magnetic field in the transformer core.

[0107] The secondary circuit of a transformer is the working circuit or energy interface terminal. Its function is to induce voltage in a changing magnetic field and apply this voltage to the DC bus, thereby realizing the injection or absorption of DC bus current.

[0108] The design principle of the integrated DC-side hybrid harmonic modulation auxiliary circuit is low power and high precision. Its capacity only needs to compensate for residual harmonics, so its size and cost are much lower than the main circuit.

[0109] With the main circuit already achieving good rectification, a more refined regulation method is needed to pursue higher power quality. Specifically, an auxiliary circuit consisting of a single-phase injection transformer and a single insulated-gate bipolar transistor (IGBT) is connected in parallel to the DC bus output from the main circuit. This circuit is much smaller than the main circuit, and its function is not primarily energy conversion, but rather to act as a harmonic compensator. It works by precisely controlling the conduction time and duration of this auxiliary power transistor, allowing the secondary winding of the injection transformer to inject a specially designed small amount of energy containing specific harmonic components into the DC bus. The phase and magnitude of this energy are precisely calculated, with the aim of canceling out any high-order harmonic components that may remain in the main circuit or are introduced by the power grid itself. This is analogous to using a precise reverse waveform to neutralize noise in the system, thereby achieving deep purification of residual harmonics in the DC voltage and AC current.

[0110] Step S3 includes:

[0111] The three-phase grid voltage is sampled by a digital signal processor through a high-precision analog-to-digital converter. The sampled signal data is subjected to multiple delay signal cancellation operations to obtain a pure fundamental voltage signal, which includes a first-phase pure fundamental sinusoidal voltage, a second-phase pure fundamental sinusoidal voltage, and a third-phase pure fundamental sinusoidal voltage. The fundamental voltage signal is input into a phase-locked loop based on a synchronous rotating coordinate system. The d-axis component of the phase-locked loop is stabilized to zero by a PI regulator, and the output phase angle is completely synchronized with the grid fundamental voltage without jitter.

[0112] The prerequisite for all precise control is accurately grasping the real-time state of the controlled object, which in this case is the state of the power grid voltage. However, the actual power grid voltage is not an ideal sine wave and often contains various distortions. Therefore, the control system must have the ability to extract useful information from the contaminated signal. First, the instantaneous value of the three-phase power grid voltage is collected by a voltage sensor. The collected signal is not directly used for subsequent control calculations, but is first sent to a processing unit based on the multiple delay signal cancellation method. This unit can cleverly separate the fundamental voltage signal from the harmonic signals mixed in by delaying the input signal for a specific time and performing a series of addition and subtraction operations on the original signal and the delayed signal. This process can effectively filter out common fifth and seventh harmonic interferences in the power grid voltage. After processing, the system obtains a pure voltage signal that only reflects the change of the fundamental voltage of the power grid. Based on this pure signal, the control system can lock the accurate frequency and phase of the power grid voltage without deviation, providing a stable and reliable synchronous beat for the issuance of all subsequent control commands.

[0113] The specific process of multiple delay signal cancellation includes:

[0114] Step S301: Obtain discrete voltage sequences from real-time sampling of the power grid. Each voltage sequence includes the instantaneous voltage values ​​of the first phase, the second phase, and the third phase. Perform a Clarke transform operation on each of the synchronously sampled instantaneous voltage values ​​of the first, second, and third phases using a digital signal processor to output new independent first and second discrete voltage sequences.

[0115] Clarke transform is a fixed linear algebraic combination. Its physical meaning is to project three voltage vectors that change with time in a three-phase coordinate system onto a stationary two-dimensional rectangular coordinate system composed of the α-axis and β-axis, i.e., the α-β coordinate system.

[0116] These two discrete voltage sequences together completely describe the instantaneous vector state of the grid voltage in a two-dimensional plane. Ideally, this vector should move smoothly in a circle with a constant amplitude and constant angular velocity. However, when the voltage is distorted, the trajectory of this vector will no longer be a perfect circle, but a complex trajectory superimposed with high-frequency jitter and deformation. The goal of subsequent steps is to eliminate these jitters and deformations.

[0117] This step aims to transform the complex three-phase AC voltage system into an equivalent two-dimensional orthogonal coordinate system that is easier to perform vector operations.

[0118] Step S302: In the memory of the digital signal processor, a first-in-first-out digital buffer is allocated. The length of the digital buffer is set to be able to store sampled data equal to one-tenth of the fundamental period of the power grid. A digital delay chain with a delay time is obtained. The first discrete voltage sequence and the second discrete voltage sequence are input into the digital delay chain. At the same time, the current α-β voltage vector and the past α-β voltage vector after a delay of one-tenth of the fundamental period of the power grid are obtained. The current α-β voltage vector and the past α-β voltage vector are directly subjected to vector addition. The first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated are output.

[0119] In this embodiment, one-tenth of the fundamental period of the power grid is 2 milliseconds;

[0120] The underlying physical logic is as follows: for the fifth harmonic, a 2-millisecond delay is exactly half of its own period. This means that the direction of the delayed fifth harmonic vector is exactly opposite to the current fifth harmonic vector. Therefore, when the two vectors are added together, the fifth harmonic components will precisely cancel each other out and be eliminated from the signal.

[0121] The physical characteristic of the fifth harmonic is that it rotates in the α-β coordinate system at a frequency five times that of the fundamental wave in the opposite direction to the fundamental wave. By utilizing this characteristic, a special angle can be rotated through a preset time delay, thereby creating conditions for subsequent vector cancellation.

[0122] Step S303: Set the length of the digital buffer in step S302 to be able to store sampled data equal to one-fourteenth of the fundamental period of the power grid, and output the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated as a second discrete voltage sequence with harmonic components eliminated based on the processing in step S302.

[0123] In order to eliminate harmonics of other frequencies (seventh harmonic), the elimination units in step S302 are connected in series to form a multi-elimination network;

[0124] At this point, the trajectory of the voltage vectors represented by the first and second discrete voltage sequences is very close to a perfect circle.

[0125] Step S304: Pre-set the gain of the multiple delay signal cancellation operation, multiply the first discrete voltage sequence and the second discrete voltage sequence of the second harmonic cancellation component by the reciprocal of the gain, and obtain the first discrete voltage sequence and the second discrete voltage sequence of the second harmonic cancellation component whose amplitude is completely consistent with the original fundamental component of the power grid.

[0126] The phase delay angle caused by the power grid to the fundamental frequency is preset. By using a digital phase shifting algorithm, the phases of the first discrete voltage sequence and the second discrete voltage sequence are advanced by the same angle to obtain the first discrete voltage sequence and the second discrete voltage sequence with second-order harmonic component elimination that fully compensates for the delay.

[0127] The output includes a first pure discrete voltage sequence and a second pure discrete voltage sequence, both with amplitude and phase completely consistent with the fundamental component of the original grid voltage after compensation for delay.

[0128] While eliminating harmonics, the elimination process also causes a slight amplitude attenuation and phase delay to the fundamental component itself. To obtain a flawless fundamental signal, compensation is necessary.

[0129] Step S305: Perform Clarke inverse transform operation on the first pure discrete voltage sequence and the second pure discrete voltage sequence of each group to output the first phase pure fundamental sinusoidal voltage, the second phase pure fundamental sinusoidal voltage and the third phase pure fundamental sinusoidal voltage.

[0130] The final step is to convert the purified two-dimensional vector signal back into a three-phase voltage form. These three digital signal sequences have completely filtered out all target harmonic distortions in the original grid voltage and can serve as an absolutely reliable synchronization reference signal for subsequent phase-locked loops and all control links.

[0131] The core of multiple delay signal cancellation operation is to cancel specific harmonic components by precisely shifting the signal in time and cleverly recombining it mathematically in the digital domain, while completely preserving the original fundamental component.

[0132] Step S4 includes:

[0133] The voltage outer loop specifically includes:

[0134] The real-time sampled DC bus voltage is compared with a preset voltage threshold. The difference between the DC bus voltage and the preset voltage threshold is used as the error input to the proportional-integral controller, which outputs the first reference value of the d-axis current.

[0135] This stage has a relatively slow response time and is used to maintain system power balance and DC voltage stability.

[0136] The inner current loop specifically includes:

[0137] The real-time sampled three-phase AC current is transformed into a synchronous rotating coordinate system based on the phase angle obtained in step S3 through Park transformation to obtain the actual d-axis current and q-axis current. The actual d-axis current is subtracted from the reference value of the d-axis current to obtain the first current error. The q-axis current is set as the second current error. The first current error and the second current error are respectively input into the proportional-integral controller, which outputs the second reference value of the d-axis current and the first reference value of the q-axis current. Through inverse Park transformation, the second reference value of the d-axis current and the first reference value of the q-axis current are converted back into the three-phase AC reference voltage. The three-phase AC reference voltage is then input into the space vector pulse width modulation unit to generate the pulse width modulation signal driving the six IGBTs of the main circuit.

[0138] The d-axis current is the active current, and the q-axis current is the reactive current.

[0139] To simultaneously ensure stable DC output voltage and high-quality AC input current, a two-layer closed-loop control structure is adopted. The outer layer is the voltage control loop, which continuously monitors the actual DC bus voltage and compares it with a pre-set target voltage. If the actual voltage deviates from the target value, the voltage regulator calculates an expected value for the AC current based on the magnitude and direction of the deviation. This expected value is then transmitted as an instruction to the inner control loop, which is the current control loop. After receiving the current magnitude instruction from the outer voltage loop, the inner loop, combined with the clean grid voltage phase information obtained in step S3, generates an ideal sinusoidal current reference value that is in phase with the grid voltage. The current control loop compares the actual input current on the grid side with the reference value in real time and adjusts the switching action of the six IGBTs in the main circuit instantaneously according to the difference. Through this millisecond-level rapid correction, the actual input current is forced to closely follow the ideal sinusoidal template at all times. The combined effect of this dual closed-loop structure is that the DC side voltage is firmly stabilized at the target value, while the AC side input current is also shaped into a standard sine wave with extremely low harmonic content and kept synchronized with the grid voltage.

[0140] The generation of pulse width modulation signals for the six IGBTs driving the main circuit specifically includes:

[0141] Step S401: The current inner loop controller outputs a discrete reference value sequence, which includes a first-phase reference voltage sequence, a second-phase reference voltage sequence, and a third-phase reference voltage sequence, to represent the expected voltage at the next moment. Clarke transform operation is performed on each set of synchronously sampled reference value sequences to output a spatial reference voltage vector, which includes amplitude and phase angle.

[0142] This operation combines three sinusoidal quantities that are 120 degrees out of phase in the time domain into a single rotating vector in the spatial domain. The rotating vector is represented in the α-β coordinate system, and the trajectory of its tip is theoretically a perfect circle. The angular velocity of the rotation is the angular frequency of the power grid. The entire task of the space vector pulse width modulation unit is to accurately reproduce this space reference voltage vector at every instant.

[0143] This step aims to merge three independent, time-varying phase voltage reference values ​​into a unified, rotating single vector in a two-dimensional plane, laying the foundation for subsequent vectorization processing.

[0144] Step S402: Define a switching function for each arm of the fully controlled three-phase rectifier bridge. When the upper arm is on, the value of the switching function is 1, and when the lower arm is on, the value of the switching function is 0. Map all possible combinations of switching function values ​​to the α-β coordinate system to obtain 8 basic space voltage vectors. The basic space voltage vectors include six non-zero vectors and two zero vectors.

[0145] The non-zero vectors have equal magnitudes and differ by 60 degrees in space, together forming the vertices of a regular hexagon. They represent the effective voltage state that the fully controlled three-phase rectifier bridge can output.

[0146] The magnitude of the zero vector is zero, located at the origin of the coordinate system. They correspond to the states of the upper three transistors being fully open ([1,1,1]) or the lower three transistors being fully open ([0,0,0]), respectively. At this time, the three-phase output terminals are short-circuited and no line voltage is generated.

[0147] A fully controlled three-phase rectifier bridge consisting of six IGBTs has a limited number of switching states. The upper and lower transistors of each bridge arm cannot be turned on at the same time; they can only be one on and one off. There are a total of 2³ = 8 legal switching combinations for the three bridge arms. Each combination will generate a specific voltage vector on the AC side.

[0148] Step S403: Determine the range of the phase angle of the space reference voltage vector, determine the sector to which the space reference voltage vector belongs, and output an integer representing the current sector number, which is represented by the numbers 1 to 6;

[0149] The output number directly determines which two non-zero basic vectors will be used as the main components of the synthesis in the next step;

[0150] To synthesize the space reference voltage vector obtained in the first step, it is first necessary to determine which two adjacent non-zero fundamental vectors it falls within at the current instant. This regular hexagon is divided into six sectors by six non-zero vectors. For example, if the phase angle is between 0 and 60 degrees, then the space reference voltage vector is determined to be located within the region bounded by the first non-zero vector. Second nonzero vector The first sector is formed.

[0151] Step S404: According to the vector composition rule, establish the two-dimensional vector equation as: Space reference voltage vector * switching period = first non-zero vector * duration of action of the first non-zero vector + second non-zero vector * duration of action of the second non-zero vector. Solve the two-dimensional vector equation to obtain the duration of action of the first non-zero vector and the duration of action of the second non-zero vector, and output the duration of action of the first non-zero vector, the duration of action of the second non-zero vector and the total duration of action of the zero vector. The total duration of action of the zero vector is the remaining value after subtracting the duration of action of the first non-zero vector and the duration of action of the second non-zero vector from the switching period. The total duration of action of the zero vector is evenly distributed to the two zero vectors.

[0152] Within a switching cycle (e.g., 100 microseconds), by allowing two adjacent non-zero vectors constituting a sector (e.g. and ) and zero vector ( , Each vector is applied for a short period of time, such that the sum of the products of these vectors and their application time is exactly equal to the product of the space reference voltage vector and its entire switching cycle.

[0153] Step S405: Within one switching cycle, arrange the appearance order of the basic space voltage vector in a centrally symmetrical manner, and output a timing table. The timing table specifies the basic space voltage vector applied during a certain time period within one switching cycle.

[0154] For example, the order of appearance in the first sector is:

[0155] ;

[0156] To reduce the number of IGBT switching operations and lower switching losses, a symmetrical seven-segment switching sequence is adopted.

[0157] Step S406: Translate each basic space voltage vector in the timing table back to the corresponding three-phase switching function. Based on the timing and duration, calculate the total time that the upper transistor of each of the three bridge arms needs to remain on within one switching cycle. Convert the total time into a comparison register value corresponding to the counting cycle of the pulse width modulation timer inside the digital signal processor. Load the calculated comparison register values ​​into the comparison registers of the three independent pulse width modulation channels of the digital signal processor. Automatically compare the count value of the pulse width modulation timer with the comparison register value, generate a pulse width modulation signal with periodic high and low level changes on the corresponding GPIO pin, and output six independent pulse width modulation gate drive signals that can be directly sent to the IGBT driver chip.

[0158] These six signals precisely control the switching on and off of the six IGBTs in the main circuit every microsecond, thereby achieving a precise reproduction of the ideal three-phase sinusoidal reference voltage on a macroscopic level.

[0159] The final step is to convert this abstract timing table into specific values ​​that can be directly used by the pulse width modulation hardware module inside the digital signal processor.

[0160] The fundamental goal of generating pulse width modulation signals to drive the six IGBTs in the main circuit is to transform a continuously changing, ideal three-phase sinusoidal voltage reference command into a series of discrete, high-frequency switching state commands to drive the six IGBTs in the main circuit. The core idea is to equivalently synthesize a target voltage vector of arbitrary direction and amplitude by cleverly combining a limited number of basic switching states of the rectifier bridge within each extremely short switching cycle.

[0161] Step S5 includes:

[0162] The required harmonic current is dynamically calculated based on the higher harmonic components, and the drive signal of the IGBT in the auxiliary circuit is generated based on the harmonic current. The reverse harmonic is injected into the DC bus through the single-phase injection transformer to cancel the residual harmonic.

[0163] In each control cycle, the digital signal processor performs a fast Fourier transform operation on the grid-side current sampled in real time to obtain the amplitude and phase of each harmonic in the grid-side current. The actual value of the target harmonic to be eliminated is subtracted from the expected value to obtain the harmonic difference. Based on the harmonic difference, the harmonic PI regulator calculates the magnitude and phase of the compensation current to be injected. The control command for the magnitude and phase of the compensation current to be injected is converted into the modulation of the duty cycle and phase of the pulse width modulation signal of the auxiliary IGBT.

[0164] In this embodiment, the expected value is 0;

[0165] Through this closed-loop feedback, the auxiliary circuit can dynamically adapt to changes in system operating conditions and accurately and in real time eliminate residual harmonics at specific points.

[0166] While the main circuit operates stably under dual closed-loop control, the DC-side hybrid harmonic modulation auxiliary circuit is managed collaboratively. Spectral analysis of the AC input current is continuously performed to determine if any specific high-order harmonics requiring elimination exist. Once a target harmonic is detected, the required amount of reverse harmonic energy to cancel it is immediately calculated. This energy requirement is then translated into a precise on-time command for the IGBT in the auxiliary circuit, issuing a precise switching signal to drive the IGBT to conduct at a specific moment within each grid cycle. The duration of this on-time is also rigorously calculated. In this way, the auxiliary circuit can inject the necessary harmonic energy into the DC bus for cancellation precisely and on demand. This process is synchronized with and complements the main circuit control, working together to achieve ultimate optimization of power quality.

[0167] Step S6 includes:

[0168] The DC bus voltage is continuously monitored. When the regenerative energy generated by the DC bus due to load braking increases and exceeds the preset increase threshold, the voltage outer loop controller automatically outputs a current command with a negative sign. The current command drives the current inner loop controller to smoothly transition the main circuit's operating state from rectification to inversion, and feeds the regenerative energy back to the grid in the form of a high-quality sinusoidal current.

[0169] The specific feedback process includes:

[0170] When the load motor decelerates, kinetic energy is converted into electrical energy and fed back to the DC bus. The DC bus voltage rises, and the proportional-integral controller in the outer voltage loop detects an error that becomes negative. At the same time, the second reference value of the output d-axis current also becomes negative. After the inner current loop receives the negative second reference value of the d-axis current, it forces the actual d-axis current to track the negative second reference value of the d-axis current until the DC bus voltage recovers to the first reference value of the d-axis current and the second reference value of the d-axis current returns to a positive value.

[0171] In a synchronous rotating coordinate system, a negative d-axis current means that active power flows from the DC side to the AC side. The entire control system does not need to switch logic or mode. It automatically and smoothly switches the main circuit from rectification state to inverter state and sends the regenerated energy back to the grid in the form of unity power factor until the DC bus voltage recovers to near the first reference value of the d-axis current and the second reference value of the d-axis current returns to a positive value that matches the load.

[0172] In certain applications, such as when a drive motor is decelerating or braking, the load can feed energy back to the rectifier. This energy is called regenerative energy. If left unmanaged, this energy can cause a sharp rise in the DC bus voltage, potentially damaging the equipment. This method effectively utilizes this energy. Specifically, it involves continuous monitoring of the DC bus voltage. Once an abnormal rise in voltage due to energy feedback is detected and exceeds the normal threshold, the main circuit's operating mode is immediately switched. At this point, the voltage-current dual closed-loop control strategy, originally used to regulate the input current, automatically adjusts its control objective to output current to the grid. Under this new objective, the switching of the six IGBTs in the main circuit is precisely controlled, converting the regenerative energy collected on the DC bus into a high-quality sinusoidal current in phase with the grid voltage, which is then smoothly fed back into the AC grid. This process not only effectively suppresses excessive DC voltage rises and ensures system safety, but also converts potentially wasted braking energy into reusable electrical energy, significantly improving energy efficiency.

[0173] A high-power IGBT rectification system, which performs a high-power IGBT rectification method, includes a main circuit module, an auxiliary circuit module, a mains voltage purification module, and a dual closed-loop collaborative control module.

[0174] The main circuit module is used to construct the active front-end rectifier main circuit to perform AC-DC power conversion. The fully controlled three-phase rectifier bridge composed of six IGBTs serves as the main power topology. The AC side is connected to the power grid through a filter inductor, and the DC side is connected to the DC bus.

[0175] The auxiliary circuit module is used to integrate the DC-side hybrid harmonic modulation auxiliary circuit, including a harmonic injection unit for fine harmonic compensation, which includes a single-phase injection transformer and an auxiliary IGBT connected in parallel across the DC bus.

[0176] The grid voltage purification module is used to sample the grid voltage in real time, perform multiple delay signal elimination operations on the sampled signal to filter out harmonic interference signals, obtain a pure fundamental voltage signal, and use the fundamental voltage signal as input to lock the frequency and phase of the grid fundamental voltage through a phase-locked loop.

[0177] The dual-loop collaborative control module is used to generate drive signals for all IGBTs in the main circuit module and auxiliary circuit module, establish a control structure of voltage outer loop and current inner loop, generate the command amplitude of grid-side active current and ideal sinusoidal current reference waveform, and control the IGBTs in the active front-end rectifier main circuit in real time to force the actual input current to accurately track the sinusoidal current reference waveform.

[0178] The energy feedback module is integrated into the dual closed-loop collaborative control module to realize the feedback management of regenerative energy.

[0179] This application achieves immunity to grid voltage distortion, deep suppression of grid-side current harmonics, and efficient bidirectional energy management. Through its built-in grid voltage purification module, this application can accurately extract fundamental phase information under severe grid voltage distortion and asymmetry conditions, ensuring the synchronization stability of the control system and the accuracy of current control, minimizing the dependence of rectification technology on grid quality. It integrates the fundamental harmonic suppression capability of the active front-end main circuit with the refined compensation capability of the DC-side hybrid harmonic modulation module. The former eliminates the main low-order harmonics, while the latter dynamically and accurately cancels residual high-order harmonics, achieving full-spectrum purification of the grid-side current, with its total harmonic distortion rate controlled at an extremely low level. The unified dual-loop control architecture seamlessly integrates rectification and energy feedback functions, automatically identifying regenerative conditions and smoothly switching operating modes to efficiently feed regenerative energy back to the grid. This replaces the traditional solution that requires additional braking units and energy-consuming resistors, significantly improving system energy efficiency and reducing hardware costs and size. It constructs a complete technology chain from "severe grid signal purification" to "main circuit coarse adjustment" and then to "auxiliary circuit fine adjustment," forming a logically rigorous, functionally complete, and self-consistent closed-loop control system. It not only solves the limitations of a single technical solution, but also organically combines a variety of advanced control strategies, providing a brand-new, systematic methodology for the field of high-power power conversion, and raising the system's robustness, power quality and energy efficiency to a new level.

[0180] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, systems, or computer program products. Therefore, the present invention can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention can take the form of a computer program product implemented on one or more computer-usable storage media containing computer-usable program code. The storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as Static Random Access Memory (SRAM), Electrically Erasable Programmable Read-Only Memory (EEPROM), Erasable Programmable Read Only Memory (EPROM), Programmable Red-Only Memory (PROM), Read-Only Memory (ROM), magnetic storage, flash memory, magnetic disk, or optical disk. These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0181] It should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications or substitutions should be covered within the scope of the claims of the present invention.

Claims

1. A high-power IGBT rectification method, characterized by, The method comprises the following steps: Step S1: constructing an active front-end rectification main circuit; Step S2: integrating a DC side hybrid harmonic modulation auxiliary circuit; Step S3: sampling a grid voltage in real time, performing multiple delay signal cancellation operations on the sampled signals, filtering out harmonic interference signals, obtaining a pure fundamental voltage signal, and taking the fundamental voltage signal as an input, and locking the frequency and phase of the grid fundamental voltage through a phase-locked loop; Step S4: establishing a voltage outer loop and a current inner loop control structure, generating an instruction amplitude of a grid-side active current and an ideal sinusoidal current reference waveform, and controlling IGBT in the active front-end rectification main circuit in real time to force the actual input current to accurately track the sinusoidal current reference waveform; Step S5: performing real-time fast Fourier transform analysis on the actual input current on the grid side to identify residual harmonic components; Step S6: realizing feedback management of regenerative energy; The specific process of the multiple delay signal cancellation operation comprises: Step S301: obtaining discrete voltage sequences from real-time sampling of the grid, each group of voltage sequences comprising a first-phase instantaneous voltage value, a second-phase instantaneous voltage value and a third-phase instantaneous voltage value, performing a Clarke transformation operation on each group of synchronously sampled first-phase instantaneous voltage values, second-phase instantaneous voltage values and third-phase instantaneous voltage values through a digital signal processor to output new independent first discrete voltage sequences and second discrete voltage sequences; Step S302: opening a first-in-first-out digital buffer in the memory of the digital signal processor, setting the length of the digital buffer to be able to store sampling data equal to one-tenth of the grid fundamental period, obtaining a digital delay chain of the delay time, inputting the first discrete voltage sequences and the second discrete voltage sequences into the digital delay chain, and simultaneously obtaining a current α-β voltage vector and a past α-β voltage vector delayed by one-tenth of the grid fundamental period, and directly performing vector addition operation on the current α-β voltage vector and the past α-β voltage vector to output the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed; Step S303: setting the length of the digital buffer in step S302 to be able to store sampling data equal to one-fourteenth of the grid fundamental period, and outputting the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed as the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed twice based on the processing process of step S302; Step S304: setting the gain of the multiple delay signal cancellation operation in advance, multiplying the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed twice by the inverse of the gain to obtain the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed twice, the amplitude of which is restored to be completely consistent with the original fundamental component of the grid; pre-setting an angle of the phase delay of the grid on the fundamental frequency, and leading the phase of the first discrete voltage sequences and the second discrete voltage sequences by one identical angle through a digital phase shift algorithm to obtain the first discrete voltage sequences and the second discrete voltage sequences with harmonic components removed twice, which are completely compensated for delay; The first pure discrete voltage sequence and the second pure discrete voltage sequence, which are output after compensation of delay, have the same amplitude and phase as the fundamental component in the original grid voltage; Step S305: performing Clarke inverse transformation operation on the first pure discrete voltage sequence and the second pure discrete voltage sequence of each group, and outputting a first-phase pure fundamental sine voltage, a second-phase pure fundamental sine voltage and a third-phase pure fundamental sine voltage.

2. The method of claim 1, wherein the high power IGBT rectification method is characterized by, The step S1 comprises: The active front-end rectifier main circuit comprises: A full-controlled three-phase rectifier bridge composed of six IGBTs is used as the main power topology, each IGBT is reversely connected in parallel with a freewheeling diode, and an LCL type filter is configured at the AC side of the full-controlled three-phase rectifier bridge and connected to the grid, which is used for active current waveform control and bidirectional energy flow, and the grid-side inductance, filter capacitance and machine-side inductance parameters of the LCL type filter are designed according to the system switching frequency and the expected harmonic attenuation rate; The design process of the grid-side inductance, filter capacitance and machine-side inductance parameters comprises: The design process of the machine-side inductance comprises: The machine-side inductance is directly connected to the AC end of the active front-end rectifier main circuit and is used for suppressing the high-frequency current ripple generated by pulse width modulation chopping, when the modulation ratio of the full-controlled three-phase rectifier bridge is 0.5, the required minimum inductance value is calculated according to the DC bus voltage, the system switching frequency and the maximum allowed current ripple peak-to-peak value, and the machine-side inductance is the value of the minimum inductance value plus a preset redundancy value; The design process of the filter capacitance comprises: The entire rectification system is regarded as a whole, a reactive power threshold is set, the reactive power threshold is a proportion that cannot be exceeded by the reactive power absorbed from the grid and not used for useful work, the reactive power is evenly distributed to the three filter capacitors, and each filter capacitor obtains a first reactive power threshold, a second reactive power threshold and a third reactive power threshold; Based on the physical basic formula, the capacitive reactance of each filter capacitor is calculated according to the first reactive power threshold, the second reactive power threshold, the third reactive power threshold and the grid frequency of the filter capacitor, the current flowing through each filter capacitor is calculated according to the phase voltage and the capacitive reactance, and the reactive power absorbed by each filter capacitor is calculated according to the phase voltage and the current flowing through, in the calculation process, the capacitance value of each filter capacitor is set as an unknown number, and the upper limit of the capacitance value of each filter capacitor is obtained by solving the equation.

3. The method of claim 2, wherein the high power IGBT rectification method is characterized by, The step S2 comprises: The integrated DC side hybrid harmonic modulation auxiliary circuit comprises: A harmonic injection unit composed of a single-phase injection transformer and an auxiliary IGBT is connected in parallel on the DC bus of the active front-end rectifier main circuit, and the harmonic injection unit is used for fine harmonic compensation; The harmonic injection unit is connected in parallel across the DC bus capacitor, the primary side of the transformer is connected in series with an auxiliary IGBT and connected to the DC bus; The secondary side of the transformer is directly connected across the DC bus, the on-off of the auxiliary IGBT is controlled by a high-frequency pulse width modulation signal, a pulse voltage is induced on the secondary side of the transformer, and harmonic current is injected or absorbed to the DC bus.

4. The method of claim 3, wherein the high power IGBT rectification method is characterized by, The step S3 comprises: The three-phase power grid voltage is sampled by a digital signal processor through a high-precision analog-to-digital converter, and a multiple-delay signal elimination operation is performed on the sampled signal data to obtain a pure fundamental voltage signal, the fundamental voltage signal including a first-phase pure fundamental sine voltage, a second-phase pure fundamental sine voltage and a third-phase pure fundamental sine voltage, the fundamental voltage signal being input into a phase-locked loop based on a synchronous rotating coordinate system, a PI regulator being used to stabilize the d-axis component of the phase-locked loop to zero, and a phase angle completely synchronized with the power grid fundamental voltage and free of jitter being output.

5. The method of claim 4, wherein the high power IGBT rectification method is characterized by, The step S4 comprises: The voltage outer loop specifically comprises: The real-time sampled DC bus voltage is compared with the preset voltage threshold, and the difference between the DC bus voltage and the preset voltage threshold is taken as an error input into a proportional-integral controller to output a first reference value of the d-axis current; The current inner loop specifically comprises: The real-time sampled three-phase alternating current is converted into the synchronous rotating coordinate system through Park transformation based on the phase angle obtained in the step S3 to obtain actual d-axis current and q-axis current, the actual d-axis current is subtracted from the reference value of the d-axis current to obtain a first current error, the q-axis current is taken as a second current error, the first current error and the second current error are input into proportional-integral controllers respectively to output a second reference value of the d-axis current and a first reference value of the q-axis current, the second reference value of the d-axis current and the first reference value of the q-axis current are converted back into three-phase alternating reference voltage through inverse Park transformation, and the three-phase alternating reference voltage is input into a space vector pulse width modulation unit to generate pulse width modulation signals for driving the six IGBTs of the main circuit.

6. The method of claim 5, wherein the high power IGBT rectification method is characterized by, The pulse width modulation signals for driving the six IGBTs of the main circuit specifically comprise: Step S401: a discrete reference value sequence is output by the current inner loop controller, the reference value sequence including a first-phase reference voltage sequence, a second-phase reference voltage sequence and a third-phase reference voltage sequence, and being used to represent the expected voltage at the next moment, Clarke transformation operation is performed on each set of synchronously sampled reference value sequences respectively to output a space reference voltage vector, the space reference voltage vector including an amplitude and a phase angle; Step S402: a switching function is defined for each bridge arm of the fully-controlled three-phase rectifier bridge, the value of the switching function being 1 when the upper tube is turned on and the value of the switching function being 0 when the lower tube is turned on, all possible combinations of the values of the switching functions are mapped into an α-β coordinate system respectively to obtain eight basic space voltage vectors, the basic space voltage vectors including six non-zero vectors and two zero vectors; Step S403: the range where the phase angle of the space reference voltage vector is located is determined, the sector to which the space reference voltage vector belongs is determined, an integer representing the current sector number is output, and the sector number is represented by numbers 1 to 6. Step S404: According to the vector composition rule, a two-dimensional vector equation is established: space reference voltage vector * switching period = first non-zero vector * action time length of first non-zero vector + second non-zero vector * action time length of second non-zero vector, the two-dimensional vector equation is solved to obtain the action time length of the first non-zero vector and the action time length of the second non-zero vector, and the action time length of the first non-zero vector, the action time length of the second non-zero vector and the total action time length of the zero vector are outputted, the total action time length of the zero vector is the remaining value of the switching period respectively minus the action time length of the first non-zero vector and the action time length of the second non-zero vector, and the total action time length of the zero vector is evenly divided into two zero vectors; Step S405: In a switching period, the order of the basic space voltage vector is arranged in a central symmetric manner, and a time sequence table is outputted, wherein the time sequence table defines the basic space voltage vector applied in a certain time period in a switching period; Step S406: Each basic space voltage vector in the time sequence table is translated into a corresponding three-phase switching function, and according to the time sequence and the time length, the total time that the three bridge arms need to be kept on in a switching period is calculated, the total time is converted into a comparison register value corresponding to the counting period of the pulse width modulation timer inside the digital signal processor, the calculated comparison register value is loaded into the comparison register of three independent pulse width modulation channels of the digital signal processor, the counting value of the pulse width modulation timer is compared with the comparison register value, a pulse width modulation signal with periodically changing high and low levels is generated on the corresponding GPIO pin, and six independent pulse width modulation gate drive signals which can be directly sent to the IGBT driving chip are outputted.

7. The method of claim 6, wherein the high power IGBT rectification method is characterized by, Step S5 includes: The required compensation harmonic current is dynamically calculated according to the high-order harmonic component, a driving signal of an IGBT in an auxiliary circuit is generated based on the harmonic current, an anti-phase harmonic is injected into a DC bus through a single-phase injection transformer, and residual harmonics are offset; In each control period, the digital signal processor performs a fast Fourier transform operation on the real-time sampled grid-side current to obtain the amplitude and phase of each harmonic in the grid-side current, subtracts the actual value of a target harmonic which needs to be eliminated from the expected value to obtain a harmonic difference value, calculates the compensation current size and phase to be injected based on the harmonic difference value by using a harmonic PI regulator, and converts the control instruction of the compensation current size and phase to be injected into the duty cycle and phase modulation of the pulse width modulation signal of the auxiliary IGBT.

8. The method of claim 7, wherein the high power IGBT rectification method is characterized by, The step S6 includes: The DC bus voltage is continuously monitored, when the regenerative energy generated due to load braking is increased and exceeds a preset increase threshold, a voltage outer loop controller automatically outputs a current instruction with a negative sign, the current instruction drives a current inner loop controller to smoothly transition the working state of the main circuit from rectification to inversion, and the regenerative energy is fed back to the grid in the form of high-quality sinusoidal current; The specific process of feedback includes: When the load motor decelerates, kinetic energy is converted into electric energy and fed back to the DC bus, the DC bus voltage rises, the proportional integral controller of the voltage outer ring detects that the error becomes negative, and the output of the second reference value of the d-axis current also becomes negative, and after the current inner ring receives the second reference value of the negative d-axis current, the actual d-axis current is forced to track the second reference value of the negative d-axis current until the DC bus voltage returns to the first reference value of the d-axis current and the second reference value of the d-axis current returns to positive.

9. A high-power IGBT rectification system for performing a high-power IGBT rectification method, characterized by, The main circuit module, the auxiliary circuit module, the grid voltage purification module and the double-loop cooperative control module are included. The main circuit module is used for constructing an active front-end rectification main circuit and performing AC-DC power conversion, a full-controlled three-phase rectification bridge composed of six IGBTs is used as a main power topology, an AC side is connected to a grid through a filter inductor, and a DC side is connected to a DC bus; The auxiliary circuit module is used for integrating a DC side hybrid harmonic modulation auxiliary circuit, including a harmonic injection unit for fine harmonic compensation, and including a single-phase injection transformer and an auxiliary IGBT connected in parallel to both ends of the DC bus; The grid voltage purification module is used for sampling a grid voltage in real time, performing multiple delay signal elimination operations on the sampled signals, filtering out harmonic interference signals, obtaining a pure fundamental voltage signal, and taking the fundamental voltage signal as an input to lock the frequency and phase of the grid fundamental voltage through a phase-locked loop; The double-loop cooperative control module is used for generating driving signals of all IGBTs in the main circuit module and the auxiliary circuit module, establishing a control structure of a voltage outer ring and a current inner ring, generating an instruction amplitude of a grid-side active current and an ideal sinusoidal current reference waveform, and controlling IGBTs in the active front-end rectification main circuit in real time to force an actual input current to accurately track the sinusoidal current reference waveform. The energy feedback module is integrated in the double-loop cooperative control module and is used for feedback management of regenerative energy. The specific process of the multiple delay signal elimination operation includes: Step S301: discrete voltage sequences are obtained by real-time sampling from a grid, each group of voltage sequences includes a first-phase instantaneous voltage value, a second-phase instantaneous voltage value and a third-phase instantaneous voltage value, a Clarke transformation operation is performed on each group of synchronously sampled first-phase instantaneous voltage values, second-phase instantaneous voltage values and third-phase instantaneous voltage values by a digital signal processor, and new independent first discrete voltage sequences and second discrete voltage sequences are output; Step S302: a first-in-first-out digital buffer is opened in the memory of the digital signal processor, the length of the digital buffer is set to be able to store sampling data equal to one-tenth of the grid fundamental period, a digital delay chain with a delay time is obtained, the first discrete voltage sequences and the second discrete voltage sequences are input into the digital delay chain, the current alpha-beta voltage vector and the past alpha-beta voltage vector delayed by one-tenth of the grid fundamental period are obtained at the same time, and the current alpha-beta voltage vector and the past alpha-beta voltage vector are directly subjected to vector addition operation, and the first discrete voltage sequences and the second discrete voltage sequences with harmonic components eliminated are output. Step S303: Set the length of the digital buffer in step S302 to be able to store the sampling data equal to the time of one fourteenth of the fundamental period of the power grid, and output the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated based on the processing procedure of step S302 as the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated twice; Step S304: Pre-set the gain of the multiple delay signal elimination operation, multiply the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated twice by the inverse of the gain, to obtain the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated twice, whose amplitudes are restored to be completely consistent with the original fundamental component of the power grid; Pre-set the angle of the phase delay caused by the fundamental frequency of the power grid, and advance the phase of the first discrete voltage sequence and the second discrete voltage sequence by the same angle through a digital phase shift algorithm, to obtain the first discrete voltage sequence and the second discrete voltage sequence with harmonic components eliminated twice, which are completely compensated for delay; Output the first pure discrete voltage sequence and the second pure discrete voltage sequence after compensation for delay, whose amplitudes and phases are completely consistent with the fundamental component in the original power grid voltage; Step S305: Perform Clarke inverse transformation operation on the first pure discrete voltage sequence and the second pure discrete voltage sequence of each group, and output the first phase pure fundamental sine voltage, the second phase pure fundamental sine voltage, and the third phase pure fundamental sine voltage.

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