Method for depositing metal layer in TSV through hole through double-sided chemical plating
By employing underwater inversion and vacuum-assisted processing, the problems of poor film quality and high cost in the TSV process were solved, achieving highly uniform and continuous metal deposition within TSV vias, reducing costs and improving process efficiency.
Patent Information
- Application Number
- CN202511143703.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-08-15
- Publication Date
- 2025-12-16
AI Technical Summary
In existing technologies, the TSV process suffers from poor film quality due to the need for multiple sputtering processes and high costs and discontinuous coatings due to the need for two separate processes in traditional chemical plating, making it difficult to achieve highly uniform and continuous metal deposition in deep holes.
A liquid-liquid flipping method is used to perform vacuum treatment with tetramethylammonium hydroxide solution, alkaline cleaning, catalyst application and post-activation on silicon wafers. Combined with 180° periodic flipping, a double-sided chemical plating deposition of metal layers is achieved in the TSV through-holes.
It achieves high uniformity and high step coverage of the metal layer inside the TSV via, reduces process flow and chemical reagent consumption, lowers costs, and achieves high reliability deposition with nanoscale precision without the need for expensive equipment upgrades.
Smart Images
Figure FT_1 
Figure FT_2 
Figure FT_3
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the field of microelectronic manufacturing technology, in particular to a method for depositing metal layer inside TSV via by double-sided electroless plating. Through-Silicon-Via (TSV) technology is the key of three-dimensional integration technology, which realizes the chip stacking in vertical direction and greatly improves the integration of circuit, and also improves the signal transmission speed by shortening the interconnection distance between chips, so as to improve the quality and performance of the overall system. In recent years, it has been developed rapidly and the process technology has become increasingly mature.
[0002] As an important part of TSV process flow, the sidewall metallization process plays a role of "connecting the past and the future". In the previous preparation of dielectric layer, due to the material and thickness of the dielectric layer, if it is directly contacted with some metals such as copper, diffusion will occur, which will cause a significant decrease in the electrical properties (such as leakage) of the structure. At the same time, due to the poor adhesion between some dielectric layer materials (such as high polymers) and inorganic elements or metal layers, there will also be some problems of structural stability. Therefore, between the preparation of dielectric layer and conductive filling, the preparation of barrier layer is needed to ensure the anti-diffusion effect of the structure, the preparation of adhesion layer is needed to ensure the adhesion and structural stability between the layers of the structure, and the preparation of seed layer is needed to ensure the normal plating of electroplating.
[0003] At present, the barrier layer and seed layer of the via sidewall are mainly prepared by sputtering process. Since the sputtering process cannot consider the front and back of the via structure, it is necessary to sputter the front and back once respectively. If the barrier layer and the seed layer are prepared respectively, a total of four times of sputtering is needed to complete the preparation of the barrier layer and the seed layer of the via sidewall. In addition, the thin film obtained by sputtering has general quality, has certain continuity problem, and it is difficult to ensure the thickness of each part of the thin film.
[0004] Chemical plating is a technology that does not need external power supply to drive, and deposits metal plating layer on the surface of the substrate through spontaneous oxidation-reduction reaction in the solution. When traditional chemical plating is used for TSV metallization, one side needs to be plated first, and then the other side needs to be plated after cleaning, i.e. the front and back of the silicon wafer need to be treated independently twice, which doubles the process flow, consumes time and costs. In addition, due to the difficulty of solution exchange in the deep hole of TSV, the plating layer at the hole bottom and corner is too thin or even discontinuous (low step coverage), the gas bubble in the hole hinders the diffusion of metal ions, forming a cavity (gas bubble retention), and the traditional chemical plating is sensitive to process parameters, it is difficult to control the continuity and uniformity of the 40nm ultra-thin plating layer, and pinholes or island-like growth are prone to occur. SUMMARY
[0005] The present application aims to at least solve one of the above technical problems in the prior art. To this end, one of the objects of the present application is to provide a method for double-sided electroless deposition of a metal layer inside a TSV via.
[0006] A second object of the present application is to provide a device for a method for double-sided electroless deposition of a metal layer inside a TSV via.
[0007] A third object of the present application is to provide a TSV metal layer structure.
[0008] To achieve the above objects, the technical solution adopted by the present application is as follows: The first aspect of the present application provides a method for double-sided electroless deposition of a metal layer inside a TSV via, comprising the following steps: S1, immerse a silicon wafer containing a TSV via in a tetramethylammonium hydroxide solution and perform vacuum treatment; S2, immerse the silicon wafer treated in step S1 in an alkaline cleaning solution; S3, immerse the silicon wafer treated in step S2 in a catalyst solution; S4, immerse the silicon wafer treated in step S3 in a post-activator solution; S5, immerse the silicon wafer treated in step S4 in an electroless plating solution to reduce and deposit a metal layer inside the TSV via; In steps S1-S5, the silicon wafer is periodically flipped 180° under the liquid surface, so that the front and back surfaces of the silicon wafer are subjected to the same treatment.
[0009] In some embodiments of the present application, the aspect ratio of the TSV via is (3-5): 1.
[0010] In some embodiments of the present application, in step S1, the concentration of the tetramethylammonium hydroxide solution is 2wt%-3wt%.
[0011] In some preferred embodiments of the present application, in step S1, the concentration of the tetramethylammonium hydroxide solution is 2.3wt%-2.5wt%.
[0012] In some embodiments of the present application, in step S1, the vacuum degree of the vacuum treatment is less than 10kPa.
[0013] In some preferred embodiments of the present application, in step S1, the vacuum degree of the vacuum treatment is 5-10kPa.
[0014] In some embodiments of the present application, in step S1, the time interval for flipping the silicon wafer is ≤10min, and the number of flips is ≥1.
[0015] In some preferred embodiments of the present application, in step S1, the time interval for turning over the silicon wafer is 5-10 min, and the number of times for turning over is 1.
[0016] In some embodiments of the present application, in step S2, the temperature for cleaning the through holes is 40-60℃.
[0017] In some preferred embodiments of the present application, in step S2, the temperature for cleaning the through holes is 45-55℃.
[0018] In some embodiments of the present application, in step S2, the alkaline cleaning solution is heated by water bath.
[0019] In some embodiments of the present application, in step S2, the time interval for turning over the silicon wafer is 1-3 min, and the number of times for turning over is ≥1.
[0020] In some preferred embodiments of the present application, in step S2, the time interval for turning over the silicon wafer is 1-2 min, and the number of times for turning over is 1.
[0021] In some embodiments of the present application, in step S2, the alkaline cleaning solution comprises an aqueous solution of Melplate PC-6160A and Melplate PC-6160B, and the volume ratio of Melplate PC-6160A to Melplate PC-6160B in the aqueous solution is (2-3): 1.
[0022] In some embodiments of the present application, the aqueous solution of Melplate PC-6160A and Melplate PC-6160B is prepared by a method comprising the following steps: mixing Melplate PC-6160A and Melplate PC-6160B according to a volume ratio of (2-3): 1, and then diluting with water by 120-170 times.
[0023] Specifically, the alkaline cleaning solution functions to remove organic contamination and perform micro-etching activation. In addition to the aqueous solution of Melplate PC-6160A and Melplate PC-6160B, any alkaline cleaning solution meeting the functional equivalence and process compatibility requirements in the technical field can be used.
[0024] In some embodiments of the present application, in step S2, after the cleaning of the through holes, the silicon wafer is further subjected to a rinsing operation.
[0025] In some embodiments of the present application, in step S3, the time interval for turning over the silicon wafer is 1-3 min, and the number of times for turning over is ≥1.
[0026] In some preferred embodiments of the present application, in step S3, the time interval for turning over the silicon wafer is 1-2 min, and the number of times of turning over is 1.
[0027] In some embodiments of the present application, in step S3, the catalyst solution comprises a palladium chloride colloidal solution.
[0028] Specifically, the catalyst solution provides reactive sites for the medium layer, and catalyst solutions meeting functional equivalence and process compatibility requirements in the technical field can be used in addition to the above-mentioned palladium chloride colloidal solution.
[0029] In some embodiments of the present application, in step S3, after the catalyst is adsorbed on the inner wall of the through hole, the silicon wafer is cleaned.
[0030] In some embodiments of the present application, in step S4, the time interval for turning over the silicon wafer is 1-3 min, and the number of times of turning over is ≥1.
[0031] In some preferred embodiments of the present application, in step S4, the time interval for turning over the silicon wafer is 1-2 min, and the number of times of turning over is 1.
[0032] In some embodiments of the present application, in step S4, the post-activator solution comprises a Melplate PA-7340 and KOH aqueous solution.
[0033] In some embodiments of the present application, the Melplate PA-7340 and KOH aqueous solution is prepared by a method comprising the following steps: mixing Melplate PA-7340 and 0.1 mol / L KOH solution according to a volume ratio of (15-25) : 1, and diluting with water by 35-45 times to obtain the Melplate PA-7340 and KOH aqueous solution.
[0034] Specifically, the post-activator solution is a weak etchant for selectively removing unadsorbed catalyst, and catalyst solutions meeting functional equivalence and process compatibility requirements in the technical field can be used in addition to the above-mentioned Melplate PA-7340 and KOH aqueous solution.
[0035] In some embodiments of the present application, in step S4, after the unadsorbed catalyst is removed, the silicon wafer is cleaned.
[0036] In some embodiments of the present application, in step S5, the temperature for reducing and depositing the metal layer is 50-70℃.
[0037] In some preferred embodiments of the present application, the temperature of the reduced and deposited metal layer in step S5 is 55-65℃.
[0038] In some embodiments of the present application, the time interval of the flipped silicon wafer in step S5 is 1-3 min, and the number of flips is 2-60.
[0039] In some embodiments of the present application, the electroless plating solution in step S5 comprises an electroless nickel plating solution.
[0040] In some preferred embodiments of the present application, the electroless nickel plating solution comprises an aqueous solution of Melplate Ni-869 M1 and Melplate Ni-869 M2; the volume ratio of Melplate Ni-869 M1 to Melplate Ni-869 M2 in the aqueous solution is 1: (1.5-2.5).
[0041] The basic principle of the present application is explained as follows: The method for depositing metal layer on both sides of TSV via in-situ electroless plating provided by the present application comprises the following steps: vacuum treatment of TSV-containing silicon wafer in TMAH solution, cleaning of the silicon wafer in alkaline cleaning solution, catalyst application and post-activation, and 180° periodic flip of the silicon wafer under the liquid surface in each treatment stage. 1) The TSV-containing silicon wafer is placed in the TMAH solution for vacuum treatment. The TMAH solution is used for modification, and hydrophilic -OH terminal is formed on the dielectric layer to improve the wettability of the solution. The high aspect ratio TSV via usually has gas retention, which causes capillary blockage. Vacuuming can remove the bubbles in the via, avoiding the voids caused by the bubbles; the silicon wafer is flipped 180° periodically under the liquid surface to force the replacement of the deep hole gas and prevent the residual bubbles. 2) The vacuumed silicon wafer is immersed in the alkaline cleaning solution to remove organic matter / particle contaminants and slightly etch the surface to improve the hydrophilicity, avoiding the subsequent uneven adsorption of the catalyst leading to the peeling of the plated layer; the silicon wafer is flipped 180° periodically under the liquid surface to eliminate the difference in adsorption of contaminants and improve the uniformity of the catalyst. 3) The cleaned silicon wafer is immersed in the catalyst solution to precisely construct active catalyst sites on the inner surface of the TSV via, triggering and maintaining the spontaneous reduction and deposition of metal ions; the silicon wafer is flipped 180° periodically under the liquid surface to solve the diffusion limitation of high aspect ratio structure. 4) The silicon wafer after adsorbing the catalyst is immersed in the post-activator solution to selectively dissolve the excess catalyst in the field area, retain the catalyst in the hole, do not damage the adsorbed active sites, and avoid the deposition of the field area to be too thick to cause the step coverage to decrease; the silicon wafer is periodically turned over by 180° under the liquid surface to inhibit the field area deposition and improve the hole coverage; 5) The silicon wafer after the post-activation is immersed in the electroless plating solution, the metal ions are reduced to atoms to form a metal layer; the silicon wafer is periodically turned over by 180° under the liquid surface to dynamically update the diffusion layer and ensure the thickness uniformity. The application is based on the double-side electroless plating deposition of the metal layer in the TSV through hole under the liquid turning over, the shear force generated by the turning over breaks the capillary force of the gas-liquid interface in the through hole, and the immersion dead zone is eliminated; the micro-scale vortex generated by the turning over destroys the static diffusion layer, refreshes the solution in the deep hole, eliminates the diffusion boundary layer, and improves the material transport efficiency; the turning over can also continuously provide metal ions to avoid the island growth caused by local depletion and improve the continuity of the ultra-thin layer; the double-side synchronous processing realized by the turning over under the liquid greatly saves the working hours and the consumption of the electroless plating solution.
[0042] The second aspect of the application provides a device for the method of the first aspect of the application, comprising: The hollow body comprises a reaction area and a turning area; the reaction area is covered by a polyimide cover layer; The detachable silicon wafer supporting feet are bonded to the edges of the silicon wafer to avoid the contact between the silicon wafer and the hollow body.
[0043] In some embodiments of the application, the detachable silicon wafer supporting feet are triangular structures made of inert materials.
[0044] In some embodiments of the application, the number of the detachable silicon wafer supporting feet is greater than 2.
[0045] Specifically, the hollow body of the device is divided into a reaction area and a turning area, and the difference between the reaction area and the turning area is that the reaction area is covered by a polyimide cover layer; the device further comprises detachable silicon wafer supporting feet that can be bonded to the edges of the silicon wafer to provide horizontal support for the silicon wafer; in actual operation, the detachable silicon wafer supporting feet are bonded to the edges of the silicon wafer containing the TSV through hole, and the number of the detachable silicon wafer supporting feet is at least 3 to ensure that the silicon wafer can be stably placed on the horizontal plane; then the silicon wafer is placed in the reaction area for processing, the silicon wafer is moved to the turning area during the turning over to ensure that the silicon wafer does not leave the liquid surface during the turning over, and the silicon wafer is moved back to the reaction area after the turning over is completed; the polyimide cover layer above the reaction area can prevent the silicon wafer from floating out of the liquid surface due to the gas or solution buoyancy generated during the reaction; the detachable silicon wafer supporting feet can avoid the contact between the silicon wafer and the hollow body, and at the same time provide contact points for the movement of the silicon wafer, i.e. the movement of the silicon wafer is realized by contacting the detachable silicon wafer supporting feet through clamping or other methods, which avoids directly contacting the silicon wafer to affect the surface state of the silicon wafer.
[0046] The third aspect of the present application provides a TSV metal layer structure, which is prepared by the method of the first aspect of the present application.
[0047] In some embodiments of the present application, the thickness of the metal layer structure is 40-2000 nm.
[0048] Compared with the prior art, the present application has the following beneficial effects: The method for depositing metal layer inside TSV via double-sided electroless plating provided by the present application realizes double-sided synchronous electroless plating deposition in TSV deep hole through liquid periodic overturning and vacuum assisted infiltration. In a TSV via with a depth-to-width ratio of (3-5): 1, the metal seed layer is uniformly covered with high coverage and no hole bottom cavity; a 40-2000 nm thick seed layer can be deposited to realize ultra-thin continuous deposition; double-sided synchronous processing reduces the process and reduces the consumption of chemical reagents; and the edge effect is eliminated through dynamic overturning, without the need for expensive equipment upgrade, which is a high-reliability, low-cost and nanoscale precision method. BRIEF DESCRIPTION OF DRAWINGS
[0049] Figure 1 Structure schematic diagram of the device used for the method for depositing metal layer inside TSV via double-sided electroless plating in the examples; Figure 2 SEM image of the electroless plating deposition effect in Example 1; Figure 3 SEM image of the electroless plating deposition effect in Example 2; Figure 4 SEM image (a) and EDS scanning result (b) of the electroless plating deposition effect in Example 3. DETAILED DESCRIPTION
[0050] The content of the present application will be further described in detail through specific examples. The raw materials, reagents or devices used in the examples can be obtained from conventional commercial channels or can be obtained by existing technical methods, unless otherwise specified. Unless otherwise specified, the test or test method is a conventional method in the art.
[0051] Figure 1 Structure schematic diagram of the device used for the method for depositing metal layer inside TSV via double-sided electroless plating in the examples, wherein, Figure 1 (a) in the above is the overall structure of the hollow main body; Figure 1 (b) in the above is a plan view of the hollow main body; Figure 1 (c) in the above is a front view of the hollow main body; Figure 1 (d) in the above is a side view of the hollow main body; Figure 1Figure (f) is a schematic diagram of the detachable silicon wafer support feet bonded to the edge of the silicon wafer in Figure (e); Figure 1 Figure (e) is a side view of the detachable silicon wafer support feet bonded to the silicon wafer in Figure (d). Figure 1 It can be seen that, in the hollow main body of the device, the polyimide cover layer above the reaction zone can prevent the gas or solution buoyancy generated during the reaction from causing the silicon wafer to float out of the liquid surface, and the upper part of the turnover zone is not covered, which can provide sufficient operation space for the movement and turnover of the silicon wafer between the reaction zone and the turnover zone. The device used in the embodiment contains four detachable silicon wafer support feet, which can maintain the stability of the silicon wafer in the horizontal direction after being bonded to the edge of the silicon wafer, and can avoid direct contact with the hollow main body. The following will be described in combination with Figure 1 The double-sided electroless deposition of the internal metal layer of the TSV via in the embodiment is described.
[0052] In the embodiment, the reagents Melplate PC-6160 A, Melplate PC-6160 B, Melplate Activator 7331, Melplate PA-7340, Melplate Ni-869 M1 and Melplate Ni-869 M2 are purchased from Meltex Corporation, Japan.
[0053] Embodiment 1 This embodiment prepares a TSV structure, and the steps are as follows: S11, immerse the silicon wafer containing TSV via (width 58 μm x depth 210 μm) in 2.38 wt% tetramethylammonium hydroxide solution, vacuum for 5 min, vacuum degree is 5 kPa, then restore to non-vacuum state, use tweezers to clamp the detachable silicon wafer support feet, make the silicon wafer turn over 180° under the liquid surface, vacuum again for 5 min (5 kPa), immerse the via and discharge the bubbles; S21, mix 28 mL of Melplate PC-6160 A with 12 mL of Melplate PC-6160 B, add water to 500 mL to obtain an alkaline cleaning solution; immerse the silicon wafer after vacuum in the alkaline cleaning solution for 1.5 min, then use tweezers to clamp the detachable silicon wafer support feet, make the silicon wafer turn over 180° under the liquid surface, continue to process for 1.5 min, and the alkaline cleaning solution is heated in water bath during the process, the temperature is 50℃, after the processing is finished, rinse the silicon wafer; S31, 12 mL of Melplate Activator 7331 is mixed with 0.6 mL of 0.1 mol / L KOH solution, and water is added to make up to 500 mL to obtain a palladium chloride colloidal solution; the cleaned silicon wafer is immersed in the palladium chloride colloidal solution for 1.5 min, then the detachable silicon wafer support foot is clamped with tweezers, and the silicon wafer is turned over 180° under the liquid surface, and the treatment is continued for 1.5 min, the step is carried out at room temperature, and after the treatment is completed, the silicon wafer is carefully washed to avoid the effect of too strong water flow in the washing process to weaken the adhesion of the catalyst, resulting in problems such as discontinuity of the plated layer; S41, 4 mL of Melplate PA-7340 solution is taken, water is added to make up to 400 mL to obtain a post-activator solution, and the silicon wafer after adsorbing the catalyst is immersed in the post-activator solution for 1.5 min, then the detachable silicon wafer support foot is clamped with tweezers, and the silicon wafer is turned over 180° under the liquid surface, and the treatment is continued for 1.5 min, the step is carried out at room temperature, and after the treatment is completed, the silicon wafer is carefully washed; S51, 24 mL of Melplate Ni-869 M1 is mixed with 48 mL of Melplate Ni-869 M2, and water is added to make up to 500 mL to obtain a chemical nickel plating solution; the silicon wafer after post-activation is immersed in the chemical plating solution, and a metal layer is reduced and deposited in the through hole under the condition of 64℃ water bath heating, the silicon wafer is turned over 180° under the liquid surface after 2 min, and the turning over is repeated for 60 times to form a nickel seed layer, and attention is paid to the surface state of the silicon wafer during the reaction process, if a large amount of bubbles accumulates on the surface of the silicon wafer, the bubbles are removed by shaking device or water flow blowing to avoid affecting the normal deposition of nickel.
[0054] Figure 2 Figure 2 is a SEM diagram of the chemical plating deposition effect in Example 1, wherein, Figure 2 (a) in Figure 2 is the overall structure of the TSV structure; Figure 2 (b) in Figure 2 is an enlarged view of the upper part (I) of the TSV structure indicated in (a); Figure 2 (c) in Figure 2 is an enlarged view of the middle part (II) of the TSV structure indicated in (a); Figure 2 (d) in Figure 2 is an enlarged view of the lower part (III) of the TSV structure indicated in (a). It can be seen from Figure 2 that by using the method for double-sided chemical plating deposition of a metal layer in a TSV through hole provided by the application, a 2000 nm thick nickel seed layer can be deposited in a through hole with a width of 58 μm and a depth of 210 μm, the nickel layer continuously covers the side wall without cracks or cavities, the upper corner of the TSV structure is covered, the step coverage rate is high, the middle part of the TSV structure is covered with high uniformity, the interface is clear, and there is no diffusion between the nickel and the medium layer; the lower part of the TSV structure is covered at the hole bottom, and there is no nickel accumulation at the bottom.
[0055] Example 2 The embodiment prepares a TSV structure, and the steps are as follows: S11, immerse the silicon wafer containing TSV through holes (61 μm wide and 214 μm deep) into a 2.38 wt% tetramethylammonium hydroxide solution, vacuumize for 5 min, the vacuum degree is 5 kPa, then restore to the non-vacuum state, hold the detachable silicon wafer support feet with tweezers, and turn the silicon wafer by 180° under the liquid surface, vacuumize again for 5 min (5 kPa), immerse the through holes and discharge the air bubbles; S21, mix 28 mL of Melplate PC-6160 A with 12 mL of Melplate PC-6160 B, add water to make up to 500 mL to obtain an alkaline cleaning solution; immerse the vacuumized silicon wafer into the alkaline cleaning solution for 1.5 min, then hold the detachable silicon wafer support feet with tweezers, and turn the silicon wafer by 180° under the liquid surface, continue to treat for 1.5 min, and heat the alkaline cleaning solution in a water bath during the process, the temperature is 50 ℃, and then rinse the silicon wafer after the treatment is completed; S31, mix 12 mL of Melplate Activator 7331 with 0.6 mL of 0.1 mol / L KOH solution, add water to make up to 500 mL to obtain a palladium chloride colloidal solution; immerse the cleaned silicon wafer into the palladium chloride colloidal solution for 1.5 min, then hold the detachable silicon wafer support feet with tweezers, and turn the silicon wafer by 180° under the liquid surface, continue to treat for 1.5 min, the step is carried out at room temperature, and the silicon wafer is carefully cleaned after the treatment is completed, so as to avoid the problems of weakening of the adhesion effect of the catalyst due to too strong water flow in the rinsing process, and discontinuity of the plated layer; S41, take 4 mL of Melplate PA-7340 solution, add water to make up to 400 mL to obtain a post-activator solution, immerse the silicon wafer after adsorbing the catalyst into the post-activator solution for 1.5 min, then hold the detachable silicon wafer support feet with tweezers, and turn the silicon wafer by 180° under the liquid surface, continue to treat for 1.5 min, the step is carried out at room temperature, and the silicon wafer is carefully cleaned after the treatment is completed; S51, mix 24 mL of Melplate Ni-869 M1 with 48 mL of Melplate Ni-869 M2, add water to make up to 500 mL to obtain a chemical nickel plating solution; immerse the silicon wafer after post-activation into the chemical plating solution, reduce and deposit a metal layer in the through hole under the condition of 60 ℃ water bath heating, turn the silicon wafer by 180° under the liquid surface after 2 min, repeat the turning for 40 times, form a nickel seed layer, and pay attention to the surface state of the silicon wafer during the reaction process, if a large amount of air bubbles accumulates on the surface of the silicon wafer, remove the air bubbles by means of shaking device or water flow blowing, so as to avoid affecting the normal deposition of nickel.
[0056] Figure 3 The SEM diagram of the chemical plating deposition effect in Example 2 is shown inFigure 3 It can be known that the method for depositing the internal metal layer of the TSV via hole by double-sided electroless plating provided by the application can deposit a 80nm-thick nickel seed layer in a via hole with a width of 61μm and a depth of 214μm, the nickel layer continuously covers the side wall, the boundary is clear, and the uniformity is high.
[0057] Example 3 A TSV structure is prepared in this example, and the steps are as follows: S11, immerse a silicon wafer containing a TSV via hole (width 61μm×depth 219μm) in a 2.38wt% tetramethylammonium hydroxide solution, vacuumize for 5min, the vacuum degree is 5kPa, then restore to a non-vacuum state, hold the detachable silicon wafer support leg with tweezers, turn the silicon wafer upside down under the liquid surface by 180°, vacuumize again for 5min (5kPa), immerse the via hole and discharge the air bubbles; S21, mix 28mL Melplate PC-6160 A with 12mL Melplate PC-6160 B, add water to make up to 500mL to obtain an alkaline cleaning solution; immerse the vacuumized silicon wafer in the alkaline cleaning solution for 1.5min, then hold the detachable silicon wafer support leg with tweezers, turn the silicon wafer upside down under the liquid surface by 180°, continue to treat for 1.5min, the alkaline cleaning solution is heated in a water bath during the process, the temperature is 50℃, and the silicon wafer is rinsed after the treatment is completed; S31, mix 12mL Melplate Activator 7331 with 0.6mL 0.1mol / L KOH solution, add water to make up to 500mL to obtain a palladium chloride colloidal solution; immerse the cleaned silicon wafer in the palladium chloride colloidal solution for 1.5min, then hold the detachable silicon wafer support leg with tweezers, turn the silicon wafer upside down under the liquid surface by 180°, continue to treat for 1.5min, the step is carried out at room temperature, and the silicon wafer is carefully washed after the treatment is completed, so as to avoid the problems of weakening of the adhesion effect of the catalyst and discontinuity of the plating layer caused by too strong water flow in the rinsing process; S41, take 4mL Melplate PA-7340 solution, add water to make up to 400mL to obtain a post-activator solution, immerse the silicon wafer after adsorbing the catalyst in the post-activator solution for 1.5min, then hold the detachable silicon wafer support leg with tweezers, turn the silicon wafer upside down under the liquid surface by 180°, continue to treat for 1.5min, the step is carried out at room temperature, and the silicon wafer is carefully washed after the treatment is completed; S51, mix 24 mL of Melplate Ni-869 M1 with 48 mL of Melplate Ni-869 M2, add water to make up to 500 mL to obtain a chemical nickel plating solution; immerse the silicon wafer after post-activation into the chemical plating solution, reduce and deposit a metal layer in the through hole under the condition of 56 ℃ water bath heating, turn the silicon wafer by 180° under the liquid surface after 2 min, repeat the turning for 21 times, form a nickel seed layer, and pay attention to the observation of the surface state of the silicon wafer during the reaction process; if a large amount of bubbles is accumulated on the surface of the silicon wafer, remove the bubbles by means of shaking device or water flow blowing to avoid affecting the normal deposition of nickel.
[0058] Figure 4 For the SEM image (a) and the nickel layer EDS scanning result (b) of the chemical plating deposition effect in Example 3, it can be seen from Figure 4 It can be known that by using the method for double-sided chemical plating deposition of a metal layer in a TSV through hole provided in the application, a 42 nm thick nickel seed layer can be deposited in a through hole with a width of 61 μm and a depth of 219 μm, the plating layer is continuous and free of pinholes, the thickness is uniform, and the EDS graph proves the continuity and high coverage of the 40 nm ultra-thin nickel layer in the TSV structure with a depth-width ratio close to 3.5:1.
Claims
1. A method of electroless deposition of an internal metal layer of a TSV via, characterized in that, The method comprises the following steps: S1, immerging the silicon wafer with TSV via into tetramethylammonium hydroxide solution, and vacuumizing; S2, immerging the silicon wafer treated in step S1 into alkaline cleaning solution; S3, immerging the silicon wafer treated in step S2 into catalyst solution; S4, immerging the silicon wafer treated in step S3 into post-activator solution; S5, immerging the silicon wafer treated in step S4 into electroless plating solution, and reducing and depositing metal layer in TSV via. In steps S1-S5, the silicon wafer is periodically flipped by 180° under the liquid surface, so that the front and back surfaces of the silicon wafer are treated in the same way.
2. The method of claim 1, wherein, In step S1, the concentration of the tetramethylammonium hydroxide solution is 2wt%-3wt%. And / or, the vacuum degree of the vacuumizing is less than 10kPa.
3. The method of claim 2, wherein, In step S1, the time interval of flipping the silicon wafer is ≤10min, and the number of flipping is ≥1.
4. The method of claim 1, wherein, In step S2, the temperature of cleaning the via is 40-60℃. And / or, the time interval of flipping the silicon wafer is 1-3min, and the number of flipping is ≥1.
5. The method of claim 1, wherein, In step S3, the time interval of flipping the silicon wafer is 1-3min, and the number of flipping is ≥1.
6. The method of claim 1, wherein, In step S4, the time interval of flipping the silicon wafer is 1-3min, and the number of flipping is ≥1.
7. The method of claim 1, wherein, In step S5, the temperature of reducing and depositing metal layer is 50-70℃. And / or, the time interval of flipping the silicon wafer is 1-3min, and the number of flipping is 2-60.
8. A device for use in the method of any one of claims 1-7, characterized in that, The method comprises: The hollow main body comprises reaction zone and flipping zone; the reaction zone is covered by polyimide cover layer; The detachable silicon wafer supporting leg is bonded to the edge of the silicon wafer, so as to avoid the contact between the silicon wafer and the hollow main body.
9. A TSV metal layer structure, characterized by, The metal layer structure is prepared by the method according to any one of claims 1-7.
10. The TSV metal layer structure of claim 9, wherein, The thickness of the metal layer structure is 40-2000nm.