Hole detection method and hole detection device
By coating markers on wafers and using pressure difference to detect voids, the cumbersome detection process in existing technologies has been solved, achieving efficient and accurate void detection and facilitating timely adjustments to wafer manufacturing processes.
Patent Information
- Application Number
- CN202511044833.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-07-28
- Publication Date
- 2025-12-16
AI Technical Summary
Existing technologies for detecting voids in wafers are cumbersome and have low efficiency.
By coating a flowable marker in the thickness direction of the wafer and using a pressure difference to make the marker flow to the other side of the wafer, the presence of the marker can be observed to determine the presence of voids, thus simplifying the detection process.
It improves the efficiency and accuracy of wafer void detection, reduces detection costs, facilitates timely adjustments to manufacturing processes, and improves product quality.
Smart Images
Figure CN121149025A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of single crystal processing and preparation technology, and in particular to a void detection method and void detection device. Background Technology
[0002] In the process of integrated circuit manufacturing, defects can potentially form on the wafer at any stage of the process. With the development of semiconductor technology, semiconductor devices are becoming increasingly miniaturized, and the impact of wafer defects on the semiconductor process is becoming more and more significant. Therefore, in the process of integrated circuit manufacturing, it is necessary to perform defect detection on the wafer, analyze the causes of defects based on the detection results, and adjust the production process or process equipment to reduce the occurrence of defects.
[0003] However, in related technologies, the operation of detecting voids in wafers is relatively cumbersome and the detection efficiency is low. Summary of the Invention
[0004] This invention aims to at least solve one of the technical problems existing in the prior art. To this end, this invention proposes a void detection method and a void detection device. A flowable marker is coated on a first side of the wafer under test in the thickness direction. The air pressure in the first chamber and / or the second chamber is changed, and then the presence of the marker on the side of the wafer under test containing the second side is observed to determine whether there are voids in the wafer under test. The detection method is relatively simple and facilitates the improvement of the detection efficiency of the wafer under test.
[0005] According to a first aspect of the present invention, a void detection method includes: step S1, coating a flowable marker on a first side surface of the wafer under test in the thickness direction, placing the wafer under test in a receiving cavity, and sealing the wafer under test with the inner wall of the receiving cavity so that the wafer under test divides the receiving cavity into a first chamber and a second chamber that are not connected, the first chamber corresponding to the first side surface, and the second chamber corresponding to the second side surface of the wafer under test in the thickness direction; step S2, changing the air pressure of the first chamber and / or the second chamber so that the air pressure of the first chamber is greater than the air pressure of the second chamber, and maintaining the pressure difference between the first chamber and the second chamber for a first predetermined time after the pressure difference reaches a predetermined pressure difference; step S3, observing whether there is a marker on the side where the second side surface of the wafer under test is located, to determine whether there is a void in the wafer under test.
[0006] According to the void detection method of this invention, a flowable marker is coated on a first side of the wafer under test in the thickness direction, and the wafer under test is sealed to the inner wall of a receiving cavity, so that the wafer under test divides the receiving cavity into a first chamber and a second chamber that are not connected. The air pressure in the first chamber and / or the second chamber is changed so that the air pressure in the first chamber is greater than that in the second chamber. This is maintained for a period of time, and then it is observed whether there is a marker on the side where the second side of the wafer under test is located. If there is a marker on the side where the second side is located, it is determined that the wafer under test has a through-hole. If there is no marker on the side where the second side is located, it is determined that the wafer under test does not have a through-hole. Therefore, the above void detection method is relatively simple to operate and can conveniently determine whether there is a through-hole in the wafer under test, which can improve the detection efficiency of the wafer under test.
[0007] In some embodiments, if no marker is observed on the side where the second side of the wafer under test is located, after step S3, steps S4 and S5 are executed, or step S6 is executed: Step S4: Remove the marker from the first side of the wafer under test, observe whether there is a marker on the side where the first side of the wafer under test is located, to determine whether there is a void in the wafer under test, and determine whether to execute step S5 based on the determination result; Step S5: Coat the second side of the wafer under test with a marker and keep it for a second predetermined time, remove the marker from the second side of the wafer under test, observe whether there is a marker on the side where the second side of the wafer under test is located, to determine whether there is a void in the wafer under test; Step S6: Coat the second side of the wafer under test with a marker and keep it for a third predetermined time, remove the marker from the first side and the second side of the wafer under test, observe whether there is a marker on the side where the first side and the second side of the wafer under test are located, to determine whether there is a void in the wafer under test.
[0008] In some embodiments, removing markers on the wafer to be tested in steps S4, S5 and S6 includes cleaning or polishing the first side of the wafer to be tested.
[0009] In some embodiments, step S4, removing the markers on the first side of the wafer to be tested includes: step S41, attaching a protective film to the second side of the wafer to be tested; step S42, cleaning the first side of the wafer to be tested; and step S5, removing the markers on the second side of the wafer to be tested includes: step S51, attaching a protective film to the first side of the wafer to be tested; and step S52, cleaning the second side of the wafer to be tested.
[0010] In some embodiments, the marker is a liquid or powder, and the coating thickness of the marker in step S1 is 2 mm to 2.5 mm.
[0011] In some embodiments, in step S1, the wafer to be tested is placed horizontally, and the edge of the wafer to be tested is sealed to the wall of the receiving cavity; in step S2, the air pressure in the first chamber remains unchanged, and the second chamber located below the first chamber is evacuated so that the air pressure in the second chamber reaches a predetermined pressure.
[0012] In some embodiments, in step S2, the predetermined pressure difference is 9 Pa to 12 Pa; and / or, the first predetermined duration is 1 min to 2 min.
[0013] In some embodiments, the marker is a fluorescent marker, and in step S3, observation is performed under specific conditions, including irradiating the second side of the wafer under test with a fluorescent excitation lamp.
[0014] In some embodiments, the specific condition further includes: the wafer to be tested is placed in a light-shielding box.
[0015] In some embodiments, the marker includes a fluorescent protein, is a liquid, and further includes deionized water, anhydrous ethanol, acetone, or ethylene glycol; or, the marker is a powder with a particle size of 15 μm to 30 μm.
[0016] According to a second aspect of the present invention, a void detection device includes: a housing and a pressure regulating structure. The housing has a receiving cavity and includes a first housing and a second housing. The second housing is movably connected to the first housing to open and close the receiving cavity. An annular mounting position is provided on the inner wall of the receiving cavity. The annular mounting position is used to seal and clamp a wafer to be tested coated with a marker on its first side, so that the wafer to be tested divides the receiving cavity into a first chamber and a second chamber that are not connected. The first side is adapted to correspond to the first chamber. The pressure regulating structure is connected to the receiving cavity and is used to regulate the air pressure of the first chamber and / or the second chamber so that the air pressure of the first chamber is greater than the air pressure of the second chamber.
[0017] According to an embodiment of the present invention, the cavity detection device for the wafer under test is sealed and fitted in an annular mounting position to divide the receiving cavity into a first chamber and a second chamber. At the same time, the air pressure of the first chamber and / or the second chamber is adjusted by an air pressure regulating structure so that the air pressure of the first chamber is greater than that of the second chamber. This facilitates the flow of the marker from the first side through the cavity to the surface of the wafer under test opposite to the first side, making it easier to more accurately determine whether there is a through-type cavity on the wafer under test, and improving the detection accuracy of the cavity detection device for the wafer under test.
[0018] In some embodiments, the void detection apparatus further includes a removal structure, which is disposed independently of the housing and is used to remove markers on the wafer to be tested.
[0019] In some embodiments, the removal structure includes a cleaning structure or a polishing structure, wherein the cleaning structure is used to clean the wafer to be tested, and the polishing structure is used to polish the wafer to be tested.
[0020] In some embodiments, the void detection device further includes a film-applying structure and a cleaning structure. The film-applying structure is disposed independently outside the housing and is used to apply a protective film to the surface of the wafer to be tested. The cleaning structure is disposed independently outside the housing and is used to clean the surface of the wafer to be tested that is not covered with a protective film.
[0021] In some embodiments, the first chamber is located above the second chamber, the annular mounting position is horizontally disposed, and is formed between the first housing and the second housing.
[0022] In some embodiments, the void detection device further includes: a seal, the seal being annular and sealing between a first housing and a second housing, wherein a mounting groove is formed on the inner peripheral wall of the seal, the mounting groove being adapted to seal and engage with the edge of the wafer to be tested.
[0023] In some embodiments, the air pressure regulating structure includes a vacuuming structure, which is located on the lower side of the housing and is connected to the second chamber via a connecting pipe. A switching valve is provided between one end of the connecting pipe and the second housing, and / or a switching valve is provided between one end of the connecting pipe and the vacuuming structure. The switching valve is used to control the opening and closing of the connecting pipe, and the opening degree of the switching valve is adjustable and suitable for adjusting the amount of air entering the second chamber; and / or, a bracket is supported on the lower side of the housing, and the bracket is located on the outer periphery of the vacuuming structure.
[0024] In some embodiments, the second chamber has a communication port on the side opposite to the first chamber, the air pressure regulating structure includes a vacuuming structure, the vacuuming structure is connected to the second chamber through the communication port, and the void detection device further includes an adsorption stage, which is disposed in the second chamber and located on the side of the annular mounting position facing the communication port, so as to separate the annular mounting position from the communication port, and the adsorption stage has a plurality of through adsorption holes.
[0025] In some embodiments, the marker is a fluorescent marker, and the void detection device further includes a fluorescent excitation lamp, which is disposed independently outside the housing and is used to irradiate the wafer to be tested.
[0026] In some embodiments, the void detection device further includes: a light-shielding box having a cavity for placing the wafer to be tested, and a fluorescent excitation lamp disposed in the light-shielding box for irradiating the wafer to be tested placed in the cavity.
[0027] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0028] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:
[0029] Figure 1 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0030] Figure 2 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0031] Figure 3 This is a flowchart of a void detection method according to some embodiments of the present invention.
[0032] Figure 4 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0033] Figure 5 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0034] Figure 6 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0035] Figure 7 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0036] Figure 8 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0037] Figure 9 This is a flowchart of a cavity detection method according to some embodiments of the present invention;
[0038] Figure 10 This is a schematic diagram of a cavity detection device according to some embodiments of the present invention;
[0039] Figure 11 yes Figure 10 A schematic diagram of the wafer to be tested is shown;
[0040] Figure 12 yes Figure 11 Enlarged view of point A circled in the image;
[0041] Figure 13 This is a schematic diagram of a wafer to be tested after being marked with a marker according to some embodiments of the present invention.
[0042] Reference numerals: Cavity detection device 100
[0043] Housing 1, First housing 10, Second housing 12, Receiving cavity 14, First chamber 14a, Second chamber 14b, Annular mounting position 16, Communication port 18
[0044] Wafer 2, First side surface 20, Second side surface 22, Void 24
[0045] Pressure regulating structure 3, vacuuming structure 30
[0046] Seal 4, First sealing part 40, Second sealing part 41, Third sealing part 42
[0047] Switch valve 5
[0048] 6. Bracket
[0049] Adsorption stage 7, adsorption pore 70,
[0050] Marker 8. Detailed Implementation
[0051] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.
[0052] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed. Additionally, examples of various specific processes and materials are provided in this invention; however, those skilled in the art will recognize the applicability of other processes and / or the use of other materials.
[0053] In the description of the embodiments in this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this document generally indicates that the preceding and following related objects have an "or" relationship.
[0054] Hereinafter, with reference to the accompanying drawings, a void detection method according to a first aspect of the present invention will be described.
[0055] Please refer to Figure 1The void detection method includes: Step S1, coating a flowable marker 8 onto the first side 20 of the wafer 2 under test in the thickness direction, placing the wafer 2 under test in the receiving cavity 14, and sealing the wafer 2 under test with the inner wall of the receiving cavity 14 so that the wafer 2 under test divides the receiving cavity 14 into a first chamber 14a and a second chamber 14b that are not connected, the first chamber 14a corresponding to the first side 20, and the second chamber 14b corresponding to the second side 22 in the thickness direction of the wafer 2 under test; Step S2, changing the air pressure of the first chamber 14a and / or the second chamber 14b so that the air pressure of the first chamber 14a is greater than the air pressure of the second chamber 14b, and maintaining the pressure difference between the first chamber 14a and the second chamber 14b for a first predetermined time after the pressure difference reaches a predetermined pressure difference; Step S3, observing whether there is a marker 8 on the side where the second side 22 of the wafer 2 under test is located, in order to determine whether there is a void 24 in the wafer 2 under test.
[0056] As can be seen, in step S1, the wafer to be tested 2 is sealed to the inner wall of the receiving cavity 14 so that the wafer to be tested 2 can divide the receiving cavity 14 into a first chamber 14a and a second chamber 14b that are not connected. The first chamber 14a corresponds to the first side 20 of the wafer to be tested 2 in the thickness direction, that is, the first side 20 of the wafer to be tested 2 is located in the first chamber 14a. The second chamber 14b corresponds to the second side 22 of the wafer to be tested 2 in the thickness direction, that is, the second side 22 of the wafer to be tested 2 is located in the second chamber 14b. Therefore, by setting up the first chamber 14a and the second chamber 14b, the marker 8 coated on the first side 20 of the wafer 2 under test is less likely to flow through the gap between the wafer 2 under test and the inner wall of the receiving cavity 14 to the second side 22 of the wafer 2 under test. This makes it easier for the marker 8 coated on the first side 20 of the wafer 2 under test to flow only through the void 24 defect on the wafer 2 under test to the second side 22 of the wafer 2 under test, thereby improving the accuracy of void defect detection of the wafer 2 under test.
[0057] For example, the wafer 2 to be tested is first sealed to the inner wall of the cavity 14, and then a marker 8 is applied to the first side 20 of the wafer 2 to be tested. This prevents the marker 8 from leaking through the gap between the wafer 2 and the inner wall of the cavity 14 to the second side 22 when the first side 20 of the wafer 2 to be tested is coated, thereby improving the accuracy of detecting the void 24 defect in the wafer 2 to be tested. Of course, the marker 8 can also be applied to the first side 20 of the wafer 2 to be tested first, and then the wafer 2 to be tested is sealed to the inner wall of the cavity 14, as long as the marker 8 does not leak through the gap between the wafer 2 and the inner wall of the cavity 14 to the second side 22.
[0058] It is understandable that if there is a void 24 on the side where the first side 20 of the wafer 2 to be tested is located, whether it is a through void 24 or a non-through void 24, after the marker 8 is coated on the first side 20 in step S1, a certain amount of marker 8 will remain in the void 24 on the side where the first side 20 is located.
[0059] In step S2, the air pressure in the first chamber 14a and / or the second chamber 14b is changed so that the air pressure in the first chamber 14a is greater than that in the second chamber 14b. If a through-hole 24 exists on the wafer 2 under test, the marker 8 coated on the first side 20 can flow through the hole 24 on the wafer 2 under pressure difference to the second side 22. After the pressure difference between the first chamber 14a and the second chamber 14b reaches a predetermined pressure difference, it is maintained for a predetermined time so that the presence of the hole 24 on the wafer 2 under test is not a problem. Under these conditions, the marker 8 coated on the first side 20 can flow to the second side 22. The marker 8 is less likely to remain in the void 24 defect of the wafer 2 under test. Even if the void 24 of the wafer 2 under test is small, the marker 8 can still flow smoothly to the second side 22 under the action of pressure difference. This reduces the possibility that the marker 8 cannot flow to the second side 22 through the void 24 due to the small size of the local void 24, so as to further improve the accuracy of void 24 defect detection of the wafer 2 under test.
[0060] It is understood that changing the air pressure in the first chamber 14a and / or the second chamber 14b includes: Example 1, keeping the air pressure in the first chamber 14a constant while decreasing the air pressure in the second chamber 14b; Example 2, keeping the air pressure in the second chamber 14b constant while increasing the air pressure in the first chamber 14a; Example 3, increasing the air pressure in the first chamber 14a while simultaneously decreasing the air pressure in the second chamber 14b. Furthermore, the predetermined pressure difference will not damage the wafer 2 under test, and within the range that the wafer 2 under test can withstand, it also drives the flow of the marker 8 so that when the wafer 2 under test has a cavity 24, the marker 8 can flow through the cavity 24 to the second side surface 22.
[0061] In step S3, observe whether there is a marker 8 on the side where the second side 22 of the wafer 2 is located. For example, observe whether there is a marker 8 on the second side 22 of the wafer 2, and / or observe whether there is a marker 8 in the wall of the through-hole 24 on the side where the second side 22 of the wafer 2 is located. If there is a marker 8 on one side of the second side 22 of the wafer 2, it is determined that there is a through-hole 24 in the wafer 2. If there is no marker 8 on one side of the second side 22 of the wafer 2, it is determined that there is no through-hole 24 in the wafer 2. Furthermore, the above-mentioned hole detection method can also detect the location of the hole 24 in the wafer 2, providing a clear detection point for subsequent detection of the size of the hole 24 using other precision instruments, thus improving detection efficiency.
[0062] According to the void detection method of the present invention, a flowable marker 8 is coated on the first side 20 of the wafer 2 under test in the thickness direction, and the wafer 2 under test is sealed to the inner wall of the receiving cavity 14, so that the wafer 2 under test divides the receiving cavity 14 into a first chamber 14a and a second chamber 14b that are not connected. The air pressure of the first chamber 14a and / or the second chamber 14b is changed so that the air pressure of the first chamber 14a is greater than that of the second chamber 14b. After maintaining this for a period of time, it is observed whether the marker 8 is present on the side where the second side 22 of the wafer 2 under test is located. If the marker 8 is present on the side where the second side 22 is located, it is determined that the wafer 2 under test has a through-hole 24. If the marker 8 is not present on the side where the second side 22 is located, it is determined that the wafer 2 under test does not have a through-hole 24. Therefore, the above void detection method is relatively simple to operate, can conveniently, quickly and accurately determine whether the wafer 2 under test has a through-hole 24, which can improve the detection efficiency of the wafer 2 under test, and the detection cost is relatively low.
[0063] In Czochralski-grown single-crystal silicon semiconductors, pinholes (Pinhole 24) are a type of wafer defect, typically caused by the following reasons: 1. Gas introduction during crystal growth forms bubbles, which are exposed after slicing, thinning, and polishing, forming through-holes or non-through-holes (Pinhole 24); 2. During Czochralski-grown single-crystal silicon growth, gases or impurities such as hydrogen (H) and oxygen (O) in the melt may be trapped in the crystal due to temperature fluctuations or improper pulling speed control, forming bubbles. These bubbles burst or are etched during subsequent processing, leaving pinholes (Pinhole 24); 3. Thermal stress-induced defects: Excessive local thermal stress during crystal cooling can lead to the accumulation of dislocations or vacancies, forming pinholes (Pinhole 24); 4. Impurity precipitation: High concentrations of impurities such as oxygen (O) and carbon (C) precipitate during subsequent heat treatment, forming local impurity accumulations that may be exposed after etching, forming pinholes (Pinhole 24); 5. Corrosion or damage during processing: Uneven local etching rates during slicing, polishing, or chemical mechanical polishing (CMP) may expose or enlarge existing pinholes (Pinhole 24).
[0064] Voids 24 have a significant impact on wafers and devices. For example, large and through-hole voids 24 can cause the following effects on the wafer: 1. Reduced wafer surface quality, resulting in an incomplete wafer surface, affecting the uniformity of subsequent thin film deposition (such as oxide and metal layers), and potentially causing thin film breakage or device short circuits; 2. Reduced wafer mechanical strength, as voids 24 act as stress concentration points, reducing wafer mechanical strength and increasing the risk of fragmentation; 3. Increased wafer yield loss, as voids 24 can lead to wafer scrapping or degradation, especially large and through-hole voids 24; 4. Reduced device electrical performance, leading to increased leakage current, penetrating the PN junction or gate oxide layer, resulting in leakage or breakdown; 5. Decreased device reliability, as voids 24 are prone to localized overheating or electromigration during long-term operation, shortening device lifespan; 6. Functional failure, as voids 24 can cause open circuits in metal interconnects or interlayer short circuits, reducing withstand voltage and causing premature failure.
[0065] The formation mechanism of void 24 can be controlled mainly through the following points: 1. Optimize the crystal growth process, control the pulling speed and temperature gradient, and reduce gas entrainment; 2. Optimize the heat treatment process, and eliminate vacancies or impurity accumulation through annealing; 3. Optimize the processing technology, and optimize polishing or epitaxial growth to cover defects.
[0066] According to the void detection method of the present invention, it is possible to conveniently determine whether there is a through-hole 24 in the wafer 2 under test, which can improve the detection efficiency of the wafer 2 under test. When there is a through-hole 24 in the wafer 2 under test, the operator can further detect the size of the void 24 using precision instruments, such as optical microscopes, scanning electron microscopes (SEM), X-ray diffraction (XRD) and other professional equipment. If the size of the void 24 on the wafer 2 under test is large, the operator can optimize the manufacturing process of the wafer 2 so that the subsequent production of the wafer 2 is less likely to produce a large void 24. If the size of the void 24 on the wafer 2 under test is small and smaller than the specified size, the manufacturing process of the wafer 2 can remain unchanged.
[0067] In related technologies, precision instruments are directly used to detect the presence and size of voids on the wafer under test. For example, professional equipment such as optical microscopes, scanning electron microscopes (SEM), and X-ray diffraction (XRD) are used to inspect the wafer under test. However, the cost of such precision instruments is high, the operation is complex, the inspection time is long, and the inspection efficiency of the wafer under test is low. It is also not possible to adjust the manufacturing process of the wafer under test in a timely manner. In contrast, the void detection method of this application allows the staff to conveniently and quickly detect whether there are voids 24 on the wafer under test 2, which facilitates the initial screening of the wafer under test 2. After the presence of voids 24 is detected on the wafer under test 2, the wafer under test 2 is then inspected by precision instruments. This reduces the frequency of use of precision instruments, allowing the staff to adjust the manufacturing process of the wafer 2 more promptly and improve the product quality of the wafer 2.
[0068] For example, workers need to periodically check whether there are voids 24 on wafer 2 and to check the size of voids 24 on wafer 2. If precision instruments are used to directly check whether there are voids 24 and the size of voids 24 on wafer 2, the detection efficiency of wafer 2 is low and it is not conducive to timely adjustment of the manufacturing process of wafer 2. However, the void detection method of this application can detect whether there are voids 24 on wafer 2 more conveniently and quickly. If there are voids 24, then the wafer 2 is checked by precision instruments to determine whether the size of voids 24 on wafer 2 exceeds the predetermined range. If there are no voids 24, it is not necessary to check the wafer 2 by precision instruments, so as to improve the detection efficiency of wafer 2 and facilitate the improvement of the production efficiency of wafer 2.
[0069] It is understandable that the predetermined range of the void 24 size can be selected according to the needs of different customers in order to meet the different usage scenarios of the wafer under test 2. For example, when the void 24 size on the wafer under test 2 is greater than or equal to 15um, it indicates that the void 24 size on the wafer under test 2 is relatively large and is likely to have a significant impact on the wafer under test 2 and the device. When the void 24 size on the wafer under test 2 is less than 15um, it indicates that the void 24 size on the wafer under test 2 is relatively small and is less likely to have a significant impact on the wafer under test 2 and the device.
[0070] Please refer to Figure 2In some embodiments, if the marker 8 is not observed on the side where the second side 22 of the wafer under test 2 is located, step S4 is executed after step S3. Step S4: Remove the marker 8 from the first side 20 of the wafer under test 2, observe whether the marker 8 is present on the side where the first side 20 of the wafer under test 2 is located, to determine whether the wafer under test 2 has a void 24, and determine whether to execute step S5 based on the determination result; Step S5: Coat the second side 22 of the wafer under test 2 with the marker 8, maintain for a second predetermined time, remove the marker 8 from the second side 22 of the wafer under test 2, observe whether the marker 8 is present on the side where the second side 22 of the wafer under test 2 is located, to determine whether the wafer under test 2 has a void 24.
[0071] As can be seen, if no marker 8 is observed on the side where the second side 22 of the wafer 2 under test is located in step S3, it is determined that the wafer 2 under test does not have a through-hole 24. In step S4, the marker 8 is removed from the first side 20 of the wafer 2 under test. At this time, if there is a non-through-hole 24 on the side where the first side 20 of the wafer 2 under test is located, the marker 8 may remain in these holes 24 and will not be removed. By observing whether there is a marker 8 on the side where the first side 20 of the wafer 2 under test is located, it is determined whether there is a non-through-hole 24 on the side where the first side 20 of the wafer 2 under test is located, which helps to improve the accuracy of the detection of void defects in the wafer 2 under test.
[0072] For example, in step S3, when a marker 8 is observed on the first side 20 of the wafer 2 under test, it is determined that there is an unpenetrated hole 24 in the wafer 2 under test. At this time, the size of the unpenetrated hole 24 in the wafer 2 under test can be further detected by a precision instrument. If the size of the hole 24 is small, the manufacturing process of the wafer 2 under test does not need to be adjusted. If the size of the hole 24 is large, the manufacturing process of the wafer 2 under test can be adjusted in time to improve the product quality of the wafer 2 under test.
[0073] It is understood that the judgment result in step S4 can determine whether there is a non-penetrating void 24 on the side where the first side 20 of the wafer 2 under test is located. If it is determined in step S4 that there is a void 24 on the wafer 2 under test, then step S5 is not executed; if it is determined in step S4 that there is no void 24 on the wafer 2 under test, then step S5 is executed, the second side 22 of the wafer 2 under test is coated with a marker 8 and held for a second predetermined time, the marker 8 on the second side 22 of the wafer 2 under test is removed, and it is observed whether there is a marker 8 on the side where the second side 22 of the wafer 2 under test is located, so as to determine whether there is a void 24 on the wafer 2 under test.
[0074] Therefore, if no marker 8 is observed on the side of the first side 20 of the wafer 2 under test in step S4, it is determined that there is no non-penetrating void 24 on the first side 20 of the wafer 2 under test; in step S5, the marker 8 is coated on the second side 22 of the wafer 2 under test and maintained for a second predetermined time to allow the marker to diffuse sufficiently to the entire area of the second side 22 of the wafer 2, that is, the marker 8 can flow sufficiently on the second side 22 of the wafer 2. If there is a non-penetrating void 24 on the second side 22 of the wafer 2, then... Then the marker 8 can flow smoothly into these voids 24 to remove the marker 8 from the second side 22 of the wafer 2 under test. If there is a non-penetrating void 24 on the side where the second side 22 of the wafer 2 under test is located, the marker 8 can remain in these voids 24 and will not be removed. By observing whether there is a marker 8 on the side where the second side 22 of the wafer 2 under test is located, it can be determined whether there is a non-penetrating void 24 on the side where the first side 22 of the wafer 2 under test is located, which helps to improve the accuracy of void defect detection of the wafer 2 under test.
[0075] Please refer to Figure 3 In some embodiments, if no marker 8 is observed on the side where the second side 22 of the wafer 2 under test is located in step S3, step S6 is executed after step S3. Step S6: The marker 8 is coated on the second side 22 of the wafer 2 under test and held for a third predetermined time. The marker 8 on the first side 20 and the second side 20 of the wafer 2 under test is removed. The presence of the marker 8 on the side where the first side 20 and the second side 22 of the wafer 2 under test are located is observed to determine whether there is a void 24 in the wafer 2 under test.
[0076] As can be seen, if no marker 8 is observed on the side where the second side 22 of the wafer 2 under test is located in step S3, it is determined that the wafer 2 under test does not have a through-hole 24. In step S6, the marker 8 is coated on the second side 22 of the wafer 2 under test and maintained for a third preset time so that the marker 8 can flow more fully on the second side 22 of the wafer 2. If there is a non-through-hole 24 on the second side 22 of the wafer 2, the marker 8 can also flow smoothly into these holes 24. Then the marker 8 on the first side 20 and the second side 22 of the wafer 2 is removed. By observing whether there is a marker 8 on the side where the first side 20 and the second side 22 of the wafer 2 under test are located, it is determined whether there is a non-through-hole 24 on the side where the first side 20 and the second side 22 of the wafer 2 under test are located, which helps to improve the accuracy of the detection of void defects in the wafer 2 under test.
[0077] It is understood that in the embodiments of this application, the first predetermined duration, the second predetermined duration, and the third predetermined duration can be set according to actual needs, without specific restrictions.
[0078] Please refer to Figure 4 and Figure 5 In some embodiments, removing the markers 8 on the wafer 2 under test in steps S4, S5, and S6 includes cleaning or polishing the wafer 2 under test. For example, removing the markers 8 on the second side 22 of the wafer 2 under test in step S4 includes cleaning or polishing the first side 20 of the wafer 2 under test. By polishing or cleaning the first side 20 of the wafer 2 under test, the markers 8 attached to the surface of the first side 20 of the wafer 2 under test can be better removed, while the markers 8 existing in the non-penetrating cavity 24 will not be removed, making it easier for the staff to observe whether there is a non-penetrating cavity 24 on the side where the first side 20 is located.
[0079] Similarly, removing the markers 8 from the second side 22 of the wafer 2 under test in step S5 includes cleaning or polishing the second side 22 of the wafer 2 under test so that the markers 8 attached to the surface of the first side 20 of the wafer 2 under test can be removed effectively, while the markers 8 existing in the non-penetrating holes 24 will not be removed, making it easier for the operator to observe whether there are non-penetrating holes 24 on the side where the second side 22 is located. In step S6, the wafer 2 under test can be cleaned or polished on both sides, and then it can be observed whether the markers 8 are still present on the wafer 2 under test.
[0080] Please refer to Figure 6 In some embodiments, step S4, removing the marker 8 from the first side 20 of the wafer 2 under test includes: step S41, attaching a protective film to the second side 22 of the wafer 2 under test; step S42, cleaning the first side 20 of the wafer 2 under test. Step S5, removing the marker 8 from the second side 22 of the wafer 2 under test includes: step S51, attaching a protective film to the first side 20 of the wafer 2 under test; step S52, cleaning the second side 22 of the wafer 2 under test.
[0081] As can be seen, in step S41, a protective film is applied to the second side 22 of the wafer 2 under test. This prevents the markers 8 on the first side 20 from flowing to the second side 22 during the subsequent cleaning of the first side 20 of the wafer 2 under test in step S42. This allows the operator to more easily observe whether there are any unpenetrated voids 24 in the wafer 2 under test. Similarly, the same logic applies to step S5, which will not be elaborated further.
[0082] For example, by attaching a protective film to the second side 22 of the wafer 2 to be tested, and then cleaning the first side 20 of the wafer 2 to be tested, the protective film is removed after cleaning. The staff can observe whether there are markers 8 on the whole of the wafer 2 to be tested, thereby determining whether there are non-penetrating holes 24 in the wafer 2 to be tested, so as to improve the detection efficiency of the wafer 2 to be tested.
[0083] In some embodiments, the marker 8 is a liquid or powder. Both liquids and powders have fluidity, allowing the marker 8 to flow from one side of the thickness of the wafer 2 under test through the through-hole 24 to the other side of the thickness of the wafer 2 under test, and the marker 8 to flow into the non-through-hole 24 of the wafer 2 under test, facilitating the detection of void defects in the wafer 2 under test. It can be understood that although the powder itself is not a fluid, it will exhibit fluid-like flow behavior when the interparticle forces are overcome. This "fluidity" is a macroscopic manifestation of the movement of the particle group.
[0084] In step S1, the coating thickness of the marker 8 is 2mm to 2.5mm. When the coating thickness of the marker 8 is less than 2mm, the total amount of the marker 8 is small. When a pressure difference is generated between the first chamber 14a and the second chamber 14b, the marker 8 needs to flow from the first side 20 to the second side 22 through the cavity 24 under the action of the pressure difference. If the amount of the marker 8 is too small, it may be quickly exhausted during the flow process, and the amount of the marker 8 reaching the second side 22 will be small, which will increase the difficulty of observation. When the coating thickness of the marker 8 is greater than 2.5mm, the total amount of the marker 8 is large, that is, more marker 8 is needed each time the wafer 2 under test is inspected, which will increase the inspection cost of the wafer 2 under test. By setting the coating thickness of the marker 8 in the range of 2mm to 2.5mm, the marker 8 can form a more obvious and easy-to-observe trace after flowing to the second side 22, while also reducing the inspection cost of the wafer 2 under test.
[0085] In some embodiments, please refer to Figure 7 In step S1, the wafer to be tested 2 is placed horizontally, and the edge of the wafer to be tested 2 is sealed to the wall of the receiving cavity 14. In step S2, the air pressure of the first chamber 14a remains unchanged, and the second chamber 14b located below the first chamber 14a is evacuated so that the air pressure of the second chamber 14b reaches the predetermined pressure.
[0086] In step S1, the wafer 2 to be tested is placed horizontally, i.e., the thickness direction of the wafer 2 to be tested is vertical. Combined with the arrangement of the first chamber 14a and the second chamber 14b in step S2, the first side 20 of the wafer 2 to be tested is located above the second side 22 of the wafer 2 to be tested, so that the marker 8 can flow smoothly from the first side 20 through the cavity 24 to the second side 22 under the action of gravity and pressure difference. The edge of the wafer 2 to be tested is sealed to the wall of the receiving cavity 14, for example, the wafer 2 to be tested is directly sealed to the wall of the receiving cavity 14, or the wafer 2 to be tested is indirectly sealed to the wall of the receiving cavity 14 through other components (such as the sealing element 4 described later), so that the wafer 2 to be tested can divide the receiving cavity 14 into the first chamber 14a and the second chamber 14b which are not connected, which facilitates the improvement of the accuracy of the detection of the cavity 24 of the wafer 2 to be tested. It is understandable that the edge portion of the wafer 2 under test needs to be removed in the subsequent processing. Therefore, even if the marker 8 cannot flow through the hole 24 in the edge portion of the wafer 2 under test to the second side 22, that is, the hole 24 in the edge portion of the wafer 2 under test cannot be detected, it will not affect the processing quality of the wafer 2 under test in the subsequent processing.
[0087] The second chamber 14b is located below the first chamber 14a. Vacuuming the second chamber 14b ensures that the air pressure in the first chamber 14a is greater than that in the second chamber 14b. This allows the marker 8 to flow smoothly from the first side 20 through the cavity 24 to the second side 22 under the influence of gravity and pressure difference. This improves the accuracy of detecting the cavity 24 defect in the wafer 2 under test. Furthermore, since the marker 8 is located inside the first chamber 14a, evacuating the second chamber 14b allows the marker 8 to be subjected to a downward adsorption force, preventing splashing and improving the stability of cavity 24 detection in the wafer 2 under test.
[0088] In some embodiments, in step S2, the predetermined pressure difference is 9 Pa to 12 Pa; and / or, the first predetermined duration is 1 min to 2 min.
[0089] When the predetermined pressure difference is less than 9 Pa, that is, the pressure difference between the first chamber 14a and the second chamber 14b is small, it cannot effectively overcome the resistance such as the adhesion between the marker 8 and the surface of the wafer 2 under test and the cohesive force of the marker 8 itself. The marker 8 will not be able to flow well from the first side 20 through the hole 24 to the second side 22 under the action of the pressure difference, resulting in poor detection effect or a long first predetermined time. When the predetermined pressure difference is greater than 12 Pa, that is, the pressure difference between the first chamber 14a and the second chamber 14b is large, the excessive pressure difference will exert a large pressure on the wafer 2 under test, which may increase the risk of damage such as cracking and deformation of the wafer 2 under test. By setting the predetermined pressure difference in the range of 9 Pa to 12 Pa, the marker 8 can flow well from the first side 20 through the hole 24 to the second side 22, and the wafer 2 under test is less likely to be damaged such as cracking and deformation.
[0090] For example, the pressure in the first chamber 14a is standard atmospheric pressure, and the second chamber 14b is evacuated until the pressure in the second chamber 14b is lower than standard atmospheric pressure by 9 Pa to 12 Pa, so that the pressure difference between the first chamber 14a and the second chamber 14b is maintained at 9 Pa to 12 Pa.
[0091] When the first predetermined time is less than 1 minute, the marker 8 may not be able to flow completely through the voids 24 inside the wafer 2 under test to the second side 22. Especially for some tiny voids 24, the marker 8 needs a certain amount of time to gradually penetrate and diffuse. If the time is too short, the marker 8 will not be able to fully reach the second side 22 and form obvious marks, making it difficult for the staff to accurately determine whether there are voids 24 in the wafer 2 under test. When the first predetermined time is greater than 2 minutes, it is easy to slow down the detection efficiency. By setting the first predetermined time in the range of 1 minute to 2 minutes, the marker 8 can be given a suitable time to flow through the voids 24 inside the wafer 2 under test to the second side 22 under the action of pressure difference.
[0092] Please refer to Figure 8 In some embodiments, the marker 8 is a fluorescent marker. In step S3, observation is performed under specific conditions, including irradiating the second side 22 of the wafer 2 under test with a fluorescent excitation lamp.
[0093] As can be seen, the marker 8 is a fluorescent marker. The second side 22 of the wafer 2 under test is illuminated by a fluorescent excitation lamp, such as a mercury lamp, xenon lamp, or laser lamp, so that the fluorescent marker can emit fluorescence, making it easier for staff to observe and thus more convenient to determine whether there is a through-hole 24 in the wafer 2 under test.
[0094] For example, the wafer 2 to be tested is placed in a relatively dark environment, and then the second side 22 of the wafer 2 to be tested is irradiated with a fluorescent excitation lamp. If the staff observes a fluorescent reaction on the second side 22 of the wafer 2 to be tested, it indicates that there is a through-hole 24 in the wafer 2 to be tested. If the staff does not observe a fluorescent reaction on the second side 22 of the wafer 2 to be tested, it indicates that there is no through-hole 24 in the wafer 2 to be tested.
[0095] In other embodiments of this application, the marker 8 is a colored marker 8 so that the staff can directly observe whether the second side 22 has the marker 8, thereby determining whether the wafer 2 under test has a through-hole 24, which makes it easier to reduce the difficulty of detection.
[0096] In some embodiments, the marker 8 is a fluorescent marker. If, in step S3, the marker 8 is not observed on the side where the second side 22 of the wafer 2 is located, the void detection method further includes, after step S3: step S4, removing the marker 8 from the first side 20 of the wafer 2, and observing under specific conditions whether the marker 8 exists on the side where the first side 20 of the wafer 2 is located. The specific conditions include illuminating the first side 20 of the wafer 2 with a fluorescent excitation lamp. Optionally, in step S5, the presence of the marker 8 on the side where the second side 22 of the wafer 2 is located can also be observed under the aforementioned specific conditions.
[0097] As can be seen, the first side 20 of the wafer 2 under test is illuminated by a fluorescent excitation lamp, such as a mercury lamp, xenon lamp, or laser lamp, so that the fluorescent marker can emit fluorescence, making it easier for staff to observe and thus more convenient to determine whether there is a non-penetrating void 24 in the wafer 2 under test.
[0098] Please refer to Figure 9 In some embodiments, specific conditions also include: the wafer to be tested 2 is placed in a light-shielding box, for example, the wafer to be tested 2 is placed in a dark box, the dark box can block the entry of external natural light or artificial light source, and create a near-completely dark condition inside, so that when observing whether there is a fluorescence reaction on the second side 22 of the wafer to be tested 2, it is not easily interfered with and affected by external light.
[0099] It is evident that under natural light or ordinary lighting conditions, there is a large amount of stray light of various wavelengths. This light will form strong background interference, making it difficult to clearly observe the weak fluorescent signal emitted by the fluorescent marker. The light-shielding box can create a near-dark environment, effectively eliminating the interference of external stray light, making the fluorescence emitted by the fluorescent marker the only visible light signal, thereby greatly improving the clarity and contrast of observation. Moreover, the dark environment created by the light-shielding box can enhance the human eye's perception of fluorescence brightness, making it easier for staff to observe weak fluorescent signals, which is conducive to improving the detection accuracy of the wafer under test.
[0100] In some embodiments, the marker 8 is a fluorescent marker. If, in step S3, the marker 8 is not observed on the side where the second side 22 of the wafer 2 is located, the void detection method further includes, after step S3: step S4, removing the marker 8 from the first side 20 of the wafer 2, and observing whether the marker 8 exists on the side where the first side 20 of the wafer 2 is located under specific conditions. These specific conditions include: illuminating the first side 20 of the wafer 2 with a fluorescent excitation lamp, and placing the wafer 2 in a light-shielding box. Optionally, in step S5, the presence of the marker 8 on the side where the second side 22 of the wafer 2 is located can also be observed under the aforementioned specific conditions.
[0101] It can be seen that by placing the wafer 2 under test in a light-shielding box and illuminating the first side 20 of the wafer 2 under test with a fluorescent excitation lamp, it is easier to observe more clearly whether there are any non-penetrating voids 24 on the first side 20 of the wafer 2 under test, which can improve the accuracy of void detection of the wafer 2 under test.
[0102] In some embodiments, the marker 8 includes a fluorescent protein, which is a liquid and further includes deionized water, anhydrous ethanol, acetone, or ethylene glycol. The marker 8 has good solubility so that the fluorescent protein is uniformly dispersed in the solution and uniformly marked on the second side 22 of the wafer 2 to be tested, thereby improving the stability of the detection of voids 24 on the wafer 2. Moreover, when it is necessary to remove the marker 8 from the wafer 2 to be tested, the liquid marker 8 can be decomposed by cleaning, polishing, or annealing so that the marker 8 does not easily affect the subsequent processing and use of the wafer 2 to be tested.
[0103] In other embodiments of this application, the marker 8 includes a fluorescent protein. The marker 8 is a powder with a certain degree of fluidity, which facilitates the flow of the marker 8 from the first side 20 through the cavity 24 to the second side 22, thereby improving the stability of cavity 24 detection on the wafer 2 under test. The particle size is 15μm to 30μm. By setting the particle size in the range of 15μm to 30μm, the size of the marker 8 is more suitable, which facilitates the flow of the marker 8 from the first side 20 through the cavity 24 to the second side 22, thereby further improving the stability of cavity 24 detection on the wafer 2. When it is necessary to remove the powder marker 8, the surface of the wafer 2 under test can be rinsed with departicle-free water, which can effectively remove the marker 8 from the wafer 2 under test without affecting the subsequent processing and use of the wafer 2 under test.
[0104] Therefore, in the above scheme, regardless of whether the marker 8 is liquid or powder, it is easy to remove it from the wafer 2 to be tested after the test is completed, so as to complete the screening of the wafer 2 to be tested without pollution.
[0105] Please refer to Figures 10-13 According to a second aspect of the present invention, a void detection device 100 includes a housing 1, which has a receiving cavity 14. The housing 1 includes a first housing 10 and a second housing 12. The second housing 12 is movably connected to the first housing 10 to open and close the receiving cavity 14. An annular mounting position 16 is provided on the inner wall of the receiving cavity 14. The annular mounting position 16 is used to seal and clamp the wafer 2 to be tested with a marker 8 coated on its first side 20, so that the wafer 2 to be tested divides the receiving cavity 14 into a first chamber 14a and a second chamber 14b that are not connected. For example, the first side 20 of the wafer 2 to be tested corresponds to the first chamber 14a, and the second side 22 of the wafer 2 to be tested corresponds to the second chamber 14b.
[0106] It is understood that the second housing 12 is movably connected to the first housing 10 to open and close the receiving cavity 14. The connection method between the second housing 12 and the first housing 10 is not limited, as long as the second housing 12 and the first housing 10 can move relative to each other to open or close the receiving cavity 14. For example, the second housing 12 and the first housing 10 can be detachably connected by fasteners, or the second housing 12 and the first housing 10 can be rotatably connected, which facilitates the placement of the wafer 2 under test in the receiving cavity 14 or the removal of the wafer 2 under test from the receiving cavity 14.
[0107] As can be seen, the cavity 14 has an annular mounting position 16, which is sealed and clamped to the wafer 2 under test. For example, the wafer 2 under test is directly sealed to the annular mounting position 16, or the wafer 2 under test is sealed to the annular mounting position 16 through other components (such as the seal 4 described later), so that the wafer 2 under test divides the cavity 14 into a first chamber 14a and a second chamber 14b that are not connected. At this time, the marker 8 coated on the first side 20 of the wafer 2 under test is not easy to leak to the second side 22 through the gap between the wafer 2 under test and the annular mounting position 16. The marker 8 can only flow to the second side 22 through the hole 24 on the wafer 2 under test, so as to improve the stability of the hole detection device 100.
[0108] The cavity detection device 100 further includes a pressure regulating structure 3, which is connected to the receiving cavity 14 and is used to regulate the pressure of the first chamber 14a and / or the second chamber 14b so that the pressure of the first chamber 14a is greater than the pressure of the second chamber 14b.
[0109] As can be seen, the air pressure regulating structure 3 can regulate the air pressure of the first chamber 14a and / or the second chamber 14b so that the air pressure of the first chamber 14a is greater than that of the second chamber 14b. This allows the marker 8 coated on the first side 20 to flow from the first side 20 through the hole 24 to the second side 22 through the pressure difference. This enables a more accurate determination of whether there is a through-hole 24 on the wafer 2 under test, thereby improving the detection efficiency of the hole detection device 100.
[0110] For example, the pressure regulating structure 3 is a vacuum pump, which is connected to the second chamber 14b. The vacuum pump evacuates the second chamber 14b so that the pressure in the first chamber 14a is greater than the pressure in the second chamber 14b, so that the marker 8 can flow from the first side 20 through the hole 24 to the second side 22. Of course, the pressure regulating structure 3 can also be a compressor, which can continuously pump air into the first chamber 14a to pressurize it.
[0111] According to the void detection device 100 of the present invention, the wafer 2 to be tested is sealed and fitted in an annular mounting position 16 to divide the receiving cavity 14 into a first chamber 14a and a second chamber 14b. At the same time, the air pressure of the first chamber 14a and / or the second chamber 14b is adjusted by the air pressure regulating structure 3 so that the air pressure of the first chamber 14a is greater than the air pressure of the second chamber 14b. When there is a through-hole 24 on the wafer 2 to be tested, the marker 8 flows from the first side 20 through the void 24 to the surface of the wafer 2 to be tested opposite to the first side 20, which facilitates a more accurate determination of whether there is a through-hole 24 on the wafer 2 to be tested. This is beneficial to improving the detection accuracy of the device for the wafer 2 to be tested with void 24. Moreover, the void detection device 100 has a simple structure, is easy to operate, easy to install and maintain, and has a low cost, which can improve the convenience and reliability of production operations.
[0112] In some embodiments, the void detection device 100 further includes a removal structure, which is disposed independently of the housing 1 and is used to remove the marker 8 on the wafer 2 to be tested.
[0113] As can be seen, the removal structure can remove the marker 8 on the wafer 2 to be tested. For example, the removal structure can remove the marker 8 attached to the first side 20 of the wafer 2 to be tested. At this time, the non-penetrating cavity 24 on the side where the first side 20 is located still contains the marker 8, which will not be removed by the removal structure. This makes it easier for the staff to observe whether there is a marker 8 on the side where the first side 20 is located, thereby determining whether there is a non-penetrating cavity 24 on the wafer 2 to be tested, which helps to improve the detection accuracy of the cavity detection device 100.
[0114] In some embodiments, the removal structure includes a cleaning structure or a polishing structure, wherein the cleaning structure is used to clean the wafer 2 to be tested, and the polishing structure is used to polish the wafer 2 to be tested.
[0115] For example, the cleaning structure is a high-pressure water gun, which sprays cleaning fluid toward the wafer 2 to be tested, thereby effectively removing the markers 8 attached to the surface of the wafer 2 to be tested (e.g., removing the markers 8 attached to the first side 20 of the wafer 2 to be tested), which facilitates the detection of whether there are non-penetrating voids 24 on the wafer 2 to be tested; the structure of the above cleaning structure is well known to those skilled in the art and will not be described in detail here.
[0116] For example, the polishing structure includes a polishing pad and a driving structure. The driving structure can drive the polishing pad to rotate relative to the wafer 2 under test, thereby realizing single-sided or double-sided polishing of the wafer 2 under test. This facilitates the effective removal of the markers 8 attached to the first side 20 and / or the second side 22 of the wafer 2 under test, and is beneficial for detecting whether there are non-penetrating voids 24 on the wafer 2 under test. The structure of the polishing structure is well known to those skilled in the art and will not be described in detail here.
[0117] It can be understood that the polishing structure performs single-sided polishing of the wafer 2 under test, which means that the polishing structure only polishes one side of the wafer 2 under test, without affecting the other surfaces of the wafer 2 under test. For example, the polishing structure only polishes the first side 20 of the wafer 2 under test, thereby effectively removing the marker 8 attached to the first side 20.
[0118] In some embodiments, the void detection device 100 further includes a film-applying structure and a cleaning structure. The film-applying structure is disposed independently outside the housing 1 and is used to apply a protective film to the surface of the wafer 2 to be tested. The cleaning structure is disposed independently outside the housing 1 and is used to clean the surface of the wafer 2 to be tested that is not covered with a protective film.
[0119] It is evident that the film-coating structure can attach a protective film to the surface of the wafer 2 under test, so that the cleaning structure can clean the surface of the wafer 2 under test that is not covered with a protective film without affecting the surface of the wafer 2 under test covered with a protective film.
[0120] For example, the specific structure and application method of the film-applying structure are well known to those skilled in the art. The film-applying structure uses a protective film (e.g., cling film) to adhere to the surface of the wafer 2 under test, while simultaneously removing air between the protective film and the wafer 2 under test, so that the protective film can adhere more tightly to the wafer 2 under test. When cleaning the surface of the wafer 2 under test without the protective film, the marker 8 or cleaning solution is less likely to flow to the surface of the wafer 2 under test with the protective film, facilitating subsequent testing of the wafer 2 under test. Of course, the film-applying structure can also be omitted, and the film can be applied manually.
[0121] Please refer to Figure 10 In some embodiments, the first chamber 14a is located above the second chamber 14b, the annular mounting position 16 is horizontally arranged, and the annular mounting position 16 is formed between the first housing 10 and the second housing 12. For example, at least a portion of the first housing 10 and at least a portion of the second housing 12 both participate in defining the annular mounting position 16. By clamping the wafer under test 2 between the first housing 10 and the second housing 12, the setting position of the wafer under test 2 is made more stable, and the wafer under test 2 can maintain a good sealing effect with the annular mounting position 16, so that the marker 8 is not easy to leak through the gap between the wafer under test 2 and the annular mounting position 16, which facilitates the improvement of the stability of the void detection device 100.
[0122] The annular mounting position 16 is set horizontally so that the wafer 2 to be tested can also be placed horizontally in the annular mounting position 16. For example, the thickness direction of the wafer 2 to be tested is the vertical direction, which facilitates the flow of the marker 8 from the first side 20 to the second side 22 of the wafer 2 to the second side 22 by gravity and pressure difference.
[0123] Please refer to Figure 10In some embodiments, the void detection device 100 further includes a seal 4, which is annular and is sealed between the first housing 10 and the second housing 12. A mounting groove is formed on the inner peripheral wall of the seal 4, which is adapted to seal against the edge of the wafer 2 to be tested.
[0124] As can be seen, the wafer under test 2 is indirectly sealed to the annular mounting position 16 through the sealing element 4. The first housing 10 and the second housing 12 can apply a certain clamping force to the sealing element 4 so that the sealing element 4 can produce a certain deformation, thereby better filling the gap between the wafer under test 2 and the annular mounting position 16, so as to reduce the possibility of the marker 8 leaking from the gap between the wafer under test 2 and the annular mounting position 16.
[0125] In addition, an installation groove is formed on the inner peripheral wall of the seal 4. The installation groove is suitable for sealing and engaging with the edge of the wafer 2 to be tested. That is, the seal 4 can separate the wafer 2 to be tested from the housing 1, so that the wafer 2 to be tested is less likely to break due to the clamping force of the first housing 10 and the second housing 12, which helps to improve the stability of the void detection device 100.
[0126] It is understandable that the mounting slot is sealed to the edge of the wafer 2 under test. The edge of the wafer 2 under test needs to be removed in the subsequent processing. Therefore, even if the seal 4 affects the flow of the marker 8 through the hole 24 in the edge of the wafer 2 under test to the second side 22, that is, the hole 24 in the edge of the wafer 2 under test cannot be detected, it will not affect the processing quality of the wafer 2 under test in the subsequent processing.
[0127] Exemplarily, the seal 4 includes a first sealing portion 40, a second sealing portion 41, and a third sealing portion 42. The second sealing portion 41 is located at the outer periphery of the wafer 2 under test and extends along the thickness direction of the wafer 2 under test. The first sealing portion 40 and the third sealing portion 42 are respectively bent and connected to the second sealing portion 41, so that the first sealing portion 40 and the third sealing portion 42 are located in the first chamber 14a and the second chamber 14b, respectively. The first sealing portion 40 and the third sealing portion 42 extend along the thickness direction perpendicular to the wafer 2 under test, and both the first sealing portion 40 and the third sealing portion 42 extend toward the center of the wafer 2 under test. The first sealing part 40, the second sealing part 41, and the third sealing part 42 cooperate to form a mounting groove. By sealing the edge portion of the wafer 2 under test in the mounting groove, the wafer 2 under test and the housing 1 are separated, so that the wafer 2 under test will not directly contact the housing 1, thereby reducing the possibility of damage to the wafer 2 under test. At the same time, the first sealing part 40, the second sealing part 41, and the third sealing part 42 can fill the gap between the wafer 2 under test and the housing 1, so that the marker 8 is not easy to leak through the gap between the wafer 2 under test and the housing 1, which facilitates the improvement of the detection accuracy of the void detection device 100.
[0128] Please refer to Figure 10 In some embodiments, the pressure regulating structure 3 includes a vacuuming structure 30, which is located on the lower side of the housing 1 and is connected to the second chamber 14b via a connecting pipe. A switching valve 5 is provided between one end of the connecting pipe and the second housing 12, and / or between one end of the connecting pipe and the vacuuming structure 30. The switching valve 5 controls the opening and closing of the connecting pipe, and its opening degree is adjustable and suitable for adjusting the air intake of the second chamber 14b; and / or, a bracket 6 is supported on the lower side of the housing 1, located on the outer periphery of the vacuuming structure 30.
[0129] The vacuum structure 30 is connected to the second chamber 14b, meaning the vacuum structure 30 can perform a vacuum operation on the second chamber 14b through the connecting pipe, so that the air pressure in the first chamber 14a is greater than the air pressure in the second chamber 14b, facilitating the flow of the marker 8 from the first side 20 through the hole 24 to the second side 22 due to the pressure difference. A switch valve 5 is provided between one end of the connecting pipe and the second housing 12. When the switch valve 5 is open, outside air can directly enter the connecting pipe through the switch valve 5, thereby increasing the air pressure in the second chamber 14b; and / or, a switch valve 5 is provided between one end of the connecting pipe and the vacuum structure 30. When the switch valve 5 is open, outside air can enter the connecting pipe through the switch valve 5, thereby increasing the air pressure in the second chamber 14b and decreasing the pressure difference between the first chamber 14a and the second chamber 14b, facilitating the removal of the wafer 2 to be tested from the receiving cavity 14. The opening degree of the switch valve 5 is adjustable to change the amount of air intake in the second chamber 14b. For example, the larger the opening degree of the switch valve 5, the more air intake in the second chamber 14b, so that the pressure in the second chamber 14b can be restored to atmospheric pressure more quickly. The operator can adjust the opening degree of the switch valve 5 according to the actual use needs, thereby adjusting the pressure change rate of the second chamber 14b, so that the wafer under test 2 can be taken out from the receiving cavity 14, and the wafer under test 2 will not be damaged due to excessive pressure change.
[0130] A bracket 6 is provided on the lower side of the housing 1. The bracket 6 can be used to support the housing 1 so that the housing 1 is not prone to large shaking, which can improve the stability of the void detection device 100. Moreover, the bracket 6 is located on the outer periphery of the vacuum structure 30 so that the bracket 6 and the vacuum structure 30 are not prone to interference. At the same time, the bracket 6 can provide a large support range for the housing 1, which can further improve the stability of the void detection device 100.
[0131] Please refer to Figure 10In some embodiments, the second chamber 14b has a connecting port 18 on the side opposite to the first chamber 14a. The air pressure regulating structure 3 includes a vacuuming structure 30, which is connected to the second chamber 14b through the connecting port 18. The void detection device 100 also includes an adsorption platform 7, which is disposed in the second chamber 14b and is located on the side of the annular mounting position 16 facing the connecting port 18 to separate the annular mounting position 16 from the connecting port 18. The adsorption platform 7 has a plurality of through adsorption holes 70.
[0132] As can be seen, the adsorption stage 7 is located on the side of the annular mounting position 16 facing the communication port 18. For example, the adsorption stage 7 is located between the annular mounting position 16 and the communication port 18, so that the vacuum structure 30 will not directly apply adsorption force to the wafer 2 under test through the communication port 18, but will apply adsorption force to the wafer 2 under test through multiple through adsorption holes 70 on the adsorption stage 7, so that the adsorption force applied by the vacuum structure 30 to the wafer 2 under test is more uniform, thereby reducing the problem of large local adsorption force on the wafer 2 under test, and making the wafer 2 under test less prone to fragmentation and other problems.
[0133] In some embodiments, the diameter of the adsorption holes 70 is 0.5 mm, so that the multiple adsorption holes 70 can be evenly distributed on the adsorption stage 7, so that the vacuum structure 30 can apply a more uniform adsorption force to the wafer 2 under test through the multiple adsorption holes 70, thereby reducing the fragmentation problem of the wafer 2 under test.
[0134] In some embodiments, the marker 8 is a fluorescent marker, and the void detection device 100 further includes a fluorescent excitation lamp, which is disposed independently outside the housing 1 and is used to irradiate the wafer 2 to be tested.
[0135] As can be seen, the marker 8 is a fluorescent marker. The wafer 2 under test is irradiated with a fluorescent excitation lamp, such as a mercury lamp, xenon lamp, or laser lamp, so that the fluorescent marker can emit fluorescence, making it easier for staff to observe and thus more convenient to determine whether there is a void 24 defect in the wafer 2 under test.
[0136] In some embodiments, the void detection device 100 further includes: a light-shielding box having a cavity for placing the wafer 2 to be tested, a fluorescent excitation lamp disposed in the light-shielding box and used to irradiate the wafer 2 to be tested placed in the cavity.
[0137] As can be seen, by placing the wafer 2 under test in a light-shielding box and irradiating it with a fluorescent excitation lamp, it is possible to more intuitively see whether there is a fluorescent reaction on the wafer 2 under test, and to more clearly observe whether there is a void 24 defect on the wafer 2 under test, thereby improving the stability of the void detection device 100.
[0138] Furthermore, it should be noted that the various specific technical features described in the above specific embodiments can be combined in any suitable manner without contradiction. To avoid unnecessary repetition, this application will not describe the various possible combinations separately. In addition, various different embodiments of this application can also be arbitrarily combined, as long as they do not violate the spirit of this application, they should also be regarded as the content disclosed in this application.
[0139] In the description of this application, it should be understood that the terms "center," "lateral," "length," "thickness," "top," "bottom," "inner," "outer," "axial," "radial," and "circumferential," etc., indicating orientation or positional relationships, are based on the orientation or positional relationships shown in the accompanying drawings and are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, features defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more. In the description of this application, it should be noted that, unless otherwise explicitly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly. For example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can refer to a mechanical connection or an electrical connection; it can refer to a direct connection or an indirect connection through an intermediate medium; it can refer to the internal communication of two elements. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.
[0140] In this application, unless otherwise expressly specified and limited, "above" or "below" the second feature can mean that the first feature is in direct contact with the second feature, or that the first feature is in indirect contact with the second feature through an intermediate medium. Furthermore, "above," "over," and "on the upper side" of the second feature can mean that the first feature is directly above or diagonally above the second feature, or simply that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "on the lower side" of the second feature can mean that the first feature is directly below or diagonally below the second feature, or simply that the first feature is at a lower horizontal level than the second feature.
[0141] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.
[0142] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.
Claims
1. A method for detecting voids, characterized in that, include: Step S1: Coat the first side of the wafer under test in the thickness direction with a flowable marker, place the wafer under test in the receiving cavity, and seal the wafer under test with the inner wall of the receiving cavity so that the wafer under test divides the receiving cavity into a first chamber and a second chamber that are not connected. The first chamber corresponds to the first side and the second chamber corresponds to the second side of the wafer under test in the thickness direction. Step S2: Change the air pressure of the first chamber and / or the second chamber so that the air pressure of the first chamber is greater than the air pressure of the second chamber, and maintain the pressure difference between the first chamber and the second chamber for a first predetermined time after the pressure difference reaches a predetermined pressure difference. Step S3: Observe whether there are any markers on the side where the second side of the wafer to be tested is located, in order to determine whether there are any voids in the wafer to be tested.
2. The void detection method according to claim 1, characterized in that, In step S3, if no marker is observed on the side of the wafer to be tested containing the second side, After step S3, execute steps S4 and S5, or execute step S6: Step S4: Remove the markers from the first side of the wafer to be tested, observe whether there are markers on the side where the first side of the wafer to be tested is located, in order to determine whether there are voids in the wafer to be tested, and determine whether to execute step S5 based on the judgment result; Step S5: Coat the second side of the wafer to be tested with a marker and keep it for a second predetermined time. Remove the marker from the second side of the wafer to be tested and observe whether there is a marker on the side where the second side of the wafer to be tested is located, so as to determine whether there is a void in the wafer to be tested. Step S6: Coat the second side of the wafer under test with a marker and keep it for a third predetermined time. Remove the markers from the first and second sides of the wafer under test and observe whether there are markers on the side where the first side and the side where the second side of the wafer under test are located, so as to determine whether there are voids in the wafer under test.
3. The void detection method according to claim 2, characterized in that, In steps S4, S5 and S6, removing the markers on the wafer to be tested includes cleaning or polishing the wafer to be tested.
4. The void detection method according to claim 2, characterized in that, In step S4, removing the markers from the first side of the wafer to be tested includes: Step S41: Apply a protective film to the second side of the wafer to be tested; Step S42: Clean the first side surface of the wafer to be tested. In step S5, removing the markers from the second side of the wafer to be tested includes: Step S51: Apply a protective film to the first side of the wafer to be tested; Step S52: Clean the second side surface of the wafer to be tested.
5. The void detection method according to claim 1, characterized in that, The marker is a liquid or powder, and the coating thickness of the marker in step S1 is 2 mm to 2.5 mm.
6. The void detection method according to claim 1, characterized in that, In step S1, the wafer to be tested is placed horizontally, and the edge of the wafer to be tested is sealed to the wall of the receiving cavity. In step S2, the air pressure in the first chamber remains unchanged, and the second chamber located below the first chamber is evacuated so that the air pressure in the second chamber reaches a predetermined pressure.
7. The void detection method according to claim 1, characterized in that, In step S2, The predetermined pressure difference is 9 Pa to 12 Pa; and / or, The first predetermined duration is 1 min to 2 min.
8. The void detection method according to any one of claims 1-7, characterized in that, The marker is a fluorescent marker. In step S3, observation is performed under specific conditions, including irradiating the second side of the wafer under test with a fluorescent excitation lamp.
9. The void detection method according to claim 8, characterized in that, The specific conditions also include: the wafer to be tested is placed in a light-shielding box.
10. The void detection method according to claim 8, characterized in that, The markers include fluorescent proteins. The marker is a liquid, and also includes deionized water, anhydrous ethanol, acetone, or ethylene glycol; or, The marker is a powder with a particle size of 15μm to 30μm.
11. A cavity detection device, characterized in that, include: The housing has a receiving cavity and includes a first housing and a second housing. The second housing is movably connected to the first housing to open and close the receiving cavity. The inner wall of the receiving cavity is provided with an annular mounting position for sealing and clamping a wafer to be tested with a first side coated with a mark, so that the wafer to be tested divides the receiving cavity into a non-communicating first chamber and a second chamber. The first side is adapted to correspond to the first chamber. A pressure regulating structure is provided, which is connected to the receiving cavity and is used to regulate the pressure of the first chamber and / or the second chamber so that the pressure of the first chamber is greater than the pressure of the second chamber.
12. The cavity detection device according to claim 11, characterized in that, Also includes: A removal structure, which is disposed independently of the housing and is used to remove markers on the wafer to be tested.
13. The cavity detection device according to claim 12, characterized in that, The removal structure includes a cleaning structure or a polishing structure. The cleaning structure is used to clean the wafer to be tested, and the polishing structure is used to polish the wafer to be tested.
14. The cavity detection device according to claim 12, characterized in that, Also includes: A protective film structure is provided independently of the housing and is used to attach a protective film to the surface of the wafer to be tested. A cleaning structure is provided independently of the housing and is used to clean the surface of the wafer to be tested that is not covered with a protective film.
15. The cavity detection device according to claim 11, characterized in that, The first chamber is located above the second chamber, and the annular mounting position is horizontally arranged and formed between the first housing and the second housing.
16. The cavity detection device according to claim 15, characterized in that, Also includes: A sealing element, which is annular and seals between the first housing and the second housing, has a mounting groove formed on its inner peripheral wall, which is adapted to seal against the edge of the wafer to be tested.
17. The cavity detection device according to claim 15, characterized in that, The pressure regulating structure includes a vacuum pumping structure, which is located on the lower side of the housing and communicates with the second chamber via a connecting pipe. A switching valve is provided between one end of the connecting pipe and the second housing, and / or a switching valve is provided between one end of the connecting pipe and the vacuuming structure. The switching valve is used to control the opening and closing of the connecting pipe, and the opening degree of the switching valve is adjustable and suitable for adjusting the air intake of the second chamber; and / or, The lower side of the housing is supported by a bracket, which is located on the outer periphery of the vacuum structure.
18. The cavity detection device according to claim 11, characterized in that, The second chamber has a communication port on the side opposite to the first chamber. The pressure regulating structure includes a vacuum pumping structure, which is connected to the second chamber through the communication port. The void detection device further includes an adsorption platform, which is disposed in the second chamber and located on the side of the annular mounting position facing the communication port, so as to separate the annular mounting position from the communication port. The adsorption platform has a plurality of through adsorption holes.
19. The void detection device according to any one of claims 11-18, characterized in that, The marker is a fluorescent marker, and the cavity detection device further includes: A fluorescent excitation lamp is disposed independently of the housing and is used to irradiate the wafer under test.
20. The cavity detection device according to claim 19, characterized in that, Also includes: A light-shielding box has a cavity inside, the cavity being used to place the wafer to be tested, and a fluorescent excitation lamp is disposed in the light-shielding box and used to irradiate the wafer to be tested placed in the cavity.