Anti-interference serial port data transmission method and device, equipment and storage medium

Abstract

The application provides an anti-interference serial port data transmission method and device, equipment and a storage medium, and relates to the technical field of communication. The method applied to a data sending end comprises the following steps: splitting to-be-transmitted data into a plurality of to-be-transmitted data blocks; acquiring a first data check code of data in each to-be-transmitted data block; acquiring an error correction code of at least part of the data in each to-be-transmitted data block; for each to-be-transmitted data block, embedding the corresponding first data check code, a second data check code of an adjacent data block of the to-be-transmitted data block and the error correction code into the to-be-transmitted data block to obtain a corresponding target data block; combining the target data blocks to obtain target data, and sending the target data to a data receiving end. Through the technical scheme, the anti-interference capability of data transmission can be improved.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to an anti-interference serial port data transmission method, apparatus, device and storage medium. Background Technology

[0002] In related technologies, there are two main methods for data verification in Android serial communication: one is hardware-level verification, which relies on the UART (Universal Asynchronous Receiver / Transmitter) module. This method is fast and resource-efficient, but it can only detect single-bit errors and cannot handle sudden multi-bit errors. The other is software-level verification, which is whole-packet CRC (Cyclic Redundancy Check) verification. This method has strong detection capabilities, but it cannot locate the error position. If an error occurs, the entire packet must be retransmitted, which significantly increases transmission latency and power consumption. Summary of the Invention

[0003] This application aims to at least partially address one of the technical problems in the related art.

[0004] In a first aspect, this application proposes an anti-interference serial port data transmission method, the method comprising: splitting data to be transmitted into multiple data blocks to be transmitted; obtaining a first data checksum for the data in each data block to be transmitted; obtaining an error correction code for at least a portion of the data in each data block to be transmitted; for each data block to be transmitted, embedding the corresponding first data checksum, a second data checksum of the adjacent data block, and the error correction code into the data block to be transmitted to obtain a corresponding target data block; combining the target data blocks to obtain target data, and sending the target data to a data receiving end; wherein, for each target data block, the first data checksum and the second data checksum are used by the data receiving end to perform data verification on the target data block and the adjacent data blocks, and the error correction code is used by the data receiving end to perform data repair when data verification is abnormal.

[0005] In one implementation, the size of the data block to be transmitted is determined by the following steps: obtaining the data transmission quality index from the last data transmission; adjusting the preset baseline data block size based on the data transmission quality index to obtain the size of the data block to be transmitted.

[0006] Secondly, this application proposes an anti-interference serial port data transmission method, which is applied to a data receiving end. The method includes: receiving target data sent by a data sending end, the target data including multiple consecutive target data blocks, each target data block including a first data check code, a second data check code, and an error correction code, wherein the first data check code is a data check code corresponding to the data to be transmitted in the target data block, the second data check code is a data check code corresponding to the data to be transmitted in the adjacent data blocks of the target data block, and the error correction code is an error correction code corresponding to the data to be transmitted in the adjacent data blocks of the target data block; for each target data block, verifying the target data block based on the first data check code to obtain a first verification result, and verifying the adjacent data blocks of the target data block based on the second data check code to obtain a second verification result; in response to an abnormal first verification result and / or an abnormal second verification result, determining an abnormal data block based on the first verification result and the second verification result corresponding to each target data block, and performing data repair and / or data retransmission on the abnormal data block based on the error correction code.

[0007] In one implementation, the step of responding to an abnormal first verification result and / or an abnormal second verification result, determining abnormal data blocks based on the first verification result and the second verification result corresponding to each of the target data blocks, and performing data repair and / or data retransmission on the abnormal data blocks based on the error correction code, includes at least one of the following: For each target data block, if the first verification result is abnormal, the target data block is determined as an abnormal data block, and a first error correction code corresponding to the target data block is obtained from the adjacent data blocks of the target data block, and the data to be transmitted in the abnormal data block is repaired based on the first error correction code; For each target data block, if the second verification result is abnormal, the adjacent data blocks of the target data block are determined as abnormal data blocks, a second error correction code of the adjacent data blocks of the target data block is obtained, and the data to be transmitted in the adjacent data blocks of the target data block is repaired based on the second error correction code; If the first verification result and the second verification result of multiple consecutive target data blocks are abnormal, a binary recursive positioning algorithm is used to determine the abnormal data blocks, and the target abnormal data blocks are repaired.

[0008] In one implementation, the method further includes: in response to a data block repair failure, obtaining a data transmission quality index; in response to the data transmission quality index being less than an interference index threshold, sending a first retransmission request message to the data sending end, the first retransmission request message being used to request the data sending end to retransmit the abnormal data block; or, in response to the data transmission quality index being greater than or equal to the interference index threshold, sending a second retransmission request message to the data sending end, the first retransmission request message being used to request the data sending end to retransmit the abnormal data block, and retransmit adjacent data blocks of the abnormal data block.

[0009] Thirdly, this application proposes an anti-interference serial port data transmission device, which is applied to a data transmitting end. The device includes: a first processing module for splitting the data to be transmitted into multiple data blocks to be transmitted; a second processing module for obtaining a first data checksum of the data in each data block to be transmitted; a third processing module for obtaining an error correction code for at least a portion of the data in each data block to be transmitted; a fourth processing module for embedding the corresponding first data checksum, a second data checksum of the adjacent data block, and an error correction code into each data block to be transmitted to obtain a corresponding target data block; and a transceiver module for combining the target data blocks to obtain target data and sending the target data to a data receiving end. For each target data block, the first data checksum and the second data checksum are used by the data receiving end to perform data verification on the target data block and its adjacent data blocks, and the error correction code is used by the data receiving end to repair data when verification is abnormal.

[0010] In one implementation, the first processing module can determine the size of the data block to be transmitted by the following steps: obtaining the data transmission quality index at the time of the last data transmission; adjusting the preset baseline data block size based on the data transmission quality index to obtain the size of the data block to be transmitted.

[0011] Fourthly, this application proposes an anti-interference serial port data transmission device. The device is applied at a data receiving end and includes: a transceiver module for receiving target data sent by a data sending end. The target data includes multiple consecutive target data blocks. Each target data block includes a first data checksum, a second data checksum, and an error correction code. The first data checksum is the data checksum corresponding to the data to be transmitted in the target data block. The second data checksum is the data checksum corresponding to the data to be transmitted in the adjacent data blocks of the target data block. The error correction code is the data checksum corresponding to the data to be transmitted in the adjacent data blocks of the target data block. According to the corresponding error correction code; a first processing module is used to, for each target data block, verify the target data block based on the first data check code in the target data block to obtain a first verification result, and verify the adjacent data blocks of the target data block based on the second data check code to obtain a second verification result; a second processing module is used to, in response to the first verification result being abnormal and / or the second verification result being abnormal, determine the abnormal data block based on the first verification result and the second verification result corresponding to each target data block, and perform data repair and / or data retransmission on the abnormal data block based on the error correction code.

[0012] In one implementation, the second processing module can be used to: for each target data block, if the first verification result is abnormal, determine the target data block as an abnormal data block, obtain the first error correction code corresponding to the target data block from the adjacent data blocks of the target data block, and repair the data to be transmitted in the abnormal data block based on the first error correction code; for each target data block, if the second verification result is abnormal, determine the adjacent data blocks of the target data block as abnormal data blocks, obtain the second error correction code of the adjacent data blocks of the target data block, and repair the data to be transmitted in the adjacent data blocks of the target data block based on the second error correction code; if the first verification result and the second verification result of multiple consecutive target data blocks are abnormal, use a binary recursive positioning algorithm to determine the abnormal data blocks, and repair the target abnormal data blocks.

[0013] In one implementation, the transceiver module is further configured to: in response to a data block repair failure, obtain a data transmission quality index; in response to the data transmission quality index being less than an interference index threshold, send a first retransmission request message to the data sender, the first retransmission request message being used to request the data sender to retransmit the abnormal data block; or, in response to the data transmission quality index being greater than or equal to the interference index threshold, send a second retransmission request message to the data sender, the first retransmission request message being used to request the data sender to retransmit the abnormal data block and retransmit adjacent data blocks of the abnormal data block.

[0014] Fifthly, this application proposes an anti-interference serial port data transmission system, comprising: a data transmitting end configured to execute the anti-interference serial port data transmission method as described in the first aspect; and a data receiving end configured to execute the anti-interference serial port data transmission method as described in the second aspect.

[0015] In a sixth aspect, this application provides an electronic device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the at least one processor to perform the anti-interference serial port data transmission method as described in the first aspect, or to enable the at least one processor to perform the anti-interference serial port data transmission method as described in the second aspect.

[0016] In a seventh aspect, this application provides a storage medium storing instructions that, when executed on an electronic device, cause the electronic device to perform the method described in the first aspect, or cause the electronic device to perform the method described in the second aspect.

[0017] Eighthly, this application proposes a program product comprising at least one of a program and instructions, wherein when the program or instructions are executed by an electronic device, they implement the steps of the method described in the first aspect, or implement the steps of the method described in the second aspect.

[0018] The anti-interference serial port data transmission method, apparatus, device, and storage medium provided in this application allow the data transmitting end to split the data to be transmitted into multiple data blocks, embedding a first checksum, a second checksum of adjacent data blocks, and an error correction code of adjacent data blocks into each data block. Upon receiving a data block, the data receiving end can perform cross-checking based on the first and second checksums in the data block, and repair the data based on the error correction code when an anomaly is detected. This improves the anti-interference capability of data transmission.

[0019] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0020] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the following description of the embodiments taken in conjunction with the accompanying drawings, wherein:

[0021] Figure 1 This is a flowchart illustrating an anti-interference serial port data transmission method provided in an embodiment of this application;

[0022] Figure 2 This is a flowchart illustrating another anti-interference serial port data transmission method provided in an embodiment of this application;

[0023] Figure 3 This is a schematic diagram of an anti-interference serial port data transmission scheme provided in an embodiment of this application;

[0024] Figure 4 This is a schematic diagram of the structure of an anti-interference serial data transmission device provided in an embodiment of this application;

[0025] Figure 5 This is a schematic diagram of another anti-interference serial data transmission device provided in the embodiments of this application;

[0026] Figure 6 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0027] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and intended to explain this application, and should not be construed as limiting this application.

[0028] The interference-resistant serial port data transmission method and apparatus of this application are described below with reference to the accompanying drawings.

[0029] Figure 1 This is a flowchart illustrating an anti-interference serial port data transmission method provided in an embodiment of this application. This method can be applied to the data sending end. Figure 1 As shown, the method may include, but is not limited to, the following steps:

[0030] S101: Divide the data to be transmitted into multiple data blocks to be transmitted.

[0031] For example, the data to be transmitted is divided into blocks according to a preset block length and numbered to obtain multiple data blocks to be transmitted.

[0032] In some embodiments, the size of the data block to be transmitted can be determined by the following steps:

[0033] A1: The data transmission quality index is obtained from the last data transmission.

[0034] In the embodiments of this application, the above-mentioned data transmission quality indicators can be any one of the following: bit error rate, packet loss rate.

[0035] For example, the data sending end obtains the data quality transmission indicators from the last time it transmitted data with the data receiving end.

[0036] As an example, during each communication handshake phase, the data sender and data receiver exchange "interference environment fingerprints" to obtain data transmission quality indicators.

[0037] A2: Adjust the preset baseline data block size based on the data transmission quality index to obtain the size of the data block to be transmitted.

[0038] For example, taking the bit error rate as a data quality transmission indicator, if the bit error rate increases, the block length is reduced; if the bit error rate decreases, the block length is increased, in order to balance redundancy overhead and throughput.

[0039] In some embodiments, the size of the data block to be transmitted can be determined using the following formula:

[0040] Size of the data block to be transmitted = Size of the baseline data block × (1 - α × Error rate change rate)

[0041] Where α is an adjustment coefficient. For example, the error rate change rate mentioned above can be the bit error rate change rate.

[0042] S102: Obtain the first data checksum of the data in each data block to be transmitted.

[0043] For example, CRC calculation is performed on the data in each data block to be transmitted to obtain the corresponding data check code as the first data check code.

[0044] S103: Obtain error correction codes for at least a portion of the data in each block of data to be transmitted.

[0045] In some embodiments, the error correction code described above may be a Hamming code.

[0046] For example, the Hamming code of at least a portion of the data in each data block to be transmitted is obtained as the error correction code. This at least a portion of the data can be key data within the data to be transmitted.

[0047] S104: For each data block to be transmitted, embed the corresponding first data check code, the second data check code of the data block adjacent to the data block to be transmitted, and the error correction code into the data block to be transmitted to obtain the corresponding target data block.

[0048] In the embodiments of this application, for any data block to be transmitted, the data block adjacent to the data block to be transmitted may include the previous data block adjacent to the data block to be transmitted, and / or the next data block adjacent to the data block to be transmitted.

[0049] S105: Combine the target data blocks to obtain the target data, and send the target data to the data receiving end.

[0050] In the embodiments of this application, for each target data block, the first data verification code and the second data verification code are used by the data receiving end to perform data verification on the target data block and the adjacent data blocks of the target data block, and the error correction code is used by the data receiving end to perform data repair when the data verification is abnormal.

[0051] For example, target data blocks are sequentially combined into target data, and the target data is sent to the data receiving end.

[0052] In some embodiments, the operating system of the data sending device can be Android. The data sending end can call the underlying C / C++ serial port driver interface through JNI (Java Native Interface) and use the write() system call to directly write the segmented data to the kernel serial port buffer, avoiding extra copying at the Java layer and improving real-time performance.

[0053] In some embodiments, the data sender can maintain a sending status table that records the sending status of each target data block (e.g., sent, awaiting retransmission, acknowledged). When an error is detected, only the corresponding target data block is marked and retransmitted, thereby avoiding the retransmission of the entire packet and improving data transmission efficiency.

[0054] By implementing the embodiments of this application, the data sending end can split the data to be transmitted into multiple data blocks, obtain the checksum and error correction code corresponding to each data block, and then combine them to obtain the target data block. The target data block is then transmitted to the data receiving end, allowing the data receiving end to perform corresponding processing based on the checksum and error correction code in each target data block. This improves the anti-interference capability of data transmission.

[0055] The above embodiments of this application describe the anti-interference serial port data transmission method provided by the embodiments of this application from the perspective of the data sending end. Next, the anti-interference serial port data transmission method provided by the embodiments of this application will be further described from the perspective of the data receiving end.

[0056] Please see Figure 2 , Figure 2 This is a flowchart illustrating another anti-interference serial port data transmission method provided in an embodiment of this application. This method can be applied to the data receiving end. For example... Figure 2 As shown, the method may include, but is not limited to, the following steps:

[0057] S201: Receive target data sent by the data sender. The target data includes multiple consecutive target data blocks. Each target data block includes a first data check code, a second data check code, and an error correction code. The first data check code is the data check code corresponding to the data to be transmitted in the target data block. The second data check code is the data check code corresponding to the data to be transmitted in the adjacent data block of the target data block. The error correction code is the error correction code corresponding to the data to be transmitted in the adjacent data block of the target data block.

[0058] S202: For each target data block, the target data block is verified based on the first data check code in the target data block to obtain a first verification result, and the adjacent data blocks of the target data block are verified based on the second data check code to obtain a second verification result.

[0059] For example, when the data receiving end receives each target data block, it uses the first data check code in the target data block to check the data to be transmitted in the target data block to obtain a first check result, and uses the second data check code in the target data block to check the data to be transmitted in the adjacent data blocks of the target data block to obtain a second check result.

[0060] S203: In response to an abnormal first verification result and / or an abnormal second verification result, an abnormal data block is determined based on the first verification result and the second verification result corresponding to each target data block, and the abnormal data block is repaired and / or retransmitted based on the error correction code.

[0061] In some embodiments, the above-mentioned response to an abnormal first verification result and / or an abnormal second verification result, determining an abnormal data block based on the first and second verification results corresponding to each target data block, and performing data repair and / or data retransmission on the abnormal data block based on the error correction code, may include: for each target data block, if the first verification result is abnormal, obtaining the error correction code corresponding to the target data block from the adjacent data blocks of the target data block, and repairing the data to be transmitted in the target data block based on the error correction code.

[0062] For example, for each target data block, if the first verification result is abnormal, the data receiving end determines that there is an error in the data to be transmitted in the target data block. Then, the data receiving end obtains the first error correction code corresponding to the target data block from the adjacent data blocks of the target data block, and repairs the data to be transmitted in the target data block based on the first error correction code.

[0063] Optionally, if the data receiver fails to repair the data to be transmitted in the target data block, the data receiver can instruct the data sender to retransmit the target data block. For example, the data receiver can send retransmission information to the data sender, which includes the number of the target data block that needs to be retransmitted.

[0064] In some embodiments, the above-mentioned response to an abnormal first verification result and / or an abnormal second verification result, determining an abnormal data block based on the first and second verification results corresponding to each target data block, and performing data repair and / or data retransmission on the abnormal data block based on the error correction code, may include: for each target data block, if the second verification result is abnormal, obtaining the second error correction code of the adjacent data block of the target data block, and repairing the data to be transmitted in the adjacent data block of the target data block based on the second error correction code.

[0065] For example, for each target data block, if the first verification result is abnormal and the second verification result is abnormal, the data receiving end determines that there is an error in the data to be transmitted in the adjacent data blocks of the target data block. Then, the data receiving end obtains the second error correction code from the target data block and repairs the data to be transmitted in the adjacent data blocks of the target data block based on the second error correction code.

[0066] Optionally, if the data receiver fails to repair the data to be transmitted in the adjacent data blocks of the target data block, the data receiver may inform the data sender to retransmit the adjacent data blocks of the target data block.

[0067] In some embodiments, the above-mentioned response to an abnormal first verification result and / or an abnormal second verification result, determining an abnormal data block based on the first and second verification results corresponding to each target data block, and performing data repair and / or data retransmission on the abnormal data block based on the error correction code, may include: if the first verification result and the second verification result of multiple consecutive target data blocks are abnormal, using a binary recursive positioning algorithm to determine the target abnormal data block, and retransmitting the target abnormal data block.

[0068] For example, using a binary recursive localization algorithm to determine the target abnormal data block may include the following steps: when two or more consecutive data blocks fail CRC checks, the multiple consecutive data blocks with abnormal check results are divided into a left half and a right half, and the reverse cross-CRC comparison between adjacent blocks is used to determine whether the error is located in the left half or the right half; the half containing the error is divided into two again and the above judgment steps are repeated to gradually narrow down the range; after finally locking the smallest error interval, only the sending end is notified to retransmit the data blocks in that interval to avoid retransmitting the entire packet.

[0069] In some embodiments, the data blocks to be retransmitted can be determined based on communication interference.

[0070] For example, if the current communication interference is low (e.g., the data transmission quality index is greater than or equal to a preset threshold), only the target data block with data errors is retransmitted; if the communication interference is high (e.g., the data transmission quality index is less than a preset threshold), the target data block with data errors and at least one data block adjacent to the target data block are retransmitted.

[0071] By implementing the embodiments of this application, the data receiving end can accept target data blocks and perform data verification based on the first data check code and the second data check code in each target data block, so as to perform data repair and / or data retransmission according to the verification results, thereby improving the anti-interference capability of data transmission.

[0072] Please see Figure 3 , Figure 3 This is a schematic diagram of an anti-interference serial port data transmission scheme provided in an embodiment of this application, as shown below. Figure 3 As shown. Step 1: At the sending end, the data packet to be transmitted is divided into multiple sub-blocks of fixed block length and numbered; during each communication handshake phase, the sending end and the receiving end exchange "interference environment fingerprints" generated based on the bit error rate of the previous batch of communication. If a high bit error rate is detected, the block length is automatically reduced; if the bit error rate is low, the block length is increased to balance redundancy overhead and throughput.

[0073] Step 2: Calculate the checksum using CRC32 for each sub-block, insert the CRC into the tail of the next sub-block, and embed the Hamming code checksum of the key data of the adjacent sub-block into a specific bit segment of each sub-block to achieve cross-block redundancy protection.

[0074] Step 3: In the Android system, the underlying C / C++ serial port driver interface is called via JNI, and the write() system call is used to directly write the segmented data to the kernel serial port buffer, avoiding extra copying at the Java layer and improving real-time performance. A transmission status table is maintained at the sending end to record the status of each block, and when an error is detected, only the corresponding block is marked for retransmission, avoiding retransmission of the entire packet.

[0075] Step 4: When receiving each sub-block, the receiving end performs dual verification using both the forward CRC at the end of the block and the reverse CRC within the block to determine whether the error occurred in the current block or an adjacent block. If the forward CRC verification fails but the reverse CRC verification passes, the error is determined to be in the previous block; if the forward CRC verification passes but the reverse CRC verification fails, the error is determined to be in the current block; if both fail, it is determined that two adjacent blocks may have errors simultaneously, requiring further comparison of adjacent blocks or entry into the interval location process. When two consecutive blocks are detected to have CRC mismatches, the error interval is divided in half, and the reverse cross-CRC comparison between adjacent blocks is used to determine whether the error is located in the left or right half, gradually narrowing down the range; after finally locking down the smallest error interval, only the sending end is notified to retransmit the data blocks in that interval, avoiding retransmission of the entire packet.

[0076] Step 5: First, apply Hamming code single-bit error correction to the erroneous block. If the correction is successful, confirm directly. When multiple-bit errors occur and cannot be completely corrected, use cross-block redundant bits in neighboring blocks to partially reconstruct the data, triggering a precise retransmission request only for unrecoverable bytes. During retransmission, if the interference is low, only retransmit a single erroneous block; if the interference is low, retransmit the erroneous block and its adjacent block.

[0077] Step 6: Write the reconstructed data into the receive buffer and concatenate them into data blocks to obtain a complete data packet. Alternatively, update the buffer with the received retransmitted data, and then concatenate the data in the buffer into data blocks to obtain a complete data packet.

[0078] Please see Figure 4 , Figure 4 This is a schematic diagram of an anti-interference serial port data transmission device provided in an embodiment of this application. This device 400 can be applied to a data transmitting end. For example... Figure 4 As shown, the device 400 includes: a first processing module 401, used to split the data to be transmitted into multiple data blocks to be transmitted; a second processing module 402, used to obtain a first data check code for the data in each data block to be transmitted; a third processing module 403, used to obtain an error correction code for at least a portion of the data in each data block to be transmitted; a fourth processing module 404, used to embed the corresponding first data check code, the second data check code of the adjacent data block, and the error correction code into each data block to be transmitted to obtain a corresponding target data block; and a transceiver module 405, used to combine the target data blocks to obtain target data and send the target data to a data receiving end; wherein, for each target data block, the first data check code and the second data check code are used by the data receiving end to perform data verification on the target data block and the adjacent data blocks, and the error correction code is used by the data receiving end to repair data when data verification is abnormal.

[0079] In one implementation, the first processing module 401 can determine the size of the data block to be transmitted by the following steps: obtaining the data transmission quality index at the time of the last data transmission; adjusting the preset baseline data block size based on the data transmission quality index to obtain the size of the data block to be transmitted.

[0080] The apparatus of this application embodiment allows the data sending end to split the data to be transmitted into multiple data blocks and obtain the checksum and error correction code corresponding to each data block, thereby combining them to obtain a target data block. This target data block is then transmitted to the data receiving end, enabling the data receiving end to perform corresponding processing based on the checksum and error correction code in each target data block. This improves the anti-interference capability of data transmission.

[0081] Please see Figure 5 , Figure 5 This is a schematic diagram of another anti-interference serial port data transmission device provided in an embodiment of this application. This device 500 can be applied to a data receiving end. For example... Figure 5 As shown, the device 500 includes: a transceiver module 501, configured to receive target data sent by a data sender, the target data including multiple consecutive target data blocks, each target data block including a first data checksum, a second data checksum, and an error correction code, wherein the first data checksum is the data checksum corresponding to the data to be transmitted in the target data block, the second data checksum is the data checksum corresponding to the data to be transmitted in the adjacent data block of the target data block, and the error correction code is the error correction code corresponding to the data to be transmitted in the adjacent data block of the target data block; a first processing module 502, configured to, for each target data block, verify the target data block based on the first data checksum to obtain a first verification result, and verify the adjacent data blocks of the target data block based on the second data checksum to obtain a second verification result; and a second processing module 503, configured to, in response to an abnormal first verification result and / or an abnormal second verification result, determine an abnormal data block based on the first verification result and the second verification result corresponding to each target data block, and perform data repair and / or data retransmission on the abnormal data block based on the error correction code.

[0082] In one implementation, the second processing module 503 can be used to: for each target data block, if the first verification result is abnormal, determine the target data block as an abnormal data block, obtain the first error correction code corresponding to the target data block from the adjacent data blocks of the target data block, and repair the data to be transmitted in the abnormal data block based on the first error correction code; for each target data block, if the second verification result is abnormal, determine the adjacent data blocks of the target data block as abnormal data blocks, obtain the second error correction code of the adjacent data blocks of the target data block, and repair the data to be transmitted in the adjacent data blocks of the target data block based on the second error correction code; if the first verification result and the second verification result of multiple consecutive target data blocks are abnormal, use a binary recursive positioning algorithm to determine the abnormal data blocks, and repair the target abnormal data blocks.

[0083] In one implementation, the transceiver module 501 is further configured to: in response to a data block repair failure, obtain a data transmission quality index; in response to the data transmission quality index being less than an interference index threshold, send a first retransmission request message to the data sending end, the first retransmission request message being used to request the data sending end to retransmit the abnormal data block; or, in response to the data transmission quality index being greater than or equal to the interference index threshold, send a second retransmission request message to the data sending end, the first retransmission request message being used to request the data sending end to retransmit the abnormal data block and retransmit adjacent data blocks of the abnormal data block.

[0084] Through the apparatus of this application embodiment, the data receiving end can accept target data blocks and perform data verification based on the first data check code and the second data check code in each target data block, so as to perform data repair and / or data retransmission according to the verification result, thereby improving the anti-interference capability of data transmission.

[0085] It should be noted that the explanation of the aforementioned anti-interference serial port data transmission method embodiment also applies to the anti-interference serial port data transmission device of this embodiment, and will not be repeated here.

[0086] To implement the above embodiments, this application also proposes an electronic device. Please see [link to relevant documentation]. Figure 6 , Figure 6 This is a schematic diagram of the structure of the electronic device provided in an embodiment of this application. For example... Figure 6 As shown, the electronic device 600 includes: a processor 601, and a memory 602 communicatively connected to the processor 601; the memory 602 stores computer execution instructions; the processor 601 executes the computer execution instructions stored in the memory to implement the method provided in the foregoing embodiments.

[0087] To achieve the above embodiments, this application also proposes an anti-interference serial port data transmission system, comprising: a data transmitting end configured to execute the method executed by the data transmitting end in the aforementioned embodiments; and a data receiving end configured to execute the method executed by the data receiving end in the aforementioned embodiments.

[0088] To implement the above embodiments, this application also proposes a storage medium storing instructions that, when executed on an electronic device, cause the electronic device to perform the methods provided in the foregoing embodiments.

[0089] To implement the above embodiments, this application also proposes a program product, including at least one of a program and instructions, wherein when the program and instructions are executed by an electronic device, they implement the steps of the method provided in the foregoing embodiments.

[0090] It should be noted that the acquisition, transmission, storage, use, and processing of data in this application comply with the relevant provisions of national laws and regulations and do not violate public order and good morals.

[0091] It should be noted that the information (including but not limited to user device information, user personal information, etc.), data (including but not limited to data used for analysis, data stored, data displayed, etc.) and signals involved in this application are all authorized by the user or fully authorized by all parties, and the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions.

[0092] It is worth noting that in the embodiments of this application, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, they do not mean that the applicant has used or necessarily used the solution.

[0093] In the description of this application, unless otherwise stated, " / " means "or", for example, A / B can mean A or B; "and / or" in this document is merely a description of the relationship between related objects, indicating that there can be three relationships, for example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone.

[0094] In the foregoing descriptions of the embodiments, the terms "some embodiments," "examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples. Moreover, without contradiction, those skilled in the art can combine and integrate the different embodiments or examples described in this specification, as well as the features of different embodiments or examples.

[0095] In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise expressly and specifically limited.

[0096] Any process or method description in the flowchart or otherwise herein can be understood as representing a module, segment, or portion of code comprising one or more executable instructions for implementing custom logic functions or processes, and the scope of the preferred embodiments of this application includes additional implementations in which functions may be performed not in the order shown or discussed, including substantially simultaneously or in reverse order depending on the functions involved, as should be understood by those skilled in the art to which embodiments of this application pertain.

[0097] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be specifically implemented in any storage medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "storage medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples of storage media (a non-exhaustive list) include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and programmable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the storage medium could be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0098] It should be understood that various parts of this application can be implemented using hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented using software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0099] Those skilled in the art will understand that all or part of the steps of the methods in the above embodiments can be implemented by a program instructing related hardware. The program can be stored in a computer-readable storage medium, and when executed, the program includes one or a combination of the steps of the method embodiments.

[0100] Furthermore, the functional units in the various embodiments of this application can be integrated into a processing module, or each unit can exist physically separately, or two or more units can be integrated into a module. The integrated module can be implemented in hardware or as a software functional module. If the integrated module is implemented as a software functional module and sold or used as an independent product, it can also be stored in a computer-readable storage medium.

[0101] The storage medium mentioned above can be a read-only memory, a disk, or an optical disk, etc. Although embodiments of this application have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting this application. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of this application.

Claims

1. An anti-interference serial port data transmission method, characterized in that, The method is applied to a data receiving end, and the method comprises: receiving target data sent by a data sending end, the target data comprising a plurality of continuous target data blocks, each target data block comprising a first data check code, a second data check code and an error correction code, the first data check code being a data check code corresponding to to-be-transmitted data in the target data block, the second data check code being a data check code corresponding to to-be-transmitted data in an adjacent data block of the target data block, and the error correction code being an error correction code corresponding to to-be-transmitted data in the adjacent data block of the target data block; for each target data block, performing check on the target data block based on the first data check code in the target data block to obtain a first check result, and performing check on the adjacent data block of the target data block based on the second data check code to obtain a second check result; in response to an abnormal first check result and / or an abnormal second check result, determining an abnormal data block based on the first check result and the second check result corresponding to each target data block, and performing data repair and / or data retransmission on the abnormal data block based on the error correction code.

2. The method of claim 1, wherein, The response to the abnormal first check result and / or the abnormal second check result, the determination of the abnormal data block based on the first check result and the second check result corresponding to each target data block, and the performance of data repair and / or data retransmission on the abnormal data block based on the error correction code comprise at least one of the following: for each target data block, if the first check result is abnormal, the target data block is determined as an abnormal data block, a first error correction code corresponding to the target data block is obtained from the adjacent data block of the target data block, and the to-be-transmitted data in the abnormal data block is repaired based on the first error correction code; for each target data block, if the second check result is abnormal, the adjacent data block of the target data block is determined as an abnormal data block, a second error correction code of the adjacent data block of the target data block is obtained, and the to-be-transmitted data in the adjacent data block of the target data block is repaired based on the second error correction code; if the first check result of a plurality of continuous target data blocks is abnormal and the second check result is abnormal, a binary recursive positioning algorithm is used to determine an abnormal data block, and the abnormal data block is repaired.

3. The method of claim 2, wherein, The method further comprises: in response to data block repair failure, obtaining a data transmission quality index; in response to the data transmission quality index being less than an interference index threshold, sending first retransmission request information to the data sending end, the first retransmission request information being used to request the data sending end to resend the abnormal data block; or, in response to the data transmission quality index being greater than or equal to an interference index threshold, sending second retransmission request information to the data sending end, the first retransmission request information being used to request the data sending end to resend the abnormal data block and the adjacent data block of the abnormal data block.

4. An anti-interference serial port data transmission method, characterized in that, The method is applied to a data sending end, and the method comprises: splitting to-be-transmitted data into a plurality of to-be-transmitted data blocks; obtaining a first data check code of data in each of the to-be-transmitted data blocks; obtaining an error correction code of at least part of data in each of the to-be-transmitted data blocks; for each of the to-be-transmitted data blocks, embedding the corresponding first data check code, a second data check code of an adjacent data block of the to-be-transmitted data block, and the error correction code into the to-be-transmitted data block to obtain a corresponding target data block; combining each of the target data blocks to obtain target data, and sending the target data to a data receiving end, so that the data receiving end performs the method according to any one of claims 1-3 based on the target data.

5. The method of claim 4, wherein, The size of the to-be-transmitted data block is determined by the following steps: obtaining a data transmission quality index at the last data transmission; adjusting a preset reference data block size based on the data transmission quality index to obtain the size of the to-be-transmitted data block.

6. An anti-interference serial port data transmission device, characterized in that, The device is applied to a data receiving end, and the device comprises: a transceiving module, configured to receive target data sent by a data sending end, the target data comprising a plurality of continuous target data blocks, each of the target data blocks comprising a first data check code, a second data check code, and an error correction code, the first data check code being a data check code corresponding to to-be-transmitted data in the target data block, the second data check code being a data check code corresponding to to-be-transmitted data in an adjacent data block of the target data block, and the error correction code being an error correction code corresponding to to-be-transmitted data in the adjacent data block of the target data block; a first processing module, configured to, for each of the target data blocks, perform check on the target data block based on the first data check code in the target data block to obtain a first check result, and perform check on an adjacent data block of the target data block based on the second data check code to obtain a second check result; a second processing module, configured to, in response to an abnormality of the first check result and / or an abnormality of the second check result, determine an abnormal data block based on the first check result and the second check result of each of the target data blocks, and perform data repair and / or data retransmission on the abnormal data block based on the error correction code.

7. An anti-interference serial port data transmission device, characterized in that, The device is applied to a data sending end, and the device comprises: a first processing module, configured to split to-be-transmitted data into a plurality of to-be-transmitted data blocks; a second processing module, configured to obtain a first data check code of data in each of the to-be-transmitted data blocks; a third processing module, configured to obtain an error correction code of at least part of data in each of the to-be-transmitted data blocks; a fourth processing module, configured to, for each of the to-be-transmitted data blocks, embed the corresponding first data check code, a second data check code of an adjacent data block of the to-be-transmitted data block, and the error correction code into the to-be-transmitted data block to obtain a corresponding target data block; a transceiving module, configured to combine each of the target data blocks to obtain target data, and send the target data to a data receiving end, so that the data receiving end performs the method according to any one of claims 1-3 based on the target data.

8. An electronic device, comprising: comprise: a processor, and a memory connected to the processor in communication; the memory stores computer execution instructions; The processor executes computer-executable instructions stored in the memory to implement the method of any of claims 1-3, 4, or 5.

9. A storage medium having stored therein instructions, the storage medium comprising: The instructions, when executed on the electronic device, cause the electronic device to perform the method of any of claims 1-3, 4, or 5.

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