Semiconductor equipment system
By adding a purge cleaning chamber to the semiconductor equipment system, and using top and back purge components combined with an air extraction pipe to clean the back of the wafer, the problem of particle contamination on the back of the wafer is solved, wafer quality and yield are improved, and the risk of particle falling off is reduced.
Patent Information
- Application Number
- CN202410805381.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-20
- Publication Date
- 2025-12-23
AI Technical Summary
In existing technologies, defects and yield problems caused by back-side particle contamination are difficult to solve effectively. In particular, during wafer transfer, back-side particle contamination increases the risk of particles falling off the underlying wafer surface, affecting subsequent process steps and product quality.
A purge cleaning chamber is added to the semiconductor equipment system, including a transfer area and a cleaning area. A mechanical transfer arm is used to transfer the wafer to the cleaning area. The particles on the back of the wafer are purged and cleaned by the top and back purge components combined with the air extraction pipe, ensuring the cleanliness of the wafer back before it is transferred to the wafer transfer box.
It effectively reduces particle defects on the back side of the wafer, improves wafer quality and reliability, reduces the risk of particle falling off, increases the yield of the final product, and reduces defects in the manufacturing process.
Smart Images

Figure CN121192007A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor technology and relates to a semiconductor device system. Background Technology
[0002] Chemical vapor deposition (CVD) is a commonly used technique in semiconductor manufacturing to deposit thin films on wafer surfaces. When the wafer undergoes processing in a CVD machine, the wafer backside comes into contact with lift pins used to lift and lower the wafer, and with heaters used to support and heat the wafer. During the CVD reaction, some residual particles inevitably adhere to the heaters, lift pins, and other components within the reaction chamber, resulting in significant particle contamination on the wafer backside. Please refer to [link to relevant documentation]. Figure 1 This is a schematic diagram showing a defect on the back of a wafer corresponding to the position of a ejector pin.
[0003] Wafers pass through multiple devices and environments at different stages of the manufacturing process. When wafers are in the loadlock, cooling station, and foup, severe particle contamination on the back of the upper wafer increases the risk of particles falling onto the surface of the lower wafer, leading to various defects and contaminating equipment in subsequent process steps. Please refer to [link to relevant documentation]. Figure 2 The image shows a schematic diagram of particles falling from the back of the wafer into the wafer surface below in a wafer transfer box.
[0004] Therefore, removing defects on the back of the wafer before it enters common areas such as cooling stations and wafer transport boxes is a solution to improve subsequent particulate contamination.
[0005] By inspecting the defects on the back side of the wafer and performing energy-dispersive X-ray spectroscopy (EDX analysis), it was found that the defects on the back side of the wafer were mainly caused by large-diameter particles. Experiments verified that such large-diameter true particles can be easily removed by the scrubber process.
[0006] How to modify semiconductor manufacturing equipment to clean the back of the wafer before transferring it into the wafer transfer box after semiconductor processing, reduce large-diameter particle defects on the back of the wafer, improve wafer quality and reliability, thereby reducing defects in the manufacturing process and increasing the yield of the final product, has become an important technical problem that urgently needs to be solved by those skilled in the art.
[0007] It should be noted that the above introduction to the technical background is only for the purpose of providing a clear and complete explanation of the technical solutions of this application and facilitating understanding by those skilled in the art. It should not be assumed that these technical solutions are known to those skilled in the art simply because they have been described in the background section of this application. Summary of the Invention
[0008] In view of the shortcomings of the prior art described above, the purpose of this invention is to provide a semiconductor device system to solve the defect and yield problems caused by back-side particle contamination of wafers in the prior art.
[0009] To achieve the above and other related objectives, the present invention provides a semiconductor device system, comprising:
[0010] The loading and locking chamber includes a first wafer storage chamber for storing wafers that have undergone semiconductor processing.
[0011] The cleaning chamber includes a transfer area and a cleaning area. The transfer area is equipped with a mechanical transfer arm to transfer wafers from the first wafer storage chamber to the cleaning area. The cleaning area is equipped with a second wafer storage chamber, which contains a cleaning assembly. The cleaning assembly includes a wafer fixing component, a top blowing component, a back blowing component, and an exhaust pipe. The wafer fixing component is used to fix the edge of the wafer. The top blowing component is used to blow gas to the front side of the wafer. The back blowing component is used to blow gas to the back side of the wafer to blow off particles attached to the back side of the wafer. The exhaust pipe is located below the wafer to discharge gas carrying the blown-off particles.
[0012] Optionally, the wafer fixing component includes at least one pair of latches that can move toward each other to fix the wafer and move away from each other to release the wafer.
[0013] Optionally, the top blowing component includes a blowing panel disposed above the wafer, and the side of the blowing panel facing the wafer has a plurality of blowing holes or blowing grooves.
[0014] Optionally, the back-blowing component includes a spray gun and an air supply pipe connected to the spray gun.
[0015] Optionally, the back-blowing component further includes a guide rail on which the spray gun can be slidably mounted.
[0016] Optionally, the purge cleaning chamber adopts a double-layer chamber structure in the cleaning area. The double-layer chamber structure includes a lower chamber and an upper chamber arranged sequentially from bottom to top. The lower chamber and the upper chamber are isolated from each other. The upper chamber includes one or more second wafer storage chambers.
[0017] Optionally, the upper chamber includes a plurality of second wafer storage chambers, with adjacent second wafer storage chambers isolated from each other. The transfer area is also provided with a moving guide rail, and the mechanical transfer arm is slidably mounted on the moving guide rail to slide between the plurality of second wafer storage chambers.
[0018] Optionally, the semiconductor device system includes a chemical vapor deposition chamber, and the semiconductor-processed wafer includes a wafer that has undergone a chemical vapor deposition process.
[0019] Optionally, the semiconductor device system further includes a front-end interface and a loading port, the loading port being used to load a wafer transfer box, and the front-end interface being located between the purge cleaning chamber and the loading port for transferring wafers between the purge cleaning chamber and the loading port.
[0020] Optionally, the front-end interface integrates a cooling station.
[0021] As described above, the semiconductor device system of the present invention includes a loading and locking chamber and a purge and cleaning chamber. The loading and locking chamber includes a first wafer storage chamber for storing wafers that have undergone semiconductor processing. The purge and cleaning chamber includes a transfer area and a cleaning area. The transfer area is provided with a mechanical transfer arm to transfer wafers from the first wafer storage chamber to the cleaning area. The cleaning area is provided with a second wafer storage chamber. The second wafer storage chamber is provided with a cleaning assembly. The cleaning assembly includes a wafer fixing component for fixing the wafer edge, a top purge component for blowing purge gas to the front side of the wafer, a back purge component for blowing purge gas to the back side of the wafer to blow off particles attached to the back side of the wafer, and an exhaust pipe for discharging gas carrying the blown-off particles. The semiconductor equipment system of the present invention achieves the cleaning of back-side particles of the wafer by adding a purge cleaning chamber that interacts with the loading locking chamber. This allows for cleaning of the back-side of the wafer after semiconductor processing but before transferring the wafer into the wafer transfer box, reducing particle defects on the back-side of the wafer, improving wafer quality and reliability, and reducing the risk of back-side particles falling off. This reduces defects in subsequent manufacturing processes and improves the yield of the final product. Attached Figure Description
[0022] Figure 1 This diagram shows a defect on the back of a wafer corresponding to the position of a ejector pin.
[0023] Figure 2 This diagram illustrates how particles from the back side of a wafer fall onto the surface of the wafer below in a wafer transfer box.
[0024] Figure 3 The diagram shown is a schematic representation of a semiconductor device system according to an embodiment of the present invention.
[0025] Figure 4 The diagram shows a schematic representation of two adjacent second wafer storage chambers in one embodiment of the semiconductor device system of the present invention.
[0026] Explanation of reference numerals in the attached figures
[0027] 1 Chemical Vapor Deposition Chamber
[0028] 2 Loading Locking Chamber
[0029] 3. Purge and clean the chamber
[0030] 301 Teleportation Area
[0031] 302 Cleaning Area
[0032] 303 Mechanical Conveyor Arm
[0033] 304 partition
[0034] 305 Moving rail
[0035] 306 Second wafer storage chamber
[0036] 307 Exhaust pipe
[0037] 308 buckle
[0038] 309 Gas supply pipeline
[0039] 310 Air Blowing Panel
[0040] 311 spray gun
[0041] 312 Gas supply pipe
[0042] 313 guide rail
[0043] 314 Gap Valve
[0044] 4. Front-end Interface
[0045] 401 robotic arm
[0046] 5 Loading Port
[0047] 6. Buffer
[0048] 601 robotic arm
[0049] 7. Wafers
[0050] 8 particles Detailed Implementation
[0051] The following specific examples illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention.
[0052] It should be emphasized that the term "including / comprises" as used herein refers to the presence of a feature, whole, step, or component, but does not exclude the presence or addition of one or more other features, wholes, steps, or components.
[0053] Features described and / or illustrated for one embodiment may be used in the same or similar manner in one or more other embodiments, combined with features in other embodiments, or substituted for features in other embodiments.
[0054] In the detailed description of embodiments of the present invention, for ease of explanation, the schematic diagrams illustrating the device structure may be partially enlarged without adhering to the general scale, and the schematic diagrams are merely examples and should not limit the scope of protection of the present invention. Furthermore, in actual manufacturing, the three-dimensional spatial dimensions of length, width, and depth should be included.
[0055] For ease of description, spatial relation terms such as “below,” “under,” “lower than,” “below,” “above,” and “upper” may be used herein to describe the relationship between one element or feature shown in the accompanying drawings and other elements or features. It will be understood that these spatial relation terms are intended to include directions other than those depicted in the drawings for devices in use or operation. Furthermore, when a layer is referred to as being “between” two layers, it may be the only layer between the two layers, or there may be one or more layers in between.
[0056] In the context of this application, the structure described above the first feature may include embodiments in which the first and second features are in direct contact, or embodiments in which additional features are formed between the first and second features, such that the first and second features may not be in direct contact.
[0057] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the illustrations only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.
[0058] This invention provides a semiconductor device system; please refer to [link / reference]. Figure 3The diagram shown is a schematic representation of the semiconductor device system in one embodiment, including a loading locking chamber 2 and a purge cleaning chamber 3.
[0059] Specifically, the loading and locking chamber 2 includes a first wafer storage chamber for storing wafers processed by semiconductor technology. The wafers processed by semiconductor technology can be, but are not limited to, wafers processed by chemical vapor deposition (CVD). For ease of description, the wafers processed by semiconductor technology will be illustrated below using wafers processed by CVD as an example. Correspondingly, as... Figure 3 As shown, the semiconductor device system also includes a chemical vapor deposition chamber 1.
[0060] In some embodiments, the semiconductor device system further includes a front-end interface 4 and a loading port 5.
[0061] Specifically, the chemical vapor deposition chamber 1 is used to perform CVD processes to deposit the required thin films on the wafer; the load lock chamber 2 is a transition area for the wafer to enter and leave the CVD machine. In some embodiments, the semiconductor equipment system also includes a buffer chamber 6 located between the chemical vapor deposition chamber 1 and the load lock chamber 2, which provides a transition environment before the wafer enters or leaves the chemical vapor deposition chamber 1, reduces the entry of external contaminants, and provides a relatively stable and controlled environment. The buffer chamber 6 is equipped with a robotic arm 601 for transferring wafers; the front end interface 4 is a transition area for the wafer from the loading port to the production line, used to transfer the wafer between the purge cleaning chamber 3 and the loading port 5. The front end interface 4 has a robotic arm 401 for transferring wafers. In some embodiments, the front end interface 4 also integrates a cooling station for cooling the wafer; the wafer loading port 5 is used to load wafer transfer boxes, such as FOUP (Front Opening Unified Packet). The present invention adds an additional purge clean chamber between the loading locking chamber 2 and the front-end interface 4. This allows the wafers that have undergone thin film deposition in the chemical vapor deposition chamber 1 to be purge cleaned in the purge clean chamber 3 before being transferred into the wafer transfer cassette at the loading port 5. This achieves back-side cleaning and reduces the risk of particles from the back of the upper wafer falling onto the surface of the lower wafer after the wafer is placed in the wafer transfer cassette.
[0062] Specifically, the number of chemical vapor deposition chambers 1 can be one or more, for example... Figure 3The two chambers presented herein, each of the chemical vapor deposition chambers 1 can perform a CVD deposition process on one wafer at a time, or can perform a CVD deposition process on multiple wafers simultaneously.
[0063] Specifically, the loading and locking chamber 2 includes a first wafer storage chamber for storing wafers that have undergone the CVD process. In some embodiments, the loading and locking chamber 2 adopts a double-layer chamber structure, which includes a lower chamber and an upper chamber arranged sequentially from bottom to top. The lower chamber is used to place wafers to be transferred into the chemical vapor deposition chamber 1, and the upper chamber is used to place wafers transferred out of the chemical vapor deposition chamber 1.
[0064] As an example, the upper chamber of the loading locking chamber 2 includes one or more of the first wafer storage chambers, for example in Figure 3 In the illustrated embodiment, the loading and locking chamber 2 includes two wafer placement positions located in different areas on the same horizontal plane, corresponding to two first wafer storage chambers. The two adjacent first wafer storage chambers can be isolated from each other by a partition, or there may be no partition.
[0065] In some embodiments, in the double-layer chamber structure of the loading and locking chamber 2, the lower chamber and the upper chamber are isolated from each other, for example, there is a partition between the upper and lower chambers, so that the upper and lower chambers are separate cavities. When the wafers entering / exiting are simultaneously in the loading and locking chamber 2, the particles on the back of the upper wafer will not fall onto the crystal surface of the lower wafer.
[0066] Specifically, the purge and cleaning chamber 3 includes a conveying area 301 and a cleaning area 302. The cleaning area 302 is located on the side of the purge and cleaning chamber 3 closer to the front end interface 4, and the conveying area 301 is located on the side of the purge and cleaning chamber 3 away from the front end interface 4.
[0067] Specifically, the transfer area 301 is equipped with a mechanical transfer arm 303 to transfer the wafer in the first wafer storage chamber to the cleaning area 302. The cleaning area 302 is equipped with a second wafer storage chamber, and the second wafer storage chamber is equipped with a cleaning assembly. The cleaning assembly includes a wafer fixing component, a top blowing component, a back blowing component, and an exhaust pipe. The wafer fixing component is used to fix the edge of the wafer and set the wafer face upward. The top blowing component is used to blow gas to the front of the wafer. The back blowing component is used to blow gas to the back of the wafer to blow off particles attached to the back of the wafer. The exhaust pipe is located below the wafer to discharge the gas carrying the blown-off particles.
[0068] In some embodiments, the purge cleaning chamber 3 adopts a double-chamber structure, including a lower chamber and an upper chamber arranged sequentially from bottom to top. The lower chamber is used to place the wafer to be transferred into the chemical vapor deposition chamber 1, and the upper chamber is used to place the wafer transferred out of the chemical vapor deposition chamber 1. In some embodiments, the design may be to purge and clean only the upper chamber of the purge cleaning chamber 3.
[0069] As an example, the upper chamber of the purge cleaning chamber 3 includes one or more of the second wafer storage chambers, for example in... Figure 3 In the illustrated embodiment, the cleaning area 302 of the purge cleaning chamber 3 includes two different areas of wafer placement positions located on the same horizontal plane, corresponding to two second wafer storage chambers, so that two wafers can be purge cleaned simultaneously. Each second wafer storage chamber is configured with a set of the cleaning components.
[0070] As an example, two adjacent second wafer storage chambers are isolated from each other, for example, by a partition 304. The transfer area 301 is also provided with a moving guide rail 305, on which the mechanical transfer arm 303 is slidably mounted to slide between the plurality of second wafer storage chambers.
[0071] For example, please refer to Figure 4 The diagram shows a schematic of two adjacent second wafer storage chambers 306 in one embodiment. The wafer fixing component includes at least one pair of latches 308 that can move towards each other to fix the wafer and can move away from each other to release the wafer. The driving component of the latches 308 can be an electromagnetic motor. The top blowing component includes an air blowing panel 310 disposed above the wafer and connected to an air supply pipe 309. The side of the air blowing panel 310 facing the wafer has a plurality of air blowing holes or air blowing grooves. The back blowing component includes a spray gun 311 and an air supply pipe 312 connected to the spray gun 311. The back blowing component also includes a guide rail 313, on which the spray gun 311 can be slidably mounted.
[0072] In some other embodiments, the spray gun 311 includes a strip-shaped nozzle, so that the spray gun 311 can be fixedly set and can achieve the blowing of various areas of the wafer without the guide rail 313.
[0073] In some embodiments, the spray gun 3 includes an angle adjustment component for adjusting the angle of the nozzle, thereby enabling purging from different angles and expanding the purging range.
[0074] As an example, the cleaning assembly also includes a slit valve, for example... Figure 3As shown, each of the second wafer storage chambers is equipped with a corresponding slit valve 314 for the mechanical transfer arm 303 to transfer wafers.
[0075] As an example, the purging gas used in the purge cleaning chamber 3 includes N2. In one application scenario, when the wafer 7 is transferred from the transfer area 301 into the second wafer storage chamber, it is placed between two latches 308. Subsequently, the two latches 308 retract slightly to secure the wafer, and then the air blowing panel 310 above the wafer begins to release N2 for purging. Figure 4 (The direction of airflow is indicated by a straight arrow). At the same time, the air extraction pipe 307 starts to extract air, so that the airflow direction in the entire second wafer storage chamber is from top to bottom. This ensures that the particles 8 blown off during the subsequent cleaning of the wafer back by the spray gun 311 will not fall onto the film on the wafer front. After the air blowing panel 310 passes N2 for cleaning, the spray gun 311 starts to spray N2 and slides at a uniform speed with the guide rail 313 to clean the entire wafer back. The particles 8 blown off during the cleaning process are also extracted with the air, thus achieving the purpose of cleaning the wafer back.
[0076] In summary, the semiconductor device system of the present invention includes a loading and locking chamber and a purge and cleaning chamber. The loading and locking chamber includes a first wafer storage chamber for storing wafers that have undergone semiconductor processing. The purge and cleaning chamber includes a transfer area and a cleaning area. The transfer area is provided with a mechanical transfer arm to transfer wafers from the first wafer storage chamber to the cleaning area. The cleaning area is provided with a second wafer storage chamber. The second wafer storage chamber is provided with a cleaning assembly. The cleaning assembly includes a wafer fixing component for fixing the wafer edge, a top purge component for blowing purge gas to the front side of the wafer, a back purge component for blowing purge gas to the back side of the wafer to blow off particles attached to the back side of the wafer, and an exhaust pipe for discharging gas carrying the blown-off particles. The semiconductor equipment system of this invention achieves back-side chip cleaning by adding a purge cleaning chamber that interacts with the loading and locking chamber. This allows for back-side cleaning after semiconductor processing but before transferring the wafer into the wafer transfer box, reducing back-side chip defects, improving wafer quality and reliability, and lowering the risk of back-side chip loss. This reduces defects in subsequent manufacturing processes and improves the yield of the final product. Therefore, this invention effectively overcomes the various shortcomings of existing technologies and has high industrial applicability.
[0077] The above embodiments are merely illustrative of the principles and effects of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in the present invention should still be covered by the claims of the present invention.
Claims
1. A semiconductor device system, characterized in that, include: The loading and locking chamber includes a first wafer storage chamber for storing wafers that have undergone semiconductor processing. The cleaning chamber includes a transfer area and a cleaning area. The transfer area is equipped with a mechanical transfer arm to transfer wafers from the first wafer storage chamber to the cleaning area. The cleaning area is equipped with a second wafer storage chamber, which contains a cleaning assembly. The cleaning assembly includes a wafer fixing component, a top blowing component, a back blowing component, and an exhaust pipe. The wafer fixing component is used to fix the edge of the wafer. The top blowing component is used to blow gas to the front side of the wafer. The back blowing component is used to blow gas to the back side of the wafer to blow off particles attached to the back side of the wafer. The exhaust pipe is located below the wafer to discharge gas carrying the blown-off particles.
2. The semiconductor device system according to claim 1, characterized in that: The wafer securing component includes at least one pair of latches that can move toward each other to secure the wafer and that can move away from each other to release the wafer.
3. The semiconductor device system according to claim 1, characterized in that: The top blowing component includes a blowing panel disposed above the wafer, and the side of the blowing panel facing the wafer has a plurality of blowing holes or blowing grooves.
4. The semiconductor device system according to claim 1, characterized in that: The back-blowing component includes a spray gun and an air supply pipe connected to the spray gun.
5. The semiconductor device system according to claim 4, characterized in that: The back-blowing component also includes a guide rail, on which the spray gun can be slidably mounted.
6. The semiconductor device system according to claim 1, characterized in that: The purge cleaning chamber adopts a double-layer chamber structure in the cleaning area. The double-layer chamber structure includes a lower chamber and an upper chamber arranged sequentially from bottom to top. The lower chamber and the upper chamber are isolated from each other. The upper chamber includes one or more second wafer storage chambers.
7. The semiconductor device system according to claim 6, characterized in that: The upper chamber includes a plurality of second wafer storage chambers, with adjacent second wafer storage chambers isolated from each other. The transfer area is also provided with a moving guide rail, and the mechanical transfer arm is slidably mounted on the moving guide rail to slide between the plurality of second wafer storage chambers.
8. The semiconductor device system according to claim 1, characterized in that: The semiconductor device system includes a chemical vapor deposition chamber, and the semiconductor-processed wafer includes a wafer that has undergone a chemical vapor deposition process.
9. The semiconductor device system according to claim 1, characterized in that: The semiconductor equipment system also includes a front-end interface and a loading port. The loading port is used to load a wafer transfer box. The front-end interface is located between the purge and cleaning chamber and the loading port, and is used to transfer wafers between the purge and cleaning chamber and the loading port.
10. The semiconductor device system according to claim 9, characterized in that: The front-end interface integrates a cooling station.