A dynamic parameter adjustment method, PI control method and energy storage system
By employing a dynamic parameter tuning method in the PI controller, using different filters to obtain the bus deviation value, switching the response state, and adjusting the proportional parameter Kp, the problem of the PI controller being unable to balance response speed and stability under dynamic load changes is solved, achieving rapid response and steady-state stability of the bus voltage.
Patent Information
- Application Number
- CN202511724532.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-11-24
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2045-11-24
AI Technical Summary
When faced with dynamic load changes, PI controllers cannot balance dynamic response speed and steady-state stability, leading to bus voltage fluctuations or oscillations, or even system failures.
A dynamic parameter tuning method is adopted, which filters the bus voltage through two different filters to obtain the first bus deviation value and the second bus deviation value respectively. The response state of the PI controller is switched according to the change of the deviation value, and the proportional parameter Kp is dynamically adjusted to achieve the switching between fast response and slow response.
In dynamic response mode, it can quickly suppress bus voltage fluctuations, avoid loop oscillations, ensure smooth and stable bus voltage, and improve the dynamic response capability and steady-state stability of the system.
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Figure CN121193062B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The application relates to a voltage control technology, in particular to a dynamic parameter adjustment method, a PI control method and an energy storage system. BACKGROUND
[0002] DC converters play a vital role in power electronic systems, and their control performance directly affects the stability and dynamic response capability of the entire system. In most application scenarios, one of the core goals of DC control is to maintain the stability of the bus voltage, and the classic PI (proportional-integral) control algorithm is usually used. The algorithm takes the deviation between the actual bus voltage and the preset reference voltage as the error input, and stabilizes the bus voltage by adjusting the output of the PI controller.
[0003] When facing dynamic load changes, the PI controller shows inherent contradictions and limitations. The specific description is as follows:
[0004] In order to ensure that the system has sufficient stability margin in the steady state and avoid loop oscillation, the loop parameters usually need to be set at a small level. However, this conservative parameter setting method leads to slow response speed of the system when it encounters sudden heavy load or heavy load unloading, and the system cannot provide or absorb enough energy in time, thereby causing a significant drop or overshoot of the bus voltage, which may cause system failure or damage to the backend equipment.
[0005] On the contrary, in order to improve the dynamic response speed of the system, the loop parameters are set at a large level. Although this can respond in time at the moment of loading and unloading, in the steady state operation, due to the high loop gain, the system is prone to large and sustained oscillation, and the stability is poor, and even the control loop collapses. In addition, during the dynamic response process, the excessive loop parameters may cause the loop current to exceed the limit value that the hardware can withstand, triggering the hardware protection mechanism unnecessarily, and causing unnecessary system downtime. SUMMARY
[0006] The embodiments of the application provide a dynamic parameter adjustment method, a PI control method and an energy storage system.
[0007] A dynamic parameter adjustment control method is applied to a PI control process of a DC converter, the PI control process includes a fast response state for responding to bus voltage fluctuations in the PI control process and a slow response state for entering a stable PI control loop oscillation in the PI control process, and the method comprises:
[0008] starting the PI control process of the DC converter in the fast response state;
[0009] determining the response state in which the PI control loop enters according to the change of the first bus deviation value and the second bus deviation value.
[0010] When the entering response state is the fast response state, a deviation term input into a PI controller at a current time is determined according to the first bus deviation value and a preset reference voltage value;
[0011] When the entering response state is the slow response state, a deviation term input into a PI controller at a current time is determined according to the second bus deviation value and the preset reference voltage value;
[0012] A proportional parameter Kp of the PI controller is dynamically determined according to a size of the deviation term;
[0013] The first bus deviation value is an absolute difference value between the preset reference voltage value and a filtering result of a bus voltage sampling value by a first filter, and the second bus deviation value is an absolute difference value between the preset reference voltage value and a filtering result of the bus voltage sampling value by a second filter; the first filter and the second filter are both first-order RC filters, and a filtering coefficient of the first filter is smaller than a filtering coefficient of the second filter.
[0014] A PI control method of a DC converter, comprising:
[0015] The proportional parameter Kp of the voltage outer loop is adjusted by using the dynamic parameter adjustment control method described above.
[0016] An energy storage system, comprising:
[0017] A DC circuit;
[0018] An AC inversion circuit connected with the DC circuit; and
[0019] A processing unit configured to collect a voltage at a bus, the voltage at the bus being a voltage at a connection between the DC circuit and the AC inversion circuit, and perform steps of the dynamic parameter adjustment control method described above.
[0020] In the embodiments of the present application, the PI control process is divided into a fast response state and a slow response state, and based on bus deviation values corresponding to two different filtering coefficients, the purpose of considering dynamic response and steady-state stability in the PI control process is achieved; in the fast response state, the proportional parameter Kp value is determined based on the first bus deviation value, which can make a timely and powerful response to dynamic events such as load mutation, and effectively suppress the fluctuation amplitude of the bus voltage; in the slow response state, the proportional parameter Kp value is determined based on the second bus deviation value, which can effectively filter out interference, avoid loop oscillation, and ensure the smoothness and stability of the bus voltage in the steady state.
[0021] Other features and advantages of the present application will be set forth in the description that follows, and in part will be apparent from the description, or can be learned by practice of the application. The principles described herein can be employed in all embodiments of the application. BRIEF DESCRIPTION OF DRAWINGS
[0022] The accompanying drawings are included to provide a further understanding of the principles of the application and constitute a part of the specification, illustrate embodiments of the application and are included to explain the principles of the application and are not intended to limit the application to the embodiments described and shown herein.
[0023] Figure 1 A structural schematic diagram of an energy storage system provided for an embodiment of the present application is shown in FIG. 1.
[0024] Figure 2 A flowchart of a dynamic parameter adjustment method provided for Embodiment One of the present application is shown in FIG. 2.
[0025] Figure 3 A flowchart of a current inner loop reference current value compensation method provided for Embodiment Two of the present application is shown in FIG. 3.
[0026] Figure 4 A flowchart of an exit compensation method provided for Embodiment Three of the present application is shown in FIG. 4. DETAILED DESCRIPTION
[0027] The present application describes multiple embodiments, but the description is exemplary rather than limiting, and it will be apparent to those of ordinary skill in the art that many more embodiments and implementations are possible within the scope of the embodiments described in the present application. Although many possible combinations of features are shown in the drawings and discussed in the specification, many other combinations of the disclosed features are possible. Unless specifically intended otherwise, any feature or element of any embodiment can be used with any other feature or element of any other embodiment, or in any other embodiment, whether or not that feature or element is specifically disclosed in combination with the other feature or element in any embodiment. Unless specifically intended otherwise, any feature or element of any embodiment can be replaced by any other feature or element of any other embodiment, or in any other embodiment, whether or not that feature or element is specifically disclosed in combination with the other feature or element in any embodiment.
[0028] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features, and elements disclosed herein can also be combined with any conventional features or elements to form unique inventive solutions. Any feature or element of any embodiment can also be combined with features or elements from other inventive solutions to form another unique inventive solution. Accordingly, it is to be understood that any feature shown and / or discussed in the present application can be implemented alone or in any suitable combination. Embodiments are, therefore, not to be limited based on the possible
[0029] Furthermore, in describing representative embodiments, the specification can have presented the method and / or process as a particular sequence of steps. However, to the extent that the method or process depends on the particular order of steps, this description should not be construed as limiting because other steps can be performed in other sequences and / or omitted from the method or process. For example, it is contemplated that the steps of the method and / or process can be performed in various orders, and / or omitted, without changing the spirit or scope of the method and / or process. Accordingly, the particular order of steps presented in the specification should not be construed as a limitation on the claims. Furthermore, the claims should not be limited to the steps of the methods and / or processes presented in the specification, as they can be readily adapted to other methods and / or processes that are within the spirit and scope of the claims.
[0030] DC converter plays a vital role in power electronic system, and its control performance directly affects the stability and dynamic response capability of the whole system. In most application scenarios, one of the core goals of DC control is to maintain the stability of bus voltage, and the classical PI (Proportional-Integral) control algorithm is usually adopted. This algorithm takes the deviation between the actual bus voltage and the preset reference voltage as the error input, and stabilizes the bus voltage by adjusting the output of the PI controller.
[0031] The embodiments of the present application provide a complete and adaptive DC converter PI control method. The method consists of three core schemes, which are:
[0032] Scheme one: the dynamic parameter adjustment control method in embodiment one below is adopted to adjust the proportional parameter Kp of the voltage outer loop.
[0033] This scheme intelligently switches between fast response and slow response states, and dynamically adjusts the proportional parameter Kp of the voltage outer loop based on the bus deviation value in the current response state, optimizes the parameters of the PI controller itself, and improves its adaptability to conventional and moderate dynamic load changes.
[0034] Scheme two: according to the current inner loop reference current value compensation method in embodiment two below, the current compensation value is obtained, and the cumulative value of the current compensation value and the output value of the voltage outer loop is taken as the current reference value of the current inner loop.
[0035] When a serious dynamic event is detected, this scheme two generates a current compensation value, which is directly superimposed on the reference value of the current inner loop as a powerful supplement to the PI control loop, and is specially used to cope with extreme dynamic conditions such as sudden heavy load / unload, and provides fast and powerful adjustment outside the PI loop.
[0036] Scheme three: the exit compensation method in embodiment three below.
[0037] The scheme controls the output of the voltage outer loop of the PI controller through intelligent working condition recognition, determines the safe, smooth and disturbance-free exit of the current inner loop compensation function, and prevents new instability from being introduced in the exit process itself.
[0038] The above three schemes can be independently applied or flexibly combined to meet different control needs in the full scene from steady-state operation to extreme dynamic events. Among them:
[0039] 1. Independent use
[0040] When scheme one is used independently, it is suitable for application scenarios where load changes are relatively smooth or the dynamic range is small, without additional triggering conditions. The processing unit always optimizes control performance by dynamically adjusting Kp, serving as an adaptive PI control mechanism, which can work independently to improve conventional performance.
[0041] When scheme two is used independently, the compensation operation is triggered when the current inner loop compensation condition is met. This scheme can be used as an independent function to intervene forcibly when serious voltage deviation is detected. In actual applications, without the cooperation of scheme three, there may be a short period of voltage fluctuation when the compensation exits.
[0042] When scheme three is used independently, the compensation exit scheme is executed after the current inner loop compensation operation is completed.
[0043] 2. Combined use
[0044] For the combination of scheme one and scheme two:
[0045] Both run in parallel, forming a master-slave cooperative relationship. Among them:
[0046] Scheme one is continuously running, and the system's running situation is monitored. When the compensation condition is met, scheme two is immediately started and executed.
[0047] Among them, the compensation output of scheme two has higher priority and directly acts on the current loop. When the compensation takes effect, the dynamic parameter adjustment of scheme one is still running in the background, but its PI controller output has been dominated by the compensation action.
[0048] For the combination of scheme two and scheme three:
[0049] When scheme two is started, the system continuously monitors whether to exit the compensation operation. Once the compensation operation is exited, scheme three is started immediately when the bus voltage recovers to the exit condition determined by scheme three, taking over and executing the exit process.
[0050] For the combination of scheme one, scheme two and scheme three (full scheme cooperation):
[0051] This is the most complete and optimal control mode, forming a complete control closed loop. The working process includes:
[0052] Normal operation: continue to run scheme one, achieve fine steady state and small dynamic control.
[0053] Limit coping: when encountering sudden load / unload that meets the compensation condition, execute scheme two, provide strong feedforward compensation, and jointly act with the PI of scheme one to suppress voltage fluctuation.
[0054] Intelligent exit: when the load disturbance subsides and the bus voltage recovers to the exit condition determined by scheme three, scheme three is started, which intelligently converts the current compensation value of scheme two into the PI loop, and then scheme two is closed.
[0055] Return to normal: after the compensation exit is executed, return to normal operation.
[0056] The three schemes in the application constitute a scalable and expandable cooperative control system. According to the complexity and performance requirements of the application scene, a suitable solution can be selected. Among them, the full-scheme cooperation provides a full-range optimal control experience from steady state to transient state and from control to exit, which is especially suitable for occasions with extremely high requirements for dynamic performance and stability, such as energy storage systems and high-power communication power supplies.
[0057] The scheme provided by the embodiment of the application is applied to a PI control process of a DC converter.
[0058] Specifically, it is suitable for a DC bus voltage control link of an energy storage system containing a DC converter, such as a power conversion system (PCS), an uninterruptible power supply (UPS), or a servo driver. The energy storage system can be widely applied to various DC converter topologies and applications (such as communication power supply, server power supply, new energy power generation, electric vehicle, etc.), and has high adaptability, especially for complex scenes with periodic disturbances introduced by inverters in the back stage.
[0059] In these application scenes, the DC bus in the back stage of the system is usually connected with an inverter or other dynamic load, and the large range and rapid change of the instantaneous power of the system will cause a severe impact on the bus voltage, and put forward extremely high requirements on the response speed and steady state precision of the PI control loop.
[0060] Referring to Figure 1 , an energy storage system to which the embodiment of the application is applied includes a DC circuit, an AC inverter circuit, and a processing unit.
[0061] The DC circuit can be a rectifier circuit (converts alternating current into direct current) or a battery boost circuit (boosts low-voltage direct current of a battery pack to stable high-voltage direct current). The core function of the DC circuit is to serve as an energy source of the system and to be responsible for establishing and maintaining a direct current bus voltage. The DC circuit is composed of power switching devices (such as IGBT, MOSFET), and the working state of the DC circuit is adjusted by receiving a control signal sent by the processing unit, so as to control the output of energy.
[0062] The AC inverter circuit is connected to the DC circuit at the direct current bus and serves as a load device of the system. The function of the AC inverter circuit is to invert direct current on the direct current bus into alternating current of a power frequency or a specific frequency, and supply the local load or feedback to the power grid. The AC inverter circuit is usually a bidirectional power conversion system (PCS). The disturbance source of the dynamic working condition of the energy storage system mainly comes from the AC inverter circuit. For example, when the PCS suddenly starts and is connected to the grid with high power, it is equivalent to suddenly adding heavy load on the direct current bus; when the PCS suddenly stops, it is equivalent to suddenly removing the load. In addition, the operation of the AC inverter circuit also injects a double-power-frequency ripple into the direct current bus.
[0063] The processing unit can be a digital signal processor (DSP), a microcontroller unit (MCU), etc., and is the core of the control system. The function of the processing unit is to collect the voltage at the bus, the voltage at the bus being the voltage at the connection between the DC circuit and the AC inverter circuit, and to perform the methods in scheme one, scheme two and scheme three, to dynamically adjust the proportional parameter Kp of the PI controller (scheme one), to perform compensation operation on the current inner loop of the PI controller (scheme two) or to adjust the internal state of the PI controller (scheme three).
[0064] In the processing unit, the voltage at the bus is collected in real time, and a filter is used to filter the obtained bus sampling voltage signal.
[0065] Preferably, the filter is a digital filter, and the collected voltage signal is a bus voltage sampling value.
[0066] In the present application, two first-order RC digital filters are used in parallel to filter the bus voltage sampling value. The working principle of the first-order RC digital filter is Y(n)=mY(n-1)+(1-m)X(n), where m=1 / (1+2*π*fc / fs), m is a filter coefficient, fc is a cutoff frequency of a low-pass filter, fs is a sampling frequency, Y(n) is a filtering value at the nth moment, Y(n-1) is a filtering value at the (n-1)th moment, and X(n) is a bus voltage sampling value.
[0067] Two first-order RC digital filters are respectively a first filter and a second filter; wherein a filter coefficient (for example, 0.88) of the first filter is smaller than a filter coefficient (0.999) of the second filter.
[0068] The first filter has a relatively high cutoff frequency and weak filtering effect, can better track the real fluctuation of the bus voltage, retain the main dynamic change information, and output a first filtered value which responds in time. The first filtered value and the preset reference voltage value are subjected to absolute difference operation to obtain a first bus deviation value.
[0069] The second filter has an extremely low cutoff frequency and strong filtering effect, can greatly smooth out high-frequency noise, sampling burr, and double power frequency ripple introduced by the later-stage inverter on the bus voltage, and output a second filtered value which changes very slowly and smoothly. The second filtered value and the preset reference voltage value are subjected to absolute difference operation to obtain a second bus deviation value.
[0070] In the present application, the reason for using two filter coefficients is that a single filtering method cannot meet the contradictory requirements of dynamic response and steady-state stability. If only the first filter is used, although the response is timely, the steady state is prone to loop oscillation due to various high-frequency disturbances. If only the second filter is used, although the steady state is stable, the system response to sudden changes is severely delayed. The present application comprehensively considers the signal characteristics of the two, and provides the most suitable signal source for different use requirements in the PI control process by using two first-order RC filters with different filter coefficients.
[0071] Embodiment one
[0072] PI controllers show inherent contradictions and limitations when facing dynamic load changes. The specific description is as follows:
[0073] In order to ensure that the system has sufficient stability margin in the steady state and avoid loop oscillation, the loop parameters usually need to be set at a small level. However, this conservative parameter setting method leads to slow response speed of the system when it encounters sudden heavy load or heavy load unloading, and the system cannot provide or absorb enough energy in time, thereby causing a significant drop or overshoot of the bus voltage, which may cause system failure or damage to the backend equipment.
[0074] On the contrary, in order to improve the dynamic response speed of the system, the loop parameters are set at a large level. Although the response is timely at the moment of loading and unloading, in the steady state operation, due to the high loop gain, the system is prone to sustained oscillation with large amplitude, and the stability is very poor, and even the control loop collapses. In addition, during the dynamic response process, the excessive loop parameters may cause the loop current to exceed the limit value that the hardware can withstand, trigger the hardware protection mechanism, and cause unnecessary system shutdown.
[0075] In view of this, the dynamic parameter adjustment control method provided by the embodiment of the present application dynamically adjusts the deviation value of the input PI controller based on the double-filter structure during the execution of the PI control process, so as to intelligently switch between the fast response state and the slow response state, and solve the inherent contradiction that the PI controller cannot balance the dynamic response speed and the steady-state stability.
[0076] The fast response state aims to enable the system to respond quickly and suppress the further drop or overshoot of the bus voltage when the bus voltage fluctuates sharply, and the slow response state aims to enable the system to run smoothly and avoid the oscillation of the PI control loop when the bus voltage tends to be stable or there is high-frequency disturbance. Moreover, the fast response state corresponds to the state of filtering the sampled bus voltage by using the first filter, and the slow response state corresponds to the state of filtering the sampled bus voltage by using the second filter.
[0077] Referring to Figure 2 The dynamic parameter adjustment control method described in the embodiment includes steps A11 to A13.
[0078] Step A11: Start the PI control process of the DC converter in the fast response state.
[0079] At the start of the system, the PI loop responds slowly, and problems such as slow voltage establishment or start-up overshoot are prone to occur. To solve this technical problem, the embodiment presets that the system enters the fast response state at the initial stage of starting, injects agility from the beginning of the control process, and ensures that the system has the innate advantage of coping with initial load impact and quickly establishing voltage, thereby laying a foundation for fast and smooth entry into the steady state.
[0080] Step A12: Determine the response state in which the PI control loop enters according to the change of the first bus deviation value and the second bus deviation value.
[0081] If only a single signal is used for state judgment, it is difficult to accurately distinguish between the real load dynamics and transient disturbance, and mis-switching is prone to occur.
[0082] To solve this technical problem, the bus deviation values with two different filter coefficients are calculated and used simultaneously as the basis for state decision. The first bus deviation value can closely track the instantaneous change of the bus and truly reflect the dynamic demand of the system, and the second bus deviation value can filter out high-frequency noise and ripple and reflect the macro trend of the system. By comprehensively analyzing the relationship between the two signals representing the instantaneous reality and the macro smoothness, it can be accurately judged whether the system is in a dynamic process that needs strong intervention or a steady process that should be pursued, so as to realize accurate and robust switching between the fast response state and the slow response state.
[0083] Step A13: When the entering response state is the fast response state, a first bus deviation value and a preset reference voltage value are used to determine a deviation term input into the PI controller at the current time.
[0084] When the system is determined to be in the fast response state, it indicates that the system is in a dynamic process such as a load surge or a load dump, and the core task is to enable the PI controller to quickly perceive and respond. The first bus deviation value is selected to ensure that the PI controller can obtain an error signal that can quickly reflect the real change of the bus voltage and, to some extent, suppresses extreme high-frequency noise, so that the PI controller can timely and accurately perceive dynamic events such as load mutation and make strong adjustments based thereon, thereby effectively suppressing the drop or overshoot of the bus voltage and ensuring that the control loop can obtain the highest response sensitivity under dynamic conditions, thereby quickly stabilizing the bus voltage.
[0085] Step A14: When the entering response state is the slow response state, a second bus deviation value and the preset reference voltage value are used to determine the deviation term input into the PI controller at the current time.
[0086] When the system is determined to enter the slow response state, it indicates that the system tends to be stable, and the primary goal of control changes from “fast response” to “suppress oscillation and maintain smoothness”. The second bus deviation value is selected because this signal can effectively filter out high-frequency interference such as sampling error, switching noise, or two times power frequency ripple introduced by the back-end inverter; by providing a “pure” deviation value to the PI controller, unnecessary adjustment of the PI controller to high-frequency noise is fundamentally avoided, greatly improving the steady-state stability and reliability of the system.
[0087] Step A15: The proportional parameter Kp of the PI controller is dynamically determined according to the size of the deviation term.
[0088] In this step, the proportional parameter Kp is dynamically adjusted according to the size of the deviation term currently used (i.e., the deviation term determined in step A13 or step A14), regardless of the state of the system.
[0089] By implementing the above steps, the PI control process is divided into a fast response state and a slow response state in this embodiment, and based on the bus deviation values corresponding to two different filtering coefficients, the purpose of considering both dynamic response and steady-state stability in the PI control process is achieved. In the fast response state, the proportional parameter Kp value is determined based on the first bus deviation value, which can respond to dynamic events such as load mutation in a timely and forceful manner, effectively suppressing the fluctuation amplitude of the bus voltage. In the slow response state, the proportional parameter Kp value is determined based on the second bus deviation value, which can effectively filter out interference, avoid loop oscillation, and ensure the smoothness and stability of the bus voltage in the steady state.
[0090] In a specific embodiment, in the dynamic parameter adjustment control method, for step A15: according to the size of the deviation term, the proportional parameter Kp of the PI controller is dynamically determined, and the specific implementation manner comprises:
[0091] In this embodiment, the deviation term (diff) is divided into three consecutive intervals, i.e., interval 1, interval 2 and interval 3, by using the first deviation threshold and the second deviation threshold, and different proportional parameter Kp determination rules are used in each interval, so that the control strength and the error size are accurately matched. The first deviation threshold and the second deviation threshold are both greater than 0, and the first deviation threshold is less than the second deviation threshold.
[0092] Interval 1: Set the fixed Kp value of the small deviation interval
[0093] When the deviation term is very small, the goal of PI control is to maintain the status quo and avoid unnecessary adjustment oscillation caused by the over-sensitivity of the PI controller. Therefore, when the deviation term (diff) is less than the first deviation threshold (for example, 0.7), the proportional parameter Kp is set to a fixed lower value (for example, 0.4).
[0094] When the system is running in a steady state or a condition close to the steady state, a smaller and stable proportional parameter is provided for the PI controller, which can control the stability of the system and avoid high-frequency chattering of the loop output caused by parameter fluctuations or small noises, thereby ensuring the smoothness and tranquility of the bus voltage.
[0095] Interval 2: Set the linearly changing Kp of the medium deviation interval
[0096] When the deviation starts to increase and the system enters a dynamic recovery process, the PI controller needs to gradually increase its adjustment strength. Therefore, when the first deviation threshold ≤ the deviation term ≤ the second deviation threshold (for example, 1.4), the proportional parameter Kp is determined to change linearly with the deviation term.
[0097] This linear change rule makes the response strength of the PI controller change proportionally with the error size, achieving a good balance between dynamic response and stability. It can provide stronger recovery force than the small deviation interval, and can also avoid sudden changes in the control output, ensuring the smoothness and controllability of the system during the transition from the dynamic process to the steady state.
[0098] For interval 2, this embodiment defines the change rule of Kp and the deviation term (diff) by using a linear function relationship, achieving the purpose of smoothly and predictably increasing the control strength as the error increases.
[0099] In the medium deviation interval (i.e. between the first deviation threshold and the second deviation threshold), the system is in a critical stage of transition from steady state to dynamic or from dynamic to steady state. At this time, if the parameter variation law is too flat, there is a problem of insufficient response, and if the variation is too aggressive, there is a problem of introducing overshoot or oscillation.
[0100] The embodiment defines the change of the proportional parameter Kp by the expression Kp = k1 x diff + k2, where k1 and k2 are preset constants, and k1 > 0.
[0101] This linear function design achieves two major core functions. First, the linear relationship ensures that when the deviation term changes slightly at any point in this interval, the proportional parameter Kp will only produce a smooth change in proportion to it, completely avoiding parameter jumps, thereby fundamentally eliminating the resulting loop oscillation. Second, the calculation of a linear function only requires a small amount of CPU clock cycles (usually only a few addition and subtraction and multiplication), which is crucial for real-time control systems that must run at high frequency, ensuring the timeliness of the control algorithm and avoiding interrupt timeout due to time-consuming calculations.
[0102] For example, k1 = 2, k2 = -1. In practical applications, by adjusting the constant k1 and the constant k2, the slope and starting point of the linear variation can be flexibly calibrated, so that this scheme can easily adapt to DC converters of different power levels and dynamic performance requirements.
[0103] By implementing the above linear function parameter tuning strategy, the embodiment ensures that the PI controller has smooth gain adjustment without sudden changes under transition conditions such as medium load changes, providing highly stable and predictable dynamic response for the system; using the most computationally efficient linear function allows the high-performance adaptive parameter tuning algorithm to run stably on low-cost PI controllers with limited resources, greatly expanding the applicable scenarios of this technical solution.
[0104] Interval 3: Set the nonlinear variation Kp of the large deviation interval
[0105] When the system encounters severe disturbances and the deviation further increases, the PI controller needs to exert its maximum ability to correct quickly. Therefore, when the deviation is greater than the second deviation threshold, the proportional parameter Kp is determined to vary nonlinearly with the deviation.
[0106] Using nonlinear growth means that the value of the proportional parameter Kp will change at a faster rate under large deviation conditions. This injects strong instantaneous adjustment capability into the PI controller, enabling it to suppress severe voltage dips or overshoots most quickly and most effectively, thereby significantly shortening the system's recovery time and effectively limiting the dynamic deviation amplitude of the bus.
[0107] For interval 3, this embodiment uses the quadratic function relationship Kp = a × diff 2 The algorithm, consisting of + b × diff + c (where a, b, and c are preset constants, and a > 0), fits the ideal exponential growth trend, achieving a powerful control effect that provides near-exponential growth at extremely low computational cost under extreme dynamic conditions.
[0108] When a large deviation occurs in the system, theoretically, the proportional parameter Kp needs to increase sharply to implement strong correction. Although the exponential function can perfectly describe this trend, its direct calculation on a conventional processor requires thousands of system clock cycles, which cannot meet the stringent timing requirements of high-frequency real-time control.
[0109] To address this technical problem, this embodiment employs a quadratic polynomial to approximate the growth curve of an exponential function. By appropriately selecting constants a, b, and c, the quadratic function can closely match the desired exponential curve within the critical large deviation range. This ensures that the growth pattern of the proportional parameter Kp is almost equivalent to the ideal exponential response in engineering performance, providing the system with a powerful and rapid recovery capability against severe voltage disturbances. Furthermore, the calculation of the quadratic function involves only simple multiplication and addition, typically requiring only a dozen system clock cycles. Its computation time is nearly a hundred times lower than that of the exponential function. This allows this high-performance nonlinear parameter tuning strategy to be easily embedded into high-frequency interrupt service routines without requiring upgrades to high-performance or high-cost processors, significantly improving the practicality and economy of this advanced control algorithm.
[0110] By implementing the nonlinear parameter tuning strategy of quadratic function fitting described above, this embodiment enables the system to provide strong adjustment force instantly when encountering large disturbances such as sudden heavy load / unload, which greatly suppresses the dynamic deviation of the bus and shortens the voltage recovery time. In addition, with a small computational overhead, it ensures the stable cycle and high-frequency execution of the control loop, fundamentally avoiding the risk of control delay or interruption timeout caused by computation time consumption.
[0111] In step A15 above, by implementing the segmented dynamic parameter tuning strategy, this embodiment uses a fixed small Kp in the small deviation range, which fundamentally avoids loop oscillations under steady-state and near-steady-state conditions and improves the stability margin of the system; the linear change strategy in the medium deviation range ensures the continuity of the PI controller gain change, making the transition of the system in different operating ranges natural and smooth without shock; the nonlinear rapid increase of Kp in the large deviation range gives the system a powerful means to cope with extreme conditions, greatly improving the dynamic response speed and anti-disturbance capability of the system, and achieving full coverage of different deviation ranges under the condition of matching the system's operating conditions.
[0112] In a specific embodiment, in the dynamic parameter adjustment control method, step A12 comprises: determining whether the PI control loop switches into the slow response state (confirming entering the steady state) according to the change of the first bus deviation value and the second bus deviation value when in the fast response state, specifically comprising steps A121 to A123.
[0113] The embodiment realizes accurate judgment of whether the system has completed the main dynamic response and entered the stable recovery stage by introducing the dynamic tracking mechanism of the maximum deviation record value (MaxErr) and combining the mutual relationship and time condition of the first bus deviation value and the second bus deviation value.
[0114] Step A121: setting a maximum deviation record value (MaxErr), and constantly updating it as the maximum value of the absolute difference between the first bus deviation value and the preset reference voltage value during the fast response state.
[0115] The initial value of the maximum deviation record value (MaxErr) is 0.
[0116] In order to accurately judge whether the deviation of the bus voltage has reached the peak and started to recover, it is necessary to dynamically track the maximum deviation degree of the system in the fast response state. The maximum deviation record value can record the maximum degree of the deviation of the bus voltage from the reference value in the current dynamic event in real time, and provides a key quantitative reference for the subsequent state switching judgment, so that the system can know the relative position of the current deviation degree in the historical dynamic process, and provides data support for judging whether the recovery has started.
[0117] Step A122: judging whether the PI control loop appears to be in shock according to the first bus deviation value at the current time, the second bus deviation value at the current time, and the maximum deviation record value updated at the previous time.
[0118] Step A123: when the loop appears to be in shock, determining that the PI control loop enters the slow response state from the fast response state to relieve the loop shock, and setting the maximum deviation record value to zero.
[0119] Setting the maximum deviation record value to zero marks the complete end of the current dynamic event, and prepares for the next unknown dynamic disturbance of the system. If the old value is not reset, it will interfere with the judgment of the severity of the new and independent dynamic event, which may cause the system to fail to enter the fast response state in time or correctly. Therefore, setting the maximum deviation record value to zero ensures that the judgment of each dynamic event is independent and accurate, greatly improving the robustness of the control strategy in the multi-event and continuous disturbance scene.
[0120] For the above step A122, if one of the following first condition and second condition is met, it is determined that the PI loop is oscillating.
[0121] In this step, when the loop is oscillating, the PI control loop is determined to be in the slow response state from the fast response state, and the loop gain and response speed are actively reduced to match the current smooth recovery working condition, avoiding the PI controller from over operating when the voltage has tended to be stable, thereby effectively preventing the possible loop oscillation in the later recovery period and ensuring that the bus voltage can converge to the reference value smoothly and without overshoot.
[0122] The first condition: if the first bus deviation value at the current time is greater than or equal to a third deviation threshold, and the third deviation threshold is greater than or equal to the updated maximum deviation record value at the previous time, and the absolute difference between the first bus deviation value and the second bus deviation value at the current time is less than or equal to a first preset value, it is determined that the PI control loop is oscillating.
[0123] For the first condition:
[0124] The system is in a process of continuously refreshing the history record of the deviation and continuously deteriorating. Specifically, the current first bus deviation value ≥ the third deviation threshold means that the event is serious enough to be concerned. And the third deviation threshold (such as 4V) ≥ the MaxErr at the previous time is a strong trigger condition. It indicates that the current serious deviation level not only reaches the attention threshold, but also reaches or exceeds the worst case recorded in the last control period. This indicates that the system is still in the state of inertial deterioration, and the voltage may further drop or overshoot. At this time, the primary task of the system is to deal with the deterioration, rather than considering state switching. Therefore, this condition itself does not directly trigger the switching to the slow state, but is combined with the signal consistency condition to form a complete switching mechanism. The signal consistency condition is: when the absolute difference between the first bus deviation value and the second bus deviation value at the current time is less than or equal to a first preset value (for example, 0.05V), it is determined that the loop is oscillating and meets the switching condition. In this signal consistency condition, the first bus deviation value reflects the instantaneous change, and the second bus deviation value reflects the macro trend; when the difference between the two is very small, it indicates that the severe instantaneous fluctuation has subsided, and the change of the bus voltage becomes smooth and consistent, indicating that the system has transitioned from the severe dynamic stage to the smooth recovery stage, and switching to the slow response state can effectively avoid overshooting and suppress the loop oscillation.
[0125] The first condition can capture the first recovery inflection point in the deteriorating trend, ensuring that the system only starts switching in the most severe dynamic process and just when the stabilization sign is emerging, solving the roughness problem of judging by a single signal threshold and greatly improving the accuracy of state switching.
[0126] The second condition: if the first bus deviation value at the current time is greater than or equal to the third deviation threshold, and the third deviation threshold is greater than or equal to the constantly updated maximum deviation record value for the first preset time, it is determined that the PI control loop is in oscillation.
[0127] For the second condition:
[0128] In some cases, the system may not start to recover immediately after reaching the maximum deviation record value, but may oscillate at a high level or recover slowly. Based on the above situation, the scenario described by the second condition is the high deviation hovering stage: the system has experienced a deterioration stage and recorded a MaxErr, and the first bus deviation value is hovering at a very high level although it is not a new high. This indicates that the severe deterioration stage has ended, but the system has failed to recover quickly and is trapped in a certain quasi-steady oscillation or slow recovery process. If it continues in this state, forcibly maintaining the fast response mode may not be conducive to system stability. Therefore, a time duration condition needs to be combined to form an overtime forced switching mechanism, which ensures that as long as it is in a severe deviation state for a long enough first preset time (for example, 40 ms), it is forced to exit the strong response mode that may not be applicable and enter the slow state that can better suppress oscillation, thus breaking the deadlock and ensuring the final convergence of the system.
[0129] The time duration condition described above can ensure the robustness of the switching mechanism and prevent the system from exiting the strong response mode due to the failure of individual conditions, thus sacrificing steady-state performance. It confirms the duration of dynamic events from the time dimension, ensuring that even under some non-ideal conditions, the system can enter the slow response state that is more suitable for steady-state operation after a reasonable time window, preventing the response state from being stuck.
[0130] In addition, the settings of the parameters used as the basis for judgment in the first condition and the second condition in the embodiment are not isolated or arbitrary, but are based on the setting of the physical characteristics and control objectives of the system. They, together with the judgment conditions in the embodiment, form a set of coordinated and robust judgment system.
[0131] For the third deviation threshold in the first condition, the third deviation threshold is determined according to the bus fluctuation range, which is used to effectively distinguish between real major dynamic events (such as load mutation) and inherent and periodic small fluctuations of the system.
[0132] Specifically, when connected with devices such as PCS, the bus will introduce a double power frequency (e.g. 100 Hz) ripple, and the fluctuation amplitude can reach ±1.5V. If the switching threshold is set in this range (e.g. 2V), the normal power frequency ripple of the system may trigger state switching, resulting in frequent switching of the response state. Therefore, the third deviation threshold is set to be more than twice the inherent fluctuation amplitude (e.g. 4V) as the normal fluctuation range, which is equivalent to setting a safety buffer zone.
[0133] Based on the above way of setting the third deviation threshold, it is ensured that only when the first bus deviation value significantly exceeds the normal fluctuation range, the system will judge it as a dynamic event that needs to be taken seriously, and start the corresponding state switching judgment logic, greatly enhancing the anti-interference ability and decision reliability of the switching mechanism.
[0134] For the first preset time in the above-mentioned second condition, the first preset time is set according to the period of bus voltage fluctuation cycle (e.g. double power frequency ripple).
[0135] Specifically, the first preset time is more than twice the period of bus voltage fluctuation cycle. For example, the period of double power frequency (e.g. 100 Hz) ripple is 10ms. If a high deviation state lasts at least 40ms, it means that it has covered at least 4 complete ripple periods. The duration of 40ms is enough for the system to be sure that the current recovery process is stable and real, rather than fluctuating between the peaks and troughs of the bus voltage fluctuation cycle.
[0136] Based on the above way of setting the first preset time, it provides reliability verification in the time dimension. It ensures that the high deviation state observed by the system is not a short-lived transient phenomenon, but a persistent trend, which can effectively prevent state frequent switching or mis-switching at the critical point due to transient fluctuations, and improve the determination accuracy of the response state.
[0137] In the above step A12, by implementing the above two judgment conditions based on different time bases and dynamic scenarios, it is determined whether to switch to the slow response state, the first condition is used to ensure that the recovery inflection point can be captured in time in the deterioration trend, and the second condition is used to prevent the system from falling into long-term oscillation under complex working conditions, and the above judgment mechanism makes the state switching adapt to various complex dynamic scenarios, greatly enhancing the adaptability and reliability of the control algorithm in real industrial environment.
[0138] In a specific embodiment, in the dynamic parameter adjustment control method, the above step A12 further includes: determining whether to switch to the fast response state when in the slow response state, specifically including the following steps A124 and A125.
[0139] The embodiment realizes accurate identification of the state that the system response lags behind the bus voltage fluctuation by continuously monitoring the change characteristics of the low-degree filtered bus deviation value, and triggers timely switching to the fast response state.
[0140] Step A124, in the slow response state, judging whether the PI control loop lags behind the bus voltage fluctuation according to the change of the first bus deviation value;
[0141] When the system is in the slow response state, the loop parameter is small and the response is slow. If the bus voltage starts to change rapidly due to new disturbance at this time, and the system fails to switch state in time, it will lead to regulation lag, and the bus voltage deviation will be enlarged. Therefore, in the slow response state, the first bus deviation value is continuously monitored, and based on the change characteristics, it is judged whether the PI control loop lags behind the bus voltage fluctuation, so as to ensure that the system will not appear slow reaction due to being in the slow response state, and ensure that the applicability of the current response state can be evaluated in real time.
[0142] Step A125, when the bus voltage fluctuation lags behind, determining that the PI control loop enters the fast response state from the slow response state and responds to the fluctuation of the bus voltage.
[0143] When the bus voltage fluctuation lags behind, it means that the response speed of the PI controller cannot keep up with the change speed of the bus voltage. Immediately start the state switching operation, switch from the slow response state focusing on smoothness and stability to the fast response state focusing on speed and strength, change the input source and proportional parameter determination strategy of the deviation term of the PI controller, fundamentally prevent regulation lag and performance deterioration caused by mode mismatch, effectively deal with the situation of lagging bus voltage fluctuation, and achieve the purpose of quickly suppressing voltage fluctuation and maintaining bus stability.
[0144] For step A124, if one of the third condition and the fourth condition is met, it is determined whether the PI control loop lags behind the bus voltage fluctuation.
[0145] Third condition: if the first bus deviation value at the current time is less than the second preset value, and the first bus deviation value is less than the second preset value for a second preset time, it is determined that the PI control loop lags behind the bus voltage fluctuation;
[0146] For the third condition:
[0147] After the system completes a dynamic adjustment, it can be long-term detained in the slow response state, thereby causing a slow response when facing the next disturbance. To solve this problem, the third condition in the embodiment indicates that the bus voltage has entered a very ideal steady state range, and the second preset time (100 ms) is used to limit the steady state to be maintained for a long enough time, thereby excluding the possibility of a transient coincidence and ensuring that the system has reached a real and sustained steady state.
[0148] Once it is confirmed that the system has stably entered the steady state, it is determined that there is no need to continue to stay in the slow response state, and the system is actively switched back to the fast response state, so that the system is reset to the highest response level, thereby fully preparing for the next unknown dynamic disturbance and eliminating the initial response lag caused by mode inertia from the root.
[0149] The fourth condition is that if the first bus deviation value at the current time is less than a third preset value, and the maximum value of the first bus deviation value within the third preset time before the current time and the maximum value of the first bus deviation value within the third preset time after the current time are greater than a fourth preset value, it is determined that the PI control loop lags behind the bus voltage fluctuation.
[0150] For the fourth condition, the third preset value is set as 0.5V, and the fourth preset value is set as 1.5V.
[0151] In the slow response state, if a sudden and severe load change occurs, the PI controller can not effectively respond, and the problem of transient lag and large voltage fluctuation can easily occur. To solve this problem, the fourth condition in the embodiment sets a trigger threshold by setting the current first bus deviation value to be less than the third preset value, so that the system detects the mutation under a relatively calm baseline. In addition, the peak value of the deviation in a sliding time window (for example, 6 ms) is compared to ensure that the detection window can cover at least one complete fluctuation peak, so that the mutation can be reliably captured, and the time window is short enough to respond quickly. When the peak value in the short time window changes by more than the fourth preset value (for example, 1.5V), it indicates that a severe, step-like disturbance has occurred.
[0152] Once it is confirmed that the system has a severe, step-like disturbance, it is determined that it cannot stay in the slow response state, and the system is actively switched back to the fast response state. This can quickly identify that the control output has seriously lagged behind the actual change of the voltage, and immediately determine that it is a lag state. This ensures that the system has enough processing time for subsequent switching to the fast response mode.
[0153] In addition, the parameters used as the basis for judgment in the third condition and the fourth condition in the embodiment are not isolated or arbitrary, but are based on the setting of the physical characteristics and control targets of the system. They, together with the judgment conditions in the embodiment, form a coordinated and robust judgment system.
[0154] The parameters in the third condition and the fourth condition are divided into two categories, one of which is a voltage threshold, and the other is a time threshold.
[0155] 1. Regarding the voltage threshold: the second preset value, the third preset value, and the fourth preset value
[0156] The relationship between the second preset value and the third preset value (the second preset value > the third preset value):
[0157] For the second preset value in the third condition, this condition is used to determine whether the system has entered and stabilized in a quasi-steady state very close to the reference voltage, which is a relatively loose but long-lasting stability determination. Therefore, the second preset value needs to be set relatively large (for example, 1V) to define a clear steady state region boundary. Only when the deviation is less than this value for a long time, it is considered that the system is stable enough, and it is safe to switch back to the fast response state from the slow response state to prepare for the next disturbance.
[0158] For the third preset value in the fourth condition, this condition is used to sensitively capture a new disturbance that suddenly appears on a seemingly calm baseline (small deviation), which is a detection for instantaneous mutation. Therefore, the third preset value needs to be set relatively small (for example, 0.5V) to establish a baseline very close to the reference value. Only when the system is in this very fine calm area, but a sudden detection of a large fluctuation greater than the fourth preset value in a short time before and after, it is determined that there is a new, fast disturbance, and it needs to be immediately switched to the fast response state.
[0159] Setting of the fourth preset value (determined according to the bus voltage fluctuation):
[0160] The fourth preset value (for example, 1.5V) is the critical point for determining whether a severe mutation occurs. Its setting is directly based on the inherent fluctuation amplitude (for example, ±1.5V) of the bus voltage sampling value of the system in a specific application scenario (such as the subsequent PCS).
[0161] Setting the fourth preset value based on the inherent fluctuation amplitude can effectively distinguish between real, severe load mutations and normal periodic ripples of the system, ensuring that only when the short-time fluctuation amplitude is much larger than the normal noise, it is determined as a dynamic event that needs to be responded immediately, thereby greatly reducing the probability of misjudgment, and improving the reliability and accuracy of the state switching decision.
[0162] 2. Regarding the time threshold: the second preset time and the third preset time
[0163] Setting of the second preset time (at least twice the bus voltage fluctuation period):
[0164] The setting of this time is closely related to the main periodic disturbance period in the system.
[0165] The second preset time is more than twice the bus voltage fluctuation period. For example, the period of the double power frequency (100 Hz) ripple is 10 ms. If the first bus deviation value is close to the preset reference voltage value for at least 100 ms, it means that it has covered at least 10 complete ripple periods. The duration of 100 ms is sufficient to convince the system that the current recovery process is stable and true, rather than fluctuating between the peaks and troughs of the bus voltage fluctuation period.
[0166] Requiring a stable state to last for at least two complete fluctuation periods constitutes a strong and persistent verification. It can be conclusively proven that the observed small deviation stable state is not a transient coincidence or at the trough of a periodic fluctuation, but that the system has truly and stably entered a steady state, preventing frequent or premature switching in a critical state and ensuring the reliability of the decision to switch to a fast response state.
[0167] The setting of the third preset time (the third preset time is greater than 1 / 2 of the bus voltage fluctuation period and less than a complete period):
[0168] The bus voltage fluctuation period refers to the period of the double power frequency (100 Hz) ripple (10 ms).
[0169] The third preset time is greater than half a fluctuation period (> 5 ms) to ensure that it can certainly cover a complete peak or trough, thereby reliably capturing the peak of the mutation; at the same time, it is less than a complete period (< 10 ms) to ensure that its response speed is fast enough to detect the mutation in time.
[0170] Based on the setting of this time, an optimal balance between capture reliability and response speed can be achieved, making the state switching mechanism both sensitive and reliable.
[0171] Based on the above judgment system, the state switching judgment mechanism of the embodiment can intelligently adapt to the real dynamic behavior of the system, and has anti-interference, speed and decision reliability, so as to realize precise and smooth mode switching under various complex working conditions.
[0172] In step A12, the two judgment conditions for different physical processes are used to determine whether to switch to the fast response state. The first condition is used to confirm the depth of the steady state, so that the system is actively reset to the standby state, ensuring inherent fast response to sudden disturbances and eliminating the risk of lag caused by mode conservation from the source. The second condition is used to detect and respond to millisecond-level events, quickly identifying lagging bus voltage fluctuations, especially in applications with extremely severe load changes. In addition, by setting reasonable time windows and voltage thresholds, the probability of false positives is greatly reduced, and the reliability of state switching is improved.
[0173] In the PI control method of the DC converter provided by the embodiments of the present application, the dynamic parameter adjustment control method described above is integrated and applied to the voltage outer loop control of the DC converter, so that the proportion parameter Kp of the voltage outer loop can be adjusted, and a high-performance PI control system that can adapt to changes in working conditions is constructed.
[0174] By using the double-filter value judgment, the bus voltage can be automatically switched between fast response and slow response states according to the actual dynamic behavior of the bus voltage, and the proportion parameter Kp can be finely adjusted according to the deviation. In addition, by applying all the aforementioned innovations (double response state, double filter, segmented Kp adjustment, and intelligent switching logic) to the core control loop of the voltage outer loop, the classic "speed-stability" trade-off problem in the DC control field is successfully solved. In the steady state, the optimized parameters can maintain high stability, and in the dynamic state, the response capability can be instantly improved, achieving two goals that cannot be achieved simultaneously by the previous fixed parameter controller. By effectively suppressing the bus voltage overshoot / drop in the dynamic process and the loop oscillation in the steady state, the electrical and thermal stresses on the hardware components such as bus capacitors and power switches are reduced, and the reliability and service life of the entire converter are improved.
[0175] Embodiment Two
[0176] In the face of extreme heavy load instantaneous injection or instantaneous discharge (for example, sudden addition of 1.5 times overload), the method of relying solely on adjusting the PI controller parameters still has its inherent limitations.
[0177] Specifically, in the dynamic parameter adjustment strategy, the upper limit of the proportional parameter Kp faces a dilemma. If the upper limit is set too large, in response to the above-mentioned limit dynamic process, although it can provide strong initial response strength, it is easy to cause large amplitude oscillation of the control loop, and when the load is suddenly increased, the rapidly increasing current command is easy to trigger the hardware overcurrent protection, resulting in unplanned shutdown of the system. Conversely, if the upper limit is set too small, the dynamic response strength of the system will be seriously insufficient when facing large disturbances, and the response will be slow, and in the process of sudden load increase and load decrease, it is still easy to cause bus under-voltage or over-voltage failure, endangering the safe operation of the downstream equipment.
[0178] In view of this, the application proposes an innovative current inner loop reference current value compensation method, aiming to solve the control problem in the above-mentioned limit dynamic condition. In the PI control process, based on the double filter structure, the integral delay of the PI controller and the complex parameter adjustment process are bypassed, and a current compensation value is directly generated based on the current voltage loop error, and is superimposed on the reference current value of the current inner loop, solving the inherent contradiction between response strength and stability in the limit transient overload condition.
[0179] Specifically, the present scheme uses two bus deviation values to undertake different functions: the first bus deviation value is used for sensitive sensing and triggering; and the second bus deviation value is used for smoothly determining the compensation value.
[0180] Referring to Figure 3 The execution process of the above-mentioned current inner loop reference current value compensation method includes steps B11 to B12.
[0181] Step B11: According to the power frequency ripple oscillation of the bus voltage and the first bus deviation value at the current time, it is determined whether the PI control at the current time meets the current inner loop reference current value compensation condition.
[0182] The ripple oscillation on the DC bus voltage has complex sources, and the ripple of the power frequency wave may contain fundamental component, double power frequency component and high frequency component. These periodic or non-periodic fluctuations are inherent characteristics of the system, and are not always a sign of load mutation. If the first bus deviation value is used as the trigger condition, a periodic ripple with a large amplitude (for example, in a certain working condition, the peak value of the double power frequency ripple may reach 1.5V) may trigger compensation, resulting in frequent and unnecessary start of strong compensation in the steady state, which itself will become a disturbance. Therefore, the application introduces consideration of the power frequency ripple, so as to better distinguish between real load mutation and periodic background disturbance.
[0183] The first bus deviation value is derived from a first filter with a small filter coefficient, which has a very high tracking ability for the instantaneous and rapid change of bus voltage. When a sudden heavy load is applied or removed, the bus voltage will present a rapid (even step) change, and the first bus deviation value can reflect this change almost without delay. Therefore, the first bus deviation value is selected for compensation condition judgment, ensuring that the compensation mechanism can capture any initial signs that may trigger serious dynamic events with the lowest perceived delay.
[0184] The above step B11 can ensure that the compensation function is only activated when the system is facing a real and serious dynamic pressure (for example, when a large power switching of a PCS device in the later stage causes a severe voltage fluctuation), thereby avoiding unnecessary compensation intervention during steady state or small dynamic processes, and ensuring the purity and stability of the system.
[0185] Step B12: When the compensation condition is met, determine the current compensation value according to the second bus deviation value at the current time.
[0186] When it is determined that compensation is needed, the deviation signal used to calculate the final compensation value is not the first bus deviation value with strong instantaneousness used in step B11, but the second bus deviation value.
[0187] The reason for using the second bus deviation value to determine the current compensation value is that:
[0188] The second bus deviation value is derived from a second filter with a large filter coefficient, which has a strong smoothing effect and can filter out high-frequency switching noise, sampling error, and especially double power frequency ripple on the bus voltage, thereby calculating a smooth, stable, and representative of voltage macro deviation trend compensation value. This makes the compensation command injected into the current loop clean, continuous, and without chattering, providing strong dynamic recovery and never causing loop oscillation due to compensation itself.
[0189] If the first bus deviation value is used, the calculated compensation value will be a "dirty signal" carrying a lot of high-frequency fluctuations and noise, which will be directly injected into the current inner loop, which is equivalent to introducing a new, artificial oscillation source into the PI loop, which is easy to cause loop instability.
[0190] Based on the above analysis, the second bus deviation value is selected to ensure that the current compensation value is moderate, providing fast recovery and never damaging system stability due to its own oscillation.
[0191] The current inner loop reference current value compensation method provided by the embodiment combines intelligent trigger conditions with smooth compensation value calculation, compensates the current inner loop reference current value based on a first bus deviation value in a limit overload transient operating condition, and provides a current instruction to effectively maintain the stability of the PI control process; determines a current compensation value based on a second bus deviation value to ensure that the current compensation value is moderate, which provides a rapid recovery force and will not damage the system stability due to self-oscillation.
[0192] In a specific embodiment, in the current inner loop reference current value compensation method, step B11: determining whether the PI control at the current time meets the current inner loop reference current value compensation condition according to the power frequency ripple oscillation condition at the bus voltage and the first bus deviation value at the current time, and the specific implementation includes the following steps B111 and B112.
[0193] The embodiment realizes adaptive matching of the compensation trigger condition and the actual operating condition of the system by establishing a dynamic threshold judgment mechanism based on the power frequency ripple characteristics, thereby ensuring that the compensation function is activated only in a serious dynamic situation that is truly needed. The specific implementation includes the following steps:
[0194] Step B111: determining an oscillation threshold related to the power frequency ripple oscillation condition at the bus voltage.
[0195] In a complex actual application scenario, there is always an inherent ripple (such as a 100 Hz double power frequency ripple) at the bus voltage due to the rectification link, load switch action, and the like. If a fixed voltage deviation threshold is used as the compensation condition, problems may occur: if the threshold is set too small, the normal ripple peak value of the system may trigger the compensation by mistake; and if the threshold is set too large, the compensation response may be delayed when a real dynamic event occurs.
[0196] To solve this problem, the embodiment introduces an oscillation threshold directly related to the power frequency ripple oscillation condition at the bus voltage. The threshold is not a fixed value, but is dynamically adjusted according to the inherent ripple level of the system, and can directly reflect the strength of the current system background noise. Using the threshold as the judgment basis of the compensation condition means that the trigger threshold can adapt to different operating states of the system. For example, in a large-ripple operating condition, the oscillation threshold is automatically increased to prevent false triggering; and in a small-ripple operating condition, the oscillation threshold is correspondingly reduced to ensure the sensitivity of the compensation.
[0197] Step B112: when the absolute difference between the first bus deviation value at the current time and the preset reference voltage is greater than the oscillation threshold, the current inner loop reference current value compensation condition is met.
[0198] When the absolute difference between the first bus deviation value at the current moment and the preset reference voltage is greater than the oscillation threshold, it indicates that the instantaneous voltage deviation caused by load mutation or the like has been significantly greater than the system inherent, periodic background fluctuation, which can be confirmed as an effective dynamic event that needs compensation intervention, and the compensation operation of the current inner loop reference current value needs to be performed.
[0199] In the above step B11, by implementing the trigger condition based on the adaptive oscillation threshold, the probability of compensation misoperation caused by system inherent ripple, noise, etc. is greatly reduced, ensuring that the compensation function is only started when facing real and serious dynamic load changes, and the decision intelligence and robustness of the entire control system are improved; in addition, the oscillation threshold is linked with the power frequency ripple, which can automatically adapt to different power grid conditions, load types and ripple characteristics changes caused by component aging, providing a universally applicable high-performance compensation solution for DC converters in various complex application scenarios.
[0200] In a specific embodiment, in the current inner loop reference current value compensation method, for step B12: when the compensation condition is met, the current compensation value is determined according to the second bus deviation value at the current moment. The specific implementation mode includes the following steps B121 to B123.
[0201] This embodiment realizes smooth and controllable output of the current compensation value by establishing a calculation formula based on a linear compensation relationship, ensuring that the compensation effect can effectively improve the dynamic response without damaging the stability of the system.
[0202] Step B121: determining a compensation coefficient (K) at the current moment according to the preset reference voltage and the bus voltage sampling value at the current moment.
[0203] Step B122: determining a summation term at the current moment according to the sum of the second bus deviation value at the current moment and a first preset constant (M1).
[0204] In step B122, a first preset constant (M1) is introduced and added to the second bus deviation value. Its function has two aspects, one of which is to provide compensation dead zone elimination: when the system tends to be stable, the second bus deviation value is very small, and the first preset constant (M1) can ensure that there is still a basic compensation amount, preventing the compensation effect from frequently starting and stopping near the critical point, and enhancing the continuity of control; the other function is to set the initial value of compensation: setting an initial bias for the compensation effect, ensuring that even when the deviation is not very large, the compensation mechanism can provide a certain response strength, thereby speeding up the initial response speed of the system.
[0205] Wherein, step B121 and step B122 have no obvious sequence.
[0206] Step B123: determining the current compensation value of the current moment according to the product of the summation term and the compensation coefficient (K).
[0207] The results of the previous two steps are fused by using a linear product relationship. The current compensation value Y can be calculated by the expression Y = K * (|Diff1| + M1), where |Diff1| is the second bus deviation value.
[0208] The expression is essentially a feedforward path, and its calculation delay is much lower than that of the PI controller which needs an integration process. It can provide a strong current command correction at the initial stage when the PI controller has not fully responded, thereby quickly suppressing further deviation of the bus voltage. In addition, since |Diff1| is calculated based on the second filter bus value, it is inherently smooth, which fundamentally ensures that the compensation value Y will not jump sharply. The size of the compensation value is proportional to the deviation |Diff1|, so that the compensation strength can be adapted to the severity of the voltage deviation, achieving reasonable control of large deviation and small compensation.
[0209] Since the compensation coefficient determines the strength and direction of the compensation effect, the determination of the compensation coefficient in the embodiment directly depends on the real-time bus voltage state, rather than using a fixed value. The determination method of the compensation coefficient in step B121 is described as follows:
[0210] The compensation strength can be adaptively adjusted according to the severity of the voltage deviation; when the voltage deviation is large, the compensation coefficient is correspondingly increased to provide stronger compensation; when the voltage deviation is small, the compensation coefficient is reduced to avoid overcompensation; this adaptive feature ensures the accuracy and appropriateness of the compensation;
[0211] The compensation direction is determined according to the size relationship between the preset reference voltage and the bus voltage sampling value at the current moment, to determine whether the current compensation value is positive or negative.
[0212] In view of this, the embodiment establishes an adaptive calculation mechanism for the compensation coefficient K. The specific implementation includes steps B1211 to B1213.
[0213] Step B1211: determining a product term according to the product of the second bus deviation value at the current moment and the second preset constant (M2).
[0214] Since the compensation coefficient needs to reflect the severity of the voltage deviation, in this step, the reference value of the compensation coefficient is dynamically generated in a manner proportional to the second bus deviation value, so that the reference value of the compensation coefficient can adapt to the size of the voltage deviation. When the voltage deviation is large, the calculated product term increases accordingly; when the voltage deviation is small, the product term also decreases. This proportional relationship ensures that the compensation strength matches the severity of the voltage deviation.
[0215] Step B1212: Determine the oscillation threshold related to the power frequency ripple oscillation at the bus voltage.
[0216] To ensure that the judgment of the compensation direction has sufficient anti-interference ability, the embodiment continues to use the oscillation threshold in the above as the judgment reference. The oscillation threshold serves as a stable reference for reliably identifying the substantial overvoltage or undervoltage state of the voltage in subsequent steps, avoiding misjudgment of the compensation direction due to transient noise or small fluctuations.
[0217] Step B1213: Determine the product term to be positive or negative according to the bus voltage sampling value at the current time, the oscillation threshold and the preset reference voltage, and use the product term determined to be positive or negative as the compensation coefficient.
[0218] In step 1213, the positive or negative of the product term is determined according to the comparison result between the bus voltage sampling value at the current time and the oscillation threshold.
[0219] Specifically, by judging whether overvoltage needs to be suppressed (compensation coefficient is negative) or undervoltage needs to be corrected (compensation coefficient is positive), it is ensured that the compensation effect is always applied in the correct direction, fundamentally avoiding the risk of aggravating system instability due to incorrect compensation direction.
[0220] Case 1: Overvoltage state determination and negative compensation (take negative):
[0221] The determination condition is: the bus voltage sampling value at the current time > the preset reference voltage value, and (the bus voltage sampling value at the current time - the preset reference voltage value) > the oscillation threshold. This condition indicates that the system is in a clear overvoltage state (such as a heavy load sudden discharge scenario). At this time, the energy input to the bus needs to be reduced or the energy absorption needs to be increased.
[0222] By determining the compensation coefficient as a negative number, the finally calculated current compensation value is a negative value. After the negative compensation value acts on the current inner loop, the reference value of the current loop will be reduced, instructing the converter to reduce the output current or enter the energy feedback state, thereby helping the bus voltage to quickly and smoothly decrease from the overvoltage state.
[0223] Case 2: Undervoltage state determination and positive compensation (take positive):
[0224] The determination condition is that the bus voltage sampling value at the current time is less than the preset reference voltage value, and (the bus voltage sampling value at the current time - the preset reference voltage value) is less than the opposite number of the oscillation threshold value (i.e. - the oscillation threshold value). This condition indicates that the system is in a clear under-voltage state (such as the no-load sudden heavy load scene). At this time, energy needs to be immediately supplemented to the bus.
[0225] By determining the compensation coefficient as a positive number, the finally calculated current compensation value is a positive value. After the positive value compensation amount acts on the current inner loop, the reference value of the current loop is lifted, the converter is instructed to increase the output current, thereby rapidly injecting energy into the bus, suppressing the further drop of the voltage and rapidly recovering it.
[0226] In the above step B1213, by implementing the above-mentioned intelligent decision mechanism of the compensation direction, the embodiment ensures the correctness of the compensation direction, that is, opposite to the direction of the voltage deviation that needs to be corrected, thereby always playing a stabilizing role; the oscillation threshold value is used as a judgment boundary instead of a zero value, which is equivalent to setting a direction judgment dead zone, effectively preventing the compensation direction from frequently reversing due to small fluctuations or noise near the reference voltage, greatly enhancing the anti-interference ability and decision stability of the system.
[0227] In the above step B121, by implementing the above-mentioned calculation step of the current compensation value, the embodiment can quickly generate a current compensation value according to the voltage deviation through a linear compensation relationship, and the compensation current is smooth and noise-free, which can effectively improve the dynamic response speed without introducing oscillation; the design of the compensation coefficient and the summation term makes the compensation effort self-adaptively adjustable according to the working condition, realizing the accurate control of "small deviation small compensation, large deviation large compensation", and avoiding the overshoot or insufficient problem caused by uniform compensation effort; in addition, the entire calculation process only involves simple arithmetic operations, the calculation burden is small, and the calculation can be reliably completed in each control period, ensuring the timeliness of the compensation, which is very suitable for implementation in a resource-limited embedded system.
[0228] In the above step B12, the embodiment uses a compensation coefficient that varies linearly with the voltage deviation, so that the system can automatically output the right amount of compensation effort for different severity of dynamic events, realizing on-demand compensation, which ensures the response speed and avoids oscillation caused by overcompensation; the oscillation threshold value is used as a judgment reference to ensure the absolute correctness of the compensation direction, so that the compensation method can be safely and reliably applied to suppress two completely different dynamic scenes of overvoltage and under-voltage, significantly improving the protection ability and control precision of the system; in addition, the determination process is simple to calculate, and the key compensation direction judgment is protected by the oscillation threshold value, effectively resisting noise interference, so that the adaptive compensation coefficient generation mechanism can still work stably and reliably in complex actual industrial environments.
[0229] In a specific embodiment, in the current inner loop reference current value compensation method, for steps B111 and B1212, regarding the fluctuation threshold of the power frequency ripple fluctuation at the bus voltage, the embodiment realizes intelligent association of the triggering threshold and the inherent noise level of the system by establishing a fluctuation threshold calculation rule based on the power frequency ripple peak value characteristics, thereby ensuring that the compensation triggering mechanism can maintain optimal sensitivity and reliability in different application scenarios.
[0230] Specifically, the fluctuation threshold is the product of the peak value of the power frequency ripple fluctuation at the bus voltage and a third preset constant.
[0231] In actual applications, the amplitude of the power frequency ripple on the bus voltage may vary greatly in systems of different power levels or in the same system under different operating conditions. If a fixed value is used as the fluctuation threshold, it is difficult to be universally applicable to all conditions. To solve this problem, the embodiment determines the fluctuation threshold based on the product of the peak value of the power frequency ripple fluctuation at the bus voltage and a third preset constant, which makes the fluctuation threshold a dynamic value proportional to the actual noise level of the current system. This calculation method enables the fluctuation threshold to automatically track and adapt to the inherent ripple level of the system. In systems with large ripples, the value is correspondingly increased to prevent false triggering; in systems with small ripples, the value is automatically reduced to maintain the sensitivity of compensation. This ensures that the compensation triggering mechanism can achieve optimal performance in various hardware platforms and operating environments.
[0232] In addition, the third preset constant is introduced as an adjustable coefficient, providing engineers with a simple and effective adjustment object. By adjusting the third preset constant, the safety margin of the triggering threshold relative to the inherent ripple peak value can be easily set, ensuring both the reliability of distinguishing noise from real disturbances and avoiding sluggish response due to a too high threshold.
[0233] In a preferred embodiment, the specific value of the third preset constant is 1.5. When the system is operating normally, the ripple peak value usually fluctuates around its statistical average. By setting a multiple of 1.5, it can be ensured that the normal ripple peak value of the system is almost impossible to reach or exceed this threshold, thereby maximizing the prevention of compensation false triggering caused by inherent ripples or random noise and ensuring that the compensation function is only started under real serious disturbances.
[0234] For the oscillation threshold in steps B111 and B1212, by implementing the above-mentioned quantification determination method of the oscillation threshold, the embodiment calculates the oscillation threshold based on the power frequency ripple peak value, so that the compensation scheme can automatically adapt to DC converters of various power levels and operating scenarios, without the need to re-tune fixed threshold parameters for different applications, greatly enhancing the universality and ease of use of the scheme; in addition, through a single and physically meaningful third preset constant, engineers can intuitively and quickly fine-tune the triggering sensitivity of the compensation mechanism to achieve the best balance between system stability and dynamic response speed, greatly reducing the complexity of field debugging.
[0235] In the PI control method of the DC converter in the embodiment of the present application, by integrating the aforementioned current inner loop reference current value compensation method into the standard PI control architecture, an enhanced PI control system with a feedforward compensation channel is constructed, achieving the purpose of significantly improving the dynamic response capability of the system without changing the original PI controller parameters. The specific implementation includes:
[0236] According to the current inner loop reference current value compensation method described above, the current compensation value is obtained;
[0237] The cumulative value of the current compensation value and the output value of the voltage outer loop is taken as the current reference value of the current inner loop.
[0238] The core improvement of the embodiment is that a parallel feedforward compensation channel is established in addition to the traditional feedback control channel, so that dynamic response and steady-state accuracy are responsible for different control paths. The original PI controller can continue to focus on accurate adjustment of steady state and conventional dynamics, while the feedforward compensation channel is specifically designed to deal with sudden and large amplitude dynamic events that the PI loop cannot handle. This division realizes the optimal allocation of control resources.
[0239] Since the generation of the compensation value does not depend on the integral and proportional operation process of the PI controller, it can almost instantaneously respond to severe voltage deviations. When sudden load addition / removal causes a sharp change in bus voltage, this current compensation value can provide a strong and correctly directed reference instruction to the current loop before the voltage outer loop PI output changes significantly, thereby greatly suppressing the dynamic deviation of the bus.
[0240] By implementing the above enhanced PI control method, the embodiment improves the ability to cope with extreme conditions such as heavy load instantaneous switching on / off through feedforward compensation of the fast response of the channel; and while maintaining the excellent performance of the original PI control system in the steady state and small and medium dynamic state, the feedforward compensation channel is only activated when necessary, and its output is smooth, and the accumulation with the PI loop output will not introduce oscillation or interference; in addition, without changing the original PI controller parameters and structure which have been fully verified, only as an enhanced function added to the existing system, greatly reducing the complexity and risk of technical upgrade, while ensuring the backward compatibility and operation reliability of the system.
[0241] In addition, if it is coordinated with the method in Embodiment One, a synergistic complementary relationship can be formed:
[0242] Dynamic parameter adjustment adapts to small and medium load switching on / off, and intelligent adjustment is realized by optimizing the controller parameters;
[0243] The compensation scheme of the current inner loop reference value adapts to heavy load instantaneous switching on / off, and the limit response is realized through direct feedforward compensation.
[0244] The combination of the two technologies enables the control system of the DC converter to exhibit optimal control performance in the entire operating condition range from steady state, small dynamic state to extreme large dynamic state.
[0245] Embodiment Three
[0246] In the double-loop PI control process including voltage outer loop and current inner loop, in order to improve the dynamic response performance of the system, a technical scheme of numerically compensating the output of the voltage outer loop or the reference value of the current inner loop is often introduced. This compensation can quickly provide additional adjustment when dynamic events such as load mutation occur, thereby effectively suppressing the fluctuation of the bus voltage and ensuring the transient stability of the loop.
[0247] However, in the PI control process, when the dynamic event ends and the system needs to exit the compensation state and return to pure PI regulation, the existing technology faces serious challenges. During the compensation exit process, if the compensation exits too quickly and the PI controller cannot keep up in time, the bus voltage may drop again or overshoot after the initial stabilization; if the compensation exits too slowly, it may cause overcompensation, which will also cause voltage oscillation.
[0248] In addition, when the PI controller itself is not sensitive enough due to parameter setting or operating conditions, the compensation exit process may even cause the system to lose control again, causing the loop compensation to be frequently triggered by oscillation. That is, the system repeatedly switches between compensation and exit, and cannot stabilize at a balance point, seriously damaging the stability and reliability of the system.
[0249] In view of this, the embodiment proposes a compensation exit method, which can smoothly and naturally connect the compensation exit process with the PI loop state at the end of the current compensation operation, avoiding the introduction of new instability due to the exit process itself.
[0250] The core of the method is that, in the PI control process, based on the double-filter structure, the exit condition is intelligently identified, the compensation value is accurately converted and integrated into the internal state of the PI controller, the disturbance-free exit and smooth handover of the compensation effect are realized, and the system oscillation problem caused by the traditional simple exit method is solved.
[0251] Referring to Figure 4 The specific steps of the exit compensation method are as follows: steps C11 to C15.
[0252] Step C11: determining the exit condition of the DC converter at the current time according to the preset reference voltage value, the bus voltage sampling value at the current time, and the first filtering value at the current time.
[0253] When exiting compensation, whether the system is in the overvoltage recovery period or the undervoltage recovery period, the energy relationship and the required control strategy are completely opposite. By determining the exit condition, accurate prerequisite information is provided for the subsequent exit logic, ensuring that the system can execute the exit strategy targetedly. For example, when identifying bus voltage overshoot exit, it indicates that the system has excess energy, and suppressive measures need to be taken; when identifying bus voltage undervoltage exit, it indicates that the system is energy deficient, and supplementary measures need to be taken. This fine distinction is the basis for all subsequent optimization actions, avoiding the one-size-fits-all exit management method.
[0254] Specifically, the compensation exit behavior is divided into two conditions: bus voltage overshoot exit and bus voltage undervoltage exit. Among them:
[0255] The bus voltage sampling value provides the most real-time state information of the system, and is the direct basis for judging whether the voltage is overshoot or undervoltage. Its purpose is to capture the instantaneous abnormality of the voltage, ensuring the real-time and accuracy of the condition identification.
[0256] The first filtering value is the filtering result of the first filter on the bus voltage sampling value. Since the first filter responds quickly to voltage changes, its output value can effectively track the dynamic trend of the voltage. Comparing it with the preset reference voltage value can determine the macro deviation direction of the voltage, avoiding misjudgment due to instantaneous noise.
[0257] The preset reference voltage value is the target stable value of the system, providing a reference coordinate for all judgments.
[0258] The three together constitute a multi-dimensional, anti-interference working condition recognition mechanism, in which the bus voltage sampling value ensures real-time, the first filter value reflects the trend, and the preset reference voltage value provides a reference, which together ensure the rapidity, accuracy and reliability of working condition division.
[0259] Step C12: When the working condition is bus voltage overshoot exit, according to the output value of the voltage outer loop at the current time, it is judged whether the DC converter is in the charging overvoltage working state at the current time.
[0260] When the working condition is bus voltage overshoot exit, the internal physical process may be completely different. Among them, the charging overvoltage working state occurs when the input energy is greater than the demand, and the unloading overvoltage working state occurs when the energy cannot be discharged in time. The system energy flow direction and compensation exit mode corresponding to the two cases are completely different.
[0261] When the working condition is bus voltage overshoot exit, the sign (positive or negative) of the voltage outer loop output value is used to determine the energy scheduling target of the system. Among them, the output value is negative, which means that the system is still instructed to absorb energy, which is consistent with the physical nature of charging overvoltage. By further dividing, key processing basis is provided for the subsequent compensation exit mode, avoiding the deterioration or even failure of the control effect caused by the mismatch between the control strategy and the physical process.
[0262] Step C13: When the DC converter is in the charging overvoltage working state or in the working condition of bus voltage undershoot exit, the exit difference value is determined according to the first filter value and the second filter value.
[0263] The first filter value is the filtering result of the bus voltage sampling value through the first filter; it represents the current, real-time voltage state of the system.
[0264] The second filter value is the filtering result of the bus voltage sampling value through the second filter; it represents the relatively lagging macro voltage trend on which the compensation calculation is based;
[0265] At the compensation exit moment, based on the two filter values, the deviation between the estimated value and the actual demand value caused by the lag of the compensation strategy can be accurately quantified, so that the system can reflect the energy mismatch problem existing at the moment of compensation exit, providing a direct and reliable observation basis for quantifying the exit compensation amount, and providing key and quantifiable input information for subsequent smooth exit.
[0266] Step C14: Determine the linear relationship between the exit compensation coefficient and the exit difference value.
[0267] By determining a linear relationship, a quantitative relationship is established to convert the observation (exit difference) into the control parameter (exit compensation coefficient), and an adaptive compensation coefficient calculation method is realized. The larger the exit difference, the more obvious the lag of compensation, and the larger the adjustment deviation that needs to be executed at the exit; on the contrary, the smaller the exit difference, the less obvious the lag of compensation, and the smaller the adjustment deviation that needs to be executed at the exit.
[0268] According to the size of the current exit difference, the most suitable compensation coefficient is automatically calculated, so that the exit process can dynamically adapt to the current load working condition and compensation amount, rather than using a fixed coefficient that may not be suitable in some working conditions.
[0269] The selection of the linear relationship is the best balance between control performance, calculation complexity and engineering usability, which realizes the core design goal at the minimum cost.
[0270] Specifically, the linear relationship calculation is very simple, only one multiplication and one addition are needed, the occupation of the processor's calculation resources is extremely low, and it can easily meet the demand of high-frequency real-time control; in most engineering application scenarios, the relationship between the exit difference and the exit compensation coefficient can be well approximated by a linear model within the effective range, while too complex function relationship (such as high-order polynomial, exponential function) not only has large calculation amount, but also may introduce sensitivity to noise because of excessive pursuit of model accuracy, thereby reducing the robustness of the system; the linear relationship can simplify the determination complexity of parameters in the calculation expression, greatly simplifying the engineering debugging process.
[0271] Step C15: determining the output of the voltage inner loop at the next moment according to the exit compensation coefficient and the output value of the voltage inner loop at the current moment.
[0272] The compensation effect is fused into the internal state of the PI controller in a specific way, which solves the core contradiction between compensation exit and PI regulation rate mismatch, so that the state of the PI controller is adjusted to a position closer to the final equilibrium point at the moment of exit, thereby avoiding the regulation lag or overshoot caused by the need of the PI controller to accumulate or release energy from zero, and ensuring the smooth convergence of the bus voltage.
[0273] In the double-loop control of the DC converter, the output of the voltage outer loop is the reference value of the current inner loop. The response speed of the current loop is much faster than that of the voltage loop. Directly applying the converted compensation value to the reference value of the current inner loop means that the compensation effect can bypass the PI operation delay of the voltage outer loop and directly and quickly act on the final control object, i.e. the driving signal of the power switch tube, thereby realizing the rapid regulation of the output voltage.
[0274] By implementing the complete compensation exit process described above, the embodiment realizes smooth handover of control rights by fusing compensation effects into the PI state through working condition recognition, state diagnosis and difference observation, and completely eliminates the common voltage secondary drop, overshoot or oscillation phenomenon during compensation exit; the exit difference is determined based on the first bus deviation value and the second bus deviation value, so that the exit process can automatically adapt to different working conditions, ensuring the effectiveness and robustness of the method in a wide range of application scenarios.
[0275] In a specific embodiment, in the current inner loop reference current value compensation method, for step C11: determining the exit working condition of the DC converter according to the preset reference voltage value, the bus voltage sampling value at the current moment and the first filtering value at the current moment, the embodiment realizes intelligent recognition of the exit working condition by establishing a judgment logic based on multiple signal comparisons, providing an accurate prerequisite for subsequent execution of differentiated exit strategies.
[0276] The judgment condition for bus voltage overshoot exit: the bus voltage sampling value at the current moment is greater than the preset voltage reference value, and the difference between the preset voltage reference value and the first filtering value at the current moment is greater than a first threshold value.
[0277] In this judgment condition, comparison is made through two dimensions of signals, forming a double verification mechanism. Among them, the bus voltage sampling value being greater than the reference value is the basic condition, which confirms that the voltage is indeed in an overvoltage state; the difference between the preset reference voltage value and the first filtering value being greater than the first threshold value is the key condition, which confirms that the voltage overshoot trend is significant and clear, rather than a small fluctuation in a critical state. In addition, the first threshold value (a value greater than 0, for example, 0.1) is introduced as a judgment threshold, which effectively prevents misjudgment of the working condition caused by sampling noise or small signal jitter, greatly improving the reliability and robustness of state recognition.
[0278] The judgment condition for bus voltage undershoot exit: the bus voltage sampling value at the current moment is less than the preset reference voltage value, and the difference between the preset voltage reference value and the first filtering value at the current moment is less than a second threshold value.
[0279] This condition forms a symmetrical structure with the judgment logic of overshoot exit, making the working condition recognition framework clear and complete. The bus voltage sampling value being less than the reference value confirms the undervoltage state; the difference between the preset reference voltage value and the first filtering value being less than the second threshold value confirms that the voltage undershoot trend is significant and clear, rather than a small fluctuation in a critical state. In addition, the second threshold value (a value less than 0, for example, -0.1) is introduced as a judgment threshold, which effectively prevents misjudgment of the working condition caused by sampling noise or small signal jitter, greatly improving the reliability and robustness of state recognition.
[0280] In the embodiment, the first threshold value and the second threshold value are opposite numbers, ensuring that the determination of the two working conditions shares the same set of sensitivity criteria, so that the entire recognition mechanism has consistent performance in both positive and negative directions, facilitating the unified setting and optimization of parameters.
[0281] In step C11, by implementing the precise working condition judgment condition described above, the embodiment can extremely accurately divide the system exit state into overshoot exit and under-voltage exit through double signal comparison and threshold judgment, laying a solid foundation for subsequent execution of the most appropriate exit strategy, and fundamentally avoiding the decline in control performance caused by misjudgment of the working condition; the introduction of the threshold value effectively filters out the interference of signal noise and slight fluctuations on state decision, ensuring the stability and firmness of the working condition switching decision, and preventing frequent jumping of the system near the critical point.
[0282] In a specific embodiment, in the exit compensation method, for step C12: when the working condition is the bus voltage overshoot exit, the specific implementation manner of determining whether the DC converter is in the charging overvoltage working state according to the output value of the voltage outer loop at the current time is to analyze the sign characteristics of the voltage outer loop output value, which realizes intelligent identification of the overvoltage cause and ensures accurate matching of the exit compensation strategy and the actual physical process of the system.
[0283] Specifically, when it is detected that the output value of the voltage outer loop in the PI control at the current time is less than 0, it is determined that the system is in the charging overvoltage working state.
[0284] From a physical point of view, the voltage outer loop output value as the reference instruction of the current inner loop, a negative value indicates that the system is instructing the converter to reduce the output current or absorb energy. If such instructions are still being issued when the voltage has been overshoot, it is a strong indication that the current overvoltage is caused by excessive charging power in the front end and excessive energy input.
[0285] In step C12, the judgment mechanism based on the voltage outer loop output value realizes accurate identification of the charging overvoltage working state.
[0286] In a specific embodiment, in the exit compensation method, for step C13: determining the exit difference value according to the first filtered value and the second filtered value. The embodiment realizes accurate evaluation of the degree of energy mismatch of the system during compensation exit by calculating the absolute difference value between the bus deviation values corresponding to the two different filter coefficients, providing a key quantitative basis for subsequent smooth exit.
[0287] At the compensation exit moment, the system needs to accurately evaluate the existing energy deviation in order to compensate accurately. The core improvement of the embodiment is to define the absolute difference value between the first filtered value and the second filtered value as the exit difference value.
[0288] The exit difference, as a direct and reliable observation, can accurately reflect the degree of energy adjustment required during compensation exit under different working conditions. By using the absolute difference form, the exit difference is always a positive number, which provides mathematical convenience for establishing a linear compensation coefficient relationship and ensures the consistency of evaluation standards under different working conditions.
[0289] In step C13, by implementing the determination method of the exit difference, the embodiment accurately calculates the exit difference, changes the compensation exit process from qualitative judgment to quantitative control, and provides a reliable numerical basis for smooth exit. The difference can automatically reflect the system characteristics under different load conditions, so that the exit strategy can intelligently adapt to different working conditions such as light load and heavy load, improving the applicability and robustness of the method.
[0290] In a specific embodiment, the exit compensation method is described in step C14: determining the linear relationship between the exit compensation coefficient and the exit difference.
[0291] In this embodiment, the linear relationship between the exit compensation coefficient (Add_K) and the exit difference (|Diff3|) is determined as follows:
[0292] Exit compensation coefficient (Add_K) = first parameter (K1) * exit difference (|Diff3|) + second parameter (M3);
[0293] For the specific values of the first parameter (K1) and the second parameter (M3), this embodiment measures the key state quantities at the compensation exit instant and the system stable time under the first load working condition and the second load working condition, calculates the ideal compensation coefficient, and establishes an equation group with the respective corresponding exit difference. Finally, the universal linear relationship parameters are obtained by simultaneous solution. The solving process of the first parameter (K1) and the second parameter (M3) is as follows:
[0294] This embodiment realizes the objective and accurate solution of the linear relationship parameters by standardized experimental testing under different characteristic load working conditions, collecting data of key nodes and establishing equation groups, ensuring the adaptability and effectiveness of the compensation exit mechanism in the full working condition range.
[0295] Specifically, the different characteristic load working conditions are two load test scenarios with different dynamic characteristics specially selected for parameter calibration, which are the first load working condition and the second load working condition. Among them:
[0296] The first load working condition refers to the working condition of gradually loading when the AC converter connected with the DC converter is under light load, and the purpose is to obtain data of the system under small inertia and high dynamic response characteristics.
[0297] Second load condition, refers to the AC converter connected with the DC converter with heavy load, step loading test condition, the purpose is to obtain the data of the system in large inertia, low dynamic response characteristics.
[0298] Wherein, light load and heavy load: for the relative concept, refers to the different load level relative to the DC converter or the rated load capacity of the whole system. For example, for a system with rated power of 3000W, light load can represent its 30% below load (such as 500W), at this time the system inertia is small, dynamic response is fast; heavy load can represent its 50% above load (such as 1500W), at this time the system inertia is large, dynamic response is relatively slow.
[0299] The two load conditions represent two extremes of the dynamic characteristics of the system. When the system is lightly loaded, the absolute difference between the first filter value and the second filter value is usually large; when the system is heavily loaded, the absolute difference between the first filter value and the second filter value is usually small. Calibration under these two representative conditions is equivalent to determining the "upper left" and "lower right" two boundary points of the working range of the linear relationship, so as to ensure that the parameters of the linear relationship are solved, which can make the linear relationship achieve the best fitting in the whole load range, and has good universality.
[0300] In addition, two key nodes are set under each load condition, respectively the first node and the second node; wherein:
[0301] The first node refers to the moment when the compensation link exits after triggering the current inner loop reference current value compensation in the PI control process. This node marks the end of the compensation effect and the beginning of the exit process, and the current reference value usually corresponds to a clear state switching point on the waveform.
[0302] The second node refers to the moment when the reference current value of the current inner loop reaches stability in the PI control process. The stability here is defined as: the waveform of the current reference value presents an approximate straight line, or only around a certain mean value for periodic, small amplitude fluctuations (the fluctuations are mainly caused by the disturbance of the later stage inverter and the conventional adjustment of the DC loop itself).
[0303] Wherein, the first node and the second node are realized by step loading under different load conditions, so as to accurately determine the load critical point of the first triggering of the current inner loop compensation mechanism on the specific system.
[0304] In different DC converter systems, the dynamic response ability is different due to the difference in hardware parameters (such as bus capacitance, inductance, switching frequency) and initial PI parameters. A working condition that is heavy load for system A may be only medium load for system B. Therefore, it is impossible to define "light load" and "heavy load" with an absolute power value. By gradually loading from low to high with small steps, the accurate power point at which the current specific system can be stably transitioned from pure PI control to the point that compensation intervention is needed, i.e. the load critical point, can be found experimentally and accurately. This point is the dynamic performance boundary of the system.
[0305] What is needed in the parameter calibration scheme is the data in the working condition when the compensation mechanism is just triggered. This state is the most representative:
[0306] For light load working condition (first load working condition): what is needed is the minimum load that can just trigger compensation (700W in the example below). At this point, the system is in a state of small inertia but compensation is triggered, and the difference between the rapidity of the first filter value and the hysteresis of the second filter value will be clearly exposed, thereby obtaining a typical "small inertia - large difference" data point.
[0307] For heavy load working condition (second load working condition): a load point in the heavy load range that can just trigger compensation is needed (1300W in the example below). This can ensure that the characteristics of the system when the inertia is large and the compensation is triggered and exited are obtained, thereby obtaining a typical "large inertia - small difference" data point.
[0308] If a load far higher than the trigger point is randomly selected (such as directly adding a 2000W load that will definitely trigger compensation), although data can be obtained, the data point may not be in the best characterization area of linear relationship, and cannot form an effective two-pole comparison with the light load critical point, thereby leading to poor universality of the calibrated parameters.
[0309] The following is a specific example of 500W as light load and 1500W as heavy load, which illustrates the determination method of the first node and the second node under different load working conditions:
[0310] The specific process of the first load working condition (light load gradual loading) is as follows:
[0311] The system is initially operated in an unloaded or extremely light load state;
[0312] The first transient 500W load is added to test the response of the system under small disturbance and confirm that the compensation is not triggered, indicating that pure PI control is sufficient for the system under the current load, and then the load is unloaded;
[0313] Secondly, 600W load is added to approach the dynamic limit of the system, and the compensation is not triggered again. The operation has reduced the range of the compensation trigger critical point.
[0314] Thirdly, 700W load is added to hit the compensation trigger critical point, and the compensation mechanism is triggered successfully. This is the target working condition of the experiment. When the compensation link exits, the first node is reached. The system continues to adjust until the current inner loop reference current value reaches a stable state, and the second node is reached.
[0315] Similarly, the second load condition (heavy load step loading) is as follows:
[0316] The system initially runs at a higher base load (such as 1000W).
[0317] Firstly, 100W load is added (total load reaches 1100W), and the current inner loop reference current compensation is not triggered. Then, the load is unloaded.
[0318] Secondly, 200W load is added (total load reaches 1200W), and the current inner loop reference current compensation is not triggered. Then, the load is unloaded.
[0319] Thirdly, 300W load is added (total load reaches 1300W), and the current inner loop compensation link is triggered. When the compensation link exits, the first node is reached. The system continues to adjust until the current inner loop reference current value reaches a stable state, and the second node is reached.
[0320] Based on the above analysis, step loading is to accurately map the dynamic characteristic boundary of the system itself and obtain the most representative data on this boundary, so as to ensure that the final determined exit compensation coefficient linear relationship is based on the true characteristics of the system, and is the most optimal and reliable.
[0321] The physical quantities involved include:
[0322] First current value (Loop_Exit_1): In the first load condition (light load), the reference current value of the current inner loop collected at the first node (the moment the compensation link exits). It represents the current command maintained by the system at the moment the compensation effect ends.
[0323] Second current value (Loop_steady_1): In the first load condition (light load), the reference current value of the current inner loop collected at the second node (when the current inner loop reference current value stabilizes). It represents the target current command of the system when it finally reaches a steady state.
[0324] Third current value (Loop_Exit_2): the reference current value of the current inner loop collected at the first node under the second load condition (heavy load).
[0325] Fourth current value (Loop_steady_2): the reference current value of the current inner loop collected at the second node under the second load condition (heavy load).
[0326] First difference value (|Diff3_1|): the exit difference value calculated at the first node under the first load condition (light load).
[0327] Second difference value (|Diff3_2|): the exit difference value calculated at the first node under the second load condition (heavy load).
[0328] The specific implementation of step C14 includes the following steps C141 to C144; wherein:
[0329] Step C141: establish a linear relationship.
[0330] It is clear that the exit compensation coefficient and the exit difference value satisfy a linear relationship: Add_K = K1 * |Diff3| + M3.
[0331] Step C142: obtain data under the first load condition and establish a first equation.
[0332] According to the first current value (Loop_Exit_1) and the second current value (Loop_steady_1), calculate the first compensation coefficient value (K_Tem1) under the first load condition;
[0333] According to the first difference value (|Diff3_1|) at the first node and the first compensation coefficient value (K_Tem1), establish a first linear equation: K_Tem1 = K1 * |Diff3_1| + M3.
[0334] Step C143: obtain data under the second load condition and establish a second equation.
[0335] According to the third current value (Loop_Exit_2) and the fourth current value (Loop_steady_2), calculate the second compensation coefficient value (K_Tem2) under the second load condition;
[0336] According to the second difference value (|Diff3_2|) at the first node and the second compensation coefficient value (K_Tem2), establish a second linear equation: K_Tem2 = K1 * |Diff3_2| + M3.
[0337] Step C144: Solve the parameters by simultaneous equations.
[0338] The obtained first equation and second equation are combined into a binary linear equation set, and the unknown parameters, the first parameter (K1) and the second parameter (M3), are solved.
[0339] Using the data points (|Diff3_1|, K_Tem1) and (|Diff3_2|, K_Tem2) obtained under two different characteristic working conditions, a straight line is uniquely determined, and the universal linear relationship parameter that can adapt to changes from light load to heavy load is obtained.
[0340] During the execution of steps C142 or C143, the absolute value difference of the current under different load conditions is large when the compensation exits. If only the absolute difference of the current is used, the calculated compensation coefficient will be affected by the load size, and it is difficult to establish a unified standard between different working conditions. By establishing a normalized calculation method based on the relative amount of current change, the ideal compensation coefficient is accurately quantified, ensuring that the coefficient can accurately represent the adjustment ratio required to compensate for the gap in the current command caused by the compensation exit.
[0341] For step 142: determining the first compensation coefficient value corresponding to the exit compensation coefficient according to the first current value at the first node and the second current value at the second node, the specific implementation includes the following steps C1421 and C1422.
[0342] Step C1421: According to the first current value (Loop_Exit_1, current at exit time) and the second current value (Loop_steady_1, current at steady time), calculate the absolute difference, that is, the first current absolute difference = |Loop_steady_1 - Loop_Exit_1|.
[0343] The purpose of this step is to accurately quantify the gap in the current command at the compensation exit moment. This gap represents the adjustment task amount that the PI controller needs to immediately take over after the compensation action is suddenly withdrawn.
[0344] Step C1422: According to the ratio of the first current absolute difference and the absolute value of the first current value, determine the first compensation coefficient value, that is, the first compensation coefficient value (K_Tem1) = the first current absolute difference / |Loop_Exit_1|.
[0345] The first current absolute value representing the gap in the current command is converted into a relative proportion with respect to the current command at the exit time Loop_Exit_1.
[0346] The normalization processing makes the calculated K_Tem1 a dimensionless coefficient representing the adjustment ratio, which can reflect how much the pre-exit compensation effect (its size is embodied in Loop_Exit_1) needs to be retained in what proportion to exactly fill the gap of the current instruction. This ensures that the calculated compensation coefficient has comparability and unified physical meaning under both light load working conditions of small current and heavy load working conditions of large current, providing a high-quality, standardized data basis for establishing a universal linear relationship Add_K = K1 * |Diff3| + M3.
[0347] Similarly, for step 143: determining the second compensation coefficient value of the corresponding exit compensation coefficient according to the third current value at the first node and the fourth current value at the second node, the specific implementation mode includes steps C1431 and C1432.
[0348] Step C1431: according to the third current value (Loop_Exit_2, current at exit time) and the fourth current value (Loop_steady_2, current at steady time), calculate the absolute difference value, i.e. the second current absolute difference value = |Loop_steady_2 - Loop_Exit_2|.
[0349] Step 1432: according to the ratio of the second current absolute difference value and the absolute value of the third current value, determine the second compensation coefficient value, i.e. the second compensation coefficient value (K_Tem2) = the second current absolute difference value / |Loop_Exit_2|.
[0350] Since the working principle of step C1421 is similar to that of step C1431, and the working principle of step C1422 is similar to that of step C1432, it will not be repeated here.
[0351] By implementing the above-mentioned normalized compensation coefficient calculation method, the embodiment eliminates the influence of the absolute value of the load current on the calculation result through normalization processing, so that the compensation coefficients calculated from different power level working conditions can be directly compared and integrated, greatly improving the accuracy of the parameter calibration process and the universality of the obtained linear relationship.
[0352] In step C14, the above-mentioned systematic parameter calibration method is implemented, the embodiment is completely driven by experimental data, the subjectivity and uncertainty of the traditional method relying on personal experience or repeated trial and error are eliminated, the reliability and reproducibility of the parameter results are ensured, the light load (small inertia, large exit difference) and the heavy load (large inertia, small exit difference) are selected for calibration, the linear relationship obtained is ensured to effectively cover the entire working interval, the globally approximately optimal compensation exit effect is realized, a clear and repeatable parameter determination process is provided, the on-site debugging work is greatly simplified, the efficiency of engineering implementation is improved, and the consistency of performance between different systems or different batches of products is ensured.
[0353] In a specific embodiment, in the exit compensation method, step C15: determining the output of the voltage inner loop at the next moment according to the exit compensation coefficient and the output value of the voltage inner loop at the current moment. The specific implementation mode includes steps C151 to C153.
[0354] In this embodiment, the compensation value is converted according to the calculated coefficient, and is added to the integral term and the output term of the voltage outer loop at the same time, so that the control right is seamlessly transferred, and the smooth transition from the compensation state to the pure PI regulation state is ensured.
[0355] Step C151: determining the voltage output compensation value according to the product of the exit compensation coefficient and the current compensation value at the last moment
[0356] In this step, the feedforward compensation amount is converted into a correction amount that can be inherited by the PI controller. The voltage output compensation value Y*Add_K is obtained by multiplying the current compensation value Y at the last moment and the calculated exit compensation coefficient Add_K. Wherein, Add_K is the optimal proportion calculated based on the system state, and the product represents the amount of compensation task that needs to be inherited by the PI controller.
[0357] Optionally, the current compensation value Y at the last moment can be the current compensation value Y generated by the compensation operation in embodiment two, that is, the exit mechanism of the present scheme is optimized based on the compensation effect in embodiment two, and the coherence of the entire control logic is ensured.
[0358] Step C152: determining the integral term of the voltage outer loop at the next moment according to the sum of the integral term of the voltage outer loop at the current moment and the voltage output compensation value.
[0359] That is, the integral term of the voltage outer loop at the next moment n+1 = the integral term of the voltage outer loop at the current moment n + the voltage output compensation value.
[0360] By modifying the value of the integrator, the integrator can be immediately adjusted to a value closer to the new equilibrium point, thereby effectively avoiding the adjustment lag or overshoot caused by the PI controller's long-term re-accumulation or release of the integral term after the compensation exits.
[0361] Step C153: Determine the output value of the voltage outer loop at the next time according to the sum of the output value of the voltage outer loop at the current time and the voltage output compensation value.
[0362] This step cooperates with step C152 to synchronously correct the instantaneous output of the PI controller.
[0363] That is, the output value of the voltage outer loop at the next time n+1 = the output value of the voltage outer loop at the current time n + the voltage output compensation value.
[0364] In step C15, by modifying the output value of the voltage inner loop, it is ensured that the reference instruction applied to the current inner loop does not jump in the control period when the compensation exits. The output of the PI controller starts a new adjustment period on the basis of inheriting the compensation effect, so that the instruction received by the current inner loop is smoothly transitioned, thereby completely avoiding the impact on the power stage caused by the sudden change of the instruction.
[0365] By implementing the fusion method of the exit compensation amount, the embodiment realizes the smooth transition of the compensation effect and the PI adjustment by synchronously correcting the integral state and the instantaneous output of the PI controller, completely eliminates the secondary bus voltage drop, overshoot or oscillation caused by the sudden change of the control instruction when the compensation exits; ensures that the system can reliably and smoothly return to the steady state of pure PI control after experiencing the limit dynamic and enabling the compensation, cuts off the vicious cycle of "compensation-exit-retriggering", and greatly improves the long-term operation reliability of the system; in addition, in cooperation with the current compensation value in embodiment two, a complete high-performance control closed loop from strong compensation to smooth exit is formed, and the systematic advantage of the overall technical scheme is exhibited.
[0366] In the DC converter PI control method provided in the embodiment of the application, by integrating the exit compensation method described above into the PI control process of the DC converter, it is ensured that the compensation function can safely and smoothly exit, thereby avoiding the technical problem that the system appears secondary voltage fluctuation or even loses control due to improper exit process.
[0367] By implementing the PI control method comprising the intelligent exit mechanism, the bus voltage does not appear obvious secondary drop, overshoot or oscillation after experiencing the compensation exit operation, the curve of the dynamic recovery process is smoother, and the quality is significantly improved; the vicious cycle of "exit-oscillation-recompensation" caused by the compensation exit disorder is cut off, and the system instability caused by such factors is fundamentally eliminated, which is particularly suitable for application scenarios with extremely high stability requirements. In addition, if the method described in Embodiment 2 is implemented, after the limit dynamic event is responded to by the strong compensation of Embodiment 2, it can be ensured that the system can return to the steady-state PI regulation smoothly and without oscillation after experiencing a large disturbance, greatly improving the long-term operation reliability under frequent or severe dynamic working conditions.
[0368] In addition, when the system is in the bus voltage overshoot exit working condition, the judgment condition for unloading the overvoltage working state is that the output value of the PI voltage loop is greater than the first threshold value (for example, 0.1).
[0369] The output value of the voltage outer loop is used as the reference instruction of the current inner loop, and the value is positive and exceeds the first threshold value, which indicates that the system is instructing the converter to maintain or increase the output current. However, the bus voltage is in an overshoot (too high) state, and the contradiction between the two clearly indicates that the current overvoltage is caused by sudden load reduction and inability of the system to timely discharge energy, that is, the system is in an unloading overvoltage working state.
[0370] When the system is determined to be in the unloading overvoltage working state, its processing mode is essentially different from that of the charging overvoltage state:
[0371] The compensation exit link is not started: in this state, the compensation exit link described in Embodiment 3 does not need to be implemented. This is because the essence of unloading overvoltage is energy surplus, and the system needs to suppress the continuous rise of voltage and make it fall through the current compensation function combined with PI regulation. If the compensation is forcibly exited at this moment, the control intensity may suddenly weaken and the overvoltage may be aggravated.
[0372] The compensation control state of scheme two is maintained: the PI control process is still in the link of "loop compensation + PI control". That is, the system maintains the PI control in the loop compensation state of Embodiment 2 (current inner loop reference current value compensation method). The compensation function continues to play a role and works together with the PI regulator to jointly cope with the energy surplus problem caused by load unloading.
[0373] Optimized PI controller reset processing (for transient from loading to unloading): In particular, when detecting that it is a transient process from loading to unloading, the operation of directly resetting the loop integrator and the output value of the PI controller can be performed. This is because at the moment of unloading, the energy instruction required by the system occurs a step drop, and the historical integral value and the output value are not applicable. Directly resetting can avoid the out-of-date integral quantity from continuing to affect the output, so that the loop response can directly and smoothly transition to the steady state corresponding to the new load without oscillation. In addition, if the state after unloading itself does not need compensation intervention to be stable, the output of the loop will be directly the output of the pure PI control loop, without the above compensation superposition process.
[0374] For the overvoltage condition of unloading, the control strategy is to maintain the compensation and optimize the PI. By judging the output direction of the voltage outer loop, the state can be intelligently identified, and the compensation exit mechanism is not started, but the compensation of embodiment two continues to take effect, and the PI controller is reset and optimized as appropriate, so as to realize the fastest and most stable dynamic response.
[0375] In addition, the embodiment of the present application also provides a storage medium, and the storage medium stores a computer program, wherein the computer program is set to execute the method described above when running.
[0376] The embodiment of the present application also provides an electronic device, which comprises a memory and a processor, the memory stores a computer program, and the processor is set to run the computer program to execute the method described above.
[0377] Those of ordinary skill in the art will realize and understand that all or some of the steps in the methods disclosed above and the functional modules / units in the systems and devices can be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, one physical component can have multiple functions, or one function or step can be performed by several physical components in cooperation. Some or all of the components can be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on computer-readable media, which can include computer storage media (or non-transitory media) and communication media (or transitory media). As is well known to those of ordinary skill in the art, the term "computer storage media" includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storage of information such as computer readable instructions, data structures, program modules or other data. Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and that can be accessed by a computer. Furthermore, it is common and well understood by those of ordinary skill in the art that communication media typically embodies computer readable instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transport mechanism and can include any information delivery media.
Claims
1. A dynamic parameter adjustment control method applied to a PI control process of a DC converter, characterized in that, The PI control process comprises a fast response state for responding to bus voltage fluctuation in the PI control process and a slow response state for entering a stable PI control loop oscillation in the PI control process, and the method comprises: starting the PI control process of the DC converter in the fast response state; determining a response state entered by the PI control loop according to changes of the first bus deviation value and the second bus deviation value; when the entered response state is the fast response state, determining a deviation term input into the PI controller at the current moment according to the first bus deviation value and a preset reference voltage value; when the entered response state is the slow response state, determining a deviation term input into the PI controller at the current moment according to the second bus deviation value and the preset reference voltage value; dynamically determining a proportional parameter Kp of the PI controller according to the size of the deviation term; wherein the first bus deviation value is an absolute difference value between the preset reference voltage value and a filtering result of a bus voltage sampling value by a first filter, and the second bus deviation value is an absolute difference value between the preset reference voltage value and a filtering result of the bus voltage sampling value by a second filter; the first filter and the second filter are both first-order RC filters, and a filtering coefficient of the first filter is smaller than a filtering coefficient of the second filter.
2. The method of claim 1, wherein, dynamically determining a proportional parameter Kp of the PI controller according to the deviation term, comprising: if the deviation term is smaller than a first deviation threshold, the proportional parameter Kp is a fixed value; if the first deviation threshold ≤ the deviation term ≤ a second deviation threshold, determining that the proportional parameter Kp linearly changes with the deviation term; if the deviation term is greater than the second deviation threshold, determining that the proportional parameter Kp nonlinearly changes with the deviation term; wherein the first deviation threshold and the second deviation threshold are both greater than 0, and the first deviation threshold is smaller than the second deviation threshold.
3. The method of claim 2, wherein, determining that the proportional parameter Kp linearly changes with the deviation term, comprising: calculating the proportional parameter Kp through a linear function; wherein the linear function is Kp = k1×diff+ k2; wherein diff is the deviation term, k1 and k2 are preset constants, and k1 > 0.
4. The method of claim 2, wherein, determining that the proportional parameter Kp nonlinearly changes with the deviation term, comprising: The proportional parameter Kp is calculated by a quadratic function, wherein the quadratic function is Kp = a*diff + b*diff + c 2 +b*diff+c; wherein diff is the deviation term, a, b and c are preset constants, and a > 0.
5. The method of claim 1, wherein, determining a response state entered by the PI control loop according to changes of the first bus deviation value and the second bus deviation value, comprising: when in the fast response state, determining whether the PI control loop is switched into the slow response state according to changes of the first bus deviation value and the second bus deviation value, comprising: setting a maximum deviation record value, and constantly updating the maximum deviation record value to be a maximum value among absolute difference values between the first bus deviation value and the preset reference voltage value in the fast response state; determining whether the PI control loop is in oscillation according to the first bus deviation value at the current time, the second bus deviation value at the current time, and the maximum deviation record value updated at the previous time; when the loop is in oscillation, determining that the PI control loop enters the slow response state from the fast response state to relieve the loop oscillation, and setting the maximum deviation record value to zero.
6. The method of claim 5, wherein, determining whether the PI control loop is in oscillation according to the first bus deviation value at the current time, the second bus deviation value at the current time, and the maximum deviation record value updated at the previous time, comprising: if the first bus deviation value at the current time is greater than or equal to a third deviation threshold value, and the third deviation threshold value is greater than or equal to the maximum deviation record value updated at the previous time, and the absolute difference between the first bus deviation value and the second bus deviation value at the current time is less than or equal to a first preset value, it is determined that the PI control loop is in oscillation; if the first bus deviation value at the current time is greater than or equal to the third deviation threshold value, and the state that the third deviation threshold value is greater than or equal to the maximum deviation record value updated at the previous time lasts for a first preset time, it is determined that the PI control loop is in oscillation; wherein the third deviation threshold value is a preset multiple of the bus voltage fluctuation amplitude.
7. The method of claim 1, wherein, determining the response state of the PI control loop according to the change of the first bus deviation value and the second bus deviation value, further comprising: when in the slow response state, determining whether the PI control loop is in the case of lagging behind the bus voltage fluctuation according to the change of the first bus deviation value; when lagging behind, determining that the PI control loop enters the fast response state from the slow response state and responds to the bus voltage fluctuation.
8. The method of claim 7, wherein, determining whether the PI control loop is in the case of lagging behind the bus voltage fluctuation according to the change of the first bus deviation value, comprising: if the first bus deviation value at the current time is less than a second preset value, and the case that the first bus deviation value is less than the second preset value lasts for a second preset time, it is determined that the PI control loop is in the case of lagging behind the bus voltage fluctuation; if the first bus deviation value at the current time is less than a third preset value, and the maximum value of the first bus deviation value in the third preset time before the current time and the maximum value of the first bus deviation value in the third preset time after the current time are greater than a fourth preset value, it is determined that the PI control loop is in the case of lagging behind the bus voltage fluctuation; wherein twice the third preset time is greater than one half of the bus voltage fluctuation period and less than the bus voltage fluctuation period.
9. A PI control method of a DC converter, characterized by, comprising: adjusting the proportional parameter Kp of the voltage outer loop by using the dynamic parameter adjustment control method according to any one of claims 1 to 8.
10. An energy storage system characterized by, comprising: a DC circuit; an AC inversion circuit connected with the DC circuit; and a processing unit for collecting the voltage at the bus, which is the voltage at the connection of the DC circuit and the AC inversion circuit, and performing the steps of the dynamic parameter adjustment control method according to any one of claims 1 to 8.
Citation Information
Patent Citations
Parameter adjusting method of variable parameter PI (proportion-integral) adjuster
CN103391015A
Multi-region hierarchical PID parameter adaptive adjustment method and device
CN120779704A