Data management method, device and equipment across UCIE chips and storage medium

Abstract

The application provides a data management method and device across a UCIE chip, equipment and a storage medium, and belongs to the technical field of artificial intelligence chips. The UCIE chip comprises an adapter layer and a physical layer. The adapter layer comprises a buffer instantiated only once. The data management method across the UCIE chip comprises the following steps: in the case that a first data packet is stored in the buffer, updating a mapping table based on the first data packet; in the case that data retransmission is required, finding a target mapping relationship in the mapping table based on a sequence number to be retransmitted, the target sequence number in the target mapping relationship being the same as the sequence number to be retransmitted; reading data in the buffer based on the target mapping relationship to obtain a target data packet; and controlling the physical layer to retransmit the target data packet to a data receiving end. In this process, the completed data packet is read by using the mapping table, so that the retransmission of data is realized, the full use of the entire buffer space can be achieved, the retransmission of data is not affected, and the sending requirement in different scenarios is met.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a data management method, apparatus, device, and storage medium for cross-UCIE chips. Background Technology

[0002] In related technical solutions, when the length of the data packet to be transmitted is uncertain, the interface width of the physical layer is determined by the length of the minimum data packet. Assuming the minimum data packet length is M bytes and the maximum data packet length is K bytes, if the width of the buffer controller is set to M bytes, then the number of buffers that need to be instantiated is K / M.

[0003] Before sending a data packet, the data packet to be sent is stored in an instantiated buffer. The number of buffers selected is different for data packets of different lengths, but they are all stored in the order of the first instantiated buffer, the second instantiated buffer, ..., the K / Mth instantiated buffer.

[0004] As can be seen from the above, all data packets are stored in the first instantiated buffer, which makes the first instantiated buffer used the most, while other buffers are used less often, resulting in a waste of buffer space. Summary of the Invention

[0005] This invention provides a data management method, apparatus, device, and storage medium for cross-UCIE chips, which solves the problem in related technical solutions where all data packets are stored in the first instantiated buffer, resulting in the first instantiated buffer being used the most frequently, while other buffers are used less frequently, thus wasting buffer space.

[0006] This invention provides a data management method across UCIE chips, wherein the UCIE chip includes an adapter layer and a physical layer, and the adapter layer includes a register that is instantiated only once, comprising the following steps:

[0007] When the first data packet is stored in the buffer, the mapping table is updated based on the first data packet. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet.

[0008] In the case where data retransmission is required, the target mapping relationship is found in the mapping table based on the sequence number to be retransmitted, and the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted.

[0009] Based on the target mapping relationship, data is read from the buffer to obtain the target data packet;

[0010] The physical layer is controlled to resend the target data packet to the data receiving end.

[0011] The data management method for cross-UCIE chips provided by this invention, wherein reading data from the buffer based on the target mapping relationship to obtain the target data packet includes:

[0012] The first storage address and the first number of split storage are determined in the target mapping relationship. The first storage address is the storage address of the first sub-data packet after the target data packet is split and stored. The first number of split storage is the number of sub-data packets obtained by splitting and storing the target data packet.

[0013] Starting from the first storage address, read the number of sub-data packets equal to the number of times the first split storage was performed to obtain the target data packet.

[0014] The data management method for cross-UCIE chips provided by this invention further includes:

[0015] Receive a first confirmation packet from the data receiving end, wherein the first confirmation packet includes a first sequence number;

[0016] Based on the first identifier marked with the first sequence number, it is determined that data retransmission is required, and the first sequence number is used as the sequence number to be retransmitted.

[0017] The data management method for cross-UCIE chips provided by this invention further includes:

[0018] Receive a first confirmation packet from the data receiving end, wherein the first confirmation packet includes a first sequence number;

[0019] Based on the fact that the first sequence number is marked with a second identifier, it is determined that no data retransmission is required, and the target space in the buffer is released. The target space is the space used to store data packets with the first sequence number.

[0020] The data management method for cross-UCIE chips provided by this invention further includes:

[0021] Get the write address pointer;

[0022] Based on releasing the target space in the cache, obtain the read address pointer;

[0023] Based on the fact that the difference between the write address pointer and the read address pointer is zero, a reverse voltage signal is output.

[0024] The data management method for cross-UCIE chips provided by this invention further includes:

[0025] When it is necessary to send a second data packet to the data receiving end, the second number of split storage times is obtained, which is determined based on the data length of the second data packet;

[0026] A reverse pressure signal is output based on the fact that the difference between the write address pointer and the read address pointer is less than the second number of storage splits.

[0027] The data management method for cross-UCIE chips provided by this invention, wherein the number of serial numbers is the smallest power of 2 that satisfies a preset condition;

[0028] The preset condition is that the number of serial numbers is greater than or equal to the maximum number of unreceived confirmation packets.

[0029] This invention provides a data management device for cross-UCIE chips. The UCIE chip includes an adapter layer and a physical layer. The adapter layer includes a buffer that is instantiated only once, and includes the following modules:

[0030] An update module is used to update a mapping table based on the first data packet when the first data packet is stored in the buffer. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet.

[0031] The lookup module is used to look up a target mapping relationship in the mapping table based on the sequence number to be retransmitted when data retransmission is required, wherein the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted.

[0032] The reading module is used to read data from the buffer based on the target mapping relationship to obtain the target data packet;

[0033] The retransmission module is used to control the physical layer to resend the target data packet to the data receiving end.

[0034] The present invention also provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the data management method for cross-UCIE chips as described above.

[0035] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the data management method across UCIE chips as described above.

[0036] The present invention also provides a computer program product, including a computer program that, when executed by a processor, implements the cross-UCIE chip data management method as described above.

[0037] The data management method, apparatus, device, and storage medium for cross-UCIE chips provided by this invention include only one instantiated buffer at the adapter layer, without any other instantiated buffers. Therefore, the sub-data packets obtained by splitting the first data packet can be stored sequentially in the buffer. In this process, by splitting the first data packet, the data management method proposed in this invention can be applied to data packets of different lengths, and it does not need to store data according to the first instantiated buffer, the second instantiated buffer, ..., the K / Mth instantiated buffer, as in related technical solutions. Therefore, the entire buffer space can be fully utilized.

[0038] After storing the data packets to be sent in the buffer, that is, after storing the first data packet in the buffer, the constructed mapping table is updated. This allows the mapping table to be used to read the completed data packet when data retransmission is needed, thereby realizing data retransmission. In this process, the entire buffer space can be fully utilized without affecting data retransmission, thus meeting the sending needs in different scenarios. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in this invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this invention. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0040] Figure 1 This is a flowchart illustrating the cross-UCIE chip data management method provided by the present invention;

[0041] Figure 2 This is a schematic diagram illustrating the principle of storing N sub-data packets in sequence, as provided by the present invention.

[0042] Figure 3 This is a schematic diagram illustrating the principle of the mapping table storage provided by the present invention;

[0043] Figure 4 This is a schematic diagram illustrating the principle of sequential reading of N sub-data packets provided by the present invention;

[0044] Figure 5 This is a schematic block diagram of the cross-UCIE chip data management device provided by the present invention;

[0045] Figure 6 This is a schematic diagram of the structure of the electronic device provided by the present invention.

[0046] The correspondence between the reference numerals and the component names is as follows:

[0047] 501 Update module, 502 Search module, 503 Read module, 504 Retransmission module, 610 Processor, 620 Communication interface, 630 Memory, 640 Communication bus. Detailed Implementation

[0048] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this invention. All other embodiments obtained by those skilled in the art based on the embodiments of this invention without creative effort are within the scope of protection of this invention.

[0049] It should be noted that in the description of this invention, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. The terms "upper," "lower," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are used only for the convenience of describing the invention and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Unless otherwise expressly specified and limited, the terms "installed," "connected," and "linked" should be interpreted broadly, for example, as a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection or an indirect connection through an intermediate medium; or a connection within two elements. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0050] The terms "first," "second," etc., used in this invention are used to distinguish similar objects, not to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class, without limiting the number of objects; for example, a first object can be one or more. Furthermore, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0051] The terminology involved in this invention will be explained below.

[0052] 1. Universal Chip Interconnect Express (UCIE) is a universal, open standard that supports on-chip interconnection and interoperability with multiple protocols such as CXL / PCIe / other custom protocols.

[0053] CXL, short for Compute Express Link, is a high-speed serial protocol that allows for fast and reliable data transmission between different components within a computer system.

[0054] PCIe, short for Peripheral Component Interconnect Express, is a high-speed interface standard primarily used to connect various internal components of a computer.

[0055] 2. Static Random-Access Memory (SRAM) is a type of random access memory. The term "static" means that as long as the memory is powered on, the data stored in it can be permanently retained.

[0056] The following is combined Figures 1 to 6 The present invention describes a data management method, apparatus, device, and storage medium for cross-UCIE chips, which aims to improve upon the problem in related technical solutions where all data packets are stored in the first instantiated buffer, resulting in the first instantiated buffer being used the most frequently, while other buffers are used less frequently, thus wasting buffer space.

[0057] Figure 1 This is one of the flowcharts illustrating the cross-UCIE chip data management method provided by the present invention, such as... Figure 1 As shown, it includes:

[0058] Step 101: When the first data packet is stored in the buffer, update the mapping table based on the first data packet. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet.

[0059] For example, the mapping relationship corresponding to the first data packet is represented as [001, 8, wr_addr01], where 001 represents the sequence number of the first data packet, 8 is the number of times the first data packet is split and stored, and wr_addr01 is the storage address of the first sub-data packet after the first data packet is split and stored.

[0060] In some embodiments, the number of times the data is split and stored in the mapping relationship is different for data packets of different lengths.

[0061] For example, for a data packet with a data length of 45, if the data length of a single sub-data packet is 10, then the number of times it is split and stored is 5.

[0062] For example, for a data packet with a data length of 52, if the data length of a single sub-data packet is 10, then the number of times it is split and stored is 6.

[0063] In the above embodiment, the multiple sub-data packets that are split and stored are stored in the cache in the order in which they are split.

[0064] During this process, the sub-data packets stored in the split storage can be read in order to obtain the complete data packet. If the order of the sub-data packets is deviated, the data in the read data packet will be reversed, resulting in data anomalies. In this embodiment, the multiple sub-data packets stored in the split storage are stored in the buffer according to the order of splitting, which can ensure that the complete data packet can be obtained after reading in order, thereby eliminating the possibility of data anomalies.

[0065] For example, if the first data packet is split into a first sub-data packet, a second sub-data packet, a third sub-data packet, and a fourth sub-data packet, then the order of the first sub-data packet, the second sub-data packet, the third sub-data packet, and the fourth sub-data packet is used as the storage order in the buffer.

[0066] For example, if the first data packet is split into N packets for storage, the N sub-data packets are stored in the buffer in order.

[0067] The register has write enable (wren), write address (waddr), write data (wdata), read enable (rden), read address (raddr), and read data (rdata).

[0068] Specifically, wren (Write Enable) is the "switch" for SRAM write operations, controlling whether data is allowed to be written to SRAM to prevent "accidental writes". Only when the wren signal is valid will the subsequent waddr and wdata signals be parsed and executed by SRAM to avoid storage errors caused by address or data instability.

[0069] waddr (Write Address) specifies "which memory cell in SRAM the data is to be written to", that is, the "coordinates" of the write location. It is used to accurately locate the write target. SRAM uses an internal "address decoder" to parse the waddr signal and activate the circuit of the corresponding memory cell to prepare for receiving wdata.

[0070] wdata (Write Data) is the "raw data content" to be written to SRAM, i.e., the specific information of "what to write". In this invention, it is used to write sub-data packets to transmit valid data. It needs to be input within the timing window when wren is valid and waddr is stable to ensure that the data can be accurately written to the target storage unit and avoid "incorrect writing" caused by data timing offset.

[0071] Among them, rden (Read Enable signal) is a "switch signal" that controls whether the memory or data cache module "allows data to be read". It is used to prevent "accidental reading". Only when rden is valid will the address specified by raddr be resolved and rdata will output valid data, avoiding read errors caused by unstable address or accidental triggering.

[0072] raddr (Read Address) specifies the "specific location from which data is to be read from memory / cache", that is, the "coordinates" of the target to be read. It is used to accurately locate the target memory. The internal "address decoder" parses the raddr signal, activates the corresponding memory cell, and prepares for the data to be output to the rdata terminal.

[0073] rdata (Read Data) is the "actual data content" read from memory / cache, i.e., the "result read". It is used to transmit the read result and must be output within the timing window when rden is valid and raddr is stable to ensure that downstream modules (such as processors and adapter layers) can obtain the correct data.

[0074] like Figure 2 and Figure 3As shown, N sub-data packets are stored in the buffer in N separate entries. After all N sub-data packets of the first data packet are received in the buffer, the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored are stored in the mapping table. The depth of the storage address of the first sub-data packet is the same as the depth of the buffer.

[0075] The mapping table is data stored in the register, and it is written using the register's write enable (wren), write address (waddr), and write data (wdata). Specifically, the write enable (wren) is set to an enable signal, such as... Under the influence of the function, it is determined whether SRAM allows data. The write address waddr is used to write the storage address of the first sub-data packet, and the write data wdata is used to write the sequence number of the first data packet and the number of times the first data packet is split and stored.

[0076] Step 102: If data retransmission is required, look up the target mapping relationship in the mapping table based on the sequence number to be retransmitted. The target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted.

[0077] Step 103: Read data from the buffer based on the target mapping relationship to obtain the target data packet;

[0078] Step 104: Control the physical layer to resend the target data packet to the data receiver.

[0079] In this embodiment, the adapter layer includes only one instantiated buffer, without any other instantiated buffers. Therefore, the sub-data packets obtained from splitting the first data packet can be stored in the buffer sequentially. In this process, by splitting the first data packet, the data management method proposed in this invention can be applied to data packets of different lengths, and unlike related technical solutions, it does not require storage according to the first instantiated buffer, the second instantiated buffer, ..., the K / Mth instantiated buffer. Therefore, the entire cache space can be fully utilized.

[0080] After storing the data packets to be sent in the buffer, that is, after storing the first data packet in the buffer, the constructed mapping table is updated. This allows the mapping table to be used to read the completed data packet when data retransmission is needed, thereby realizing data retransmission. In this process, the entire buffer space can be fully utilized without affecting data retransmission, thus meeting the sending needs in different scenarios.

[0081] In some embodiments, data is read from the buffer based on the target mapping relationship to obtain the target data packet, including:

[0082] Determine the first storage address and the first number of split storage in the target mapping relationship. The first storage address is the storage address of the first sub-data packet after the target data packet is split and stored. The first number of split storage is the number of sub-data packets obtained by splitting and storing the target data packet.

[0083] Starting from the first storage address, read the number of sub-data packets equal to the number of times the data is split and stored to obtain the target data packet.

[0084] In this embodiment, since the target mapping relationship stores the storage address of the first sub-data packet after the target data packet is split and stored (i.e., the first storage address), and the number of sub-data packets obtained after splitting and storing the target data packet (i.e., the first split storage count), the storage location of the target data packet in the buffer can be located using the first storage address and the first split storage count. Then, starting from the first storage address, the number of sub-data packets equal to the first split storage count can be read to obtain the complete target data packet.

[0085] In this process, there is no need to confirm the ownership of sub-data packets segment by segment through information such as packet header identifiers and sequence numbers. Instead, the corresponding number of sub-data packets are read directly from the first storage address according to the number of splits, which greatly shortens the reading latency. At the same time, since the sub-data packets are stored in order, there is no need for a complicated "sub-data packet sorting" operation when reading data. It is only necessary to read according to "continuous address + fixed number of times" to directly reassemble the data, reducing the complexity of hardware logic, such as reducing the resource consumption of sorting circuits and identifier verification circuits.

[0086] For example, the target data packet includes three sub-data packets, namely the first sub-data packet, the second sub-data packet, and the third sub-data packet. The storage address of the first sub-data packet and the first split storage count of 3 can be determined through the target mapping relationship. Then, starting from the storage address of the first sub-data packet, the three sub-data packets can be read to obtain the complete target data packet.

[0087] Table 1 shows the relationship between different mapping relationships in the mapping table and the sequence number to be retransmitted.

[0088] Table 1

[0089]

[0090] Where wseqnum represents the sequence number of the data packet stored in the buffer, N is the number of times the data packet is split and stored, wr_addr is the storage address of the first sub-data packet in the data packet, rseqnum is the sequence number to be retransmitted, and seq represents the identifier of the sequence number to be retransmitted that is matched in the mapping table. As shown in Table 1, the first storage address of the target data packet is 5.

[0091] like Figure 4 As shown, the sub-data packets in the buffer are read in N parts to obtain the complete target data packet.

[0092] In some embodiments, the data management method across UCIE chips further includes:

[0093] The first confirmation packet received from the data receiving end includes a first sequence number.

[0094] Based on the first sequence number marked with the first identifier, it is determined that data retransmission is required, and the first sequence number is used as the sequence number to be retransmitted.

[0095] As the receiving end of the data packet, the data receiving end verifies the received data packet after receiving it. The verification includes cyclic redundancy check, and a first acknowledgment packet is generated based on the verification result. The first acknowledgment packet includes a first sequence number. By identifying the first sequence number, the data sending party can know the transmission status of the target data packet.

[0096] If the first sequence number is marked with a first identifier, it is considered that a bit error occurred during the transmission of the target data packet at the physical layer, and therefore data retransmission is required. By using the first sequence number as the retransmission sequence number, the data packet that needs to be retransmitted can be identified, thereby enabling data retransmission.

[0097] In this process, if there are errors, the sequence number to be retransmitted can be automatically identified, thereby enabling data retransmission.

[0098] Among them, bit error occurs when data is corrupted during data transmission due to various unavoidable interference factors at the physical layer, such as thermal noise, electromagnetic interference, signal attenuation, and distortion.

[0099] In some embodiments, the data management method across UCIE chips further includes:

[0100] In some embodiments, the first identifier is nak.

[0101] The first confirmation packet received from the data receiving end includes a first sequence number.

[0102] Based on the first sequence number being marked with a second identifier, it is determined that no data retransmission is needed, and the target space in the buffer is released. The target space is the space used to store data packets with the first sequence number.

[0103] In this embodiment, if the first sequence number is marked with a second identifier, it is determined that no data retransmission is required. At this time, the space used by the data packet of the first sequence number can be automatically released.

[0104] During this process, cache space can be released precisely. Specifically, the sequence number is the unique identifier of the data packet. The first sequence number can be used to directly lock the "cache space range for storing the data packet" and avoid "accidentally releasing the space of other unconfirmed data packets".

[0105] The corresponding space is only released when the second identifier clearly indicates that "the data packet has been correctly received and does not need to be retransmitted", ensuring that there is "no data to be retransmitted" in the released space and completely avoiding the situation of "data loss due to retransmission caused by releasing unconfirmed space".

[0106] Furthermore, releasing the target space in the cache is automatically triggered when it is determined that no data retransmission is needed. There is no need to check the status of cached data address by address, nor is there a need to compare the "acknowledgment list" with the "cache data sequence number". The target space is located directly by the first sequence number, and the second identifier is used to determine whether to release it, which greatly reduces the number of operation steps.

[0107] It is worth noting that once it is determined that no data retransmission is needed, the corresponding space is immediately released, and the "remaining available space" of the cache increases in real time, which can improve the utilization of storage space.

[0108] In some embodiments, the second identifier is ack.

[0109] In some embodiments, the data management method across UCIE chips further includes:

[0110] Get the write address pointer;

[0111] Obtain the read address pointer based on the target space released in the buffer;

[0112] The reverse voltage signal is output based on the fact that the difference between the write address pointer and the read address pointer is zero.

[0113] The write address pointer (wptr) is a core control signal / register used to "track the storage address of the next data to be written". Essentially, it is a "dynamic coordinate of the location of the write operation". It works in conjunction with "write enable (wren)" and "write data (wdata)" to ensure that data is written to the storage unit in order and without conflict.

[0114] The write address pointer is a multi-bit register (or counter) whose value directly corresponds to the memory address to be used in the next write operation. The number of bits is exactly matched to the depth of the memory unit (e.g., when the memory depth is 32K, wptr needs 15 bits to cover all addresses from 0 to 32767). After each successful write operation, wptr automatically increments (or jumps according to specific rules) to point to the next free memory unit, preventing "old data from being accidentally overwritten" or "new data from being written to an invalid address" due to "address duplication" during data writing.

[0115] The read address pointer (rptr) is a core control signal / register used to "track the memory address of the next piece of data to be read," essentially storing the dynamic coordinates of the read operation location. It works in conjunction with the read enable (rden) and read data (rdata) pointers, and also with the write address pointer (wptr) to manage the cache space, ensuring that data is read in order, without omissions, and without duplication. It is a key component for achieving "reliable data exchange."

[0116] The read address pointer is a multi-bit register (or counter) whose value directly corresponds to the memory address to be accessed in the next read operation. The number of bits is exactly matched with the "depth" of the memory cell (e.g., when the memory depth is 32K, rptr needs to be 15 bits, which can cover all addresses from 0 to 32767, ensuring that any memory cell can be located).

[0117] After each successful data read, rptr will automatically increment (or jump according to specific rules) to point to the "next storage unit to be read"; at the same time, it also plays the role of "marking the confirmed data range" and provides a basis for "cache space release" and "backpressure mechanism".

[0118] Among them, the backpressure signal is the core feedback signal used for "upstream module flow control". In essence, it is a "downstream module sending a 'capacity insufficiency' notification to the upstream". When the downstream module (such as the cache or the receiver) cannot process the data sent by the upstream in a timely manner (such as when the cache is full or the processing resources are busy), it informs the upstream to "pause sending new data" through the backpressure signal to avoid data loss, overflow or processing errors. It is a key control mechanism to ensure "reliable and orderly data interaction" of the system.

[0119] In an embodiment of the present invention, after releasing the target space in the buffer, the difference between the write address pointer and the read address pointer can be calculated by obtaining the read address pointer, and then the current free space of the buffer can be evaluated based on the difference. If the difference between the write address pointer and the read address pointer is zero, then the buffer currently has no free space to store data, and at this time, a reverse pressure signal is output.

[0120] During this process, if there is no free buffer space, a backpressure signal can be output in advance to prevent new data from being written to "invalid addresses that exceed the buffer depth" and causing data loss. At the same time, it can also prevent "unprocessed valid data" (such as unacknowledged retransmission data) from being overwritten, which would cause retransmission failure.

[0121] The embodiments of the present invention can reduce the risk of data retransmission failure caused by back pressure, thereby improving the reliability of data transmission.

[0122] In some embodiments, the data management method across UCIE chips further includes:

[0123] When it is necessary to send a second data packet to the data receiving end, the second number of split storage times is obtained, which is determined based on the data length of the second data packet;

[0124] A reverse pressure signal is output based on the fact that the difference between the write address pointer and the read address pointer is less than the second number of storage splits.

[0125] In this embodiment, when there is a data packet to be sent, that is, when a second data packet is to be sent, it can be determined whether a reverse pressure signal needs to be output based on the difference between the write address pointer and the read address pointer and the number of times the second data packet is split and stored.

[0126] During this process, the backpressure signal can be triggered based on the actual data length of the second data packet to prevent new data from being written to an "invalid address that exceeds the buffer depth," which would result in data loss. At the same time, it can also prevent the overwriting of "unprocessed valid data" (such as unacknowledged retransmission data), which would lead to retransmission failure.

[0127] In some embodiments, the number of serial numbers is a minimum power of 2 that satisfies a preset condition;

[0128] The preset condition is that the number of serial numbers is greater than or equal to the maximum number of unacknowledged packets.

[0129] In this embodiment, the number of sequence numbers follows the above rules, which can assign a different sequence number to each data packet while improving the problem of large area consumption and complex logical management caused by an excessive number of sequence numbers.

[0130] It should be noted that the cross-UCIE chip data management device provided by the present invention can execute the cross-UCIE chip data management method of any of the above embodiments during specific operation, which will not be elaborated in this embodiment.

[0131] like Figure 5 As shown, the cross-UCIE chip data management device provided by the present invention includes:

[0132] The update module 501 is used to update the mapping table based on the first data packet when the first data packet is stored in the buffer. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet.

[0133] The lookup module 502 is used to look up the target mapping relationship in the mapping table based on the sequence number to be retransmitted when data retransmission is required. The target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted.

[0134] The reading module 503 is used to read data from the buffer based on the target mapping relationship to obtain the target data packet;

[0135] The retransmission module 504 is used to control the physical layer to resend the target data packet to the data receiver.

[0136] In this embodiment, the adapter layer includes only one instantiated buffer, without any other instantiated buffers. Therefore, the sub-data packets obtained from splitting the first data packet can be stored in the buffer sequentially. In this process, by splitting the first data packet, the data management method proposed in this invention can be applied to data packets of different lengths, and unlike related technical solutions, it does not require storage according to the first instantiated buffer, the second instantiated buffer, ..., the K / Mth instantiated buffer. Therefore, the entire cache space can be fully utilized.

[0137] After storing the data packets to be sent in the buffer, that is, after storing the first data packet in the buffer, the constructed mapping table is updated. This allows the mapping table to be used to read the completed data packet when data retransmission is needed, thereby realizing data retransmission. In this process, the entire buffer space can be fully utilized without affecting data retransmission, thus meeting the sending needs in different scenarios.

[0138] Figure 6 This is a schematic diagram of the structure of the electronic device provided by the present invention, such as... Figure 6 As shown, the electronic device may include: a processor 610, a communication interface 620, a memory 630, and a communication bus 640, wherein the processor 610, the communication interface 620, and the memory 630 communicate with each other through the communication bus 640. The processor 610 can call logic instructions in the memory 630 to execute a cross-UCIE chip data management method, which includes: when storing a first data packet in a buffer, updating a mapping table based on the first data packet, the updated mapping table including a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored, the number of times the first data packet is split and stored is determined by the data length of the first data packet; when data retransmission is required, searching for a target mapping relationship in the mapping table based on the sequence number to be retransmitted, the target sequence number in the target mapping relationship being the same as the sequence number to be retransmitted; reading data from the buffer based on the target mapping relationship to obtain the target data packet; and controlling the physical layer to retransmit the target data packet to the data receiving end.

[0139] Furthermore, the logical instructions in the aforementioned memory 630 can be implemented as software functional units and, when sold or used as independent products, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of the present invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0140] On the other hand, the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium. The computer program includes program instructions, and when the program instructions are executed by a computer, the computer is able to execute the cross-UCIE chip data management method provided in the above embodiments. The method includes: when storing a first data packet in a buffer, updating a mapping table based on the first data packet, wherein the updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored, wherein the number of times the first data packet is split and stored is determined by the data length of the first data packet; when data retransmission is required, searching for a target mapping relationship in the mapping table based on the sequence number to be retransmitted, wherein the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted; reading data from the buffer based on the target mapping relationship to obtain a target data packet; and controlling the physical layer to retransmit the target data packet to the data receiving end.

[0141] In another aspect, the present invention also provides a non-transitory computer-readable storage medium storing a computer program thereon. When executed by a processor, the computer program implements the cross-UCIE chip data management method provided in the above embodiments. The method includes: when storing a first data packet in a buffer, updating a mapping table based on the first data packet, wherein the updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored, wherein the number of times the first data packet is split and stored is determined by the data length of the first data packet; when data retransmission is required, searching for a target mapping relationship in the mapping table based on the sequence number to be retransmitted, wherein the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted; reading data from the buffer based on the target mapping relationship to obtain a target data packet; and controlling the physical layer to retransmit the target data packet to the data receiving end.

[0142] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs. Those skilled in the art can understand and implement this without any creative effort.

[0143] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.

[0144] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A data management method across UCIE chips, characterized in that, The UCIE chip includes an adapter layer and a physical layer. The adapter layer includes a register that is instantiated only once. The data management method includes: When the first data packet is stored in the buffer, the mapping table is updated based on the first data packet. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet. In the case where data retransmission is required, the target mapping relationship is found in the mapping table based on the sequence number to be retransmitted, and the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted. Based on the target mapping relationship, data is read from the buffer to obtain the target data packet; The physical layer is controlled to resend the target data packet to the data receiving end.

2. The data management method across UCIE chips according to claim 1, characterized in that, The step of reading data from the buffer based on the target mapping relationship to obtain the target data packet includes: The first storage address and the first number of split storage are determined in the target mapping relationship. The first storage address is the storage address of the first sub-data packet after the target data packet is split and stored. The first number of split storage is the number of sub-data packets obtained by splitting and storing the target data packet. Starting from the first storage address, read the number of sub-data packets equal to the number of times the first split storage was performed to obtain the target data packet.

3. The data management method across UCIE chips according to claim 1, characterized in that, The cross-UCIE chip data management method also includes: Receive a first confirmation packet from the data receiving end, wherein the first confirmation packet includes a first sequence number; Based on the first identifier marked with the first sequence number, it is determined that data retransmission is required, and the first sequence number is used as the sequence number to be retransmitted.

4. The data management method across UCIE chips according to claim 1, characterized in that, The cross-UCIE chip data management method also includes: Receive a first confirmation packet from the data receiving end, wherein the first confirmation packet includes a first sequence number; Based on the fact that the first sequence number is marked with a second identifier, it is determined that no data retransmission is required, and the target space in the buffer is released. The target space is the space used to store data packets with the first sequence number.

5. The data management method across UCIE chips according to claim 4, characterized in that, The cross-UCIE chip data management method also includes: Get the write address pointer; Based on releasing the target space in the cache, obtain the read address pointer; Based on the fact that the difference between the write address pointer and the read address pointer is zero, a reverse voltage signal is output.

6. The data management method across UCIE chips according to claim 5, characterized in that, The cross-UCIE chip data management method also includes: When it is necessary to send a second data packet to the data receiving end, the second number of split storage times is obtained, which is determined based on the data length of the second data packet; A reverse pressure signal is output based on the fact that the difference between the write address pointer and the read address pointer is less than the second number of storage splits.

7. The data management method across UCIE chips according to any one of claims 1 to 6, characterized in that, The number of serial numbers is the smallest power of 2 that satisfies the preset condition; The preset condition is that the number of serial numbers is greater than or equal to the maximum number of unreceived confirmation packets.

8. A data management device for cross-UCIE chips, characterized in that, The UCIE chip includes an adapter layer and a physical layer. The adapter layer includes a register that is instantiated only once. The cross-UCIE chip data management device includes: An update module is used to update a mapping table based on the first data packet when the first data packet is stored in the buffer. The updated mapping table includes a mapping relationship consisting of the sequence number of the first data packet, the number of times the first data packet is split and stored, and the storage address of the first sub-data packet after the first data packet is split and stored. The number of times the data packet is split and stored is determined by the data length of the first data packet. The lookup module is used to look up a target mapping relationship in the mapping table based on the sequence number to be retransmitted when data retransmission is required, wherein the target sequence number in the target mapping relationship is the same as the sequence number to be retransmitted. The reading module is used to read data from the buffer based on the target mapping relationship to obtain the target data packet; The retransmission module is used to control the physical layer to resend the target data packet to the data receiving end.

9. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the cross-UCIE chip data management method as described in any one of claims 1 to 7.

10. A non-transitory computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements the cross-UCIE chip data management method as described in any one of claims 1 to 7.

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