Main controller, image processing system, image processing method and device

Abstract

The invention provides a main controller and an image control system. The main controller includes a temporary memory and an image processor. The image processor is configured to respond to the fact that correction of the image is enabled, cache a correction parameter set to the temporary memory, the correction parameter set is used for correcting the image to be corrected and is generated by the upper computer based on a first image set, and the upper computer is used for correcting the image to be corrected based on the first image set. The first image set is obtained by acquiring images sensed by the sensing panel based on the thin film transistor while reading the random parameters in the temporary memory; determining correction parameters required by the image correction mode to be executed; while reading the required correction parameters from the correction parameter set in the temporary memory, acquiring an image sensed by a sensing panel as an image to be corrected; correcting the to-be-corrected image by using the read correction parameter to obtain a first corrected image; and transmitting the first corrected image to an upper computer.

Description

Technical Field

[0001] This disclosure relates to the field of image processing technology, and more particularly to main controllers, image processing systems, image processing methods and apparatus. Background Technology

[0002] With the continuous development of technology, thin-film transistor (TFT) based detectors (e.g., X-ray flat panel detectors) have become mainstream and are widely used in fields such as image sensing. For example, X-ray flat panel detectors, widely used in optical medicine, can use TFTs to detect X-rays projected onto the flat panel detector after passing through the human body, and directly obtain image data through real-time image processing. After the image data is acquired by the detector, it is sent to a host computer, which uses image processing software to correct the image data to obtain the final image. In recent years, the demand for dynamic image acquisition and correction has become increasingly prominent, and the frame rate requirements for dynamic acquisition have become increasingly higher. With the increase in frame rate, the requirements for the processing speed of the software algorithm are becoming increasingly higher, greatly increasing the workload of the host computer and making the image correction efficiency of the image processing software very low.

[0003] Related research also focuses on board-level calibration on the detector's main control chip. Board-level calibration uses a serial processing method, which is fast and can effectively alleviate the processing pressure on the host computer software. However, for image calibration, corresponding calibration parameters are required. Currently, board-level calibration mainly utilizes the on-chip RAM (Random Access Memory) of the main control chip to generate and store calibration parameters. However, this parameter generation based on the entire frame is relatively difficult for board-level devices to process, reading and writing block storage areas is troublesome, the implementation is complex, and the performance requirements of the main control chip are particularly high. Summary of the Invention

[0004] In view of the above, this disclosure provides a main controller, an image processing system, an image processing method, and an apparatus, which are intended to overcome some or all of the defects mentioned above, as well as other possible defects.

[0005] According to a first aspect of this disclosure, a main controller is provided for image processing, the main controller including a temporary memory and an image processor. The image processor is configured to: cache a set of correction parameters in the temporary memory in response to image correction being enabled, wherein the set of correction parameters is used to correct an image to be corrected and is generated by a host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory; determine correction parameters required for an image correction mode to be performed; acquire images sensed by the sensing panel as images to be corrected while reading the required correction parameters from the set of correction parameters in the temporary memory; correct the acquired images to be corrected using the read correction parameters to obtain a first corrected image; and transmit the first corrected image to the host computer.

[0006] In some embodiments, the main controller further includes a permanent memory, and the image processor is further configured to: in response to receiving an image acquisition command from a host computer, acquire images sensed by the sensing panel to obtain a first image set, and transmit the first image set to the host computer; receive the correction parameter set from the host computer, and store the correction parameter set in the permanent memory.

[0007] In some embodiments, the image processor is further configured to cache the set of correction parameters from the permanent memory to the temporary memory in response to image correction being enabled.

[0008] In some embodiments, the main controller further includes a gate controller and a source controller, and wherein the image processor is further configured to: read the required correction parameters from the set of correction parameters in the temporary memory, while using the gate controller and the source controller to read image data of the image sensed by the sensing panel.

[0009] In some embodiments, the image processor is further configured to: in response to the image correction mode to be performed being a first correction mode, determine the required correction parameters including at least one of a bad pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

[0010] In some embodiments, the image processor is further configured to: in response to the image correction mode to be performed being a second correction mode, determine the required correction parameters including a subset of a bad pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

[0011] In some embodiments, the image processor is further configured to transmit the first corrected image as the final corrected image to the host computer in response to the image correction mode to be performed being a first correction mode.

[0012] In some embodiments, the image processor is further configured to: in response to the image correction mode to be performed being a second correction mode, transmit the first corrected image as an intermediate corrected image to a host computer, so that the host computer can correct the intermediate corrected image using another part of the dead pixel removal parameters, noise reduction parameters, and gain correction parameters to obtain the final corrected image.

[0013] According to a second aspect of this disclosure, an image processing system is provided, comprising: a main controller according to any of the above description; and a host computer configured to generate an original parameter set for correcting an image to be corrected based on a first image set, transmit the correction parameter set to the main controller, and receive the first corrected image, wherein the correction parameter set is at least a portion of the original parameter set; and a thin-film transistor-based sensing panel configured to sense the images in the first image set and the image to be corrected.

[0014] In some embodiments, the sensing panel includes a flat panel detector for converting received X-rays into image data representing an image.

[0015] In some embodiments, the main controller further includes a gate controller and a source controller, and the sensing panel includes a plurality of readout circuits disposed at opposite side edges of the sensing panel; wherein the image processor is further configured to use the gate controller and the source controller to control the plurality of readout circuits to read image data of an image sensed by the sensing panel.

[0016] In some embodiments, the number of the plurality of reading circuits corresponds one-to-one with the number of pixel regions of the image sensed in a first direction of the sensing panel, and the reading circuit for reading image data of odd-numbered pixel regions is located at one edge of the sensing panel, while the reading circuit for reading image data of even-numbered pixel regions is located at the opposite edge of the sensing panel.

[0017] In some embodiments, the host computer is further configured to receive the first corrected image as the final corrected image in response to the image correction mode to be performed being a first correction mode.

[0018] In some embodiments, the original parameter set includes dead pixel removal parameters, noise reduction parameters, and gain correction parameters, and the host computer is further configured to transmit a portion of the original parameter set as a correction parameter set to the main controller in response to the image correction mode to be performed being a second correction mode.

[0019] In some embodiments, the host computer is further configured to correct the first corrected image using another portion of the original parameter set to obtain a final corrected image.

[0020] In some embodiments, the host computer is further configured to generate the de-de-spot parameters and the de-noising parameters based on dark images in the first image set, and to generate gain correction parameters based on bright images in the first image set.

[0021] According to a third aspect of this disclosure, an image processing method is provided, applied to a main controller, the main controller including at least a temporary memory, and the method comprising: in response to image correction being enabled, caching a set of correction parameters in the temporary memory, wherein the set of correction parameters is used to correct an image to be corrected and is generated by a host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory; determining correction parameters required for an image correction mode to be performed; acquiring images sensed by the sensing panel as images to be corrected while reading the required correction parameters from the set of correction parameters in the temporary memory; correcting the acquired images to be corrected using the read correction parameters to obtain a first corrected image; and transmitting the first corrected image to the host computer.

[0022] In some embodiments, the main controller further includes a permanent memory, and the method further includes: in response to receiving an image acquisition command from a host computer, acquiring images sensed by the sensing panel to obtain a first image set, and transmitting the first image set to the host computer; receiving the correction parameter set from the host computer, and storing the correction parameter set in the permanent memory.

[0023] In some embodiments, caching a set of correction parameters to the temporary memory in response to enabling image correction includes: caching the set of correction parameters from the permanent memory to the temporary memory in response to enabling image correction.

[0024] In some embodiments, the main controller further includes a gate controller and a source controller, and wherein acquiring the image sensed by the sensing panel as the image to be calibrated while reading the required calibration parameters from the calibration parameter set in the temporary memory includes: while reading the required calibration parameters from the calibration parameter set in the temporary memory, using the gate controller and the source controller to read the image data of the image sensed by the sensing panel as the image to be calibrated.

[0025] In some embodiments, determining the required correction parameters for the image correction mode to be performed includes: in response to the image correction mode to be performed being a first correction mode, determining that the required correction parameters include at least one of a bad pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

[0026] In some embodiments, determining the correction parameters required for the image correction mode to be performed includes: in response to the image correction mode to be performed being a second correction mode, determining that the required correction parameters include a subset of a bad pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

[0027] In some embodiments, transmitting the first corrected image to a host computer includes: in response to the image correction mode to be performed being a first correction mode, transmitting the first corrected image as a final corrected image to the host computer.

[0028] In some embodiments, transmitting the first corrected image to a host computer includes: in response to the image correction mode to be performed being a second correction mode, transmitting the first corrected image as an intermediate corrected image to the host computer, so that the host computer can use another part of the bad pixel removal parameters, noise reduction parameters, and gain correction parameters to correct the intermediate corrected image to obtain the final corrected image.

[0029] According to a fourth aspect of this disclosure, an image processing apparatus is provided, applied to a main controller, the main controller including at least a temporary memory. The image correction apparatus includes: a cache execution module configured to cache a set of correction parameters in the temporary memory in response to image correction being enabled, wherein the set of correction parameters is used to correct an image to be corrected and is generated by a host computer based on a first image set, and wherein the first image set is obtained by acquiring an image sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory; a correction parameter determination module for determining correction parameters required for an image correction mode to be performed; an image acquisition module configured to acquire an image sensed by the sensing panel as an image to be corrected while reading the required correction parameters from the set of correction parameters in the temporary memory; an image correction module configured to correct the acquired image to be corrected using the read correction parameters to obtain a first corrected image; and a corrected image transmission module configured to transmit the first corrected image to the host computer.

[0030] According to a fifth aspect of this disclosure, a computer-readable storage medium is provided that stores computer-executable instructions that, when executed, perform any of the methods described above.

[0031] According to a sixth aspect of this disclosure, a computer program product is provided, characterized in that the computer program product includes computer-executable instructions that, when executed, implement any of the methods described above.

[0032] In the main controller, image processing system, image processing method, and apparatus claimed in this disclosure, the set of correction parameters used to correct the image to be corrected is generated by a host computer based on a first image set. This first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from a temporary memory. During image correction, the required correction parameters are read from the set of correction parameters in the temporary memory while the image to be corrected is acquired. In this way, electromagnetic interference and noise from the temporary memory are introduced during both the generation of correction parameters and the acquisition of the image to be corrected. This ensures that the noise levels of the original image used to generate the correction parameters are consistent with those of the original image to be corrected, thereby guaranteeing consistency between board-level correction, hybrid correction, and software correction. This effectively improves the electromagnetic noise interference problem during board-level correction, simplifies implementation, reduces the processing load on the main controller, and enhances the effectiveness of board-level correction.

[0033] These and other advantages of this disclosure will become clear from the embodiments described below, and will be illustrated with reference to the embodiments described below. Attached Figure Description

[0034] Embodiments of the present disclosure will now be described in more detail with reference to the accompanying drawings, in which:

[0035] Figure 1 An exemplary architecture diagram of an image processing system according to an embodiment of the present disclosure is shown;

[0036] Figure 2 The diagram illustrates a flowchart of an exemplary method for image correction using an image processing system;

[0037] Figure 3 An exemplary layout diagram of an image processing system according to an embodiment of the present disclosure is shown;

[0038] Figure 4 The illustration shows a schematic diagram of stitching read image data into a complete image according to an embodiment of the present disclosure;

[0039] Figure 5 The illustration shows a schematic diagram of a readout circuit subjected to electromagnetic interference according to an embodiment of the present disclosure;

[0040] Figure 6 The image shows a grayscale comparison between software correction performed solely by the host computer and board-level correction.

[0041] Figure 7 An exemplary flowchart of an image processing method according to an embodiment of the present disclosure is illustrated;

[0042] Figure 8 The illustration shows a schematic diagram of a defect correction implementation according to an embodiment of the present disclosure;

[0043] Figure 9 The illustration shows a schematic diagram of the implementation of noise reduction and gain correction according to an embodiment of the present disclosure;

[0044] Figure 10 The figure shows a grayscale comparison of an image during board-level correction according to an embodiment of the present disclosure and a software correction performed solely by a host computer;

[0045] Figure 11 A schematic diagram of a main controller according to an embodiment of the present disclosure is shown;

[0046] Figure 12 The figure illustrates an exemplary working principle diagram of an image processing system according to an embodiment of the present disclosure;

[0047] Figure 13 An exemplary interactive flowchart illustrating an image processing system performing image processing according to an embodiment of the present disclosure is shown.

[0048] Figure 14 An exemplary interactive flowchart illustrating an image processing system performing image processing according to an embodiment of the present disclosure is shown.

[0049] Figure 15 The figure illustrates an exemplary structural block diagram of an image processing apparatus according to an embodiment of the present disclosure;

[0050] Figure 16 An example block diagram of a computing device according to some embodiments of this application is illustrated schematically. Detailed Implementation

[0051] The following description provides specific details of various embodiments of this disclosure to enable those skilled in the art to fully understand and implement the various embodiments of this disclosure. It should be understood that the technical solutions of this disclosure can be implemented without some of these details. In some cases, this disclosure does not show or describe in detail some well-known structures or functions to avoid such unnecessary descriptions that would obscure the description of the embodiments of this disclosure. The terminology used in this disclosure should be understood in its broadest and most reasonable manner, even when used in conjunction with specific embodiments of this disclosure.

[0052] As described earlier, image correction via image processing software on a host computer is inefficient. Current board-level correction mainly utilizes the on-chip RAM (Random Access Memory) of the main control chip to generate and store correction parameters, which is complex and places particularly high demands on the performance of the main control chip.

[0053] Based on this, the inventors considered first using software on a host computer to generate correction parameters based on the original image acquired by the detector. Then, during board-level correction, these parameters were sent to the main control chip (i.e., the main controller) and cached in a memory such as DDR (Double Data Rate Synchronous Dynamic Random Access Memory). Then, during board-level correction, the correction parameters were synchronously read from the DDR, and the acquired image was corrected. The original image referred to here can be a dark (e.g., black) image and / or a bright (e.g., white) image.

[0054] Figure 1 An exemplary architecture diagram of an image processing system 100 according to an embodiment of the present disclosure is shown. Figure 1As shown, the image processing system includes a host computer 110, a main controller 120, and a thin-film transistor-based sensing panel 130. The host computer 110 can be various suitable devices, software running on those devices, or processing logic. For example, the host computer can be various processing devices, programs or code running on those devices, or various programmable logic devices (e.g., FPGAs (Field-Programmable Gate Arrays)). The sensing panel 130 can be, for example, a flat panel detector used to convert received X-rays into image data representing an image. The main controller includes a temporary memory 121 and an image processor 122. The temporary memory can also be called transient memory or volatile memory, such as RAM, DDR, etc.

[0055] The following is through Figure 2 Taking the temporary memory 121 as DDR as an example, a flowchart of an exemplary method for image correction using the image processing system 100 is described, as follows: Figure 2 As shown. After the image processing system powers on at point 201, at point 202, the host computer 110 requests the main controller 120 to acquire the original image for generating correction parameters for board-level image correction. At point 203, the main controller's image processor 122 acquires the original image, i.e., the image sensed by the sensing panel, and transmits the acquired original image to the host computer. At point 204, after receiving the original image, the host computer generates the corresponding correction parameters based on the original image, thus completing the generation of correction parameters. At point 205, the correction parameters are sent to the main controller for board-level correction, completing the parameter sending. At point 206, after receiving the correction parameters, the main controller's image processor caches the correction parameters in the DDR. At point 207, the main controller's image processor acquires the image to be corrected from the sensing panel 130 and reads the correction parameters from the DDR so that the image to be corrected can be corrected at point 208 to obtain the corrected image. The correction may include removing dead pixels, reducing noise, or adjusting gain of the image to be corrected. At 209, the image processor can cache the corrected image in DDR and transmit it to the host computer at 210. The host computer can, for example, display, analyze, or process the corrected image.

[0056] In some embodiments, the main controller may further include a gate controller 123 and a source controller 124, and the sensing panel includes a plurality of readout integrated circuits (ROICs) 131 arranged at opposite side edges of the sensing panel. The main controller can use the gate controller and the source controller to control the plurality of readout integrated circuits to read image data of the image sensed by the sensing panel. The number of the plurality of readout integrated circuits corresponds one-to-one with the number of pixel regions of the image sensed in a first direction of the sensing panel, and the readout circuit for reading image data of odd-numbered pixel regions is located at one side edge of the sensing panel, and the readout circuit for reading image data of even-numbered pixel regions is located at the opposite side edge of the sensing panel. The first direction is either a row direction or a column direction, which is not limited here. Figure 3 An exemplary layout diagram of an image processing system 100 according to an embodiment of the present disclosure is shown, wherein a plurality of ROICs 131 are arranged at opposite side edges of a sensing panel 130. A gate controller 123 is connected to a gate circuit GIC 132 of the sensing panel, and a source controller is connected to the ROICs of the sensing panel. A main controller uses the gate controller 123 and the source controller 124 to control the plurality of ROICs 131 to read image data of an image sensed by the sensing panel. The number of the plurality of ROICs 131 corresponds one-to-one with the number of pixel regions of the image sensed in a first direction of the sensing panel. ROICs for reading image data of odd-numbered pixel regions are located at one side edge of the sensing panel, and ROICs for reading image data of even-numbered pixel regions are located at the opposite side edge of the sensing panel. Figure 3 As shown, ROIC1, ROIC3, ROIC5, ROIC7, etc., located on the left edge, are used to read image data from the odd-numbered pixel areas of the sensing panel, while ROIC2, ROIC4, ROIC6, ROIC8, etc., located on the right edge, are used to read image data from the even-numbered pixel areas of the sensing panel. The read image data is then stitched together according to the odd-even arrangement of the pixel areas read by the ROICs to form a complete image, as shown below. Figure 4 As shown, n in ROICn is a positive integer.

[0057] The inventors discovered that in some cases, especially during dynamic image acquisition and correction, the frame rate of dynamic acquisition is very high. Figure 1The solution involves reading and writing correction parameters from temporary memory (DDR for example) 121. However, DDR, as a high-speed processing module of the circuit board, can cause electromagnetic interference, affecting the acquisition noise of the image to be corrected. When generating correction parameters, it is not necessary to read and write correction parameters from DDR during original image acquisition. Therefore, the acquisition noise during parameter generation differs from that during board-level correction, potentially leading to unsatisfactory correction results. In particular, when the main controller and sensing panel are integrated together or are close together, DDR is usually closer to one side of the ROICs (Real-in-Chips), such as ROIC2, ROIC4, ROIC6, and ROIC8 on the right edge. This makes the right-side ROICs more susceptible to electromagnetic interference, resulting in higher acquisition noise. Figure 5 As shown. This results in a significant difference between the acquisition noise when generating correction parameters and the acquisition noise during board-level correction, which further affects the effect of the corrected image. Figure 6 The image shows a grayscale comparison between software correction performed solely by the host computer (which does not require reading and writing correction parameters from DDR) and board-level correction (which requires reading and writing correction parameters from DDR). This illustrates the difference in acquisition noise between generating correction parameters and board-level correction. The image shows that the software-corrected image is smoother, while the images from each ROIC show significant differences during board-level correction. The grayscale curves also show a clear difference between board-level and software-corrected images for ROICs 2, 4, 6, and 8. Software-corrected images have more stable grayscale levels with no significant jumps in grayscale values ​​between each ROIC. However, board-level correction images show noticeable grayscale jumps due to noise interference, which can negatively impact the effectiveness of board-level correction, especially in noise reduction.

[0058] Figure 7 An exemplary flowchart of an image processing method 700 according to an embodiment of the present disclosure is illustrated, which can be applied to... Figure 1 The main controller, specifically, can be implemented by the image processor of the main controller. The method includes the following steps.

[0059] In step 710, in response to image correction being enabled, a set of correction parameters is cached in the temporary memory. This set of correction parameters is used to correct the image to be corrected and is generated by the host computer based on a first image set. The first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory. Image correction can be enabled by powering on the main controller, but this is not limiting. Since the temporary memory cannot retain data when power is off, the set of correction parameters needs to be cached in the temporary memory each time image correction is enabled. In embodiments of this disclosure, images sensed by the thin-film transistor-based sensing panel are acquired while reading random parameters from the temporary memory, and the acquired first image set is sent to the host computer, which then generates the set of correction parameters based on the first image set.

[0060] In some embodiments, the main controller may further include permanent memory. The permanent memory may also be referred to as non-transitory memory or non-volatile memory. The host computer can issue image acquisition commands to the main controller. Upon receiving the image acquisition command from the host computer, the main controller can acquire images sensed by the sensing panel to obtain a first image set and transmit the first image set to the host computer. Then, it receives the correction parameter set from the host computer and stores the correction parameter set in the permanent memory. Permanent memory retains data even after power failure, making it ideal for storing correction parameters. The permanent memory may be, for example, an SD (secure digital) card, hard disk, or other storage device. The read / write speed of permanent memory is relatively slow; therefore, in response to image correction being enabled, the correction parameter set can be cached from the permanent memory to the temporary memory. This eliminates the need to receive correction parameters from the host computer every time correction is performed. The parameters in the permanent memory can default to zero, and the data values ​​in the permanent memory can be random numbers. When reading random parameters from the temporary memory, random numbers from the permanent memory can be read, but these random numbers are not used for calculating the correction parameters.

[0061] In step 720, the required correction parameters for the image correction mode to be performed are determined. The image correction mode to be performed can be determined in advance, or it can be determined by the host computer and sent to the main controller. The image correction mode may include, for example, board-level correction and hybrid correction (i.e., both board-level correction and host computer software correction are present). The correction parameters may include at least one of dead pixel removal parameters, noise reduction parameters, and gain correction parameters. The dead pixel removal parameters are used to remove dead pixels in the image to be corrected, the noise reduction parameters are used to remove noise from the image to be corrected, and the gain correction parameters are used to remove gain differences at different locations in the image to be corrected.

[0062] In some embodiments, if the image correction mode to be performed is a first correction mode, the required correction parameters are determined to include at least one of a dead pixel removal parameter, a noise reduction parameter, and a gain correction parameter. The first correction mode may, for example, be board-level correction. In this case, dead pixel removal, noise reduction, and gain difference correction can all be performed on the main controller.

[0063] In some embodiments, if the image correction mode to be performed is the second correction mode, the required correction parameters include a subset of dead pixel removal parameters, noise reduction parameters, and gain correction parameters. Here, "a subset" refers to a portion of the three parameter types: dead pixel removal parameters, noise reduction parameters, and gain correction parameters. The second correction mode can be, for example, a hybrid correction. In this case, board-level correction corresponding to the subset of correction parameters can be performed on the main controller, and the board-level corrected image can be sent to a host computer for software correction corresponding to the other subset of correction parameters. Similarly, "the other subset" refers to another portion of the three parameter types: dead pixel removal parameters, noise reduction parameters, and gain correction parameters. As an example, noise reduction and gain difference removal (i.e., board-level correction) can be performed on the main controller, and the board-level corrected image can be sent to a host computer for dead pixel removal (i.e., software correction).

[0064] Because the frame rate increases significantly during dynamic acquisition, and the main controller's resources are limited, situations may arise where software correction and board-level correction need to be combined to maximize efficiency. Software processing excels at block-based operations, making it suitable for performing bad pixel correction, while board-level correction has stronger parallel processing capabilities, making it suitable for noise reduction and gain correction. Typically, bad pixel correction relies on pixel and label information from both the up and down rows of the image, as well as the left and right data of the current row, to determine the image data. If the current pixel needs bad pixel correction, the average of the eight surrounding pixels without error labels is taken as the corrected pixel value. Figure 8 The illustration shows a schematic diagram of a defect correction implementation according to an embodiment of the present disclosure. Figure 8As shown, removing bad pixels from the current pixel data 22 requires eight surrounding data points: pixels 11-13, 21, 23, and 31-33. The correction process itself requires caching pixel rows, making it relatively easy for the host computer software to handle. In contrast, noise reduction and gain correction typically involve a one-to-one correspondence between correction parameters and the image data to be corrected, thus eliminating the need for additional surrounding data. Figure 9 The illustration shows a schematic diagram of noise reduction and gain correction according to an embodiment of the present disclosure. Figure 9 As shown, when performing noise reduction or gain correction on the current pixel data 22, only the pixel data 22 and its corresponding parameters 22 are needed. Under high frame rate dynamic acquisition conditions, software correction and board-level correction can work together to maximize the functionality of each device. Of course, the above description is only an example. In some embodiments, it is possible for board-level correction to perform dead pixel removal and gain correction, while software correction performs noise reduction, or vice versa.

[0065] In step 730, while reading the required correction parameters from the set of correction parameters in the temporary memory, the image sensed by the sensing panel is acquired as the image to be corrected. In embodiments of this disclosure, the acquisition of the image to be corrected and the reading of the correction parameters are performed synchronously, thus making it suitable for dynamic acquisition situations with high frame rate requirements and ensuring the smoothness of the system. In some embodiments, the correction parameters corresponding to a row of pixel data can be read simultaneously with reading a row of pixel data of the image, i.e., correction is performed row by row, but this is not limiting.

[0066] In some embodiments, the main controller may further include a gate controller and a source controller, wherein, when acquiring an image to be corrected, the required correction parameters can be read from the correction parameter set in the temporary memory, while the image data of the image sensed by the sensing panel is read as the image to be corrected using the gate controller and the source controller. The gate controller can be used to send a gate signal to turn on the corresponding thin-film transistor in the sensing panel, while the source controller can be used to read the image data information in the turned-on thin-film transistor.

[0067] In step 740, the acquired image to be corrected is corrected using the read correction parameters to obtain a first corrected image. As described above, in some embodiments, if the image correction mode to be performed is the first correction mode, the read correction parameters include at least one of dead pixel removal parameters, noise reduction parameters, and gain correction parameters. The first correction mode may be, for example, board-level correction. In this case, board-level correction (i.e., at least one of dead pixel removal, noise reduction, and gain difference removal) is performed on the acquired image to be corrected on the main controller according to the read correction parameters. In some embodiments, if the image correction mode to be performed is the second correction mode, the read correction parameters include at least one of the aforementioned correction parameters. The second correction mode may be, for example, hybrid correction. As an example, noise reduction and gain difference removal (i.e., board-level correction) can be performed on the main controller according to the read correction parameters, and the board-level corrected image is sent to the host computer for dead pixel removal (i.e., software correction).

[0068] In step 750, the first corrected image is transmitted to the host computer. In some embodiments, if the image correction mode to be performed is a first correction mode (i.e., board-level correction), then the first corrected image is the final corrected image, and the first corrected image is transmitted to the host computer as the final corrected image. If the image correction mode to be performed is a second correction mode (i.e., hybrid correction), then the first corrected image is transmitted to the host computer as an intermediate corrected image, so that the host computer can use another part of the original parameter set to correct the first corrected image to obtain the final corrected image.

[0069] In the image processing method, the set of correction parameters used to correct the image to be corrected is generated by a host computer based on a first image set. This first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while simultaneously reading random parameters from a temporary memory. During image correction, the required correction parameters are read from the set of correction parameters in the temporary memory, and the image to be corrected is acquired simultaneously. In this way, electromagnetic interference and noise from the temporary memory are introduced during both the generation of correction parameters and the acquisition of the image to be corrected. This ensures that the noise levels of the original image used to generate the correction parameters are consistent with those of the original image to be corrected, thereby guaranteeing consistency between board-level correction, hybrid correction, and software correction. This method is simple to implement, reduces the processing load on the main controller, and improves the effectiveness of board-level correction.

[0070] Figure 10 The figures show a grayscale comparison of images obtained during board-level correction according to an embodiment of the present disclosure and those obtained through software correction performed solely by a host computer. As can be seen from the figures, the images obtained through software correction and board-level correction are equally smooth and have the same correction effect.

[0071] Figure 11 A schematic diagram of a main controller 1100, applicable to image processing, particularly image correction, according to an embodiment of the present disclosure, is shown. The main controller 1100 may be a reference... Figure 1 A specific example of the described main controller 120. For example... Figure 11 As shown, the main controller includes a temporary memory 1101 and an image processor 1102, which can respectively correspond to the reference. Figure 1 The temporary memory 121 and the image processor 122 are described. The image processor can be various processors, microprocessors, cores, and various integrated circuits with processing capabilities.

[0072] The graphics processor 1102 can be configured to cache a set of correction parameters in the temporary memory 1101 in response to image correction being enabled. The set of correction parameters is used to correct the image to be corrected and is generated by a host computer based on a first image set. The first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory. Image correction can be enabled by powering on the main controller, but this is not limiting. Since the temporary memory cannot retain data when power is off, the set of correction parameters needs to be cached in the temporary memory each time image correction is enabled. In embodiments of this disclosure, images sensed by the thin-film transistor-based sensing panel are acquired while reading random parameters from the temporary memory, and the acquired first image set is sent to the host computer, which then generates the set of correction parameters based on the first image set.

[0073] Then, the graphics processor 1102 is configured to determine the correction parameters required for the image correction mode to be performed; and while reading the required correction parameters from the set of correction parameters in the temporary memory, it acquires an image sensed by the sensing panel as the image to be corrected. The image correction mode may include, for example, board-level correction and hybrid correction (i.e., both board-level correction and software correction by the host computer are present). The correction parameters may include at least one of a dead pixel removal parameter, a noise reduction parameter, and a gain correction parameter. The dead pixel removal parameter is used to remove dead pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

[0074] Finally, the processor 1102 is configured to correct the acquired image to be corrected using the read correction parameters to obtain a first corrected image; and transmit the first corrected image to the host computer. If the image correction mode to be performed is the first correction mode, the read correction parameters include at least one of dead pixel removal parameters, noise reduction parameters, and gain correction parameters. The first correction mode may be, for example, board-level correction. In this case, board-level correction (i.e., at least one of dead pixel removal, noise reduction, and gain difference removal) is performed on the acquired image to be corrected on the main controller according to the read correction parameters. In some embodiments, if the image correction mode to be performed is the second correction mode, the read correction parameters include at least one of the aforementioned correction parameters. The second correction mode may be, for example, hybrid correction. As an example, noise reduction and gain difference removal (i.e., board-level correction) may be performed on the main controller according to the read correction parameters, and the board-level corrected image is sent to the host computer for dead pixel removal (i.e., software correction).

[0075] In some embodiments, the main controller 1100 may further include a permanent memory 1103, and the image processor is further configured to: in response to receiving an image acquisition command from a host computer, acquire images sensed by the sensing panel to obtain a first image set, and transmit the first image set to the host computer; receive the correction parameter set from the host computer, and store the correction parameter set in the permanent memory. The permanent memory may be, for example, a secure digital card, a hard disk, or other storage device. The read / write speed of the permanent memory is relatively slow, therefore, in response to image correction being enabled, the correction parameter set can be cached from the permanent memory to the temporary memory. This eliminates the need to receive correction parameters from the host computer every time correction is performed. The parameters in the permanent memory may default to zero, and the data values ​​in the permanent memory may be random numbers. When reading random parameters from the temporary memory, random numbers from the permanent memory can be read, but these random numbers are not used for calculating the correction parameters. Furthermore, the image processor is also configured to cache the set of correction parameters from the permanent memory to the temporary memory in response to the image correction being enabled.

[0076] In some embodiments, the main controller may further include a gate controller 1104 and a source controller 1105, and wherein the image processor is further configured to: simultaneously read the required correction parameters from the correction parameter set in the temporary memory, and use the gate controller and the source controller to read image data of the image sensed by the sensing panel. The number of the plurality of readout circuits typically corresponds one-to-one with the number of pixel regions of the image sensed in a first direction of the sensing panel, and refers to... Figure 3 As shown, the reading circuit for reading image data of odd-numbered pixel areas is located at one edge of the sensing panel, and the reading circuit for reading image data of even-numbered pixel areas is located at the opposite edge of the sensing panel.

[0077] In some embodiments, the image processor is further configured to, in response to the image correction mode to be performed being a first correction mode, determine the required correction parameters including at least one of a dead pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the dead pixel removal parameter is used to remove dead pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected. The first correction mode may be, for example, board-level correction. In this case, dead pixel removal, noise reduction, and gain difference removal can be performed on the host computer. The image processor is also configured to, in response to the image correction mode to be performed being the first correction mode, transmit the first corrected image as the final corrected image to the host computer.

[0078] In some embodiments, the image processor is further configured to: in response to the image correction mode to be performed being a second correction mode, determine that the required correction parameters include a portion of a bad pixel removal parameter, a noise reduction parameter, and a gain correction parameter; wherein the bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected. The second correction mode may, for example, be a hybrid correction. In this case, the image processor is further configured to, in response to the image correction mode to be performed being the second correction mode, transmit the first corrected image as an intermediate corrected image to a host computer, so that the host computer can use another portion of the bad pixel removal parameter, the noise reduction parameter, and the gain correction parameter to correct the intermediate corrected image to obtain the final corrected image.

[0079] In some embodiments, the main controller 1100 may further include a clock & reset generation module 1106, which is configured to provide clock and reset signals required for operation to each component or module of the main controller, ensuring the clock requirements of different components or modules, and being responsible for controlling the reset of related components or modules. As an example, in some embodiments, the main controller 1100 may also include a network transmission module (which may be, for example, an Ethernet transmission module), configured for interactive command control, as well as the transmission of calibration parameters and image information. For example, the host computer, acting as a human-machine interface, performs functions such as issuing commands and parameters, acquiring images, and reading back parameters to the main control module through the Ethernet transmission module. The image after board-level calibration is first cached in DDR and then transmitted to the host computer via Ethernet.

[0080] In the main controller, the set of correction parameters used to correct the image to be corrected is generated by the host computer based on a first image set. This first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while simultaneously reading random parameters from a temporary memory. During image correction, the image processor reads the required correction parameters from the set of correction parameters in the temporary memory while simultaneously acquiring the image to be corrected. In this way, electromagnetic interference and noise from the temporary memory are introduced during both the generation of correction parameters and the acquisition of the image to be corrected. This ensures that the noise levels of the original image used for generating the correction parameters are consistent with those of the original image to be corrected, thereby guaranteeing consistency between board-level correction, hybrid correction, and software correction. This approach simplifies implementation, reduces the processing load on the main controller, and improves the effectiveness of board-level correction.

[0081] As an example, when using the main controller 1100, refer to Figure 1 The graphics processing system 100 may include a host computer 110, a main controller 1100, and a thin-film transistor-based sensing panel 130. The sensing panel 130 may, for example, be a flat panel detector for converting received X-rays into image data representing an image. The host computer 110 may be configured to generate a raw parameter set for correcting the image to be corrected based on a first image set, transmit the correction parameter set to the main controller, and receive the first corrected image, wherein the correction parameter set is at least a portion of the raw parameter set. The thin-film transistor-based sensing panel 130 is configured to sense the images in the first image set and the image to be corrected.

[0082] As described above, the main controller further includes a gate controller and a source controller, and the sensing panel includes a plurality of readout circuits arranged at opposite side edges of the sensing panel; wherein the image processor is further configured to use the gate controller and the source controller to control the plurality of readout circuits to read image data of the image sensed by the sensing panel.

[0083] In some embodiments, the number of the plurality of reading circuits corresponds one-to-one with the number of pixel regions of the image sensed in the first direction of the sensing panel, and the reading circuit 131 for reading image data of odd-numbered pixel regions is located at one edge of the sensing panel, and the reading circuit for reading image data of even-numbered pixel regions is located at the opposite edge of the sensing panel.

[0084] In some embodiments, the host computer 110 is further configured to receive the first corrected image as the final corrected image in response to the image correction mode to be performed being a first correction mode.

[0085] In some embodiments, the original parameter set includes dead pixel removal parameters, noise reduction parameters, and gain correction parameters. The host computer 110 is further configured to transmit a portion of the original parameter set as a correction parameter set to the main controller in response to the image correction mode to be performed being a second correction mode. The main controller can perform a board-level correction portion of the hybrid correction based on the noise reduction parameters and gain correction to obtain a first corrected image. The host computer 110 can be further configured to correct the first corrected image using another portion of the original parameter set to obtain a final corrected image.

[0086] In some embodiments, the host computer 110 is further configured to generate the bad pixel removal parameters and the noise reduction parameters based on the dark images in the first image set (i.e., the original image acquired is a dark image), and to generate the gain correction parameters based on the bright images in the first image set (i.e., the original image acquired is a bright image).

[0087] Figure 12 An exemplary working principle diagram of an image processing system according to an embodiment of the present disclosure is shown, wherein temporary memory DDR is used as an example. Figure 12As shown. The host computer 1201, acting as a human-machine interface, can interact with the image processor 1203 of the main controller via the Ethernet transmission module 1202, exchanging commands, parameters, or data. For example, it can send commands to the image processor 1203 to acquire images, send correction parameters, and read back parameters. The image processor 1203 can receive commands from the host computer and control the gate controller 1204 and source controller 1205 to acquire image data from the thin-film transistor-based sensing panel 1206 and upload the acquired data. For board-level image correction, after receiving the correction parameters sent by the host computer, the correction parameters are stored in the permanent storage SD card 1207. When performing board-level correction, the image processor first reads the correction parameters from the SD card 1207 into the DDR 1208 for caching. DDR is a volatile storage device and needs to be read again each time power is applied. Once the calibration parameters are read, the gate controller and source controller are activated to acquire data of the image to be calibrated. Simultaneously, image calibration is performed, and the calibrated image is cached in DDR memory and transmitted to the host computer via Ethernet when needed. Of course, this entire process requires the clock and reset module 1209 to provide the necessary clock and reset control signals to each module.

[0088] Figure 13 An exemplary interactive flowchart illustrating the image processing performed by an image processing system according to an embodiment of the present disclosure is shown, using board-level correction mode as an example. The board-level correction mode can, for example, be retrieved by a host computer and sent to the main controller; however, this is not limiting. Figure 13 As shown in step S1301, after the image processing system is powered on, the main controller determines whether to initiate board-level calibration. The main controller can determine whether normal calibration parameters for board-level calibration exist. If normal calibration parameters do not exist, board-level calibration is not initiated; otherwise, board-level calibration is initiated. Normal calibration parameters can be obtained by pre-adding identifiers to the calibration parameters and checking whether the identifiers are correct.

[0089] If board-level calibration is not initiated, then in S1302, after the host computer sends a command to the main controller to request the acquisition of the original image (e.g., the original image sensed by the thin-film transistor-based sensing panel), in S1303, the main controller can initiate the reading of random parameters (e.g., in DDR), and synchronously acquire the original image (i.e., the first image set) from the sensing panel in S1304. Then, in S1305, the original image is transmitted to the host computer, for example, via an Ethernet transmission module. Then, in S1306, after receiving the original image, the host computer generates a corresponding set of raw parameters (e.g., three calibration parameters: dead pixel removal, noise reduction, and gain correction). Optionally, this can be stored for later use in software calibration. Then, in S1307, the host computer sends at least a portion of the raw parameter set (e.g., the three calibration parameters: dead pixel removal, noise reduction, and gain correction) as a calibration parameter set to the main controller. In S1308, the main controller can store the received calibration parameter set, for example, in an SD card for board-level calibration, and then continue to S1309. If board-level calibration is initiated, it will jump directly to S1309.

[0090] In S1309, the main controller reads the calibration parameter set from the SD card and caches it in the DDR. Optionally, if needed, these calibration parameter sets can be sent back to the host computer, for example, for calibration parameter verification. In S1310, the main controller, having read the required calibration parameters from the DDR, synchronously controls the gate controller and source controller in S1311 to acquire the image to be calibrated from the sensing panel. Then, in S1312, the main controller uses the read calibration parameters to calibrate the acquired image to obtain a first calibrated image. In S1313, the main controller can transmit the first calibrated image to the host computer, for example, so that the host computer can display the first calibrated image. Optionally, the main controller can write the first calibrated image back to the DDR and then transmit it to the host computer via the Ethernet transmission module.

[0091] Figure 14 An exemplary interactive flowchart illustrating the image processing system performing image processing according to an embodiment of the present disclosure is shown, using a hybrid correction mode as an example. The hybrid correction mode can be, for example, notified by a host computer to the main controller; however, this is not limiting. Figure 14 As shown, at step S1401, after the image processing system is powered on, the main controller determines whether to initiate hybrid correction. The main controller can determine whether normal correction parameters for hybrid correction exist. If normal correction parameters do not exist, hybrid correction is not initiated; otherwise, hybrid correction is initiated. Normal correction parameters can be obtained by pre-adding identifiers to the correction parameters and checking whether the identifiers are correct.

[0092] If hybrid calibration is not initiated, in S1402, after the host computer sends a command to the main controller to request the acquisition of the original image (e.g., the original image sensed by the thin-film transistor-based sensing panel), in S1403, the main controller can initiate the reading of random parameters (e.g., in DDR), and synchronously acquire the original image (i.e., the first image set) from the sensing panel in S1404, and then transmit it to the host computer in S1405, for example, via an Ethernet transmission module. Then, in S1406, after receiving the original image, the host computer generates the corresponding raw parameter set and stores it for later use in software calibration (especially storing the dead pixel removal parameters). Then, in S1407, the host computer sends a portion of the raw parameter set (e.g., both noise reduction and gain correction parameters) as a calibration parameter set to the main controller. In S1408, the main controller can store the received calibration parameter set, for example, in an SD card for board-level calibration, and then continue to S1409. If hybrid calibration is initiated, it skips directly to S1409.

[0093] In S1409, the main controller reads the calibration parameter set from the SD card and caches it in the DDR. Optionally, if needed, these calibration parameter sets can be sent back to the host computer, for example, for calibration parameter verification. In S1410, the main controller, having read the required calibration parameters from the DDR, synchronously controls the gate controller and source controller in S1411 to acquire the image to be calibrated from the sensing panel. Then, in S1412, the main controller uses the read calibration parameters to perform board-level calibration (e.g., noise reduction and gain correction) on the acquired image to be calibrated to obtain a first calibrated image. In S1413, the main controller can transmit the first calibrated image to the host computer. Optionally, the main controller can write the first calibrated image back to the DDR and then transmit it to the host computer via the Ethernet transmission module. Then, in S1414, the host computer performs software calibration (e.g., dead pixel removal) on the first calibrated image to obtain the final calibrated image.

[0094] Figure 15 An exemplary structural block diagram of an image processing apparatus 1500 according to an embodiment of the present disclosure is shown. Figure 15 As shown, the image processing device includes a cache execution module 1510, a correction parameter determination module 1520, an image acquisition module 1530, an image correction module 1540, and a corrected image transmission module 1550.

[0095] The cache execution module 1510 is configured to cache a set of correction parameters in the temporary memory in response to the image correction being enabled, wherein the set of correction parameters is used to correct the image to be corrected and is generated by the host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters in the temporary memory.

[0096] The correction parameter determination module 1520 determines the correction parameters required for the image correction mode to be performed.

[0097] The image acquisition module 1530 is configured to acquire the image sensed by the sensing panel as the image to be corrected while reading the required correction parameters from the set of correction parameters in the temporary memory.

[0098] The image correction module 1540 is configured to correct the acquired image to be corrected using the read correction parameters to obtain a first corrected image.

[0099] The image correction transmission module 1550 is configured to transmit the first image correction to the host computer.

[0100] Figure 16 An example block diagram of a computing device 1600 according to some embodiments of this application is illustrated schematically. For example, it may represent Figure 1 The main controller 120 in the reference may be used to implement the reference. Figure 15 The image processing apparatus 1500 described.

[0101] As shown in the figure, the example computing device 1600 includes a processing system 1601 communicatively coupled to each other, one or more computer-readable media 1602, and one or more I / O interfaces 1603. Although not shown, the computing device 1600 may also include a system bus or other data and command transmission system that couples the various components to each other. The system bus may include any or a combination of different bus architectures, such as a memory bus or memory controller, a peripheral bus, a universal serial bus, and / or a processor or local bus utilizing any of a variety of bus architectures, or may include control and data lines.

[0102] Processing system 1601 represents the functionality of performing one or more operations using hardware. Therefore, processing system 1601 is illustrated as including hardware elements 1604 that can be configured as processors, function blocks, etc. This may include application-specific integrated circuits (ASICs) or other logic devices formed using one or more semiconductors implemented in the hardware. Hardware element 1604 is not limited by its forming material or the processing mechanism employed therein. For example, a processor may consist of semiconductors and / or transistors (e.g., integrated circuits (ICs)). In such a context, processor-executable instructions may be electronically executable instructions.

[0103] Computer-readable medium 1602 is illustrated as including memory / storage device 1605. Memory / storage device 1605 represents a memory / storage device associated with one or more computer-readable media. Memory / storage device 1605 may include volatile storage media (such as random access memory (RAM)) and / or non-volatile storage media (such as read-only memory (ROM), flash memory, optical disk, magnetic disk, etc.). Memory / storage device 1605 may include fixed media (e.g., RAM, ROM, fixed hard disk drive, etc.) and removable media (e.g., flash memory, removable hard disk drive, optical disk, etc.). Computer-readable medium 1602 may be configured in various other ways as further described below.

[0104] One or more input / output interfaces 1603 represent a function that allows a user to type commands and information into a computing device 1600 and also allows information to be presented to the user and / or sent to other components or devices using various input / output devices. Examples of input devices include keyboards, cursor control devices (e.g., mice), microphones (e.g., for voice input), scanners, touch functionality (e.g., capacitive or other sensors configured to detect physical touch), cameras (e.g., capable of detecting non-touch-related movements as gestures using visible or invisible wavelengths (such as infrared frequencies), network interface cards (NICs), receivers, and so on. Examples of output devices include display devices (e.g., monitors or projectors), speakers, printers, haptic-responsive devices, network interface cards (NICs), transmitters, and so on.

[0105] The computing device 1600 also includes an application 1606. The application 1606 can be stored as computing program instructions in the memory / storage device 1605. The application 1606, together with the processing system 1601, etc., can implement [the following]. Figure 15 The image processing apparatus 1500 described includes all the functions of each module.

[0106] This document describes various technologies in the general context of software, hardware, components, or program modules. Generally, these modules include routines, programs, objects, elements, components, data structures, etc., that perform specific tasks or implement specific abstract data types. The terms "module," "function," etc., as used herein generally refer to software, firmware, hardware, or a combination thereof. The technologies described herein are platform-independent, meaning that these technologies can be implemented on a variety of computing platforms with various processors.

[0107] Implementations of the described modules and technologies may be stored on or transmitted across some form of computer-readable medium. The computer-readable medium may include a variety of media accessible by the computing device 1600. By way of example and not limitation, the computer-readable medium may include both "computer-readable storage media" and "computer-readable signal media".

[0108] In contrast to simple signal transmission, carrier waves, or signals themselves, a "computer-readable storage medium" refers to a medium and / or device capable of persistently storing information, and / or a tangible storage device. Therefore, a computer-readable storage medium refers to a non-signal-bearing medium. Computer-readable storage media include hardware such as volatile and non-volatile, removable and non-removable media and / or storage devices implemented using methods or techniques suitable for storing information (such as computer-readable instructions, data structures, program modules, logic elements / circuits, or other data). Examples of computer-readable storage media may include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, DVD or other optical storage devices, hard disks, magnetic tape cassettes, magnetic tapes, disk storage devices or other magnetic storage devices, or other storage devices, tangible media, or articles of art suitable for storing desired information and accessible by a computer.

[0109] "Computer-readable signal medium" refers to a signal-bearing medium configured to transmit instructions, such as via a network, to computing device 1600. A signal medium typically embodies computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave, data signal, or other transmission mechanism. Signal media also include any information transmission medium. By way of example and not limitation, signal media includes wired media such as wired networks or direct connections, and wireless media such as acoustic, RF, infrared, and other wireless media.

[0110] As previously described, hardware element 1601 and computer-readable medium 1602 represent instructions, modules, programmable device logic, and / or fixed device logic implemented in hardware, which in some embodiments can be used to implement at least some aspects of the techniques described herein. Hardware elements may include components of integrated circuits or systems-on-a-chip, application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), and other implementations or other hardware devices in silicon. In this context, hardware elements can serve as processing devices for executing program tasks defined by instructions, modules, and / or logic embodied by the hardware element, and as hardware devices for storing instructions for execution, such as the previously described computer-readable storage medium.

[0111] The foregoing combinations can also be used to implement the various techniques and modules described herein. Therefore, software, hardware, or program modules and other program modules can be implemented as one or more instructions and / or logic embodied on some form of computer-readable storage medium and / or by one or more hardware elements 1601. The computing device 1600 can be configured to implement specific instructions and / or functions corresponding to the software and / or hardware modules. Thus, modules can be implemented at least partially in hardware as modules executable as software by the computing device 1600, for example, by using the computer-readable storage medium and / or hardware element 1601 of the processing system. Instructions and / or functions can be executed / operated by, for example, one or more computing devices 1600 and / or processing systems 1601 to implement the techniques, modules, and examples described herein.

[0112] The techniques described herein can be supported by these various configurations of the computing device 1600, and are not limited to specific examples of the techniques described herein.

[0113] It should be understood that, for clarity, embodiments of this application have been described with reference to different functional units. However, it will be apparent that, without departing from this application, the functionality of each functional unit may be implemented in a single unit, in multiple units, or as part of other functional units. For example, functionality described as being performed by a single unit may be performed by multiple different units. Therefore, references to specific functional units are considered merely as references to the appropriate units used to provide the described functionality, and not as indicating a strict logical or physical structure or organization. Thus, this application may be implemented in a single unit, or may be physically and functionally distributed among different units and circuits.

[0114] This application provides a computer-readable storage medium storing computer-readable instructions thereon, which, when executed, implement the above-described image processing method.

[0115] This application provides a computer program product or computer program including computer instructions stored in a computer-readable storage medium. A processor of a computing device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the computing device to perform the image processing methods provided in the various embodiments described above.

[0116] By studying the accompanying drawings, the disclosure, and the appended claims, those skilled in the art can understand and implement variations of the disclosed embodiments in practicing the claimed subject matter. In the claims, the word "comprising" does not exclude other elements or steps, and "a" or "an" does not exclude a plurality. The mere fact that certain measures are recited in mutually different dependent claims does not imply that a combination of these measures cannot be used for profit.

Claims

1. A main controller for image processing, the main controller comprising: Temporary storage; as well as The image processor is configured as follows: In response to image correction being enabled, a set of correction parameters is cached in the temporary memory, wherein the set of correction parameters is used to correct the image to be corrected and is generated by the host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters in the temporary memory. Determine the correction parameters required for the image correction mode to be performed; While reading the required correction parameters from the set of correction parameters in the temporary memory, the image sensed by the sensing panel is acquired as the image to be corrected; The acquired image to be corrected is corrected using the read correction parameters to obtain the first corrected image; The first corrected image is transmitted to the host computer.

2. The main controller according to claim 1, wherein, The main controller also includes permanent memory, and the image processor is further configured to: In response to receiving an image acquisition command from the host computer, the image sensed by the sensing panel is acquired to obtain a first image set, and the first image set is transmitted to the host computer; The system receives the set of correction parameters from the host computer and stores the set of correction parameters in the permanent memory.

3. The main controller according to claim 2, wherein the image processor is further configured to: In response to the image correction being enabled, the set of correction parameters is cached from the permanent memory to the temporary memory.

4. The main controller according to claim 1, wherein, The main controller further includes a gate controller and a source controller, and wherein the image processor is further configured to: While reading the required correction parameters from the set of correction parameters in the temporary memory, the image data of the image sensed by the sensing panel is read using the gate controller and the source controller.

5. The main controller according to claim 1, wherein, The image processor is also configured to: In response to the image correction mode to be performed being the first correction mode, the required correction parameters are determined to include at least one of the following: bad pixel removal parameters, noise reduction parameters, and gain correction parameters. The bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

6. The main controller according to claim 1, wherein, The image processor is also configured to: In response to the image correction mode to be performed being the second correction mode, the required correction parameters are determined to include a portion of the bad pixel removal parameters, noise reduction parameters, and gain correction parameters. The bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

7. The main controller according to claim 5, wherein, The image processor is also configured to: In response to the image correction mode to be performed being the first correction mode, the first corrected image is transmitted to the host computer as the final corrected image.

8. The main controller according to claim 6, wherein, The image processor is also configured to: In response to the image correction mode to be performed being the second correction mode, the first corrected image is transmitted to the host computer as an intermediate corrected image, so that the host computer can use another part of the bad pixel removal parameters, noise reduction parameters, and gain correction parameters to correct the intermediate corrected image to obtain the final corrected image.

9. An image processing system, comprising: The main controller according to any one of claims 1-8; as well as The host computer is configured to generate an original parameter set for correcting the image to be corrected based on a first image set, transmit the correction parameter set to the main controller, and receive the first corrected image, wherein the correction parameter set is at least a part of the original parameter set. A thin-film transistor-based sensing panel is configured to sense an image in a first graphics set and an image to be corrected.

10. The image processing system according to claim 9, wherein, The sensing panel includes a flat panel detector for converting received X-rays into image data representing an image.

11. The image processing system according to claim 9, wherein, The main controller also includes a gate controller and a source controller, and the sensing panel includes a plurality of readout circuits arranged at opposite side edges of the sensing panel. The image processor is further configured to use a gate controller and a source controller to control the plurality of readout circuits to read image data of the image sensed by the sensing panel.

12. The image processing system according to claim 11, wherein, The number of the plurality of reading circuits corresponds one-to-one with the number of pixel regions of the image sensed in the first direction of the sensing panel, and the reading circuit for reading image data of odd-numbered pixel regions is located at one edge of the sensing panel, and the reading circuit for reading image data of even-numbered pixel regions is located at the opposite edge of the sensing panel.

13. The image processing system according to claim 9, wherein, The host computer is also configured to receive the first corrected image as the final corrected image in response to the image correction mode to be performed being the first correction mode.

14. The image processing system according to claim 9, wherein, The original parameter set includes parameters for removing bad pixels, parameters for reducing noise floor, and parameters for gain correction. The host computer is also configured to transmit a portion of the original parameter set as a correction parameter set to the main controller in response to the image correction mode to be performed being a second correction mode.

15. The image processing system according to claim 14, wherein, The host computer is also configured to use another part of the original parameter set to correct the first corrected image to obtain the final corrected image.

16. The image processing system according to claim 14, wherein, The host computer is also configured to generate the de-de-spot parameters and the de-noising parameters based on the dark images in the first image set, and to generate gain correction parameters based on the bright images in the first image set.

17. An image processing method applied to a main controller, the main controller including at least temporary memory, and the method comprising: In response to image correction being enabled, a set of correction parameters is cached in the temporary memory, wherein the set of correction parameters is used to correct the image to be corrected and is generated by the host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters in the temporary memory. Determine the correction parameters required for the image correction mode to be performed; While reading the required correction parameters from the set of correction parameters in the temporary memory, the image sensed by the sensing panel is acquired as the image to be corrected; The acquired image to be corrected is corrected using the read correction parameters to obtain the first corrected image; The first corrected image is transmitted to the host computer.

18. The method according to claim 17, wherein, The main controller further includes permanent memory, and the method further includes: In response to receiving an image acquisition command from the host computer, the image sensed by the sensing panel is acquired to obtain a first image set, and the first image set is transmitted to the host computer; The system receives the set of correction parameters from the host computer and stores the set of correction parameters in the permanent memory.

19. The method according to claim 18, wherein, In response to image correction being enabled, caching a set of correction parameters into the temporary memory includes: In response to the image correction being enabled, the set of correction parameters is cached from the permanent memory to the temporary memory.

20. The method of claim 17, wherein, The main controller further includes a gate controller and a source controller, and wherein, while reading the required correction parameters from the correction parameter set in the temporary memory, acquiring the image sensed by the sensing panel as the image to be corrected includes: While reading the required correction parameters from the correction parameter set in the temporary memory, the image data of the image sensed by the sensing panel is read using the gate controller and the source controller as the image to be corrected.

21. The method according to claim 17, wherein, Determine the correction parameters required to perform the image correction mode, including: In response to the image correction mode to be performed being the first correction mode, the required correction parameters are determined to include at least one of the following: bad pixel removal parameters, noise reduction parameters, and gain correction parameters. The bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

22. The method according to claim 17, wherein, Determine the correction parameters required to perform the image correction mode, including: In response to the image correction mode to be performed being the second correction mode, the required correction parameters are determined to include a portion of the bad pixel removal parameters, noise reduction parameters, and gain correction parameters. The bad pixel removal parameter is used to remove bad pixels in the image to be corrected, the noise reduction parameter is used to remove noise in the image to be corrected, and the gain correction parameter is used to remove gain differences at different locations in the image to be corrected.

23. The method according to claim 21, wherein, Transmitting the first corrected image to the host computer includes: In response to the image correction mode to be performed being the first correction mode, the first corrected image is transmitted to the host computer as the final corrected image.

24. The method according to claim 22, wherein, Transmitting the first corrected image to the host computer includes: In response to the image correction mode to be performed being the second correction mode, the first corrected image is transmitted to the host computer as an intermediate corrected image, so that the host computer can use another part of the bad pixel removal parameters, noise reduction parameters, and gain correction parameters to correct the intermediate corrected image to obtain the final corrected image.

25. An image processing apparatus applied to a main controller, the main controller including at least a temporary memory, and the image correction apparatus comprising: A cache execution module is configured to cache a set of correction parameters in the temporary memory in response to an image correction being enabled, wherein the set of correction parameters is used to correct the image to be corrected and is generated by a host computer based on a first image set, and wherein the first image set is obtained by acquiring images sensed by a thin-film transistor-based sensing panel while reading random parameters from the temporary memory. The correction parameter determination module determines the correction parameters required for the image correction mode to be performed. The image acquisition module is configured to acquire the image sensed by the sensing panel as the image to be corrected while reading the required correction parameters from the set of correction parameters in the temporary memory; The image correction module is configured to correct the acquired image to be corrected using the read correction parameters to obtain a first corrected image; The image correction transmission module is configured to transmit the first corrected image to the host computer.

26. A computer-readable storage medium storing computer-executable instructions that, when executed, perform the method as described in any one of claims 17-24.

27. A computer program product, characterized in that, The computer program product includes computer-executable instructions that, when executed, implement the method according to any one of claims 17-24.

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