Dual notch etch to reduce underetching of micro-electro-mechanical system (MEMS) devices

Abstract

Disclosed are methods and apparatus related to micro-electro-mechanical systems (MEMS). A method for manufacturing a mechanical pillar in a micro-electro-mechanical (MEM) device may include: depositing a mask layer on a first side of a substrate; etching a first recess on the first side of the substrate; forming a pillar structure on the substrate wherein a first portion of the pillar structure is coupled to the first recess; etching a second recess at a second portion of the pillar structure; depositing an oxide layer on the column structure, the mask layer and the substrate; etching a horizontal surface of the oxide layer at the mask layer and the substrate; and releasing the mechanical pillar from the substrate, the mechanical pillar including a pillar structure, an oxide layer, and a mask layer.

Description

[0001] Cross-citation of related applications This application claims priority to U.S. Patent Application No. 18 / 656,629, filed May 7, 2024, which claims priority to U.S. Provisional Application No. 63 / 500,981, filed May 9, 2023, entitled “Dual Notch Etching to Reduce Undercutting of Microelectromechanical Systems (MEMS) Devices,” the entire contents of which are incorporated herein by reference. Background Technology

[0002] MEMS (Micro-Electro-Mechanical Systems) devices can be miniature mechanical structures and can be fabricated using various integrated circuit (IC) manufacturing methods. For example, a MEMS device can include a MEMS micromirror device, which may include one or more mechanical pillar structures (also known as flexible bodies) for suspending reflective surfaces. Methods for fabricating MEMS micromirror devices with reduced variability will be useful. Summary of the Invention

[0003] What is disclosed are mechanical pillars related to microelectromechanical systems (MEMS) devices and methods for manufacturing or fabricating mechanical pillars related to MEMS devices.

[0004] Microelectromechanical (MEMS) devices may include a substrate and mechanical pillars. The mechanical pillars may include pillar structures located on a first side of the substrate. A first portion of the pillar structure may include a first notch, and a second portion of the pillar structure may include a second notch. The mechanical pillars may include a mask layer located on a horizontal surface of the pillar structure. The mechanical pillars may include an oxide layer located on a vertical surface of the pillar structure.

[0005] A method for reducing the undulation of mechanical pillars in a microelectromechanical (MEMS) device may include forming a pillar structure on a substrate. The pillar structure may include: a first notch located at a first portion of the pillar structure; a second notch located at a second portion of the pillar structure; and a body positioned between the first and second notches. The method may include using an etching process to release the pillar structure from the substrate, the etching process contributing to reducing undulation of one or more of the following: the mechanical stiffness of the mechanical pillar, the height of the mechanical pillar, and performance characteristics of the mechanical pillar. This undulation may be compared to a reference undulation without the second notch.

[0006] A method for fabricating a mechanical pillar in a microelectromechanical (MEMS) device may include: depositing a mask layer on a first side of a substrate; etching a first notch on the first side of the substrate; forming a pillar structure on the substrate, wherein a first portion of the pillar structure is connected to the first notch; etching a second notch at a second portion of the pillar structure; depositing an oxide layer on the pillar structure, the mask layer, and the substrate; etching a horizontal surface of the oxide layer at the mask layer and the substrate; and releasing the mechanical pillar from the substrate, wherein the mechanical pillar may include the pillar structure, the oxide layer, and the mask layer.

[0007] The foregoing general description and the following detailed description are merely exemplary and explanatory, and are not intended to limit the specific embodiments disclosed herein.

[0008] [Cited and incorporated] All publications, patents and patent applications mentioned in this specification are incorporated herein by reference to the same extent that each individual publication, patent or patent application is specifically and individually indicated to be incorporated by reference.

[0009] US 4,685,198, licensed to Kawakita et al. on August 11, 1987; US 5,198,390, licensed to MacDonald on March 30, 1993; US 5,316,979, licensed to MacDonald on May 31, 1994; US 5,426,070, licensed to Shaw et al. on June 20, 1995; US 5,501,893, licensed to Laermer et al. on March 26, 1996; US 5,880,035, licensed to Fukuda on March 9, 1999; US 6,174,784, licensed to Forbes on January 16, 2001; US 6,306,715, authorized to Chan et al. on October 23, 2001; US Patent 6,712,983, licensed to Zhao et al. on March 30, 2004; US 7,214,625, licensed to Asami et al. on May 8, 2007; US 7,524,767, licensed to Chilcott on April 28, 2009; US 7,947,576, licensed to Igari et al. on May 24, 2011; US 8,198,148, licensed to Koo et al. on June 12, 2012; US Patent 8,853,803, licensed to Adams et al. on October 7, 2014; US 9,773,677, licensed to Surthi on September 26, 2017; US Patent 11,107,812, licensed to Chan et al. on August 31, 2021; and US 2015 / 0206761 A1, licensed to Fucsko et al. on July 23, 2015; Attached Figure Description

[0010] The novel features of the invention are specifically set forth in the appended claims. A better understanding of the features and advantages of the invention will be gained by referring to the following detailed description and accompanying drawings, which illustrate specific embodiments in which the principles of the invention are utilized: Figures 1A to 1E A schematic cross-sectional view illustrates the process of fabricating a mechanical pillar using a silicon wafer according to the present disclosure; Figures 2A to 2B A flowchart illustrating an exemplary operational configuration of a method for generating or producing mechanical columns according to this disclosure is shown; Figure 3 A flowchart illustrating an exemplary operational configuration of a method for generating or producing mechanical columns according to this disclosure is shown; Figures 4A to 4B A cross-sectional view is shown of releasing a second mechanical pillar having a second pillar structure from a silicon substrate according to the present disclosure, the second pillar structure not having a second notch; and Figure 5 A first mechanical column structure including a second notch is shown according to this disclosure. Detailed Implementation

[0011] In a typical process, the top of a silicon mechanical pillar can be defined by a photoresist layer on silicon dioxide. The silicon dioxide layer can then be chemically etched (dry or wet). For example, deep reactive ion etching (DRIE) can be used to etch the silicon substrate. DRIE leverages the advantages of Bosch's deep silicon etching process, which uses alternating etching and deposition cycles, as described in document US5,501,893.

[0012] Following deep silicon etching, several operations can be performed, including: (i) thin sidewall passivation deposition (typically using silicon dioxide), (ii) anisotropic oxide etching to remove passivation from the bottom of the chamber, (iii) a second anisotropic etching, and (iv) isotropic silicon etching to release the mechanical structure. The isotropic silicon etching used to release the mechanical structure can result in significant under-etching of the silicon core of the structural member. Therefore, the mechanical stiffness of the structure may decrease with increasing under-etching. Additionally, under-etching can increase the variability in structural stiffness because the actual height of the mechanical structure is uncertain. Consequently, the mechanical structure may be more difficult to model.

[0013] Disclosed is a mechanical pillar associated with a microelectromechanical system (MEMS) device and a method for manufacturing or fabricating such a mechanical pillar. A method for reducing stiffness variations in the mechanical structure during the manufacturing process is also disclosed. The disclosed mechanical structure has a modelable and predictable height. By reducing the amount of under-etching of the silicon structure, the dimensions of the mechanical pillar can be better controlled. Therefore, the mechanical behavior of the fabricated pillar can more closely approximate the mechanical behavior of a modeled pillar before manufacturing. Because the mechanical behavior of the modeled pillar and the fabricated pillar can be more closely approximated, the device performance can exhibit smaller fluctuations.

[0014] A method for fabricating a mechanical pillar in a microelectromechanical (MEMS) device may include: depositing a mask layer on a first side of a substrate; etching a first notch on the first side of the substrate; forming a pillar structure on the substrate, wherein a first portion of the pillar structure is connected to the first notch; etching a second notch on a second portion of the pillar structure; depositing an oxide layer on the pillar structure, the mask layer, and the substrate; etching a horizontal surface of the oxide layer at the mask layer and the substrate; and releasing the mechanical pillar from the substrate, wherein the mechanical pillar may include the pillar structure, the oxide layer, and the mask layer.

[0015] This method can be implemented as described. At the start of the etching process, a relatively vigorous silicon etching operation can be performed to form a first notch. This first notch allows the subsequent conformal sidewall passivation coating to better protect the apex edges of the silicon pillar during isotropic release etching. After the first notch is formed, the silicon etching process can continue in alternating cycles of deposition and etching to produce a vertical etch profile that conforms to the width of the mask oxide.

[0016] When the etching approaches the desired depth in the silicon, a second, more vigorous etching operation can be performed. After the second etching operation, the deep silicon etching is complete. Subsequently, a thin, conformal sidewall passivation film can be deposited on this structure. This passivation film can be, for example, a plasma-enhanced chemical vapor deposition (PECVD) silicon dioxide coating. After this coating is applied, anisotropic etching can be performed to remove the passivation coating from the horizontal surface, leaving a complete coating on the vertical surface.

[0017] Isotropic release etching can be performed. This isotropic release etching can be, for example, SF6 or XeF6 etching. Because the bottom of the mechanical pillar can be cut off, the amount of etching down the silicon core of the mechanical pillar can be reduced.

[0018] Mechanical pillars allow for more accurate modeling, and the height of MEMS mirrors can exhibit increased uniformity, which can improve yield. Currently, the variation in structural height from the target structural height can be as high as 50%. However, the disclosed process can reduce the variation in structural height to less than one or more of 20%, 10%, 5%, etc., of the target structural height.

[0019] I. Manufacturing Method A method for releasing a mechanical structure from a silicon substrate may include: (i) deep silicon etching, (ii) thin sidewall passivation deposition (e.g., using a plasma-enhanced chemical vapor deposition (PECVD) silicon dioxide coating), (iii) anisotropic oxide etching to remove the passivation layer at the bottom of the chamber, (iv) a second anisotropic etching, and (v) isotropic etching to release the mechanical structure from the silicon substrate. When releasing a mechanical structure from a silicon substrate using isotropic etching, under-etching of the mechanical structure may occur. Therefore, methods that minimize under-etching may be useful.

[0020] like Figures 1A to 1EThe cross-section of a microelectromechanical (MEMS) device during manufacturing is shown. A method for manufacturing a MEMS device may include: depositing a mask layer (e.g., an oxide mask 102, such as a silicon oxide mask) on a first side 101 of a substrate (e.g., a silicon substrate 100 such as a silicon wafer). The method may include: etching first notches 112a, 112b on the first side 101 of the substrate. The method may include forming a pillar structure 110 on the substrate (e.g., the silicon substrate 100 such as a silicon wafer). A first portion (e.g., an upper portion) of the pillar structure 110 may be connected to the first notches 112a, 112b. The cross-section of the pillar structure 110 may have apex corner edges 110a, 110b and bottom corner edges 110c, 110d. The method may include: etching second notches 114a, 114b at a second portion (e.g., a lower portion) of the pillar structure 110. Additionally, oxide layers 122a, 122b, 122c, and 122d can be deposited on the pillar structure 110, the mask layer (e.g., an oxide mask 102 such as a silicon oxide mask), and the substrate (e.g., a silicon substrate 100 such as a silicon wafer). The oxide layers 122a and 122c can be etched onto the horizontal surfaces of the mask layer (e.g., an oxide mask 102 such as a silicon oxide mask) and the substrate (e.g., a silicon substrate 100 such as a silicon wafer). Furthermore, the method may include releasing a mechanical pillar 130 from the substrate (e.g., a silicon substrate 100 such as a silicon wafer). This mechanical pillar may include the pillar structure 110, oxide layers 122b and 122d, and the mask layer (e.g., an oxide mask 102 such as a silicon oxide mask). The oxide layers 122a, 122b, 122c, and 122d may be silicon dioxide layers.

[0021] One or more of the first notches 112a, 112b or the second notches 114a, 114b can be etched by increasing the etching time compared to the etching time of the main body 111 of the pillar structure 110. The longer the etching time, the deeper and higher the notch.

[0022] Now for reference Figure 1A This illustrates the growth of an oxide mask 102 (e.g., a silicon oxide mask) on a first side 101 of a silicon substrate 100 (e.g., a silicon wafer). An oxide layer (e.g., a silicon oxide layer) can be formed on the first side 101 of the silicon substrate 100 using an oxidation process such as a thermal oxidation process. For example, an oxide layer can be formed on the surface of the silicon substrate 100 (e.g., the first side 101) using a process associated with exposing the silicon substrate 100 to oxygen (O2) and / or H2O gas (wet oxide) at high temperatures (e.g., a temperature range between 800°C and 1200°C, such as 900°C). The thickness of the oxide layer can depend on the time and temperature of the oxidation process.

[0023] After an oxide layer is formed on the first side 101 of the silicon substrate 100, a photoresist layer can be applied to the surface of the oxide layer using spin coating or other suitable techniques. The photoresist layer on the oxide layer can be exposed to light (e.g., ultraviolet light) using a patterned mask or photomask, which selectively exposes certain areas of the photoresist layer. The exposed areas of the photoresist layer can be removed using a developer, leaving a patterned photoresist layer on the oxide layer. The oxide layer on the first side 101 of the silicon substrate 100 can then be etched using chemical or plasma processes (e.g., plasma etching using CHF3 gas, plasma etching using CF4 gas), which can remove areas of the oxide layer not covered by the photoresist layer. The remaining photoresist layer can be removed using solvents or other methods (such as oxygen (O2) dry etching), leaving an oxide mask 102 (e.g., a patterned silicon oxide mask) on the first side 101 of the silicon substrate 100.

[0024] Figure 1B A pillar structure 110 is shown formed by etching (e.g., anisotropic etching) a first side 101 of a silicon substrate 100. The pillar structure 110, protruding from the first side 101 of the silicon substrate 100, can be formed using alternating cycles of two different types of manufacturing operations: etching operations (e.g., high-speed etching) and deposition operations (e.g., passivation). The etching and deposition operations can be repeated multiple times. Each time an etching and deposition operation is performed, the pillar structure 110 is extended (protruding from the silicon substrate 100). As shown, the pillar structure 110 includes first notches 112a, 112b, second notches 114a, 114b that may be adjacent to an oxide mask 102, and a body 111 between the first notches 112a, 112b and the second notch 114a. The first width (W1) of the first notches 112a, 112b may be equal to or similar to the second width (W2) of the second notches 114a, 114b. However, in some cases, the first width (W1) of the first notches 112a, 112b may be greater than the second width (W2) of the second notches 114a, 114b. Alternatively, the second width (W2) of the second notches 114a, 114b may be greater than the first width (W1) of the first notches 112a, 112b. A third width (W3) of the body 111 is also shown, and this third width may be greater than the first width (W1) of the first notches 112a, 112b and the second width (W2) of the second notches 114a, 114b. The body 111 may include a region between the first notches 112a, 112b and the second notches 114a, 114b.

[0025] The first notches 112a and 112b can be used to allow oxide layers 122a, 122b, 122c, and 122d to pass through. Figure 1CAs shown) during the subsequent isotropic etching process (such as Figure 1E (As shown) to better protect the pillar structure 110 (e.g., the apex edges 110a, 110b of the pillar structure 110). The second notches 114a, 114b can be used to narrow the width of the lower portion of the pillar structure 110 (e.g., a second width W2), so that a less aggressive isotropic etching process (e.g., as shown) can be used when releasing the pillar structure 110 from the silicon substrate 100. Figure 1E (As shown).

[0026] The etching operation may include exposing the silicon substrate 100 to a plasma of a reactive gas (e.g., SF6 gas), which can etch away material (e.g., polymer material deposited in the deposition operation, or material from the silicon substrate 100) in areas not covered by the patterned oxide mask 102. The deposition operation may also include exposing the silicon substrate 100 to a plasma of a different type of gas (e.g., C4F8 gas), which may deposit a thin layer of polymer material on the surface, effectively preventing the etching process. For example, each alternating cycle may last from 2 to 4 seconds.

[0027] First notches 112a and 112b can be formed by extending the etching operation to 7 to 10 seconds. Due to this process, a significantly larger amount of material can be etched away from the silicon substrate 100. Referring again to the accompanying drawings, the surfaces of the first notches 112a and 112b are shown as recesses in both the vertical and horizontal directions. The first notches 112a and 112b may be located near the apex edges 110a and 110b. Similarly, second notches 114a and 114b can be formed by extending the etching operation time to 7 to 10 seconds. When the etching operation time is increased, a significantly larger amount of material can be etched away from the silicon substrate 100. Additional etching can create recesses on the surfaces of the second notches 114a and 114b in both the vertical and horizontal directions, as shown. The second notches 114a and 114b may be located near the bottom edges 110c and 110d.

[0028] Figure 1CA pillar structure 110 extending from the surface of a silicon substrate 100 (e.g., a first side 101) is shown. An oxide mask 102 may be positioned on the portion of the pillar structure 110 opposite to the portion of the silicon substrate 100 that is bonded to it. As shown, the silicon substrate 100 may have a pillar structure 110 extending from the surface of the silicon substrate 100. Second notches 114a, 114b may be adjacent to the silicon substrate 100, followed by the body 111 of the pillar structure 110, the first notches 112c, 112d, and the oxide mask 102. Oxide layers 122a, 122b, 122c, 122d (e.g., silicon dioxide layers) may be positioned around the oxide mask 102 and the pillar structure 110 and may be formed as an upper layer on the silicon substrate 100. The oxide layers 122a, 122b, 122c, 122d may be deposited on the silicon substrate 100 using appropriate techniques. For example, the tetraethyl orthosilicate (TEOS) process can be used in conjunction with a radio frequency (RF) power supply to form a conformal oxide layer 122c on a silicon substrate 100. During the TEOS process, the silicon substrate 100 can be placed in a chemical vapor deposition (CVD) reaction chamber. Under vacuum conditions, the silicon substrate 100 can be heated to a certain temperature (e.g., a temperature between 350°C and 450°C, such as 400°C), and a mixture of TEOS and oxygen gas is introduced into the chamber. Therefore, oxide layers 122a, 122b, 122c, and 122d (e.g., silicon dioxide layers) can be formed on the silicon substrate 100, the oxide mask 102, and the pillar structure 110.

[0029] Figure 1D A pillar structure 110 extending from a silicon substrate 100 is shown. An oxide mask 102 is positioned on the pillar structure 110, and oxide layers 122a, 122b, 122c, 122d (e.g., silicon dioxide layers) are deposited on the side surfaces of the oxide mask 102 and the pillar structure 110. Suitable techniques can be used to remove portions of the oxide layers 122a, 122b, 122c, 122d (e.g., silicon dioxide layers) on the top surface (e.g., horizontal surface) of the oxide mask 102 (e.g., oxide layer 122a) and the top surface (e.g., horizontal surface) of the silicon substrate 100 (e.g., oxide layer 122c). For example, suitable anisotropic etching processes or processes described in the same or similar foregoing etching operations (e.g., etching operations using plasma with reactive gases) can be used to remove portions of the top surfaces of the oxide layers 122a, 122b, 122c, 122d (e.g., oxide layers 122a and 122c).

[0030] Figure 1EA first mechanical pillar 130 is shown, which may include, for example, a pillar structure 110 and an oxide mask 102, wherein oxide layers 122b, 122d (e.g., silicon dioxide layers) are provided on the side surfaces of the pillar structure 110 and the oxide mask 102. This first mechanical pillar can be separated or released from the silicon substrate 100 using suitable techniques. For example, the first mechanical pillar 130 can be separated or released from the silicon substrate 100 by a first etching process (e.g., an isotropic etching process) using sulfur hexafluoride (SF6) gas and inductively coupled RF power in a vacuum chamber. In some cases, xenon difluoride (XeF2) can be used for the first etching process. During the first etching process, SF6 gas can be introduced into a chamber containing the silicon substrate 100 to be etched, and a high-frequency RF power supply can be used to generate an electromagnetic field within the chamber. The RF power supply can be coupled to an induction coil that can generate a magnetic field, which in turn induces an electric field in the gas. This electric field can ionize the gas to generate plasma. The first etching process may occur when high-energy ions and free radicals in the plasma react with the surface of the silicon substrate 100, and this reaction may selectively remove material. In this example, the plasma can perform isotropic etching on the silicon substrate 100. Therefore, the first mechanical pillar 130 can be released or separated from the silicon substrate 100. As shown, the reduced width (W2) of the pillar structure 110 allows for a less aggressive etching process to release the first mechanical pillar 130 from the silicon substrate 100. In other words, the presence of the second notches 114a, 114b reduces the amount of under-etching required to release the first mechanical pillar 130.

[0031] Figure 2A A flowchart illustrating an exemplary operational configuration of a method 200 for generating or manufacturing a first mechanical column 130 according to the present disclosure is shown.

[0032] In operation 202, method 200 may include forming an oxide mask 102 on a silicon substrate 100. As described above, the oxide mask 102 can be formed on the silicon substrate 100 using deposition and lithography processes. The oxide mask can be any suitable oxide mask, such as a silicon oxide mask. The silicon oxide mask may include one or more of silicon dioxide, silicon carbide, etc.

[0033] In operation 204, method 200 includes performing, as Figure 1BThe first relatively intense etching operation is shown to form or produce the first notches 112a, 112b. The relatively intense etching operation can be an etching operation with a higher etching time and / or temperature compared to the etching times and / or temperatures of other etching operations used in method 200. The etching time of the relatively intense etching operation can be between about 7 seconds and about 10 seconds, compared to the etching times of other etching operations used in method 200, which are between about 2 seconds and about 4 seconds. The operating temperature range for the intense etching and other etching operations is the same. The electrode temperature can be from 5°C to 15°C, more preferably 10°C.

[0034] In operation 206, method 200 includes forming a protruding structure on a silicon substrate. The protruding structure is a pillar structure 110 that can be formed using an anisotropic etching process. As discussed, the pillar structure 110 can be formed by performing an alternating cycle of two different types of manufacturing operations: an etching operation (e.g., a high-speed etching operation) and a deposition operation (e.g., a passivation operation) on the silicon substrate 100.

[0035] In operation 208, method 200 includes performing, as Figure 1B The second, relatively intense etching step is shown to form or produce the second notches 114a and 114b. As shown, after the pillar structure 110 is formed to the desired height, the second notches 114a and 114b can be formed at the lower portion of the pillar structure 110. As discussed, the relatively intense etching operation can be an etching operation with a higher etching time and / or temperature compared to the etching time and / or temperature of other etching operations used in method 200. Compared to the etching operation time of other etching operations used in method 200, which is between about 2 seconds and about 4 seconds, the etching time of the relatively intense etching operation can be between about 7 seconds and about 10 seconds.

[0036] In operation 210, method 200 includes forming an oxide layer on the oxide mask 102, the pillar structure 110, and the silicon substrate 100, such as Figure 1C As shown.

[0037] In operation 212, method 200 includes etching the top surface (e.g., a horizontal surface) of oxide layer 122, such as Figure 1D As shown.

[0038] In operation 214, method 200 includes releasing the first mechanical pillar 130 from the silicon substrate 100. As discussed, isotropic etching can be used to release the first mechanical pillar 130 from the silicon substrate 100.

[0039] Therefore, by forming the second notches 114a and 114b during the manufacturing process, a less drastic etching process (with smaller process variations) can be used, allowing for more uniform height and stiffness of the multiple first mechanical pillars 130. This can stabilize yield.

[0040] Figure 2B A flowchart illustrating an exemplary configuration of a plurality of operations of a method 250 for generating or manufacturing a first mechanical pillar 130 according to the present disclosure is shown. The method 250 may include depositing a mask layer (e.g., as shown in the diagram) on a first side of a substrate (e.g., a silicon wafer). Figures 1A to 1E The oxide mask 102 shown is, for example, a silicon oxide mask. The method 250 may include etching a first notch (e.g., as shown) on a first side of a substrate (e.g., a silicon wafer). Figures 1B to 1E The first notch 112 shown is illustrated in operation 254. Method 250 may include forming a pillar structure (e.g., as shown in the diagram) on a substrate (e.g., a silicon wafer). Figures 1B to 1E The column structure 110 shown), wherein the column structure (e.g., as shown) Figures 1B to 1E The first part of the column structure 110 shown is connected to the first notch (e.g., as shown in the figure). Figures 1B to 1E The first notch 112 shown is as illustrated in operation 256.

[0041] The method 250 can be included in column structures (e.g., such as...) Figures 1B to 1E A second notch is etched at the second portion of the column structure 110 shown (e.g., as shown). Figures 1B to 1D The second notch 114 shown is illustrated in operation 258. Method 250 can be included in a column structure (e.g., as shown in...). Figures 1B to 1E The column structure 110 shown), and the mask layer (e.g., such as...) Figures 1A to 1E The oxide mask 102 shown is a silicon oxide mask, and an oxide layer (e.g., a silicon wafer) is deposited on the substrate (e.g., a silicon wafer). Figures 1C to 1E The oxide layer 122 shown is illustrated in operation 260. Method 250 may include etching the oxide layer (e.g., as shown in...). Figures 1C to 1E The oxide layer 122 shown is in the mask layer (e.g., as shown) Figures 1A to 1E The horizontal surface at the oxide mask 102 (such as a silicon oxide mask) and the substrate (e.g., a silicon wafer) is shown as in operation 262.

[0042] The method may include releasing mechanical pillars (e.g., such as...) from a substrate (e.g., a silicon wafer). Figure 1E The mechanical column 130 shown), wherein the mechanical column (e.g., as shown) Figure 1E The mechanical column 130 shown includes column structures (e.g., such as...) Figures 1B to 1E The column structure 110 shown), oxide layer (e.g., as shown) Figures 1C to 1EThe oxide layer 122 shown) and the mask layer (e.g., as shown) Figures 1A to 1E The oxide mask 102 shown is such as a silicon oxide mask, as shown in operation 264.

[0043] II. Methods to reduce mechanical column fluctuations Reduce silicon structure (e.g., as Figures 1B to 1E The amount of undercut in the column structure 110 shown can help increase dimensional control over the mechanical column (e.g., as shown in the figure). Figure 1E The mechanical column 130 shown). When used with silicon structures (e.g., such as...) Figures 1B to 1E Compared to the case where the undercut of the column structure 110 shown does not decrease, by increasing the mechanical reinforcement of the column (e.g., such as...) Figure 1E By controlling the dimensions of the mechanical column 130 shown, the mechanical behavior of the mechanical column can be more similar to its modeled behavior. Therefore, performance fluctuations between different devices using the mechanical column may be reduced (e.g., as shown). Figure 1E The mechanical column 130 shown.

[0044] like Figure 3 As shown, an embodiment for reducing mechanical pillars (e.g., such as...) in microelectromechanical (MEMS) devices. Figure 1E The method 300 for undulating the mechanical pillar 130 shown may include forming a pillar structure (e.g., as shown) on a substrate (e.g., a silicon wafer). Figures 1B to 1E The column structure 110 shown is as illustrated in operation 302. The column structure (e.g., as shown in...) Figures 1B to 1E The column structure 110 shown can be formed using an alternating cycle of deposition and etching.

[0045] Column structures (e.g., such as) Figures 1B to 1E The column structure 110 shown may include a first notch (e.g., as shown) at a first portion (e.g., upper portion) of the column structure. Figures 1B to 1E The first notch 112 shown), and the second notch at the second part (e.g., the lower part) of the column structure (e.g., as shown in the first notch 112), and the second notch at the second part (e.g., the lower part) of the column structure (e.g., as shown in the second notch 112). Figure 1B branch Figure 1D The second notch 114 shown) and the body positioned between the first notch and the second notch (e.g., as shown) Figures 1B to 1E The main body shown is 111).

[0046] Including the first notch (e.g., as Figures 1B to 1E The first notch 112 shown can help during isotropic release etching (e.g., as shown) Figure 1E (As shown) better protects the apex edge (e.g., as shown) Figures 1B to 1E The apex edges 110a, 110b are shown. The first notch can be formed by using a relatively intense etching operation prior to alternating cycles of deposition and etching.

[0047] Including a second notch (e.g., as Figures 1B to 1D The second notch 114 shown can reduce silicon structure (e.g., as shown) Figures 1B to 1E The column structure 110 shown in the figure is eroded downwards because of mechanical columns (e.g., such as...). Figure 1E The bottom of the mechanical post 130 shown can be pinched off. Alternatively or additionally, a second notch can facilitate isotropic release etching (e.g., as shown in the image). Figure 1E (as shown) better protects the column structure (e.g.) Figure 1B The bottom corner edge of the column structure 110 shown (e.g., as shown) Figures 1B to 1E The bottom corner edges 110c and 110d are shown. A second notch is formed by using a relatively intense etching operation after alternating cycles of deposition and etching.

[0048] The method 300 may include using an etching process to release pillar structures (e.g., as shown in the image) from a substrate (e.g., a silicon wafer). Figures 1B to 1E The etching process shown in column structure 110 can help reduce fluctuations in one or more of the following: mechanical columns (e.g., such as...) Figure 1E The mechanical stiffness, height, or performance characteristic of the mechanical column 130 shown are as illustrated in operation 304. This fluctuation can be associated with the absence of a second notch (e.g., as shown in...). Figures 1B to 1E The baseline variability of the second notch 114 shown is compared. The etching process used to release the pillar structure from the substrate can be isotropic silicon etching (e.g., using SF6 or XeF2).

[0049] Including a second notch can help implement a less aggressive isotropic release etch in terms of release etch time and / or temperature. As shown in operation 306, when releasing pillar structures (e.g., such as...) from a substrate (e.g., a silicon wafer)... Figures 1B to 1E When the pillar structure 110 shown is released from the substrate, the method may include reducing the etching time compared to a baseline etching time for releasing the pillar structure from the substrate without the second notch. As shown in operation 308, when the pillar structure is released from the substrate (e.g., as shown in the second notch), the method may include reducing the etching time. Figures 1B to 1E When the pillar structure 110 shown is compared with the reference etching temperature for releasing the pillar structure from the substrate without having a second notch, the method may include reducing the etching temperature.

[0050] The inclusion of first notches 112a, 112b and second notches 114a, 114b can help increase the uniformity of the mechanical stiffness of the mechanical column after the column structure 110 is released from the substrate. The mechanical column is more rigid when its height is greater. Therefore, controlling the height of the mechanical column can help control its stiffness. As shown in operation 310, the method may include reducing the fluctuation of the mechanical stiffness of the mechanical column to less than one or more of 20%, 10%, and 5% of the target mechanical stiffness of the mechanical column. As shown in operation 312, the method may include reducing the fluctuation of the height of the mechanical column to less than one or more of 20%, 10%, and 5% of the target height of the mechanical column.

[0051] This method may include reducing the fluctuation of the mechanical column's performance characteristics to less than one or more of 20%, 10%, and 5% of the mechanical column's target performance characteristics. Performance characteristics are one or more of the responses of a microelectromechanical system to its predicted position when actuated.

[0052] III. Comparison of Single-Notch Etching Apparatus and Double-Notch Etching Apparatus like Figures 4A to 4B As shown in the cross-section, the inclusion of second notches 114a and 114b can facilitate the release of pillar structure 110. Height should affect the release process. Narrower pillars at the bottom of the second notches 114a and 114b will make it easier to release pillar 110. The second mechanical pillar 130b having the second pillar structure 113 can be released from the silicon substrate 100 by a second etching process (e.g., an isotropic etching process). The second pillar structure 113 may include first notches 112a and 112b, but may not include the second notches 114a and 114b. For comparison, the first mechanical pillar 130a can be released from the silicon substrate 100 by a first etching process (e.g., an isotropic etching process). In this example, the first mechanical pillar 130a and the second mechanical pillar 130b may be identical or similar before release from the silicon substrate 100, except for the presence of the second notches 114a and 114b and the oxide layer on the second notches 114a and 114b.

[0053] Because the first mechanical pillar 130a has second notches 114a and 114b on its pillar structure 110, when releasing or separating the first mechanical pillar 130a from the silicon substrate 100, a less aggressive etching process (e.g., a less aggressive isotropic etching process) can be used compared to when releasing or separating the second mechanical pillar 130b from the silicon substrate 100. Figures 4A to 4B As shown. In other words, when manufacturing the second mechanical pillar 130b, the second etching process can be more intense than the first etching process used to manufacture the first mechanical pillar 130a, and the amount of the second pillar structure 113 etched under the second etching process used for the second mechanical pillar 130b can be greater than the amount of the pillar structure 110 etched under the first etching process.

[0054] As etching processes become more intense, the chances of variation within the etching process increase. For example, when manufacturing the first mechanical pillar 130a using the first etching process, the bottom corner edges 110c and 110d can retain a larger amount compared to when manufacturing the second mechanical pillar 130b using the second etching process. Similarly, when manufacturing the first mechanical pillar 130a using the first etching process, the corners 110a and 110b can retain a larger amount compared to when manufacturing the second mechanical pillar 130b using the second etching process. Additionally or alternatively, the height of the first pillar structure 110 (e.g., as shown in the first body 111a) can be greater than the height of the second pillar structure 113 (e.g., as shown in the second body 111b). Since the height of the first pillar structure 110 can be maintained to a greater extent during manufacturing, there are fewer uncertain etching processes, and therefore potentially smaller fluctuations in height. Additionally or alternatively, the height of the first body 111a can be greater than the height of the second body 111b.

[0055] After separating the mechanical pillars 130a and 130b from the silicon substrate 100, the first height of the pillar structure 110 of the first mechanical pillar 130a can be greater than the second height of the second pillar structure 113 of the second mechanical pillar 130b. Furthermore, due to the greater process variation in the second etching process, the second height of the second mechanical pillar 130b may be significantly shorter and less rigid than expected. In contrast, due to the smaller process variation in the first etching process, the first height of the first mechanical pillar 130a can be closer to the expected height. Moreover, as shown in the figure, compared to the oxide layers 122b and 122d of the first mechanical pillar 130a, the oxide layer 122f of the second mechanical pillar 130b can exceed the angles 113c and 113d to a greater extent.

[0056] Because the first etching process is less intense than the second etching process, it can be better controlled (e.g., more uniformly). Therefore, the variation in the mechanical pillar 130a formed by the first etching process can be less than the variation in the mechanical pillar 130b formed by the second etching process. Thus, multiple first mechanical pillars 130a can be formed (using a pillar structure 110 with first notches 112a, 112b and second notches 114a, 114b during manufacturing), where the height variation between the individual mechanical pillars is reduced. This also means that the stiffness variation of the generated mechanical pillars can be reduced, since the mechanical stiffness of a mechanical pillar can be directly related to its height. For example, when the height of a mechanical pillar becomes shorter, its mechanical stiffness decreases. Conversely, when the height of a mechanical pillar becomes greater, its mechanical stiffness can be increased.

[0057] IV. Dual-notch etching apparatus Apparatus with dual-notch etching can contribute to manufacturing uniformity. For example... Figure 5 As shown, the microelectromechanical (MEMS) device 500 may include a substrate (e.g., a silicon substrate 100 such as a silicon wafer) and mechanical pillars 130. The mechanical pillars 130 may include pillar structures 110. The pillar structures 110 may be positioned on a first side 101 of the silicon substrate 100. A first portion (e.g., an upper portion) of the pillar structure may include first notches 112c, 112d, and a second portion (e.g., a lower portion) of the pillar structure may include second notches 114a, 114b. The mechanical pillars 130 may include a mask layer (e.g., an oxide mask 102 such as a silicon oxide mask) located on a horizontal surface of the pillar structure 110. The mechanical pillars 130 may include oxide layers 122b, 122d located on a vertical surface of the pillar structure 110. The oxide layers 122b, 122d may be silicon dioxide layers.

[0058] The second notches 114a and 114b may be recessed in both the vertical and horizontal directions. By making the second notches 114a and 114b recessed in both the vertical and horizontal directions, the undercut of the pillar structure 110 can be reduced when the mechanical pillar 130 is released from (e.g., a silicon substrate 100 such as a silicon wafer) using isotropic release etching. Alternatively or additionally, the second notches 114a and 114b may have a second width at a second portion of the pillar structure 110, which is smaller than the body width of the body 111 of the pillar structure 110.

[0059] The second notches 114a and 114b can be operated to reduce fluctuations in one or more of the following: the mechanical stiffness of the mechanical pillar 130, the height of the mechanical pillar 130, or the performance characteristics of the mechanical pillar 130. This fluctuation can be measured after isotropic release etching. This fluctuation can be compared to a baseline fluctuation in the case where the pillar structure 110 does not have the second notches. The fluctuation in the height of the mechanical pillar can be reduced to less than one or more of 20%, 10%, and 5% of the target height of the mechanical pillar 130.

[0060] The first width of the first notches 112c, 112d may be recessed in both the vertical and horizontal directions. Compared to the protection of one or more first portion edges of the pillar structure during isotropic release etching without the first notches, the first notches 112c, 112d may increase the protection of one or more first portion edges of the pillar structure during isotropic release etching. Alternatively or additionally, the first notches 112c, 112d may have a first width at the first portion of the pillar structure 110, which is smaller than the body width of the body 111 of the pillar structure 110.

[0061] While preferred embodiments of the invention have been shown and described herein, it will be apparent to those skilled in the art that these specific embodiments are provided by way of example only. Many variations, modifications, and substitutions will now occur to those skilled in the art without departing from the invention. It should be understood that various alternatives to the specific embodiments of the invention described herein may be employed in carrying out the invention. The claims are intended to define the scope of the invention, and methods and structures within the scope of these claims and their equivalents will thereby be covered.

Claims

1. A microelectromechanical (MEM) device, comprising: a substrate; and a mechanical post, comprising: a post structure on a first side of the substrate, wherein a first portion of the post structure comprises a first notch and a second portion of the post structure comprises a second notch; a masking layer on a horizontal surface of the post structure; and an oxide layer on a vertical surface of the post structure.

2. The MEM device of claim 1, wherein, the second notch is operable to reduce a fluctuation of one or more of: a mechanical stiffness of the mechanical post; a height of the mechanical post; and a performance characteristic of the mechanical post, wherein the reduced fluctuation is measured after an isotropic release etch, and wherein the fluctuation is compared to a baseline fluctuation without the second notch.

3. The MEM device of claim 2, wherein, the reduced fluctuation of the height of the mechanical post is reduced to one or more of less than 20%, 10%, and 5% of a target height of the mechanical post.

4. The MEM device of claim 1, wherein: the first notch has a first width at the first portion of the post structure that is less than a first body width of a body of the post structure; and the second notch has a second width at the second portion of the post structure that is less than a second body width of the body of the post structure.

5. The MEM device of claim 1, wherein, the first notch is operable to increase a protection of one or more first portion edges of the post structure during an isotropic release etch compared to a protection of the one or more first portion edges of the post structure during an isotropic release etch without the first notch.

6. The MEM device of claim 1, wherein: the first notch is recessed in a vertical direction and a horizontal direction, and the second notch is recessed in the vertical direction and the horizontal direction.

7. The MEM device of claim 1, wherein, one or more of: the substrate comprises a silicon wafer, the masking layer comprises an oxide mask; and the oxide layer comprises a silicon dioxide layer.

8. A method for reducing a fluctuation of a mechanical post in a microelectromechanical (MEM) device, comprising: forming a post structure on a substrate, wherein the post structure comprises: a first notch at a first portion of the post structure, a second notch at a second portion of the post structure, and a body positioned between the first notch and the second notch; and releasing the post structure from the substrate using an etching process that facilitates reducing a fluctuation of one or more of: a mechanical stiffness of the mechanical post, a height of the mechanical post, and a performance characteristic of the mechanical post, wherein the reduced fluctuation is compared to a baseline fluctuation without the second notch.

9. The method of claim 8, further comprising: reducing an etching time in releasing the post structure from the substrate compared to a baseline etching time in releasing the post structure from the substrate without the second notch.

10. The method of claim 8, further comprising: reducing a fluctuation of a mechanical stiffness of the mechanical post to one or more of less than 20%, 10%, and 5% of a target mechanical stiffness of the mechanical post.

11. The method of claim 8, further comprising: reducing a fluctuation in a height of the mechanical post to one or more of less than 20%, 10%, and 5% of a target height of the mechanical post.

12. The method of claim 8, wherein, the performance characteristic includes one or more of a microelectromechanical system responding to a predicted position when actuated.

13. A method for fabricating a mechanical post in a microelectromechanical (MEM) device, comprising: depositing a mask layer on a first side of a substrate; etching a first notch on the first side of the substrate; forming a post structure on the substrate, wherein a first portion of the post structure is coupled to the first notch; etching a second notch at a second portion of the post structure; depositing an oxide layer on the post structure, the mask layer, and the substrate; etching a horizontal surface of the oxide layer at the mask layer and the substrate; and releasing the mechanical post from the substrate, wherein the mechanical post includes the post structure, the oxide layer, and the mask layer.

14. The method of claim 14, wherein, the substrate includes a silicon wafer.

15. The method of claim 14, wherein, the mask layer includes an oxide mask.

16. The method of claim 14, wherein, the oxide layer includes a silicon dioxide layer.

17. The method of claim 14, wherein, the first portion of the post structure is an upper portion of the post structure and the second portion of the post structure is a lower portion of the post structure.

18. The method of claim 14, wherein, one or more of the first notch and the second notch are etched by increasing an etch time compared to a body etch time for a body of the post structure.

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