Backside illumination image sensor fabrication method and backside illumination image sensor

Abstract

This disclosure relates to a method for fabricating a back-illuminated image sensor and the back-illuminated image sensor itself, relating to the field of integrated circuit technology. The method includes: providing a substrate; forming a first semiconductor layer on the back side of the substrate; the first semiconductor layer including a plurality of spaced-apart bottom photosensitive layers, each bottom photosensitive layer including a first sub-photosensitive layer, a second sub-photosensitive layer, and a third sub-photosensitive layer sequentially stacked along a direction away from the substrate; forming a second semiconductor layer covering the plurality of bottom photosensitive layers; the second semiconductor layer including a plurality of spaced-apart bridging portions penetrating the second semiconductor layer and the third sub-photosensitive layer, and extending into the interior of the plurality of second sub-photosensitive layers; and forming a third semiconductor layer covering the plurality of bridging portions; the third semiconductor layer including a plurality of spaced-apart photosensitive capping layers, the multiple photosensitive capping layers being embedded in the third semiconductor layer and covering and contacting the plurality of bridging portions. This method can at least increase the electron concentration in the photosensitive area, improving the photosensitivity of the BSI image sensor.

Description

Technical Field

[0001] This disclosure relates to the field of integrated circuit technology, and in particular to a method for fabricating a back-illuminated image sensor and the back-illuminated image sensor itself. Background Technology

[0002] Back-side illumination (BSI) image sensors are a type of image sensor that offers better performance than front-side illumination image sensors in low-light conditions.

[0003] However, the photosensitivity of BSI image sensors manufactured using existing BSI image sensor fabrication methods cannot meet practical needs. Therefore, improving the photosensitivity of BSI image sensors has become one of the urgent technical problems to be solved. Summary of the Invention

[0004] Therefore, it is necessary to address the technical problem of insufficient light sensitivity of existing BSI image sensors by providing a back-illuminated image sensor fabrication method and a back-illuminated image sensor.

[0005] In a first aspect, this disclosure provides a method for fabricating a back-illuminated image sensor, comprising:

[0006] A substrate is provided, and a first semiconductor layer is formed on the back side of the substrate. The first semiconductor layer includes a plurality of bottom photosensitive stacks arranged at intervals. The plurality of bottom photosensitive stacks penetrate the first semiconductor layer and extend to the substrate. The bottom photosensitive stacks include a first sub-photosensitive layer, a second sub-photosensitive layer and a third sub-photosensitive layer stacked sequentially in a direction away from the substrate.

[0007] A second semiconductor layer is formed covering multiple bottom photosensitive stacks. The second semiconductor layer includes multiple bridging portions arranged at intervals. The multiple bridging portions penetrate the second semiconductor layer, the third sub-photosensitive layer, and extend into the interior of the multiple second sub-photosensitive layers.

[0008] A third semiconductor layer is formed covering multiple bridging portions. The third semiconductor layer includes multiple photosensitive capping layers arranged at intervals. The multiple photosensitive capping layers are embedded in the third semiconductor layer and cover and contact multiple bridging portions. The bottom photosensitive stack and the photosensitive capping layers that are in contact with the bridging portions constitute a photosensitive stack. The photosensitive stack is isolated from the stacked first semiconductor layer, second semiconductor layer and third semiconductor layer via a PN junction.

[0009] In the back-illuminated image sensor fabrication method described above, the bottom photosensitive stack and the photosensitive capping layer connected to the bridging portion constitute the photosensitive stack of a photodiode. The photosensitive stack and the stacked first, second, and third semiconductor layers are opto-isolated via a PN junction, preventing signal crosstalk between adjacent photodiodes. During the fabrication of the photosensitive stack, the first, second, and third semiconductor layers are fabricated simultaneously, avoiding the need for separate fabrication steps of the isolation structure and reducing the complexity and cost of the fabrication process.

[0010] Furthermore, embedding a third semiconductor layer into the photosensitive capping layer and covering the entire top surface of the contact bridging portion can increase the incident light receiving area of ​​the photodiode; the bridging portion can converge and transmit the incident light passing through the photosensitive capping layer to the bottom photosensitive stack. The first, second, and third sub-photosensitive layers in the bottom photosensitive stack, upon photoexcitation, generate a concentration gradient within themselves, optimizing the transport path of photogenerated carriers, reducing the recombination rate during diffusion, and improving the quantum efficiency of the photodiode.

[0011] Furthermore, since pentavalent elements have a higher atomic mass than silicon, they have a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel area.

[0012] In some embodiments, the top surface of the second sub-photosensitive layer is higher than the top surface of the first semiconductor layer; the bottom surface of the second sub-photosensitive layer is lower than the top surface of the first semiconductor layer but higher than the bottom surface of the first semiconductor layer, so as to prevent the interface between the second sub-photosensitive layer and the first sub-photosensitive layer, or the interface between the second sub-photosensitive layer and the third sub-photosensitive layer, from being flush with or connected to the interface between the first semiconductor layer and the second semiconductor layer, thus avoiding the generation of a photoelectric leakage channel.

[0013] In some embodiments, the top surface of the bridging portion is higher than the top surface of the second semiconductor layer; the bottom surface of the bridging portion is not lower than the top surface of the first semiconductor layer. This avoids the interface between the bridging portion and the bottom photosensitive stack or photosensitive capping layer being flush with or connected to the interface between the second and third semiconductor layers, thus preventing the formation of a photoelectric leakage channel.

[0014] In some embodiments, the orthographic projection of the top surface of the bridging portion onto the bottom surface of the photosensitive capping layer is located inside the bottom surface of the photosensitive capping layer. The bridging portion with a smaller cross-sectional size generates a focusing effect on the light signal transmitted through the photosensitive capping layer, thereby further increasing the concentration of photogenerated carriers.

[0015] In some embodiments, the bottom surface of the photosensitive capping layer is higher than the bottom surface of the third semiconductor layer to prevent the interface between the photosensitive capping layer and the bridging portion from being flush with or connected to the interface between the third semiconductor layer and the second semiconductor layer, thus avoiding the generation of a photoelectric leakage channel.

[0016] In some embodiments, the second sub-photosensitive layer contains different Group 5 elements from the first and third sub-photosensitive layers, such that the first, second, and third sub-photosensitive layers in the bottom photosensitive stack will generate a concentration gradient within them after photoexcitation, thereby optimizing the transport path of photogenerated carriers, reducing the recombination rate during the diffusion process, and improving the quantum efficiency of the photodiode.

[0017] In some embodiments, the bridging portion and the second sub-photosensitive layer and the photosensitive capping layer respectively contain different Group 5 elements, so that a concentration gradient is generated between the photosensitive capping layer and the bridging portion, or between the bridging portion and the second sub-photosensitive layer, thereby optimizing the transport path of photogenerated carriers, reducing the recombination rate during the diffusion process, and improving the quantum efficiency of the photodiode.

[0018] In some embodiments, the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer each contain a third group element, such that the photosensitive stack is isolated from the stacked first semiconductor layer, the second semiconductor layer, and the third semiconductor layer via a PN junction.

[0019] In some embodiments, the first sub-photosensitive layer includes a SiP layer; the second sub-photosensitive layer includes a SiAs layer; the third sub-photosensitive layer includes a SiP layer; the bridging portion includes a SiSb layer; the photosensitive capping layer includes a SiAs layer; the first semiconductor layer, the second semiconductor layer, and the third semiconductor layer all include a SiB layer; wherein, the SiAs layer is used to characterize silicon materials containing As; the SiP layer is used to characterize silicon materials containing P; the SiSb layer is used to characterize silicon materials containing Sb; and the SiB layer is used to characterize silicon materials containing B.

[0020] In some embodiments, forming a first semiconductor layer includes: forming a first semiconductor material layer on the back side of a substrate; forming a first dielectric layer on the top surface of the first semiconductor material layer; forming first grooves spaced apart in the first semiconductor material layer along a first direction parallel to the back side; the remaining first semiconductor material layer is used to constitute the first semiconductor layer; selectively epitaxially growing a first sub-photosensitive layer with a top surface lower than the top surface of the first semiconductor material layer in the first groove; selectively epitaxially growing a second sub-photosensitive layer with a top surface higher than the top surface of the first dielectric layer on the top surface of the first sub-photosensitive layer in the first groove; selectively epitaxially growing a third sub-photosensitive layer on the top surface of the second sub-photosensitive layer, wherein the first sub-photosensitive layer, the second sub-photosensitive layer, and the third sub-photosensitive layer are used to jointly constitute a bottom photosensitive stack.

[0021] In some embodiments, forming a second semiconductor layer includes: forming a second semiconductor material layer that covers a third sub-photosensitive layer and a first dielectric layer, and whose top surface is higher than the third sub-photosensitive layer; forming a second dielectric layer on the top surface of the second semiconductor material layer; forming second grooves spaced apart along a first direction in the second semiconductor material layer, the bottom surface of the second grooves being lower than the top surface of the second sub-photosensitive layer and not lower than the top surface of the first semiconductor layer; the remaining second semiconductor material layer being used to constitute the second semiconductor layer; and selectively epitaxially growing bridging portions in the second grooves whose top surfaces are higher than the top surface of the second semiconductor layer.

[0022] In some embodiments, forming a third semiconductor layer includes: forming a third semiconductor material layer that covers the bridging portion and the second dielectric layer, and whose top surface is higher than the top surface of the bridging portion; forming a third dielectric layer on the top surface of the third semiconductor material layer; forming third grooves spaced apart along a first direction in the third semiconductor material layer; the bottom surface of the third grooves is not lower than the top surface of the second dielectric layer; the remaining third semiconductor material layer is used to constitute the third semiconductor layer; and selectively epitaxially growing a photosensitive capping layer in the third grooves, the top surface of which is not lower than the top surface of the third dielectric layer.

[0023] In some embodiments, after forming the photosensitive capping layer, the method further includes: planarizing the top surface of the photosensitive capping layer until the top surface of the remaining photosensitive capping layer is flush with the top surface of the third dielectric layer; forming a plurality of grids spaced apart along a first direction on the top surface of the third dielectric layer, wherein the grids and the photosensitive stack are arranged alternately along the first direction.

[0024] Secondly, this disclosure provides a back-illuminated image sensor, fabricated using the back-illuminated image sensor fabrication method of any of the foregoing embodiments. The back-illuminated image sensor includes a substrate and a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer sequentially stacked on the back side of the substrate and in a direction away from the substrate. The first semiconductor layer includes a plurality of bottom photosensitive stacks arranged at intervals, which penetrate the first semiconductor layer and extend to the substrate. Each bottom photosensitive stack includes a first sub-photosensitive layer, a second sub-photosensitive layer, and a third sub-photosensitive layer sequentially stacked in a direction away from the substrate. The second semiconductor layer includes a plurality of bridging portions arranged at intervals, which penetrate the second semiconductor layer and the third sub-photosensitive layer and extend into the interior of the plurality of second sub-photosensitive layers. The third semiconductor layer includes a plurality of photosensitive capping layers arranged at intervals, which are embedded in the third semiconductor layer and cover and contact the plurality of bridging portions. The bottom photosensitive stack and the photosensitive capping layers that are in contact with the bridging portions constitute the photosensitive stack of a photodiode. The photosensitive stack is isolated from the stacked first semiconductor layer, second semiconductor layer, and third semiconductor layer via a PN junction.

[0025] The back-illuminated image sensor fabrication method and the back-illuminated image sensor disclosed in this embodiment have the following unexpected technical effects:

[0026] The bridging portion and its contact with the bottom photosensitive stack and photosensitive capping layer constitute a photosensitive stack. The photosensitive stack and the stacked first, second, and third semiconductor layers are connected via PN junctions to achieve opto-isolation, avoiding signal crosstalk between adjacent photosensitive stacks. During the fabrication of the photosensitive stack, the first, second, and third semiconductor layers are fabricated simultaneously, avoiding the process steps of fabricating isolation structures separately, thus reducing the complexity and cost of the fabrication process.

[0027] Furthermore, embedding a third semiconductor layer into the photosensitive capping layer and covering the entire top surface of the contact bridging portion can increase the incident light receiving area of ​​the photodiode; the bridging portion can converge and transmit the incident light passing through the photosensitive capping layer to the bottom photosensitive stack. The first, second, and third sub-photosensitive layers in the bottom photosensitive stack, upon photoexcitation, generate a concentration gradient within themselves, optimizing the transport path of photogenerated carriers, reducing the recombination rate during diffusion, and improving the quantum efficiency of the photodiode.

[0028] Furthermore, since pentavalent elements have a higher atomic mass than silicon, they have a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel area. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of this disclosure, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0030] Figure 1 This is a schematic flowchart of a back-illuminated image sensor fabrication method provided in one embodiment;

[0031] Figure 2 This is a schematic diagram of the longitudinal cross-section of the semiconductor structure obtained after forming a first dielectric layer on a substrate in step S10 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0032] Figure 3 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a first groove on the substrate in step S10 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0033] Figure 4 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a third sub-photosensitive layer on the substrate in step S10 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0034] Figure 5This is a schematic diagram of the longitudinal cross-section of the semiconductor structure obtained after forming the second dielectric layer in step S20 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0035] Figure 6 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the second groove in step S20 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0036] Figure 7 This is a schematic diagram of the longitudinal cross-section of the semiconductor structure obtained after forming the bridging portion in step S20 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0037] Figure 8 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming the third groove in step S30 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0038] Figure 9 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a photosensitive capping layer in step S30 of the back-illuminated image sensor fabrication method provided in one embodiment.

[0039] Figure 10 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a grid in a back-illuminated image sensor fabrication method provided in one embodiment.

[0040] Figure 11 This is a schematic diagram of the longitudinal section of the semiconductor structure obtained after forming a filter in a back-illuminated image sensor fabrication method provided in one embodiment.

[0041] Explanation of reference numerals in the attached figures:

[0042] 10. Substrate; 10a. Back side; 101. Trench isolation portion; 102. Etch stop layer; 103. Interlayer dielectric layer; 21. First semiconductor layer; 211. First semiconductor material layer; 22. First dielectric layer; 301. First trench; 30. Bottom photosensitive stack; 31. First sub-photosensitive layer; 32. Second sub-photosensitive layer; 33. Third sub-photosensitive layer; 411. Second semiconductor material layer; 41. Second semiconductor layer; 42. Second dielectric layer; 401. Second trench; 40. Bridging portion; 61. Third semiconductor layer; 62. Third dielectric layer; 501. Third trench; 50. Photosensitive capping layer; 80. Grille; 81. First grille material layer; 82. Second grille material layer; 83. Third grille material layer; 90. Filter. Detailed Implementation

[0043] To facilitate understanding of this disclosure, a more complete description will now be given with reference to the accompanying drawings, in which preferred embodiments of the present disclosure are shown. However, this disclosure may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of this disclosure.

[0045] It should be understood that when an element or layer is referred to as "on," "adjacent to," "connected to," or "coupled to" other elements or layers, it may be directly on, adjacent to, connected to, or coupled to other elements or layers, or there may be intervening elements or layers. Conversely, when an element is referred to as "directly on," "directly adjacent to," "directly connected to," or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc., may be used to describe various elements, parts, regions, layers, doping types, and / or portions, these elements, parts, regions, layers, doping types, and / or portions should not be limited by these terms. These terms are only used to distinguish one element, part, region, layer, doping type, or portion from another element, part, region, layer, doping type, or portion. Therefore, without departing from the teachings of this disclosure, the first element, component, region, layer, doping type, or portion discussed below may be represented as a second element, component, region, layer, or portion; for example, the first doping type may be referred to as the second doping type, and similarly, the second doping type may be referred to as the first doping type; the first doping type and the second doping type are different doping types, for example, the first doping type may be P-type and the second doping type may be N-type, or the first doping type may be N-type and the second doping type may be P-type.

[0046] Spatial relation terms such as “below,” “under,” “below,” “under,” “above,” “above,” etc., are used herein to describe the relationship between one element or feature shown in the figure and other elements or features. It should be understood that, in addition to the orientation shown in the figure, spatial relation terms also include different orientations of the device in use and operation. For example, if the device in the figure is flipped, the element or feature described as “below,” “under,” or “below” will be oriented “above” the other element or feature. Therefore, the exemplary terms “below” and “under” can include both above and below orientations. Furthermore, the device may also include other orientations (e.g., rotated 90 degrees or other orientations), and the spatial descriptive terms used herein will be interpreted accordingly.

[0047] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that when the terms “comprise” and / or “comprising” are used in this specification, the presence of the stated feature, integer, step, operation, element, and / or part is established, but the presence or addition of one or more other features, integers, steps, operations, elements, parts, and / or groups is not excluded. Meanwhile, when used herein, the term “and / or” includes any and all combinations of the associated listed items.

[0048] Embodiments of the invention are described herein with reference to cross-sectional views that serve as schematic diagrams of preferred embodiments (and intermediate structures) of the present disclosure, thus allowing for variations in the illustrated shapes due to, for example, manufacturing techniques and / or tolerances. Therefore, embodiments of the present disclosure should not be limited to the specific shapes of the regions shown herein, but rather include shape deviations due to, for example, manufacturing techniques. For instance, implantation regions shown as rectangular typically have rounded or curved features at their edges and / or implantation concentration gradients, rather than a binary change from implantation regions to non-implantation regions. Similarly, buried regions formed by implantation can result in some implantation in the region between the buried region and the surface traversed during implantation. Therefore, the regions shown in the figures are substantially schematic, and their shapes do not represent the actual shapes of regions of the device and do not limit the scope of the present disclosure.

[0049] In this embodiment, neglecting the flatness of the substrate surface, the direction parallel to the substrate surface is, for example, a first direction, and the stacking direction or the direction away from the substrate surface (the thickness direction of the substrate) is, for example, a second direction. In this embodiment, the first direction can be the ox direction, and the second direction can be the oz direction. The "cross-section" in this embodiment is parallel to the back surface of the substrate.

[0050] Please refer to Figure 1 In some embodiments, a method for fabricating a back-illuminated image sensor is provided, comprising:

[0051] Step S10: Provide a substrate and form a first semiconductor layer on the back side of the substrate. The first semiconductor layer includes a plurality of bottom photosensitive stacks arranged at intervals. The plurality of bottom photosensitive stacks penetrate the first semiconductor layer and extend to the substrate. The bottom photosensitive stacks include a first sub-photosensitive layer, a second sub-photosensitive layer and a third sub-photosensitive layer stacked sequentially in a direction away from the substrate.

[0052] Step S20: Form a second semiconductor layer covering multiple bottom photosensitive stacks. The second semiconductor layer includes multiple bridging portions arranged at intervals. The multiple bridging portions penetrate the second semiconductor layer and the third sub-photosensitive layer, and extend into the interior of the multiple second sub-photosensitive layers.

[0053] Step S30: A third semiconductor layer covering multiple bridging portions is formed. The third semiconductor layer includes multiple photosensitive capping layers arranged at intervals. The multiple photosensitive capping layers are embedded in the third semiconductor layer and cover and contact multiple bridging portions. The bottom photosensitive stack and the photosensitive capping layer that are in contact with the bridging portions constitute a photosensitive stack. The photosensitive stack is isolated from the stacked first semiconductor layer, second semiconductor layer and third semiconductor layer through a PN junction.

[0054] For example, please continue to refer to Figure 1 The bridging portion and the bottom photosensitive stack and photosensitive capping layer connected to it constitute the photosensitive stack of the photodiode. The photosensitive stack and the stacked first, second, and third semiconductor layers are connected via PN junctions to achieve photoelectric isolation, avoiding signal crosstalk between adjacent photosensitive stacks. During the fabrication of the photosensitive stack, the first, second, and third semiconductor layers are fabricated simultaneously, avoiding the process steps of fabricating the isolation structure separately, and reducing the complexity and cost of the fabrication process.

[0055] Furthermore, embedding a third semiconductor layer into the photosensitive capping layer and covering the entire top surface of the contact bridging portion can increase the incident light receiving area of ​​the photodiode; the bridging portion can converge and transmit the incident light passing through the photosensitive capping layer to the bottom photosensitive stack. The first, second, and third sub-photosensitive layers in the bottom photosensitive stack, upon photoexcitation, generate a concentration gradient within themselves, optimizing the transport path of photogenerated carriers, reducing the recombination rate during diffusion, and improving the quantum efficiency of the photodiode.

[0056] Furthermore, since pentavalent elements have a higher atomic mass than silicon, they have a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel area.

[0057] Please refer to Figure 2In some embodiments, the provided substrate 10 includes a plurality of trench isolation portions 101 spaced apart along a first direction, such as the ox direction. The material of the trench isolation portions 101 may include, but is not limited to, silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (Si2N2O), or combinations thereof.

[0058] As an example, please continue to refer to Figure 2 The trench isolation portion 101 can be used to isolate electrons and light energy. The shape of the longitudinal section (the section parallel to the Zox plane) of the trench isolation portion 101 may include a regular trapezoid, an inverted trapezoid, a rectangle, etc., or a combination of regular trapezoids, inverted trapezoids, rectangles, etc. This disclosure does not impose specific limitations on the shape, material, or size of the trench isolation portion 101, as long as it can isolate electrons, light energy, doped ions, etc. Furthermore, this embodiment does not impose specific limitations on the spacing between adjacent trench isolation portions 101, and it can be set according to actual needs.

[0059] As an example, please continue to refer to Figure 2 The substrate 10 can be made of semiconductor material, insulating material, conductive material, or any combination thereof. The substrate 10 can be a single-layer structure or a multi-layer structure. For example, the substrate 10 can be a silicon (Si) substrate, a silicon-germanium (SiGe) substrate, a silicon-germanium-carbon (SiGeC) substrate, a silicon carbide (SiC) substrate, a gallium arsenide (GaAs) substrate, an indium arsenide (InAs) substrate, an indium phosphide (InP) substrate, or other III / V semiconductor substrates, or II / VI semiconductor substrates. Alternatively, for example, the substrate 10 can be a layered substrate comprising materials such as Si / SiGe, Si / SiC, silicon-on-insulator (SOI), or silicon-germanium-on-insulator. Therefore, the type of substrate should not limit the scope of this disclosure.

[0060] As an example, please continue to refer to Figure 2 P-type ions, such as boron ions, can be implanted into the substrate 10 by ion implantation to form a P-type substrate, so that a PN junction of a photodiode can be formed between the P-type substrate and the N-type photosensitive stack.

[0061] Please continue to refer to this. Figure 2 In some embodiments, the front side of the trench isolation portion 101 is the surface facing away from the back side of the substrate 10a, and the front side of the trench isolation portion 101 is covered with an etch stop layer 102. The side of the etch stop layer 102 facing away from the trench isolation portion 101 includes an interlayer dielectric layer 103.

[0062] For example, please continue to refer to Figure 2After forming the etch stop layer 102, metal is deposited to form a partial interconnect structure, and an interlayer dielectric layer 103 is formed on this basis. When the etch stop layer 102 is multilayered, other process problems caused by cracks in a single layer and / or failure of the metal interconnect structure can be avoided. The interlayer dielectric layer 103 can be silicon oxide or other dielectric material layers. In addition, metal interconnect structures can be formed on the interlayer dielectric layer 103 as metal interconnect portions of the device.

[0063] Of course, this embodiment only illustrates one method. As long as the metal interconnect structure can be formed reasonably, the thickness of the etching stop layer 102 and the interlayer dielectric layer 103 is not limited and can be adjusted according to specific process requirements.

[0064] Please continue to refer to this. Figure 2 In some embodiments, after forming a shallow trench (STI) in the substrate 10 and filling the STI with dielectric material, a trench isolation portion 101 can be formed. Subsequently, the substrate 10 can be flipped over, and the back side of the substrate 10 can be thinned and planarized to expose the back side of the trench isolation portion 101, thereby obtaining the back side 10a of the substrate 10.

[0065] For example, please continue to refer to Figure 2 A first semiconductor material layer 211 is epitaxially grown on the back side 10a of a substrate 10 with a flat top surface. The thickness of the first semiconductor material layer 211 can be 50 nanometers to 60 nanometers. For example, the thickness of the first semiconductor material layer 211 can be 50 nanometers, 55 nanometers, or 60 nanometers, etc. The first semiconductor material layer 211 may include a SiB layer, which is used to characterize silicon material doped with boron (B).

[0066] For example, please continue to refer to Figure 2 After forming a first semiconductor material layer 211 on the back side 10a of the substrate 10 using a selective epitaxial growth process, a first dielectric layer 22 is formed on the top surface of the first semiconductor material layer 211. The first dielectric layer 22 is used to protect the first semiconductor material layer 211 from damage during subsequent etching or polishing processes.

[0067] For example, please continue to refer to Figure 2 The thickness of the first dielectric layer 22 can be 1 nm to 2 nm. For example, the thickness of the first dielectric layer 22 can be 1 nm, 1.5 nm, or 2 nm. The material of the first dielectric layer 22 can include silicon oxide.

[0068] Please refer to Figure 3In some embodiments, forming the first semiconductor layer 21 in step S10 includes: after forming a first patterned photoresist layer (not shown) on the top surface of the first dielectric layer 22, the first patterned photoresist layer includes an opening pattern for defining the shape, position, and size of the first groove 301; etching the first dielectric layer 22 and the first semiconductor material layer 211 based on the first patterned photoresist layer; and forming a plurality of first grooves 301 spaced apart along a first direction in the first semiconductor material layer 211. The remaining first semiconductor material layer 211 is used to constitute the first semiconductor layer 21.

[0069] Please refer to Figures 3-4 In some embodiments, step S10 further includes:

[0070] Step S11: Selectively epitaxially grow a first sub-photosensitive layer 31 with a top surface lower than the top surface of the first semiconductor layer 21 within the first groove 301;

[0071] Step S12: Selectively epitaxially grow a second sub-photosensitive layer 32 on the top surface of the first sub-photosensitive layer 31 within the first groove 301, the top surface of which is higher than the top surface of the first dielectric layer 22.

[0072] Step S13: Selectively epitaxially grow a third sub-photosensitive layer 33 on the top surface of the second sub-photosensitive layer 32. The first sub-photosensitive layer 31, the second sub-photosensitive layer 32 and the third sub-photosensitive layer 33 are used to jointly form the bottom photosensitive stack 30.

[0073] For example, please continue to refer to Figures 3-4 The second sub-photosensitive layer 32 contains different Group 5 elements from the first sub-photosensitive layer 31 and the third sub-photosensitive layer 33, respectively. This allows the first sub-photosensitive layer 31, the second sub-photosensitive layer 32, and the third sub-photosensitive layer 33 in the bottom photosensitive stack 30 to generate a concentration gradient within them after optical excitation. This optimizes the transport path of photogenerated carriers, reduces the recombination rate during the diffusion process, and improves the quantum efficiency of the photodiode.

[0074] For example, the fifth group elements include nitrogen (N), phosphorus (P), arsenic (As), antimony (Sb), and bismuth (Bi).

[0075] For example, please continue to refer to Figures 3-4 The first sub-photosensitive layer 31 contains a SiP layer; the second sub-photosensitive layer 32 contains a SiAs layer; and the third sub-photosensitive layer 33 contains a SiP layer. The SiAs layer is used to characterize silicon materials containing As; the SiP layer is used to characterize silicon materials containing P.

[0076] For example, please continue to refer to Figures 3-4The top surface of the second sub-photosensitive layer 32 is higher than the top surface of the first semiconductor layer 21; the bottom surface of the second sub-photosensitive layer 32 is lower than the top surface of the first semiconductor layer 21 and higher than the bottom surface of the first semiconductor layer 21, so as to avoid the interface between the second sub-photosensitive layer 32 and the first sub-photosensitive layer 31, or the interface between the second sub-photosensitive layer 32 and the third sub-photosensitive layer 33, being flush with or connected to the interface between the first semiconductor layer 21 and the second semiconductor layer 41, thus preventing the generation of a photoelectric leakage channel.

[0077] Please refer to Figures 5-7 In some embodiments, forming a second semiconductor layer 41 in step S20 includes:

[0078] Step S21: Form a second semiconductor material layer 411 that covers the third sub-photosensitive layer 33 and the first dielectric layer 22, and whose top surface is higher than the third sub-photosensitive layer 33;

[0079] Step S22: Form a second dielectric layer 42 on the top surface of the second semiconductor material layer 411;

[0080] Step S23: A second groove 401 is formed in the second semiconductor material layer 411, which is spaced apart along the first direction. The bottom surface of the second groove 401 is lower than the top surface of the second sub-photosensitive layer 32 and not lower than the top surface of the first semiconductor layer 21. The remaining second semiconductor material layer 411 is used to form the second semiconductor layer 41.

[0081] Step S24: Selectively epitaxially grow a bridging portion 40 with its top surface higher than the top surface of the second semiconductor layer 41 within the second groove 401.

[0082] For example, please continue to refer to Figure 5 The thickness of the second dielectric layer 42 is less than the thickness of the second semiconductor material layer 411. The second dielectric layer 42 is used to protect the second semiconductor material layer 411 from damage during subsequent etching or polishing processes. The material of the second dielectric layer 42 may include silicon oxide.

[0083] For example, please continue to refer to Figure 6 The second groove 401 is embedded inside the second sub-photosensitive layer 32. The bottom surface of the second groove 401 is lower than the top surface of the second sub-photosensitive layer 32 and higher than the bottom surface of the second sub-photosensitive layer 32.

[0084] For example, please continue to refer to Figure 7 The top surface of the bridging portion 40 is higher than the top surface of the second semiconductor layer 41; the bottom surface of the bridging portion 40 is not lower than the top surface of the first semiconductor layer 21. This is to prevent the interface between the bridging portion 40 and the bottom photosensitive stack 30 or the photosensitive capping layer 50 from being flush with or connected to the interface between the second semiconductor layer 41 and the third semiconductor layer 61, thus avoiding the generation of a photoelectric leakage channel.

[0085] Please refer to Figures 8-9In some embodiments, forming a third semiconductor layer 61 in step S30 includes:

[0086] Step S31: Form a third semiconductor material layer that covers the bridging portion 40 and the second dielectric layer 42, and whose top surface is higher than the top surface of the bridging portion 40;

[0087] Step S32: Form a third dielectric layer 62 on the top surface of the third semiconductor material layer;

[0088] Step S33: A third groove 501 is formed in the third semiconductor material layer, which is spaced apart along the first direction; the bottom surface of the third groove 501 is not lower than the top surface of the second dielectric layer 42; the remaining third semiconductor material layer is used to form the third semiconductor layer 61.

[0089] Step S34: Selectively epitaxially grow a photosensitive capping layer 50 with a top surface not lower than the top surface of the third dielectric layer 62 in the third groove 501.

[0090] For example, please continue to refer to Figures 8-9 The dimension of the third groove 501 along the first direction is greater than the dimension of the bridging portion 40 along the first direction.

[0091] For example, please continue to refer to Figure 8 The thickness of the third dielectric layer 62 is less than the thickness of the third semiconductor material layer. The third dielectric layer 62 is used to protect the third semiconductor material layer from damage during subsequent etching or polishing processes.

[0092] Please continue to refer to this. Figure 9 In some embodiments, the orthographic projection of the top surface of the bridging portion 40 onto the bottom surface of the photosensitive capping layer 50 is located within the bottom surface of the photosensitive capping layer 50. The bridging portion 40, with its smaller cross-sectional size, generates a focusing effect on the light signals transmitted through the photosensitive capping layer 50, thereby further increasing the concentration of photogenerated carriers.

[0093] Please continue to refer to this. Figure 9 In some embodiments, the bottom surface of the photosensitive capping layer 50 is higher than the bottom surface of the third semiconductor layer 61 to prevent the interface between the photosensitive capping layer 50 and the bridging portion 40 from being flush with or connected to the interface between the third semiconductor layer 61 and the second semiconductor layer 41, thus avoiding the generation of a photoelectric leakage channel.

[0094] Please continue to refer to this. Figure 9 In some embodiments, the bridging portion 40 and the second sub-photosensitive layer 32 and the photosensitive capping layer 50 respectively contain different Group 5 elements, so that a concentration gradient is generated between the photosensitive capping layer 50 and the bridging portion 40, or between the bridging portion 40 and the second sub-photosensitive layer 32, thereby optimizing the transport path of photogenerated carriers, reducing the recombination rate during the diffusion process, and improving the quantum efficiency of the photodiode.

[0095] For example, please continue to refer to Figure 9 The first semiconductor layer 21, the second semiconductor layer 41, and the third semiconductor layer 61 all contain elements from the third group of main elements, so that the photodiode is isolated from the stacked first semiconductor layer, second semiconductor layer and third semiconductor layer via a PN junction.

[0096] For example, please continue to refer to Figure 9 The bridging portion 40 includes a SiSb layer; the photosensitive capping layer 50 includes a SiAs layer; the first semiconductor layer 21, the second semiconductor layer 41, and the third semiconductor layer 61 all include a SiB layer; wherein, the SiAs layer is used to characterize silicon materials containing As; the SiP layer is used to characterize silicon materials containing P; the SiSb layer is used to characterize silicon materials containing Sb; and the SiB layer is used to characterize silicon materials containing B.

[0097] For example, the third group elements include boron (B), aluminum (Al), gallium (Ga), indium (In), and thallium (Tl).

[0098] Please continue to refer to this. Figure 9 In some embodiments, after forming the photosensitive capping layer 50, the method further includes:

[0099] Step S41: Planarize the top surface of the photosensitive capping layer 50 until the top surface of the remaining photosensitive capping layer 50 is flush with the top surface of the third dielectric layer 62.

[0100] Step S42: A plurality of grids 80 are formed on the top surface of the third dielectric layer 62 at intervals along the first direction, and the grids 80 and the photosensitive stack are arranged alternately along the first direction.

[0101] Please continue to refer to this. Figure 10 In some embodiments, after step S41, a grid material stack (not shown) covering the top surface of the photosensitive capping layer 50 and the top surface of the third dielectric layer 62 can be formed. The grid material stack includes a first grid material layer 81, a second grid material layer 82, and a third grid material layer 83 sequentially stacked along a second direction away from the substrate. The material of the first grid material layer 81 may include HfO2. The material of the second grid material layer 82 may include TiN. The material of the third grid material layer 83 may include Al.

[0102] Please continue to refer to this. Figures 10-11 In some embodiments, after forming the grid material stack, a fourth patterned photoresist layer (not shown) may be formed on the top surface of the grid material stack. The fourth patterned photoresist layer includes an opening pattern for defining the shape, position and size of the filter 90. The grid material stack is etched based on the fourth patterned photoresist layer to form a plurality of grids 80, wherein the plurality of grids 80 are located directly above the plurality of trench isolation portions 101.

[0103] Please continue to refer to this. Figures 10-11In some embodiments, after forming the grid 80, the following steps are also included:

[0104] A filter 90 is formed between adjacent grids 80 along a first direction, such as the ox direction.

[0105] For example, please continue to refer to Figure 11 The filter 90 includes, but is not limited to, a red filter, a yellow filter, and a blue filter, and the three filters are arranged adjacently as a pixel group. Among them, the red filter transmits red light waves, the yellow filter transmits yellow light waves, and the blue filter transmits blue light waves.

[0106] Please continue to refer to this. Figure 11 In some embodiments, a back-illuminated image sensor is provided, fabricated using the back-illuminated image sensor fabrication method described in any of the preceding embodiments. The back-illuminated image sensor includes a substrate 10, and a first semiconductor layer 21, a second semiconductor layer 41, and a third semiconductor layer 61 sequentially stacked on the back surface 10a of the substrate 10 in a direction away from the substrate 10. The first semiconductor layer 21 includes a plurality of bottom photosensitive stacks 30 arranged at intervals, which penetrate the first semiconductor layer 21 and extend to the substrate 10. Each bottom photosensitive stack 30 includes a first sub-photosensitive layer 31, a second sub-photosensitive layer 32, and a third sub-photosensitive layer 30 sequentially stacked in a direction away from the substrate 10. The first semiconductor layer 32 and the third sub-photosensitive layer 33 are included; the second semiconductor layer 41 includes a plurality of bridging portions 40 arranged at intervals, the plurality of bridging portions 40 penetrate the second semiconductor layer 41 and the third sub-photosensitive layer 33, and extend into the interior of the plurality of second sub-photosensitive layers 32; the third semiconductor layer 61 includes a plurality of photosensitive capping layers 50 arranged at intervals, the plurality of photosensitive capping layers 50 are embedded in the third semiconductor layer 61 and cover and contact the plurality of bridging portions 40; the bridging portions 40 and the bottom photosensitive stack 30 and the photosensitive capping layer 50 that are in contact with each other constitute a photosensitive stack, and the photosensitive stack is isolated from the stacked first semiconductor layer 21, second semiconductor layer 41 and third semiconductor layer 61 through a PN junction.

[0107] Please continue to refer to this. Figures 1-11 The back-illuminated image sensor fabrication method and back-illuminated image sensor in this disclosure embodiment have the following unexpected technical effects:

[0108] The bridging portion 40, together with the bottom photosensitive stack 30 and the photosensitive capping layer 50, forms a photosensitive stack. The photosensitive stack and the stacked first semiconductor layer 21, second semiconductor layer 41, and third semiconductor layer 61 are connected via a PN junction to achieve opto-isolation, preventing signal crosstalk between adjacent photosensitive stacks. During the fabrication of the photosensitive stack, the first semiconductor layer 21, second semiconductor layer 41, and third semiconductor layer 61 are fabricated simultaneously, avoiding the need for separate fabrication steps of the isolation structure and reducing the complexity and cost of the fabrication process.

[0109] Furthermore, the photosensitive capping layer 50 is embedded in the third semiconductor layer 61 and covers the entire top surface of the contact bridging portion 40, which can increase the incident light receiving area of ​​the photodiode; the bridging portion 40 can converge and transmit the incident light passing through the photosensitive capping layer 50 to the bottom photosensitive stack 30. The first sub-photosensitive layer 31, the second sub-photosensitive layer 32, and the third sub-photosensitive layer 33 in the bottom photosensitive stack 30 will generate a concentration gradient inside after photoexcitation, which optimizes the transport path of photogenerated carriers, reduces the recombination rate during the diffusion process, and improves the quantum efficiency of the photodiode.

[0110] Furthermore, since pentavalent elements have a higher atomic mass than silicon, they have a lower mobility during epitaxial growth, resulting in uneven doping concentration in a single doped layer. Growing pentavalent elements with different dopants in multiple stages can improve the uniformity of doping concentration in the pixel area.

[0111] It should be understood that, although Figure 1 The steps in the flowchart are shown sequentially as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order in which these steps are executed, and they can be performed in other orders. Figure 1 At least some of the steps in the process may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but may be executed at different times. The execution order of these steps or stages is not necessarily sequential, but may be executed in turn or alternately with other steps or at least some of the steps or stages in other steps.

[0112] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features of the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0113] The embodiments described above are merely illustrative of several implementation methods of this disclosure, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this disclosure, and these modifications and improvements all fall within the protection scope of this disclosure.

Claims

1. A method for fabricating a back-illuminated image sensor, characterized in that, include: A substrate is provided, and a first semiconductor layer is formed on the back side of the substrate. The first semiconductor layer includes a plurality of bottom photosensitive stacks arranged at intervals. The plurality of bottom photosensitive stacks penetrate the first semiconductor layer and extend to the substrate. The bottom photosensitive stacks include a first sub-photosensitive layer, a second sub-photosensitive layer and a third sub-photosensitive layer stacked sequentially in a direction away from the substrate. A second semiconductor layer is formed covering the plurality of bottom photosensitive stacks. The second semiconductor layer includes a plurality of bridging portions arranged at intervals. The plurality of bridging portions penetrate the second semiconductor layer and the third sub-photosensitive layer, and extend into the interior of the plurality of second sub-photosensitive layers. A third semiconductor layer is formed to cover the plurality of bridging portions. The third semiconductor layer includes a plurality of photosensitive capping layers arranged at intervals. The plurality of photosensitive capping layers are embedded in the third semiconductor layer and cover and contact the plurality of bridging portions. The bottom photosensitive stack and the photosensitive capping layer that are in contact with the bridging portions constitute a photosensitive stack. The photosensitive stack is isolated from the stacked first semiconductor layer, second semiconductor layer and third semiconductor layer via a PN junction.

2. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The top surface of the second sub-photosensitive layer is higher than the top surface of the first semiconductor layer; The bottom surface of the second sub-photosensitive layer is lower than the top surface of the first semiconductor layer and higher than the bottom surface of the first semiconductor layer; and / or The top surface of the bridging portion is higher than the top surface of the second semiconductor layer; The bottom surface of the bridging portion is not lower than the top surface of the first semiconductor layer.

3. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The orthographic projection of the top surface of the bridging portion onto the bottom surface of the photosensitive capping layer is located within the bottom surface of the photosensitive capping layer; and / or The bottom surface of the photosensitive capping layer is higher than the bottom surface of the third semiconductor layer.

4. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The second sub-photosensitive layer contains different Group 5 elements from the first sub-photosensitive layer and the third sub-photosensitive layer, respectively. The bridging portion contains different Group 5 elements from the second sub-photosensitive layer and the photosensitive capping layer, respectively. The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer all contain elements from the third group of main groups.

5. The method for fabricating a back-illuminated image sensor according to claim 1, characterized in that, The first sub-photosensitive layer comprises a SiP layer; the second sub-photosensitive layer comprises a SiAs layer; the third sub-photosensitive layer comprises a SiP layer; The bridging portion includes a SiSb layer; The photosensitive capping layer comprises a SiAs layer; The first semiconductor layer, the second semiconductor layer, and the third semiconductor layer all contain a SiB layer; The SiAs layer is used to characterize silicon materials containing As; the SiP layer is used to characterize silicon materials containing P; the SiSb layer is used to characterize silicon materials containing Sb; and the SiB layer is used to characterize silicon materials containing B.

6. The method for fabricating a back-illuminated image sensor according to any one of claims 1-5, characterized in that, Forming the first semiconductor layer includes: A first semiconductor material layer is formed on the back side of the substrate; A first dielectric layer is formed on the top surface of the first semiconductor material layer; A first groove is formed in the first semiconductor material layer and spaced apart along a first direction parallel to the back surface; the remaining first semiconductor material layer is used to form the first semiconductor layer. A first sub-photosensitive layer with a top surface lower than the top surface of the first semiconductor material layer is selectively epitaxially grown in the first groove; A second sub-photosensitive layer with a top surface higher than the top surface of the first dielectric layer is selectively epitaxially grown on the top surface of the first sub-photosensitive layer within the first groove. A third sub-photosensitive layer is selectively epitaxially grown on the top surface of the second sub-photosensitive layer. The first sub-photosensitive layer, the second sub-photosensitive layer, and the third sub-photosensitive layer are used together to form the bottom photosensitive stack.

7. The method for fabricating a back-illuminated image sensor according to claim 6, characterized in that, Forming the second semiconductor layer includes: A second semiconductor material layer is formed that covers the third sub-photosensitive layer and the first dielectric layer, and whose top surface is higher than the third sub-photosensitive layer; A second dielectric layer is formed on the top surface of the second semiconductor material layer; A second groove is formed in the second semiconductor material layer, which is spaced apart along the first direction. The bottom surface of the second groove is lower than the top surface of the second sub-photosensitive layer, but not lower than the top surface of the first semiconductor layer. The remaining second semiconductor material layer is used to form the second semiconductor layer. A bridging portion with a top surface higher than the top surface of the second semiconductor layer is selectively epitaxially grown within the second groove.

8. The method for fabricating a back-illuminated image sensor according to claim 7, characterized in that, Forming the third semiconductor layer includes: A third semiconductor material layer is formed that covers the bridging portion and the second dielectric layer, and whose top surface is higher than the top surface of the bridging portion; A third dielectric layer is formed on the top surface of the third semiconductor material layer; A third groove is formed in the third semiconductor material layer, which is spaced apart along the first direction; the bottom surface of the third groove is not lower than the top surface of the second dielectric layer; the remaining third semiconductor material layer is used to form the third semiconductor layer. A photosensitive capping layer with a top surface not lower than the top surface of the third dielectric layer is selectively epitaxially grown within the third groove.

9. The method for fabricating a back-illuminated image sensor according to claim 8, characterized in that, After forming the photosensitive capping layer, the method further includes: The top surface of the photosensitive capping layer is planarized until the top surface of the remaining photosensitive capping layer is flush with the top surface of the third dielectric layer. A plurality of grids are formed on the top surface of the third dielectric layer at intervals along the first direction, and the grids and the photosensitive stack are arranged alternately along the first direction.

10. A back-illuminated image sensor, characterized in that, The back-illuminated image sensor is fabricated using the method described in any one of claims 1-9. The back-illuminated image sensor includes a substrate and a first semiconductor layer, a second semiconductor layer, and a third semiconductor layer that are sequentially stacked on the back side of the substrate and in a direction away from the substrate. The first semiconductor layer includes a plurality of bottom photosensitive stacks arranged at intervals. The plurality of bottom photosensitive stacks penetrate the first semiconductor layer and extend to the substrate. The bottom photosensitive stacks include a first sub-photosensitive layer, a second sub-photosensitive layer and a third sub-photosensitive layer stacked sequentially in a direction away from the substrate. The second semiconductor layer includes a plurality of bridging portions arranged at intervals, the plurality of bridging portions penetrating the second semiconductor layer and the third sub-photosensitive layer, and extending into the interior of the plurality of second sub-photosensitive layers; The third semiconductor layer includes a plurality of photosensitive capping layers arranged at intervals. The plurality of photosensitive capping layers are embedded in the third semiconductor layer and cover and contact the plurality of bridging portions. The bridging portions and the bottom photosensitive stack and photosensitive capping layers that are in contact with them constitute a photosensitive stack. The photosensitive stack is isolated from the stacked first semiconductor layer, second semiconductor layer and third semiconductor layer via a PN junction.

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