An ultralens design method based on etching uniformity compensation and an optimization system thereof

Abstract

The application discloses an ultralens design method based on etching uniformity compensation and an optimization system thereof, and specifically comprises the following steps: S1, etching a wafer and establishing an etching rate spatial distribution model S2, designing a layout partition and assigning a compensation coefficient; S3, nanostructure size pre-compensation; S4, generating a final mask and performing etching; the application actively performs nanostructure space size pre-compensation in the mask design stage, utilizes the change of the equivalent refractive index of nano units to offset the phase deviation caused by the non-uniform etching depth, so that the high-performance ultralens is obtained under the non-ideal process condition, and the limitation of the process physical limit is broken through.

Description

Technical Field

[0001] This invention relates to the fields of micro-nano optical manufacturing and semiconductor process technology, specifically to a superlens design method and optimization system based on etching uniformity compensation. Background Technology

[0002] Superlenses, as planar optical elements composed of subwavelength nanostructure arrays, have attracted much attention due to their enormous potential in miniaturizing and lightweighting optical systems. The optical performance of a superlens, such as focusing efficiency and wavefront aberration, is strictly dependent on the accuracy of the local optical phase generated by each nanostructure unit, which is determined by the geometric parameters of the nanostructure, such as height, diameter, and shape. The fabrication of superlenses mainly relies on semiconductor micro / nano fabrication technology, with typical processes including electron beam lithography for pattern definition and reactive ion etching for morphology transfer. However, in actual large-size wafer etching processes, due to physical limitations, there are severe etching inhomogeneities. These inhomogeneities cause the actual height of the fabricated nanostructure to deviate from the design target, thus introducing unintended optical phase errors and severely degrading the overall performance of the superlens.

[0003] The shortcomings of existing technology:

[0004] Current compensation targets and models have fundamental limitations: the compensation target is limited to ensuring the uniformity of the dimensions of two-dimensional planar patterns to meet the electrical performance requirements of integrated circuits. The compensation model used is a simple empirical relationship of "linewidth-etching deviation," which is essentially a single-dimensional, unidirectional compensation. The performance of a superlens strictly depends on the optical phase controlled by the three-dimensional morphology of the nanostructure. Uneven etching depth directly introduces phase error, which needs to be compensated by adjusting the equivalent refractive index of the nanostructure, involving the coupling relationship between height and lateral dimensions. The single-dimensional two-dimensional pattern compensation approach, because it does not establish the correlation between etching depth and optical phase, nor does it actively compensate for the phase deviation caused by uneven depth by adjusting the lateral dimensions, cannot solve this three-dimensional optical phase control problem in superlens manufacturing. Summary of the Invention

[0005] The purpose of this invention is to provide a superlens design method and optimization system based on etching uniformity compensation, so as to solve the problems mentioned in the background art.

[0006] To achieve the above objectives, the present invention provides the following technical solution: a superlens design method based on etching uniformity compensation, specifically comprising:

[0007] S1. Etching the wafer and establishing a spatial distribution model of the etching rate;

[0008] S2, Design layout partitioning and allocation compensation coefficient;

[0009] S3, Nanostructure size pre-compensation;

[0010] S4. Generate the final mask and perform etching.

[0011] Preferably, step S1 specifically includes:

[0012] a1. Prepare and etch a monitoring wafer containing dense test nanostructures under the target etching process formulation;

[0013] a2. Use a surface profilometer, atomic force microscope or scanning electron microscope to accurately measure the actual etching depth of the nanostructure at different locations on the wafer. The data for each measurement point includes the coordinates (x, y) and the etching rate value measured at that measurement point.

[0014] a3. Use the Kriging interpolation algorithm to construct a spatial distribution model of the etching rate R(x,y) over the entire wafer, where (x,y) are the coordinates on the wafer.

[0015] Preferably, step S2 specifically includes:

[0016] b1. Map the initial design layout of the superlens to be processed onto the coordinate system of the etching rate spatial distribution model R(x,y);

[0017] b2. Based on the contour distribution of the etching rate spatial distribution model R(x,y), the entire layout is divided into N compensation regions. The principle of division is to ensure that the etching rate change in each region is less than a preset threshold. The threshold is determined by simulation or experiment based on the phase tolerance of the target superlens.

[0018] b3. Calculate an etching depth compensation coefficient C_i for each partition i, using the following formula:

[0019] C_i = R_target / R_i_avg

[0020] Where R_target is the desired target etching rate, and R_i_avg is the average etching rate within partition i.

[0021] Preferably, step S3 specifically includes:

[0022] c1. For regions where C_i<1, i.e., the actual etching rate R_i_avg is higher than the target value, it is considered an "over-etched region". The height of the fabricated nanostructure is greater than the design value. Increase the lateral size of the nanostructure in the region to compensate for the phase deviation.

[0023] c2. For regions where C_i>1, i.e., the actual etching rate R_i_avg is lower than the target value, they are considered “under-etched regions”. The height of the fabricated nanostructure will be smaller than the design value. To compensate for the phase deviation, the lateral size of the nanostructure in the region is reduced.

[0024] c3. Determine the size adjustment amount by querying a pre-established database of "nanostructure size-equivalent refractive index-phase" relationships or by electromagnetic simulation calculation.

[0025] Preferably, step S4 specifically includes:

[0026] d1. Verify the geometric rules of the compensated layout;

[0027] d2. Perform data format conversion and layering;

[0028] d3. Generate a mask data file that can be read by an electron beam lithography machine or a laser direct writing device;

[0029] d4. Use mask data files and etching processes to manufacture superlenses with uniform optical phase distribution.

[0030] Preferably, the target etching process formulation in step a1 is a reactive ion etching process based on fluorine-based or chlorine-based chemical gases. For amorphous silicon superlenses, a CF4 / Ar or Cl2 / O2 mixed gas is used, the chamber pressure is 5-50 mTorr, the radio frequency power is 100-500 W, and the etching time is set according to the target height.

[0031] Preferably, step a3 specifically includes:

[0032] a31. Define the measurement point dataset {(x,y),R(x,y)} as a regional variable, and treat the spatial variation of the etching rate as a structured random function;

[0033] a32. By calculating the variogram γ(h), the spatial influence range and pattern of the etching rate can be quantitatively characterized.

[0034] γ(h)=(1 / 2N(h)) Σ[R(x_i)-R(x_i+h)]^2

[0035] Where N(h) is the number of point pairs with a distance of h;

[0036] a33. Fit the calculated variance function data points to a continuous theoretical variance function model;

[0037] a34. Using the theoretical variation function model obtained in step a33, perform optimal unbiased estimation of the etching rate R(u) of any unmeasured point (u) on the wafer. The estimated value R(u) is a linear combination of the etching rates of the surrounding known measurement points. The weights are determined by the theoretical variation function model. By performing grid interpolation on the entire wafer region, a continuous etching rate spatial distribution model R(x,y) is finally generated. The etching rate spatial distribution model R(x,y) will be directly used for the layout partitioning.

[0038] Preferably, step a3 specifically includes:

[0039] t1. Establish an accurate geometric model of the etching equipment cavity;

[0040] t2. Set physical boundary conditions based on the geometric model, including the air inlet and flow rate, the location of the air extraction port, the location of the radio frequency electrode, and the power;

[0041] t3. Define the kinetic parameters of plasma chemical reactions, including the cross section and rate constant of reactant gas dissociation, ionization, and surface reactions;

[0042] t4. Coupled solution of fluid dynamics equations, mass transport equations and energy equations to simulate the spatial non-uniformity of plasma density, reactive group concentration and ion energy distribution;

[0043] t5. The obtained simulation results of the spatial distribution of plasma state are correlated with the known empirical formula of etching rate, and finally the spatial distribution model of etching rate on the entire wafer R(x,y) is calculated.

[0044] Preferably, in step c3, the relational database is established through systematic electromagnetic simulation, specifically including:

[0045] c31. Define the material, shape, and height range of the nanostructure;

[0046] c32, scanning different lateral dimensions and different etching depths;

[0047] c33. For each set of size and height parameters, use FDTD software to calculate the optical response of the nanostructure at the target wavelength, including transmission, reflection spectrum and phase retardation;

[0048] c34. Extract the equivalent refractive index and absolute phase retardation.

[0049] c35. The parameter combinations and corresponding optical response data scanned in steps c32 and c33 above are stored in the database to form a "nanostructure size-equivalent refractive index-phase" relationship database. The system searches for combinations that can produce the same target phase based on the target phase and the C_i value of the partition, thereby determining the required lateral size adjustment amount.

[0050] The present invention also provides a superlens etching uniformity optimization system, the optimization system comprising:

[0051] The process modeling module is used to import and process etching rate measurement data or simulation data to generate an etching rate spatial distribution model R(x,y).

[0052] The layout processing and partitioning calculation module is used to load the initial design layout of the superlens, align it with the etching rate spatial distribution model R(x,y), and perform partitioning operations and calculate the compensation coefficient C_i.

[0053] An automatic compensation module, which has a built-in or call-up database of electromagnetic properties of nanostructures, automatically adjusts the geometric dimension parameters of all nanostructures in the corresponding region in batches according to the C_i value of each partition, and generates a new compensated layout.

[0054] The data output and interface module is used to output the final mask data file and can communicate with the manufacturing execution system or lithography equipment.

[0055] Compared with the prior art, the beneficial effects of the present invention are:

[0056] This invention presents a superlens design method and optimization system based on etching uniformity compensation. It proactively pre-compensates the spatial dimensions of the nanostructure during the mask design stage, using the change in the equivalent refractive index of the nanounits to offset the phase deviation caused by uneven etching depth. This allows for the acquisition of high-performance superlenses under non-ideal process conditions, overcoming the limitations of process physics. By effectively compensating for uneven etching depth, it can precisely control the optical phase of each nanounit, thereby reducing the root mean square value of the wavefront phase error of the superlens by more than 50% and improving focusing efficiency by 10% to 30%. It is applicable to the manufacturing of superlenses using various dielectric materials and is fully compatible with existing MEMS process lines. It is easy to industrialize without requiring modifications to expensive etching equipment or the development of entirely new etching processes, achieving significant performance improvements and extremely high cost-effectiveness. Attached Figure Description

[0057] Figure 1 This is a flowchart of the overall process for the superlens design method based on etching uniformity compensation of the present invention.

[0058] Figure 2 This is a two-dimensional contour plot of the spatial distribution model of etching rate established by measurement or simulation in this invention.

[0059] Figure 3 This is a three-dimensional schematic diagram of the spatial distribution of etching rate according to the present invention;

[0060] Figure 4 This is a schematic diagram of the superlens design layout partitioning and the nanostructure size adjustment strategy in different regions of the present invention;

[0061] Figure 5 This is a schematic diagram illustrating the nanostructure size pre-compensation principle of the present invention;

[0062] Figure 6 The simulation diagram shows a performance comparison between the superlenses manufactured using the conventional method and the compensation method of this invention; wherein:

[0063] Figure 6 (a) Shows a comparison of the simulation results of the phase distribution of the superlens after the target design, conventional method and the method of the present invention are used;

[0064] Figure 6 (b) A quantitative comparison of the phase errors of the three is shown (black: design error, red: traditional method error, green: invention error). Detailed Implementation

[0065] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0066] In the description of this invention, it should be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "top," "bottom," "inner," "outer," "clockwise," and "counterclockwise," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this invention.

[0067] In the description of this patent, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "setting" should be interpreted broadly. For example, they can refer to a fixed connection or setting, a detachable connection or setting, or an integrated connection or setting. Those skilled in the art can understand the specific meaning of the above terms in this patent according to the specific circumstances.

[0068] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a number" means two or more, unless otherwise explicitly specified.

[0069] Example

[0070] Please see Figure 1-6 As shown, the present invention provides a superlens design method based on etching uniformity compensation, specifically including:

[0071] S1. Etching the wafer and establishing a spatial distribution model of the etching rate;

[0072] a1. A monitoring wafer containing densely packed test nanostructures is prepared and etched under a target etching process formulation. The target etching process formulation is a reactive ion etching process based on fluorine-based or chlorine-based chemical gases. For a 4-inch diameter amorphous silicon superlens, the target nanopillar height is 300 nm. A CF4 / Ar mixed gas is used with a gas flow rate of 40 / 10 sccm, a chamber pressure of 20 mTorr, and an RF power of 300 W. The etching rate at the wafer edge is about 15% higher than that at the center.

[0073] a2. Use a surface profilometer, atomic force microscope or scanning electron microscope to accurately measure the actual etching depth of the nanostructure at different locations on the wafer. The data for each measurement point includes the coordinates (x, y) and the etching rate value measured at that measurement point.

[0074] a3. Use the Kriging interpolation algorithm to construct the spatial distribution model of the etching rate over the entire wafer, R(x,y), where (x,y) are the coordinates on the wafer;

[0075] a31. Define the measurement point dataset {(x,y),R(x,y)} as a regional variable, and treat the spatial variation of the etching rate as a structured random function;

[0076] a32. By calculating the variogram γ(h), the spatial influence range and pattern of the etching rate can be quantitatively characterized.

[0077] γ(h)=(1 / 2N(h)) Σ[R(x_i)-R(x_i+h)]^2

[0078] Where N(h) is the number of point pairs with a distance of h;

[0079] a33. Fit the calculated variance function data points to a continuous theoretical variance function model;

[0080] a34. Using the theoretical variation function model obtained in step a33, perform optimal unbiased estimation of the etching rate R(u) of any unmeasured point (u) on the wafer. The estimated value R(u) is a linear combination of the etching rates of the surrounding known measurement points. The weights are determined by the theoretical variation function model. By performing grid interpolation on the entire wafer region, a continuous etching rate spatial distribution model R(x,y) is finally generated. The etching rate spatial distribution model R(x,y) will be directly used for subsequent layout partitioning.

[0081] In addition, a spatial distribution model of the etching rate was predicted using plasma hydrodynamic simulation software:

[0082] t1. Establish an accurate geometric model of the etching equipment cavity;

[0083] t2. Set physical boundary conditions based on the geometric model, including the air inlet and flow rate, the location of the air extraction port, the location of the radio frequency electrode, and the power;

[0084] t3. Define the kinetic parameters of plasma chemical reactions, including the cross section and rate constant of reactant gas dissociation, ionization, and surface reactions;

[0085] t4. Coupled solution of fluid dynamics equations, mass transport equations and energy equations to simulate the spatial non-uniformity of plasma density, reactive group concentration and ion energy distribution;

[0086] t5. The obtained simulation results of the spatial distribution of plasma states are correlated with the known empirical formula for etching rate to finally calculate the spatial distribution model of etching rate R(x,y) on the entire wafer.

[0087] S2. Design layout partitioning and allocation of compensation coefficients: The design layout is divided into two compensation areas: the central area (C_i is approximately 1.08) and the edge area (C_i is approximately 0.94).

[0088] b1. Map the initial design layout of the superlens to be processed onto the coordinate system of the etching rate spatial distribution model R(x,y);

[0089] b2. Based on the contour distribution of the etching rate spatial distribution model R(x,y), the entire layout is divided into N compensation regions. The principle of division is to ensure that the etching rate change in each region is less than a preset threshold. The threshold is determined by simulation or experiment based on the phase tolerance of the target superlens.

[0090] b3. Calculate an etching depth compensation coefficient C_i for each partition i, using the following formula:

[0091] C_i = R_target / R_i_avg

[0092] Where R_target is the desired target etching rate, and R_i_avg is the average etching rate within partition i;

[0093] S3. Nanostructure size pre-compensation: reduce the diameter of all nanopillars by 5-15 nm, and increase the diameter of all nanopillars by 8-18 nm for over-etched areas at the edges.

[0094] c1. For regions where C_i<1, i.e., the actual etching rate R_i_avg is higher than the target value, it is considered an "over-etched region". The height of the fabricated nanostructure is greater than the design value. Increase the lateral size of the nanostructure in the region to compensate for the phase deviation.

[0095] c2. For regions where C_i>1, i.e., the actual etching rate R_i_avg is lower than the target value, they are considered “under-etched regions”. The height of the fabricated nanostructure will be smaller than the design value. To compensate for the phase deviation, the lateral size of the nanostructure in the region is reduced.

[0096] c3. Determine the size adjustment amount by querying a pre-established "nanostructure size-equivalent refractive index-phase" relationship database or through electromagnetic simulation calculations; the relationship database is established through systematic electromagnetic simulation, specifically including:

[0097] c31. Define the material, shape, and height range of the nanostructure;

[0098] c32, scanning different lateral dimensions and different etching depths;

[0099] c33. For each set of size and height parameters, use FDTD software to calculate the optical response of the nanostructure at the target wavelength, including transmission, reflection spectrum and phase retardation;

[0100] c34. Extract the equivalent refractive index and absolute phase retardation.

[0101] c35. The parameter combinations and corresponding optical response data scanned in steps c32 and c33 above are stored in the database to form a "nanostructure size-equivalent refractive index-phase" relationship database. The system searches for combinations that can produce the same target phase based on the target phase and the C_i value of the partition, thereby determining the required lateral size adjustment amount.

[0102] S4. Generate the final mask and perform etching;

[0103] d1. Verify the geometric rules of the compensated layout;

[0104] d2. Perform data format conversion and layering;

[0105] d3. Generate a mask data file that can be read by an electron beam lithography machine or a laser direct writing device;

[0106] d4. Use mask data files and etching processes to manufacture superlenses with uniform optical phase distribution.

[0107] By pre-introducing spatial deviations in the lateral geometry of nanostructures during the design phase, we can proactively compensate for the height deviations of nanostructures that are inevitably caused by spatial non-uniformity of etching rates in subsequent reactive ion etching processes, ultimately ensuring that the optical phase generated by all nanounits is consistent with the design target.

[0108] This invention also provides a superlens etching uniformity optimization system. The optimization system includes a process modeling module, a layout processing and partitioning calculation module, an automatic compensation module, and a data output and interface module. The process modeling module is used to import and process etching rate measurement data or simulation data to generate an etching rate spatial distribution model R(x,y). The layout processing and partitioning calculation module is used to load the initial design layout of the superlens, align it with the etching rate spatial distribution model R(x,y), and perform partitioning operations and calculate the compensation coefficient C_i. The automatic compensation module has a built-in or calls the electromagnetic property database of nanostructures, and automatically adjusts the geometric dimension parameters of all nanostructures in the corresponding region in batches according to the C_i value of each partition to generate a new compensated layout. The data output and interface module is used to output the final mask data file and can communicate with the manufacturing execution system or lithography equipment.

[0109] Experimental results show that after compensation using this method, the root mean square value of the wavefront phase error of the superlens is significantly reduced from approximately λ / 4 before compensation to below λ / 10; correspondingly, the focusing efficiency at the target wavelength is increased from approximately 60% before compensation to approximately 78%. This result fully verifies that the method of this invention, through the strategy of "compensating for etching depth with lateral dimensions", can effectively eliminate the phase error introduced by uneven etching, thereby realizing the manufacturing of high-performance superlenses.

[0110] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.

Claims

1. A method for designing a superlens based on etching uniformity compensation, characterized in that: Specifically, it includes: S1. Etching the wafer and establishing a spatial distribution model of the etching rate; S2, Design layout partitioning and allocation compensation coefficient; S3, Nanostructure size pre-compensation; S4. Generate the final mask and perform etching; Step S1 specifically includes: a1. Prepare and etch a monitoring wafer containing dense test nanostructures under the target etching process formulation; a2. Use a surface profilometer, atomic force microscope or scanning electron microscope to accurately measure the actual etching depth of the nanostructure at different locations on the wafer. The data for each measurement point includes the coordinates (x, y) and the etching rate value measured at that measurement point. a3. Use the Kriging interpolation algorithm to construct the spatial distribution model of the etching rate over the entire wafer, R(x,y), where (x,y) are the coordinates on the wafer; Step S2 specifically includes: b1. Map the initial design layout of the superlens to be processed onto the coordinate system of the etching rate spatial distribution model R(x,y); b2. Based on the contour distribution of the etching rate spatial distribution model R(x,y), the entire layout is divided into N compensation regions. The principle of division is to ensure that the etching rate change in each region is less than a preset threshold. The threshold is determined by simulation or experiment based on the phase tolerance of the target superlens. b3. Calculate an etching depth compensation coefficient C_i for each partition i, using the following formula: C_i = R_target / R_i_avg Where R_target is the desired target etching rate, and R_i_avg is the average etching rate within partition i.

2. The superlens design method based on etching uniformity compensation according to claim 1, characterized in that: Step S3 specifically includes: c1. For regions where C_i<1, i.e., the actual etching rate R_i_avg is higher than the target value, it is considered an "over-etched region". The height of the fabricated nanostructure is greater than the design value. Increase the lateral size of the nanostructure in the region to compensate for the phase deviation. c2. For regions where C_i>1, i.e., the actual etching rate R_i_avg is lower than the target value, they are considered "under-etched regions". The height of the fabricated nanostructure will be smaller than the design value. To compensate for the phase deviation, the lateral size of the nanostructure in the region is reduced. c3. Determine the size adjustment amount by querying the pre-established "nanostructure size-equivalent refractive index-phase" relationship database or by electromagnetic simulation calculation.

3. The superlens design method based on etching uniformity compensation according to claim 1, characterized in that: Step S4 specifically includes: d1. Verify the geometric rules of the compensated layout; d2. Perform data format conversion and layering; d3. Generate a mask data file that can be read by an electron beam lithography machine or a laser direct writing device; d4. Use mask data files and etching processes to manufacture superlenses with uniform optical phase distribution.

4. The superlens design method based on etching uniformity compensation according to claim 1, characterized in that: In step a1, the target etching process formulation is a reactive ion etching process based on fluorine-based or chlorine-based chemical gases. For amorphous silicon superlenses, a CF4 / Ar or Cl2 / O2 mixed gas is used, the chamber pressure is 5-50 mTorr, the radio frequency power is 100-500 W, and the etching time is set according to the target height.

5. The superlens design method based on etching uniformity compensation according to claim 1, characterized in that: Step a3 specifically includes: a31. Define the measurement point dataset {(x,y),R(x,y)} as a regional variable, and treat the spatial variation of the etching rate as a structured random function; a32. By calculating the variogram γ(h), the spatial influence range and pattern of the etching rate can be quantitatively characterized. γ(h)=(1 / 2N(h)) Σ[R(x_i)-R(x_i+h)]^2 Where N(h) is the number of point pairs with a distance of h; a33. Fit the calculated variance function data points to a continuous theoretical variance function model; a34. Using the theoretical variation function model obtained in step a33, perform optimal unbiased estimation of the etching rate R(u) of any unmeasured point (u) on the wafer. The estimated value R(u) is a linear combination of the etching rates of the surrounding known measurement points. The weights are determined by the theoretical variation function model. By performing grid interpolation on the entire wafer region, a continuous etching rate spatial distribution model R(x,y) is finally generated. The etching rate spatial distribution model R(x,y) will be directly used for the layout partitioning.

6. The superlens design method based on etching uniformity compensation according to claim 1, characterized in that... In step S1, the spatial distribution model of the etching rate R(x, y) is established through plasma hydrodynamic simulation, specifically including: t1. Establish an accurate geometric model of the etching equipment cavity; t2. Set physical boundary conditions based on the geometric model, including the air inlet and flow rate, the location of the air extraction port, the location of the radio frequency electrode, and the power; t3. Define the kinetic parameters of plasma chemical reactions, including the cross section and rate constant of reactant gas dissociation, ionization, and surface reactions; t4. Coupled solution of fluid dynamics equations, mass transport equations and energy equations to simulate the spatial non-uniformity of plasma density, reactive group concentration and ion energy distribution; t5. The obtained simulation results of the spatial distribution of plasma state are correlated with the known empirical formula of etching rate, and finally the spatial distribution model of etching rate on the entire wafer R(x,y) is calculated.

7. The superlens design method based on etching uniformity compensation according to claim 2, characterized in that: In step c3, the relational database is established through systematic electromagnetic simulation, specifically including: c31. Define the material, shape, and height range of the nanostructure; c32, scanning different lateral dimensions and different etching depths; c33. For each set of size and height parameters, use FDTD software to calculate the optical response of the nanostructure at the target wavelength, including transmission, reflection spectrum and phase retardation; c34. Extract the equivalent refractive index and absolute phase retardation. c35. The parameter combinations and corresponding optical response data scanned in steps c32 and c33 above are stored in the database to form a "nanostructure size-equivalent refractive index-phase" relationship database. The system searches for combinations that can produce the same target phase based on the target phase and the C_i value of the partition, thereby determining the required lateral size adjustment amount.

8. An optimization system for a superlens design method based on etching uniformity compensation according to any one of claims 1-7, characterized in that: The optimization system includes: The process modeling module is used to import and process etching rate measurement data or simulation data to generate an etching rate spatial distribution model R(x,y). The layout processing and partitioning calculation module is used to load the initial design layout of the superlens, align it with the etching rate spatial distribution model R(x,y), and perform partitioning operations and calculate the compensation coefficient C_i. An automatic compensation module, which has a built-in or call-up database of electromagnetic properties of nanostructures, automatically adjusts the geometric dimension parameters of all nanostructures in the corresponding region in batches according to the C_i value of each partition, and generates a new compensated layout. The data output and interface module is used to output the final mask data file and can communicate with the manufacturing execution system or lithography equipment.

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