Display device

Abstract

A display device according to one aspect of the present disclosure includes: a substrate including an active area and a non-active area; the pixel driving circuit is arranged on the substrate in the effective area; a plurality of micro LEDs disposed on the pixel driving circuit of the active area and electrically connected to the pixel driving circuit; a plurality of organic insulating layers disposed on the substrate in each of the active area and the non-active area; and a plurality of first pad electrodes disposed on the plurality of organic insulating layers of the non-effective region, in which a total thickness of the plurality of organic insulating layers in a region overlapping the plurality of first pad electrodes is greater than a total thickness of the plurality of organic insulating layers in a region between the plurality of first pad electrodes.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority to Korean Patent Application No. 10-2024-0087129 filed with the Korean Intellectual Property Office on July 2, 2024, the disclosure of which is incorporated herein by reference. Technical Field

[0003] This disclosure relates to a display device. Background Technology

[0004] Display devices are being used in a variety of electronic devices, such as TVs, mobile phones, laptops, and tablets.

[0005] As display devices, there are organic light-emitting displays (OLEDs) that are self-emissive devices and liquid crystal displays (LCDs) that require a separate light source.

[0006] In recent years, display devices, including those using light-emitting diodes (LEDs), have been gaining attention as the next generation of display devices. Compared to liquid crystal displays or organic light-emitting displays, LEDs are formed from inorganic materials rather than organic materials, resulting in faster illumination, superior luminous efficiency, and the ability to display images with higher brightness. Summary of the Invention

[0007] The objective of this disclosure is to provide a display device that suppresses the agglomeration of conductive material disposed between the pad electrodes of the flexible circuit board when the display panel and the flexible circuit board are bonded together.

[0008] Furthermore, the purpose of this disclosure is to provide a display device that suppresses the agglomeration of conductive materials to suppress short circuits between adjacent conductive materials and minimizes burn-out defects caused by external factors.

[0009] The purpose of this disclosure is not limited to the foregoing, and other purposes not mentioned will be clearly understood by those skilled in the art from the following description.

[0010] A display device according to one aspect of the present disclosure includes: a substrate including an effective region and an ineffective region; a pixel driving circuit disposed on the substrate in the effective region; a plurality of micro-LEDs disposed on the pixel driving circuit in the effective region and electrically connected to the pixel driving circuit; a plurality of organic insulating layers disposed on the substrate in each of the effective region and the ineffective region; and a plurality of first pad electrodes disposed on the plurality of organic insulating layers in the ineffective region, wherein the total thickness of the plurality of organic insulating layers in the region overlapping with the plurality of first pad electrodes is greater than the total thickness of the plurality of organic insulating layers in the region between the plurality of first pad electrodes.

[0011] According to another aspect of this disclosure, a display device includes: a substrate including an effective region and a pad region; a pixel driving circuit disposed on the substrate in the effective region; a first insulating layer disposed on the pixel driving circuit in the effective region and on the substrate in the pad region; a second insulating layer disposed on the first insulating layer in the effective region and the pad region; a third insulating layer disposed on the second insulating layer in the effective region and the pad region; a plurality of partitions disposed on the third insulating layer in the effective region; a plurality of micro-LEDs disposed on the plurality of partitions; a plurality of insulating patterns formed in the third insulating layer in the pad region; a plurality of first pad electrodes disposed on the plurality of insulating patterns in the pad region; and a plurality of opening regions formed by the plurality of insulating patterns between the plurality of first pad electrodes.

[0012] According to this disclosure, in a display device, agglomeration of conductive material disposed between the pad electrodes of the flexible circuit board can be suppressed when the display panel and the flexible circuit board are bonded together.

[0013] Furthermore, according to this disclosure, in a display device, agglomeration of conductive material between pad electrodes can be suppressed to suppress short circuits between conductive materials and minimize burn-out defects caused therefrom.

[0014] According to this disclosure, defects in pad units where pad electrodes are provided can be suppressed in a display device, thereby improving the lifespan of the display device. Therefore, the display device according to this disclosure can be driven efficiently at low power.

[0015] The effects of this disclosure are not limited to those illustrated above, and many more effects are included in this specification. Attached Figure Description

[0016] The above and other aspects, features and advantages of this disclosure will become clearer from the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0017] Figure 1 This is an exploded perspective view of a display device according to an exemplary embodiment of the present disclosure;

[0018] Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0019] Figure 3 This is an enlarged view of a display device according to an exemplary embodiment of the present disclosure;

[0020] Figure 4 This is a view illustrating a circuit structure according to an exemplary embodiment of the present disclosure;

[0021] Figure 5 This is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0022] Figure 6 This is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0023] Figure 7 This is a plan view of a display device according to an exemplary embodiment of the present disclosure;

[0024] Figure 8 It is along Figure 3 The cross-sectional view taken from VIII-VIII';

[0025] Figure 9 This is a cross-sectional view of a display device according to an exemplary embodiment of the present disclosure;

[0026] Figure 10 yes Figure 8 Enlarged cross-sectional view of the second ineffective region;

[0027] Figure 11 This is a cross-sectional view of a display device according to another exemplary embodiment of the present disclosure;

[0028] Figure 12 yes Figure 11 Enlarged cross-sectional view of the second ineffective region;

[0029] Figure 13 This is an enlarged cross-sectional view of the second ineffective area of ​​a display device according to yet another exemplary embodiment of the present disclosure; and

[0030] Figures 14 to 17 This is a view showing an apparatus to which a display device according to an exemplary embodiment of the present disclosure is applied. Detailed Implementation

[0031] The advantages and features of this disclosure, as well as methods for achieving these advantages and features, will become clear from the exemplary embodiments described in detail below, taken in conjunction with the accompanying drawings. However, this disclosure is not limited to the exemplary embodiments disclosed herein, but will be implemented in various forms. The exemplary embodiments are provided by way of example only so that those skilled in the art can fully understand the disclosure and scope of this disclosure.

[0032] The shapes, dimensions, ratios, angles, quantities, etc., shown in the accompanying drawings used to describe exemplary embodiments of this disclosure are merely examples, and this disclosure is not limited thereto. Throughout this disclosure, the same reference numerals generally denote the same elements. Furthermore, in the following description of this disclosure, detailed explanations of known related technologies may be omitted to avoid unnecessarily obscuring the subject matter of this disclosure. Terms such as “comprising,” “having,” and “consisting of” as used herein are generally intended to allow for the addition of additional components unless used in conjunction with the term “only.” Unless otherwise expressly stated, any reference to the singular may include the plural.

[0033] Even without explicit explanation, components are interpreted as including the normal tolerance range.

[0034] When using terms such as “above,” “over,” “below,” and “next” to describe the positional relationship between two parts, one or more parts may be located between the two parts unless the terms “immediately following” or “directly” are used.

[0035] When interpreting temporal relationships, terms such as “after,” “following,” “subsequent,” or “before” can include non-continuous cases, unless terms such as “immediately after” or “directly” are used.

[0036] Terms such as "first" and "second" are used to describe various components, but these components are not limited by these terms. These terms are only used to distinguish one component from another. Therefore, the first component mentioned herein can be a second component within the scope of this disclosure.

[0037] In describing the components of this disclosure, terms such as first, second, A, B, (a) or (b) may be used. These terms are intended only to distinguish one component from others, and the nature, order, sequence or number of the corresponding components are not limited by these terms.

[0038] When a component is described as “connected,” “coupled,” “joined,” or “attached” to another component, it should be understood that the component may be directly connected, coupled, joined, or attached to another component, but unless otherwise expressly specified, it may also be indirectly connected, coupled, joined, or attached to another component between each component.

[0039] When a component or layer is described as "in contact" or "overlapping" with another component or layer, the component or layer may directly contact or overlap with the other component or layer, but unless otherwise explicitly stated, it should be understood that it may also indirectly contact or overlap with another component between each component.

[0040] The term "at least one" should be understood to include all combinations of one or more related components. For example, "at least one of the first, second, and third components" means not only the first, second, or third component, but also all combinations of two or more of the first, second, and third components.

[0041] The terms “first direction,” “second direction,” “third direction,” “X-axis direction,” “Y-axis direction,” and “Z-axis direction” should not be interpreted merely as geometrically perpendicular to each other, but can indicate a wider range of directions within which the configuration of this disclosure can function.

[0042] Features of the various embodiments in this disclosure may be combined or associated with each other in part or in whole, various technical interlocks and operations are possible, and each embodiment may be implemented independently of each other or may be implemented together in an associated relationship.

[0043] The display according to exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings.

[0044] Figure 1 This is a perspective view showing a display device according to an exemplary embodiment of the present disclosure. Figure 2 This is a plan view of a display device according to an exemplary embodiment of the present disclosure. Figure 3 This is an enlarged view of a display device according to an exemplary embodiment of the present disclosure.

[0045] Reference Figures 1 to 3 The display device 1000 according to an exemplary embodiment of the present disclosure may include a display panel 100, a polarizing layer 293, an adhesive layer 295, a cover member 200, a support substrate 300, a flexible circuit board 400, and a printed circuit board 500.

[0046] For example, the display panel 100 of the display device 1000 may include a substrate 110. The substrate 110 may be a component supporting other components of the display device 1000. The substrate 110 may be formed of an insulating material. For example, the substrate 110 may be formed of glass or resin. In addition, the substrate 110 may also be formed of a flexible material. For example, the substrate 110 may be formed of a flexible plastic material, such as polyimide (PI), but the exemplary embodiments of this disclosure are not limited thereto.

[0047] The display panel 100 can display information, video, and / or images provided to the user. For example, the display panel 100 may include an active area AA and an inactive area NA. For example, the substrate 110 may include an active area AA and an inactive area NA. However, the active area AA and the inactive area NA are not limited to the substrate 110, but may be referred to with respect to the entire display device 1000.

[0048] The effective area AA can be an area for displaying an image. The effective area AA can include multiple pixels PX. Each of the multiple pixels PX can be configured with multiple sub-pixels. Multiple micro-LEDs can be disposed in each of the multiple sub-pixels. Therefore, the display device 1000 according to an exemplary embodiment of the present disclosure can be an inorganic light-emitting display device.

[0049] The inactive region NA can be an area where no image is displayed. Various wiring and circuitry can be configured in the inactive region NA to drive the multiple pixels PX of the active region AA. For example, various wiring and driving circuitry can be installed in the inactive region NA, and pad units PAD connected to integrated circuits and printed circuits can be configured, but the exemplary embodiments of this disclosure are not limited thereto.

[0050] For example, the driving circuit may be a data driving circuit and / or a gate driving circuit, but the exemplary embodiments of this disclosure are not limited thereto. Wiring may be provided to provide control signals for controlling the driving circuit. For example, the control signals may include various timing signals, including clock signals, input data enable signals, and synchronization signals, but the exemplary embodiments of this disclosure are not limited thereto. The control signals may be received via pad units PAD. For example, in an inactive area NA, a link line LL may be provided to transmit signals. For example, driving components such as flexible circuit board 400 and printed circuit board 500 may be connected to pad units PAD.

[0051] According to this specification, the inactive region NA may include a first inactive region NA1, a curved region BA, and a second inactive region NA2 (also referred to as a pad region). For example, the first inactive region NA1 may be a region surrounding at least a portion of the active region AA. The curved region BA is a region extending from at least one side of a plurality of sides of the first inactive region NA1 and may be a flexible region. The second inactive region NA2 is a region extending from the curved region BA, and a pad unit PAD is disposed therein. For example, the curved region BA may be in a curved state, and other regions of the substrate 110 other than the curved region BA may be in a flat state. In this case, as the curved region BA bends, the second inactive region NA2 may be located on the back side of the active region AA, but the exemplary embodiments of this disclosure are not limited thereto.

[0052] The effective area AA in the substrate 110 or display device 1000 may be configured in various shapes depending on the design of the display device 1000. For example, the effective area AA may be configured as a rectangular shape with four rounded corners, but the exemplary embodiments of this disclosure are not limited thereto. As another example, the effective area AA may be configured as a rectangular shape or a circular shape formed by having four right-angled corners, but the exemplary embodiments of this disclosure are not limited thereto.

[0053] According to this disclosure, the width of the second ineffective region NA2, which is provided with multiple pad electrodes PE, can be greater than the width of the curved region BA, which is provided with only multiple link lines LL. Furthermore, the width of the effective region AA, which is provided with multiple sub-pixels, can be greater than the width of the curved region BA, which is provided with only multiple link lines LL. Although the width of the curved region BA is shown to be smaller than the width of other regions of the substrate 110 in the figures, the shape of the substrate 110 including the curved region BA is illustrative, and the exemplary embodiments of this disclosure are not limited thereto.

[0054] Reference Figure 3Multiple pixel driving circuits (PDs) can be disposed on a substrate within an effective region AA. The multiple pixel driving circuits (PDs) can be circuits for driving multiple sub-pixels of micro-LEDs. Each pixel driving circuit in the multiple pixel driving circuits (PDs) includes multiple transistors, each transistor including a driving transistor and a storage capacitor, and provides control signals, power, and driving current to the multiple sub-pixel micro-LEDs to control the emission operation of the multiple micro-LEDs. For example, the pixel driving circuits (PDs) can include power lines and signal lines for controlling the emission on / off and / or emission time of the micro-LEDs. For example, the multiple pixel driving circuits (PDs) can be drive drivers fabricated on a semiconductor substrate using a metal-oxide-semiconductor field-effect transistor (MOSFET) fabrication process, but exemplary embodiments of this disclosure are not limited thereto. The drive driver includes multiple pixel driving circuits (PDs) and can drive multiple sub-pixels. Multiple micro-LEDs can be disposed on the pixel driving circuits (PDs) within the effective region AA and can be electrically connected to the pixel driving circuits (PDs).

[0055] Let's refer to each other. Figure 1 The flexible circuit board 400 and the printed circuit board 500 may be disposed below the display panel 100. The flexible circuit board 400 and the printed circuit board 500 may be disposed at at least one edge of the display panel 100, but the exemplary embodiments of this disclosure are not limited thereto. One side of the flexible circuit board 400 is attached to the display panel 100, and the other side is attached to the printed circuit board 500, but this is not a limitation. The flexible circuit board 400 may be a flexible film, but the exemplary embodiments of this disclosure are not limited thereto.

[0056] A pad unit PAD, comprising multiple first pad electrodes PE1, can be disposed in a second inactive area NA2. Within the pad unit PAD, driving components comprising one or more flexible circuit boards (or flexible films) 400 and printed circuit boards 500 can be attached or bonded. The multiple first pad electrodes PE1 of the pad unit PAD are electrically connected to one or more flexible circuit boards (or flexible films) 400 and transmit various signals (or electrical currents) from the printed circuit board 500 and the flexible circuit board (or flexible film) 400 to multiple pixel driving circuits PD in the active area AA.

[0057] The flexible circuit board (or flexible film) 400 can be a film on which various components are disposed on a base film with elasticity. For example, a driver IC such as a gate electrode driver IC or a data driver IC can be disposed in the flexible circuit board (or flexible film) 400, but the exemplary embodiments of this disclosure are not limited thereto. The driver IC can be a component that processes data and drive signals to display an image. Depending on the mounting method, the driver IC can be disposed using chip-on-glass (COG), chip-on-film (COF), or tape-on-carrier (TCP) technology, but the exemplary embodiments of this disclosure are not limited thereto. The flexible circuit board (or flexible film) 400 can be attached or bonded to a plurality of first pad electrodes PE1 by means of a conductive adhesive layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0058] The printed circuit board 500 can be a component electrically connected to one or more flexible circuit boards (or flexible films) 400 and providing signals to the driver IC. The printed circuit board 500 can be disposed on one side of the flexible circuit board (or flexible film) 400 for electrical connection to the flexible circuit board (or flexible film) 400. Various components for providing various signals to the driver IC can be disposed on the printed circuit board 500. For example, various components such as timing controllers, power supplies, memory, and processors can be disposed on the printed circuit board 500. For example, the printed circuit board 500 may include a power management integrated circuit (PMIC), but the exemplary embodiments of this disclosure are not limited thereto.

[0059] The printed circuit board 500 may include at least one hole 510, but exemplary embodiments of the present disclosure are not limited thereto. Internal components for sensing ambient light or temperature to be supplied to multiple sensors may be disposed in the area corresponding to at least one hole 510. For example, the internal components may include an ambient light sensor (ALS) or a temperature sensor, but exemplary embodiments of the present disclosure are not limited thereto. For example, the hole 510 may be a transmission hole, but exemplary embodiments of the present disclosure are not limited thereto.

[0060] Reference Figure 1 The polarization layer 293 can be disposed on the display panel 100. The polarization layer 293 can suppress or reduce the impact of light generated by external light sources entering the display panel 100 on the micro-LEDs.

[0061] A cover member 200 may be disposed on the polarizing layer 293. The cover member 200 may be a member for protecting the display panel 100. An adhesive layer 295 is disposed between the polarizing layer 293 and the cover member 200. The cover member 200 may be attached to the display panel 100 using the adhesive layer 295. The adhesive layer 295 may include optically clear adhesive (OCA), optically clear resin (OCR), or pressure-sensitive adhesive (PSA), but the exemplary embodiments disclosed herein are not limited thereto.

[0062] A support substrate 300 may be disposed between the display panel 100 and the printed circuit board 500. The support substrate 300 may enhance the rigidity of the display panel 100. The support substrate 300 may be a backplate, but the exemplary embodiments of this disclosure are not limited thereto.

[0063] Reference Figures 1 to 3 Multiple link lines LL can be disposed in the inactive area NA. These link lines LL can be wiring that transmits various signals from one or more flexible circuit boards (or flexible films) 400 and printed circuit boards 500 to the active area AA. The link lines LL extend from multiple first pad electrodes PE1 of the second inactive area NA2 toward the curved area BA and the first inactive area NA1 to electrically connect to multiple drive lines VL of the active area AA. Multiple pixel drive circuits PD provide signals from one or more flexible circuit boards (or flexible films) 400 and printed circuit boards 500 through the drive lines VL of the active area AA to be driven and the link lines LL of the inactive area NA.

[0064] For example, multiple drive lines VL can be used for wiring to transmit signals output from the flexible circuit board (or flexible film) 400 and the printed circuit board 500, together with multiple link lines LL, to multiple pixel driving circuits PD. The multiple drive lines VL are located in the active area AA to electrically connect to each of the pixel driving circuits PD. The multiple drive lines VL extend from the active area AA toward the inactive area NA to electrically connect to the multiple link lines LL. Therefore, signals output from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 can be transmitted to each of the pixel driving circuits PD via the multiple link lines LL and the multiple drive lines VL.

[0065] As the bending region BA bends, portions of the multiple link lines LL can bend together. Stress concentrates in the bent portions of the link lines LL, leading to cracks in the link lines LL. Therefore, the multiple link lines LL can be constructed of a conductive material with excellent ductility to reduce cracking caused by bending of the bending region BA. For example, the multiple link lines LL can be configured with conductive materials with excellent ductility (such as gold (Au), silver (Ag), or aluminum (Al)), but exemplary embodiments of this disclosure are not limited thereto. Furthermore, the multiple link lines LL can be configured with one of a variety of conductive materials for the effective region AA. For example, the multiple link lines LL can be constructed of an alloy or alloy of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), and silver (Ag) and magnesium (Mg), but exemplary embodiments of this disclosure are not limited thereto. The multiple link lines LL can be configured with a multilayer structure comprising various conductive materials. For example, the multiple link lines LL can be configured with a three-layer structure of titanium (Ti) / aluminum (Al) / titanium (Ti), but exemplary embodiments of this disclosure are not limited thereto.

[0066] Multiple link lines LL can be configured to have various shapes to reduce stress. At least a portion of the multiple link lines LL disposed on the curved region BA can extend in the same direction as the extension direction of the curved region BA, or in a direction different from the extension direction of the curved region BA, to reduce stress. For example, when the curved region BA extends from the first ineffective region NA1 toward the second ineffective region NA2, at least a portion of the link lines LL disposed on the curved region BA can extend obliquely in one direction. As another example, at least a portion of the multiple link lines LL can be configured with patterns of various shapes. For example, at least a portion of the multiple link lines LL disposed on the curved region BA can have a shape with a repeating conductive pattern having at least one shape selected from diamond, rhombus, trapezoidal waveform, triangular waveform, sawtooth waveform, sine waveform, circular, and omega (Ω) shape. However, exemplary embodiments of this disclosure are not limited thereto. Therefore, in order to minimize stress concentrated on the multiple link lines LL and the resulting cracks, the shape of the multiple link lines LL can be various shapes including the shapes described above, but exemplary embodiments of this disclosure are not limited thereto.

[0067] Figure 4 This is a view illustrating a circuit structure according to an exemplary embodiment of the present disclosure.

[0068] The pixel driving circuit (PD) may include a micro-driver (μDriver). The micro-LED (ED) is electrically connected to the micro-driver (μDriver) of the pixel driving circuit (PD) to be driven. Although in Figure 4 The illustration shows a micro LED connected to a micro driver (μDriver), but this disclosure is not limited thereto. For example, eight micro LEDs can be connected to one micro driver (μDriver). As another example, 16 micro LEDs can be connected to one micro driver (μDriver), or 32 or 64 micro LEDs can be connected to one micro driver (μDriver) simultaneously.

[0069] A micro-driver μDriver may include a driving transistor T DR and emitter transistor T EM However, the exemplary embodiments disclosed herein are not limited thereto.

[0070] For example, to drive transistor T DR When a high potential power supply voltage VDD is applied to the first electrode, the emitter transistor T... EM The first electrode is connected to the driving transistor T DR The second electrode, towards the driving transistor T DRA scan signal SC is applied to the gate electrode of the drive transistor T. DR The scan signal SC of the gate electrode is a direct current (DC) power supply and a fixed reference voltage can be applied in each frame, but the exemplary embodiments of this disclosure are not limited thereto.

[0071] Drive transistor T DR The second electrode and the emitter transistor T EM The first electrode is connected to the micro LED ED and the emitter transistor T. EM The second electrode is connected, and the transmit signal EM is applied to the emitter transistor T. EM The gate electrode. Applied to the emitter transistor T EM The transmit signal EM of the gate electrode can be a pulse width modulated signal that changes in each frame, but exemplary embodiments of this disclosure are not limited thereto.

[0072] The first electrode of the miniature LED ED is connected to the emitter transistor T. EM The second electrode of the micro LED ED is grounded. For example, the first electrode is the anode electrode and the second electrode is the cathode electrode, but it is not limited to this.

[0073] Drive transistor T DR and emitter transistor T EM Each of them can be an n-type transistor or a p-type transistor.

[0074] Drive transistor T DR The micro-driver μDriver is turned on by the scan signal SC applied from the timing controller, and the emitter transistor T... EM The transistor EM is turned on by transmitting a signal. This is done by applying a signal to the driving transistor T. DR The high potential power supply voltage VDD of the first electrode is driven by transistor T. DR and emitter transistor T EM Apply a driving current to the micro LED to make it emit light.

[0075] Figures 5 to 7 This is a plan view of a display device according to exemplary embodiments of the present disclosure. For example, Figure 5 It is a magnified planar image that includes a valid area of ​​multiple pixels. For example, Figure 6 It is a magnified planar image that includes a valid region of one pixel. For example, Figure 7 It is a magnified planar image of the effective area including multiple pixels. Figure 5 and Figure 6 The present disclosure only shows multiple signal lines TL, multiple communication lines NL, multiple first electrodes CE1, multiple spacers BNK and multiple miniature LEDs ED, but exemplary embodiments of the present disclosure are not limited thereto. Figure 7 yes Figure 5 An enlarged planar view showing multiple second electrodes CE2 are also provided.

[0076] Reference Figure 5 and Figure 6 Multiple pixels PX, configured by multiple sub-pixels, can be set within an effective area AA. Each sub-pixel includes a micro LED ED and emits light independently. The multiple sub-pixels can be arranged in a matrix by forming multiple rows and columns, but the exemplary embodiments of this disclosure are not limited thereto.

[0077] The plurality of sub-pixels may include a first sub-pixel SP1, a second sub-pixel SP2, and a third sub-pixel SP3. For example, any one of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 may be a red sub-pixel, another may be a green sub-pixel, and the third may be a blue sub-pixel. The types of the plurality of sub-pixels are illustrative, but the exemplary embodiments of this disclosure are not limited thereto.

[0078] Each pixel PX may include one or more first sub-pixels SP1, one or more second sub-pixels SP2, and one or more third sub-pixels SP3. For example, a pixel PX may include a pair of first sub-pixels SP1, a pair of second sub-pixels SP2, and a pair of third sub-pixels SP3. The pair of first sub-pixels SP1 may be composed of first-1 sub-pixels SP1a and first-2 sub-pixels SP1b. The pair of second sub-pixels SP2 may be composed of second-1 sub-pixels SP2a and second-2 sub-pixels SP2b. The pair of third sub-pixels SP3 may be composed of third-1 sub-pixels SP3a and third-2 sub-pixels SP3b. For example, a pixel PX may include first-1 sub-pixels SP1a and first-2 sub-pixels SP1b, second-1 sub-pixels SP2a and second-2 sub-pixels SP2b, and third-1 sub-pixels SP3a and third-2 sub-pixels SP3b, but the exemplary embodiments of this disclosure are not limited thereto.

[0079] The multiple subpixels forming a pixel PX can be arranged in various ways. For example, in a pixel PX, a pair of first subpixels SP1 are located in the same column, a pair of second subpixels SP2 are located in the same column, and a pair of third subpixels SP3 are located in the same column. The first subpixels SP1, the second subpixels SP2, and the third subpixels SP3 are located in the same row. The configuration of the number and arrangement of the multiple subpixels of a pixel PX is illustrative, but exemplary embodiments of this disclosure are not limited thereto.

[0080] Multiple signal lines TL can be disposed in the region between multiple sub-pixels. The multiple signal lines TL can extend along a second direction Y between the multiple sub-pixels. The multiple signal lines TL can be wiring that transmits the anode voltage from the pixel driving circuit PD to the multiple sub-pixels. For example, the multiple signal lines TL can be electrically connected to the multiple pixel driving circuits PD and the first electrode CE1 of the multiple sub-pixels. The anode voltage output from the pixel driving circuit PD can be transmitted to the first electrode CE1 of the multiple sub-pixels through the multiple signal lines TL. For example, the first electrode CE1 can be an electrode electrically connected to the anode electrode 134 of the micro-LED ED. Therefore, the anode voltage from the signal lines TL can be transmitted to the anode electrode 134 of the micro-LED ED through the first electrode CE1.

[0081] Therefore, instead of multiple transistors and storage capacitors formed in each of the multiple sub-pixels, a pixel driving circuit PD integrating multiple pixel circuits is used to simplify the structure of the display device 1000. Furthermore, since the circuitry provided in each of the multiple sub-pixels is integrated into a single pixel driving circuit PD, efficient low-power driving is possible.

[0082] Multiple signal lines TL may include a first signal line TL1, a second signal line TL2, a third signal line TL3, a fourth signal line TL4, a fifth signal line TL5, and a sixth signal line TL6. The first signal line TL1 and the second signal line TL2 may be electrically connected to a pair of first sub-pixels SP1, respectively. The third signal line TL3 and the fourth signal line TL4 may be electrically connected to a pair of second sub-pixels SP2, respectively. The fifth signal line TL5 and the sixth signal line TL6 may be electrically connected to a pair of third sub-pixels SP3, respectively.

[0083] A first signal line TL1 can be disposed on one of a pair of first sub-pixels SP1, and a second signal line TL2 can be disposed on the other of the pair of first sub-pixels SP1. The first signal line TL1 can be electrically connected to one of the first sub-pixels SP1, for example, to the first electrode CE1 of the first-1 sub-pixel SP1a. The second signal line TL2 can be electrically connected to the other first sub-pixel SP1, for example, to the first electrode CE1 of the first-2 sub-pixel SP1b.

[0084] The third signal line TL3 can be disposed on one of the pair of second sub-pixels SP2, and the fourth signal line TL4 can be disposed on the other of the pair of second sub-pixels SP2. For example, the third signal line TL3 can be disposed adjacent to the second signal line TL2. The third signal line TL3 can be electrically connected to one of the pair of second sub-pixels SP2, for example, electrically connected to the first electrode CE1 of the second-1st sub-pixel SP2a. The fourth signal line TL4 can be electrically connected to the other of the pair of second sub-pixels SP2, for example, electrically connected to the first electrode CE1 of the second-2nd sub-pixel SP2b.

[0085] The fifth signal line TL5 can be disposed on one of the pair of third sub-pixels SP3, and the sixth signal line TL6 can be disposed on the other of the pair of third sub-pixels SP3. For example, the fifth signal line TL5 can be disposed adjacent to the fourth signal line TL4. The sixth signal line TL6 can be disposed adjacent to the first signal line TL1 connected to the adjacent pixel PX. The fifth signal line TL5 can be electrically connected to one of the pair of third sub-pixels SP3, for example, electrically connected to the first electrode CE1 of the 3-1st sub-pixel SP3a. The sixth signal line TL6 can be electrically connected to the other of the pair of third sub-pixels SP3, for example, electrically connected to the first electrode CE1 of the 3-2nd sub-pixel SP3b.

[0086] Multiple signal lines TL can be formed of conductive materials. For example, multiple signal lines TL can be configured with conductive materials such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO). However, exemplary embodiments of this disclosure are not limited thereto. As another example, multiple signal lines TL can be formed of a multilayer structure of conductive materials. For example, multiple signal lines TL can be formed of a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but exemplary embodiments of this disclosure are not limited thereto.

[0087] Multiple communication lines NL can be disposed in the region between multiple pixels PX. Multiple communication lines NL can be configured to extend along a first direction X in the region between multiple pixels PX. Multiple communication lines NL are disposed in the region between multiple second electrodes CE2 and do not overlap with the multiple second electrodes CE2. For example, multiple communication lines NL can be wiring for short-range communication (such as near-field communication (NFC)). Multiple communication lines NL can be used as antennas. For example, multiple communication lines NL can be multiple connecting lines, but exemplary embodiments of this disclosure are not limited thereto.

[0088] According to this disclosure, a partition wall (BNK) can be provided in each of a plurality of sub-pixels. The plurality of partition wall (BNK) can be a structure in which a plurality of micro-LEDs (EDs) are disposed. The plurality of partition wall (BNK) can guide the position of the plurality of micro-LEDs during the transfer process of transferring the plurality of micro-LEDs to the display device 1000. During the transfer process of the plurality of micro-LEDs, the plurality of micro-LEDs can be transferred onto the plurality of partition wall (BNK). The plurality of partition wall (BNK) can be a partition pattern or structure, but the exemplary embodiments of this disclosure are not limited thereto.

[0089] The partition BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3 can be set to be spaced apart from each other. Therefore, it is easy to identify which types of micro-LEDs are transferred to the partition BNKs of the first sub-pixel SP1, the second sub-pixel SP2, and the third sub-pixel SP3.

[0090] The partition BNKs of the first-1 sub-pixel SP1a and the first-2 sub-pixel SP1b can be connected, spaced apart, or separated. For example, considering design requirements such as transfer process needs, the partition BNKs of the first-1 sub-pixel SP1a and the first-2 sub-pixel SP1b of the same type of micro LED ED can be connected, spaced apart, or separated. The partition BNKs of the second-1 sub-pixel SP2a and the second-2 sub-pixel SP2b can be connected, spaced apart, or separated. The partition BNKs of the third-1 sub-pixel SP3a and the third-2 sub-pixel SP3b can be connected, spaced apart, or separated. Therefore, a pair of partition BNKs of the first sub-pixel SP1, a pair of partition BNKs of the second sub-pixel SP2, and a pair of partition BNKs of the third sub-pixel SP3 can be formed in various forms, but the exemplary embodiments of this disclosure are not limited thereto.

[0091] For example, the plurality of barrier BNKs can be formed of an organic insulating material. The plurality of barrier BNKs can be composed of a single layer or a double layer of organic insulating material. For example, the plurality of barrier BNKs can be configured with photoresist, polyimide (PI) or acrylic-based materials, but the exemplary embodiments of this disclosure are not limited thereto.

[0092] A first electrode CE1 may be disposed in each of a plurality of sub-pixels. The first electrode CE1 may be disposed on a partition BNK. The first electrode CE1 may be electrically connected to one of a plurality of signal lines TL. At least a portion of the first electrode CE1 extends to the outside of the partition BNK to be electrically connected to the signal line TL of the adjacent first electrode CE1. For example, a portion of the first electrode CE1 of sub-pixel 1-1 SP1a extends to a region of sub-pixel 1-1 SP1a that is electrically connected to a first signal line TL1. A portion of the first electrode CE1 of sub-pixel 1-2 SP1b extends to another region of sub-pixel 1-2 SP1b to be electrically connected to a second signal line TL2. A portion of the first electrode CE1 of sub-pixel 2-1 SP2a extends to a region of sub-pixel 2-1 SP2a to be electrically connected to a third signal line TL3. A portion of the first electrode CE1 of sub-pixel 2-2 SP2b extends to another region of sub-pixel 2-2 SP2b to be electrically connected to a fourth signal line TL4. A portion of the first electrode CE1 of sub-pixel SP3a extends to one region of sub-pixel SP3a to be electrically connected to the fifth signal line TL5. A portion of the first electrode CE1 of sub-pixel SP3b extends to another region of sub-pixel SP3b to be electrically connected to the sixth signal line TL6.

[0093] The first electrode CE1 can be disposed below multiple micro-LEDs to electrically connect the pixel driving circuit PD to the anode electrode 134 of the micro-LEDs, and transmit the anode voltage from the pixel driving circuit PD to the micro-LEDs via the signal line TL. Different voltages can be applied to the first electrodes CE1 of the multiple sub-pixels depending on the image to be displayed. For example, different voltages can be applied to the first electrodes CE1 of the multiple sub-pixels. Therefore, the first electrode CE1 can be a pixel electrode, but the exemplary embodiments of this disclosure are not limited thereto.

[0094] The first electrode CE1 can be configured with a conductive material. For example, the first electrode CE1 can be integrally disposed with multiple signal lines TL. For example, the first electrode CE1 can be configured with the same conductive material as the multiple signal lines TL, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first electrode CE1 can be configured with a conductive material such as titanium (Ti), aluminum (Al), copper (Cu), molybdenum (Mo), nickel (Ni), chromium (Cr), indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO). However, the exemplary embodiments of this disclosure are not limited thereto. As another example, the first electrode CE1 can be configured with a multilayer structure of conductive material. For example, multiple first electrodes CE1 can be configured with a multilayer structure of titanium (Ti) / aluminum (Al) / titanium (Ti) / indium tin oxide (ITO), but the exemplary embodiments of this disclosure are not limited thereto.

[0095] A miniature LED ED can be disposed in each of multiple sub-pixels. Multiple miniature LED EDs can be disposed on the spacer BNK and the first electrode CE1. Multiple miniature LED EDs can be disposed on the first electrode CE1 and can be electrically connected to the first electrode CE1. Accordingly, an anode voltage from the pixel driving circuit PD can be applied to the miniature LED ED via the signal line TL and the first electrode CE1 to emit light.

[0096] Multiple micro-LED EDs may include a first micro-LED 130, a second micro-LED 140, and a third micro-LED 150. The first micro-LED 130 may be disposed in a first sub-pixel SP1. The second micro-LED 140 may be disposed in a second sub-pixel SP2. The third micro-LED 150 may be disposed in a third sub-pixel SP3. For example, any one of the first micro-LED 130, the second micro-LED 140, and the third micro-LED 150 may be a red micro-LED, another may be a green micro-LED, and the third may be a blue micro-LED, but the exemplary embodiments of this disclosure are not limited thereto. Therefore, red, green, and blue light emitted from the multiple micro-LED EDs are combined to achieve various colors of light, including white. The type of multiple micro-LED EDs is illustrative, but the exemplary embodiments of this disclosure are not limited thereto.

[0097] The first micro-LED 130 may include a first-1 micro-LED 130a disposed in the first-1 sub-pixel SP1a and a first-2 micro-LED 130b disposed in the first-2 sub-pixel SP1b. The second micro-LED 140 may include a second-1 micro-LED 140a disposed in the second-1 sub-pixel SP2a and a second-2 micro-LED 140b disposed in the second-2 sub-pixel SP2b. The third micro-LED 150 may include a third-1 micro-LED 150a disposed in the third-1 sub-pixel SP3a and a third-2 micro-LED 150b disposed in the third-2 sub-pixel SP3b.

[0098] Also refer to Figure 5 , Figure 6 and Figure 7 The second electrode CE2 can be disposed in each of the multiple sub-pixels. The second electrode CE2 can also be disposed on the micro LED ED. The second electrode CE2 can be electrically connected to the pixel driving circuit PD via multiple contact electrodes CCE.

[0099] For example, the second electrode CE2 can be electrically connected to the cathode electrode 135 of the micro-LED ED to transfer the cathode voltage from the pixel driving circuit PD to the micro-LED ED. The same cathode voltage can be applied to the second electrodes CE2 of multiple sub-pixels. For example, the same voltage can be applied to the second electrode CE2 of each of the multiple sub-pixels and the cathode electrode 135 of the micro-LED ED. Therefore, the second electrode CE2 can be a common electrode, but the exemplary embodiments of this disclosure are not limited thereto.

[0100] At least a portion of multiple sub-pixels may share a second electrode CE2. At least some of the second electrodes CE2 of the multiple sub-pixels may be electrically connected to each other. When the same voltage is applied to the second electrodes CE2, the second electrodes CE2 of at least some sub-pixels are shared. For example, the second electrodes CE2 of at least some pixels PX located in the same row may be connected to each other. For example, one second electrode CE2 may be located in multiple pixels PX. One second electrode CE2 may be located in every n sub-pixels.

[0101] For example, some of the second electrodes CE2 of the plurality of sub-pixels may be spaced apart or separated from each other. For example, the second electrode CE2 connected to the pixel PX in the nth row and the second electrode CE2 connected to the pixel PX in the (n+1)th row may be spaced apart or separated from each other. For example, the plurality of second electrodes CE2 may be spaced apart from each other, wherein a plurality of communication lines NL extend therebetween along a first direction X. Accordingly, the number of the plurality of sub-pixels may be greater than the number of the plurality of second electrodes CE2. As another example, all the second electrodes CE2 of the plurality of sub-pixels may be connected to each other, such that only one second electrode CE2 is provided on the substrate 110, but the exemplary embodiments of this disclosure are not limited thereto.

[0102] The plurality of second electrodes CE2 may be made of a transparent conductive material, but the exemplary embodiments of this disclosure are not limited thereto. The plurality of second electrodes CE2 may be configured such that light emitted from the micro LED ED travels toward the top of the second electrodes CE2. For example, the second electrodes CE2 may be configured of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), and indium gallium zinc oxide (IGZO), but the exemplary embodiments of this disclosure are not limited thereto.

[0103] Multiple contact electrodes CCE can be disposed on the substrate 110. For example, the multiple contact electrodes CCE can be configured to be spaced apart from multiple spacers BNK and multiple signal lines TL. Each of the multiple second electrodes CE2 can overlap with at least one contact electrode CCE. For example, one second electrode CE2 can overlap with multiple contact electrodes CCE.

[0104] For example, multiple contact electrodes CCE can be electrically connected to multiple second electrodes CE2. The multiple contact electrodes CCE can be disposed between the substrate 110 and the multiple second electrodes CE2 to transfer the cathode voltage from the pixel driving circuit PD to the second electrodes CE2.

[0105] For example, multiple micro-LEDs are formed on a wafer, and the micro-LEDs are transferred to a substrate 110 of a display device 1000 to manufacture the display device 1000. However, various defects may occur during the process of transferring multiple micro-LEDs (EDs) with micro-sized dimensions from the wafer to the substrate 110. For example, in some sub-pixels, non-transfer defects may occur, where the micro-LEDs are not transferred, and in other sub-pixels, defects may occur, where the micro-LEDs are transferred to the wrong positions due to alignment errors. Furthermore, even when the transfer process is performed normally, the transferred micro-LEDs may still have defects. Therefore, considering the defects in the transfer process of multiple micro-LEDs (EDs), multiple micro-LEDs of the same type can be transferred in a single sub-pixel. Illumination tests are performed on the multiple micro-LEDs, and only the one micro-LED that is ultimately determined to be normal can be used.

[0106] For example, micro-LED 130a (1-1) and micro-LED 130b (1-2) are transferred together to a sub-pixel and tested for defects. If both micro-LED 130a and micro-LED 130b are determined to be normal, only micro-LED 130a is used, but micro-LED 130b is not. As another example, if only micro-LED 130b (1-2) between micro-LED 130a and micro-LED 130b is determined to be normal, then micro-LED 130a is not used, and only micro-LED 130b is used. Therefore, even if multiple micro-LEDs of the same type are transferred to a sub-pixel, only one micro-LED is ultimately used.

[0107] Therefore, in a pair of microLEDs, either one is the primary (or main) microLED, and the other is a redundant microLED. The redundant microLED can be an additional microLED that is repurposed to compensate for defects in the primary microLED. When the primary microLED is defective, the redundant microLED can be used instead. Thus, the primary and redundant microLEDs are transferred together to a single subpixel, minimizing the display quality degradation caused by defects in both the primary and redundant microLEDs.

[0108] For example, the first-1 microLED 130a, the second-1 microLED 140a and the third-1 microLED 150a transferred to a pixel PX are used as main microLED EDs, and the first-2 microLED 130b, the second-2 microLED 140b and the third-2 microLED 150b are used as redundant microLED EDs.

[0109] Figure 8 This is a cross-sectional view of a display device according to an exemplary embodiment of the present disclosure. Figure 9 This is a cross-sectional view of a display device according to an exemplary embodiment of the present disclosure. Figure 10 This is an enlarged cross-sectional view of a display device according to an exemplary embodiment of the present disclosure. For example, Figure 8 This is a cross-sectional view of the effective region AA, the first ineffective region NA1, the bending region BA, and the second ineffective region NA2. For example, Figure 9 It is a magnified cross-sectional view of the first sub-pixel. For example, Figure 10 This is an enlarged cross-sectional view of a portion of the second ineffective region NA2.

[0110] Reference Figure 8 The first buffer layer 111a and the second buffer layer 111b can be disposed in the remaining area of ​​the substrate 110 other than the bending area BA.

[0111] The first buffer layer 111a and the second buffer layer 111b can be disposed in the effective region AA, the first ineffective region NA1, and the second ineffective region NA2. The first buffer layer 111a and the second buffer layer 111b can reduce the penetration of moisture or impurities through the substrate 110. The first buffer layer 111a and the second buffer layer 111b can be formed of an inorganic insulating material. For example, the first buffer layer 111a and the second buffer layer 111b can be configured as a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but the exemplary embodiments of this disclosure are not limited thereto.

[0112] For example, the first buffer layer 111a and the second buffer layer 111b on the bending region BA can be partially removed. The top surface of the substrate 110 located in the bending region BA can be exposed from the first buffer layer 111a and the second buffer layer 111b. Removing the first buffer layer 111a and the second buffer layer 111b, which are formed of inorganic insulating material, from the bending region BA minimizes cracks in the first buffer layer 111a and the second buffer layer 111b that may occur during bending.

[0113] Multiple alignment keys MK can be disposed between the first buffer layer 111a and the second buffer layer 111b. The multiple alignment keys MK can be configured to identify the position of the pixel driving circuit PD during the manufacturing process of the display device 1000. For example, the multiple alignment keys MK can be configured to align the position of the pixel driving circuit PD transferred to the adhesive layer 112. As another example, the multiple alignment keys MK can be omitted.

[0114] Adhesive layer 112 may be disposed on second buffer layer 111b. Adhesive layer 112 may be disposed in effective region AA, first ineffective region NA1, bending region BA, and second ineffective region NA2. As another example, at least a portion of adhesive layer 112 may be removed in ineffective region NA, including bending region BA. For example, adhesive layer 112 may be formed of any of adhesive polymers, epoxy resins, UV-curable resins, polyimide-based, acrylate-based, polyurethane-based, and polydimethylsiloxane (PDMS), but exemplary embodiments of this disclosure are not limited thereto.

[0115] A pixel driving circuit PD can be disposed on the adhesive layer 112 of the effective area AA. When the pixel driving circuit PD is implemented as a drive driver, the drive driver can be mounted on the adhesive layer 112 by a transfer process, but the exemplary embodiments of this disclosure are not limited thereto.

[0116] The first protective layer 113 may be disposed on the adhesive layer 112 and the pixel driving circuit PD. The first protective layer 113 may be configured to surround the side surface of the pixel driving circuit PD, but exemplary embodiments of this disclosure are not limited thereto. For example, the first protective layer 113 may be configured to cover at least a portion of the top surface of the pixel driving circuit PD. For example, in the curved region BA, the first protective layer 113 may be omitted, but exemplary embodiments of this disclosure are not limited thereto. For example, the first protective layer 113 may be partially disposed in the active region AA, the first inactive region NA1, and the second inactive region NA2.

[0117] Multiple first protective layers 113 may be provided. For example, when multiple first protective layers 113 are provided, at least one may be provided in all of the effective region AA, the curved region BA, and the ineffective regions NA1 and NA2. Another may be provided partially in the effective region AA, the first ineffective region NA1, and the second ineffective region NA2, but exemplary embodiments of this disclosure are not limited thereto.

[0118] The first protective layer 113 may be made of an organic insulating material, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first protective layer 113 may be configured with photoresist, polyimide (PI) or photoacrylic acid-based materials, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first protective layer 113 may be a cover layer or an insulating layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0119] According to this specification, within the effective area AA, multiple first connection lines 121 may be disposed on the first protective layer 113. The multiple first connection lines 121 may be wiring that electrically connects the pixel driving circuit PD to other components. For example, the pixel driving circuit PD may be electrically connected to multiple signal lines TL and multiple contact electrodes CCE via the multiple first connection lines 121. For example, the multiple first connection lines 121 may include first-1 connection line 121a, first-2 connection line 121b, first-3 connection line 121c, and first-4 connection line 121d, but the exemplary embodiments of this disclosure are not limited thereto.

[0120] For example, multiple first-1 connection lines 121a can be disposed on the first protective layer 113. These multiple first-1 connection lines 121a can be electrically connected to the pixel driving circuit PD. The multiple first-1 connection lines 121a can transmit the voltage output by the pixel driving circuit PD to the first electrode CE1 or the second electrode CE2.

[0121] For example, a second protective layer 114 can be disposed on a first protective layer 113. The second protective layer 114 can be disposed entirely in the effective region AA and the ineffective region NA. In the first ineffective region NA1 and the second ineffective region NA2, the second protective layer 114 can cover the side surface and top surface of the first protective layer 113.

[0122] The second protective layer 114 may be made of an organic insulating material. For example, the second protective layer 114 may be configured with photoresist, polyimide (PI), or photoacrylic acid-based materials, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first protective layer 113 and the second protective layer 114 may be configured with the same material, but the exemplary embodiments of this disclosure are not limited thereto.

[0123] Multiple first-second connection lines 121b can be disposed on the second protective layer 114. The first-second connection lines 121b can be connected indirectly or directly to the pixel driving circuit PD. For example, a portion of the first-second connection line 121b can be directly connected to the pixel driving circuit PD through a contact hole in the second protective layer 114. Another portion of the first-second connection line 121b can be electrically connected to the first-first connection line 121a through a contact hole in the second protective layer 114, but exemplary embodiments of this disclosure are not limited thereto. The voltage output by the pixel driving circuit PD can be transmitted to the first electrode CE1 or the second electrode CE2 through connection lines other than the first-second connection lines 121b.

[0124] Multiple organic insulating layers can be disposed on the substrate 110 in each of the effective region AA and the ineffective region NA, and can be disposed on multiple first-second connection lines 121b. For example, the multiple organic insulating layers may include a first insulating layer 115a, a second insulating layer 115b, and a third insulating layer 115c. Multiple first pad electrodes PE1 can be disposed on the multiple organic insulating layers in the ineffective region NA. At least one of the multiple organic insulating layers extends between the pixel driving circuit PD and the multiple micro LEDs ED in the effective region AA. The top layer of the multiple organic insulating layers in the effective region AA and the top layer of the multiple organic insulating layers in the ineffective region NA can be disposed on the same layer, and in the ineffective region NA, the first pad electrodes PE1 can be configured to contact the top layer of the organic insulating layer. The top layers of the multiple organic insulating layers in the ineffective region NA and the top layers of the multiple organic insulating layers in the effective region AA can be connected to each other and formed of the same material.

[0125] The first insulating layer 115a can be disposed on the pixel driving circuit PD in the effective region AA, and can also be disposed on the substrate 110 in the second ineffective region NA2 (or pad region). The first insulating layer 115a can be disposed on multiple first-second connection lines 121b. The first insulating layer 115a can be disposed entirely in the effective region AA and the ineffective region NA, but the exemplary embodiments of this disclosure are not limited thereto. The first insulating layer 115a can be made of an organic insulating material, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first insulating layer 115a can be configured with photoresist, polyimide (PI) or acrylic-based materials, but the exemplary embodiments of this disclosure are not limited thereto.

[0126] Multiple first-to-third connecting wires 121c can be disposed on the first insulating layer 115a. Multiple first-to-third connecting wires 121c can be electrically connected to multiple first-to-second connecting wires 121b. For example, the first-to-third connecting wires 121c can be electrically connected to the first-to-second connecting wires 121b through contact holes in the first insulating layer 115a.

[0127] The second insulating layer 115b can be disposed on multiple first-to-third connection lines 121c. The second insulating layer 115b can be disposed in at least a portion of the inactive region NA, but exemplary embodiments of this disclosure are not limited thereto. For example, the second insulating layer 115b can be disposed in the active region AA, the first inactive region NA1, and the second inactive region NA2, and can be disposed in at least a portion of the curved region BA, but exemplary embodiments of this disclosure are not limited thereto. For example, the second insulating layer 115b can be disposed on the first insulating layer 115a in the active region AA and the second inactive region NA2 (or pad region). For example, the portion of the second insulating layer 115b disposed in the curved region BA can be removed. Therefore, in the curved region BA, the top surface of the first insulating layer 115a can be exposed by the second insulating layer 115b, but exemplary embodiments of this disclosure are not limited thereto. In the inactive region NA, the second insulating layer 115b can be configured to cover the side surfaces of the first insulating layer 115a, but exemplary embodiments of this disclosure are not limited thereto. The second insulating layer 115b can be made of an organic insulating material, but exemplary embodiments of this disclosure are not limited thereto. For example, the second insulating layer 115b may be configured with photoresist, polyimide (PI) or acrylic-based materials, but exemplary embodiments of this disclosure are not limited thereto.

[0128] Multiple first-to-fourth connecting wires 121d can be disposed on the second insulating layer 115b. Multiple first-to-fourth connecting wires 121d can be electrically connected to multiple first-to-third connecting wires 121c. For example, the first-to-fourth connecting wires 121d can be electrically connected to the first-to-third connecting wires 121c through contact holes in the second insulating layer 115b.

[0129] According to this disclosure, in the non-effective area NA, multiple second connection lines 122 may be disposed on the first protective layer 113. The multiple second connection lines 122 may be from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 (see [link to relevant documentation]). Figure 1 The signal transmitted to the pad unit PAD is routed to the pixel driving circuit PD in the effective area AA. For example, multiple second connection lines 122 are electrically connected to multiple first pad electrodes PE1 to apply signals from the flexible circuit board (or flexible film) 400 and the printed circuit board 500.

[0130] For example, multiple second connection lines 122 extend from the pad unit PAD toward the active area AA to transmit signals to the wiring of the active area AA. In this case, the multiple second connection lines 122 can be used as link lines LL. The multiple second connection lines 122 may include second-1 connection line 122a, second-2 connection line 122b, second-3 connection line 122c, and second-4 connection line 122d.

[0131] Multiple second-first connection lines 122a can be disposed on the first protective layer 113. These multiple second-first connection lines 122a can extend from the second inactive region NA2 to the curved region BA and the first inactive region NA1. The multiple second-first connection lines 122a can transmit signals from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 to the pad unit PAD to the pixel driving circuit PD in the active region AA. For example, the multiple second-first connection lines 122a can be disposed on the same layer as the multiple first-first connection lines 121a. For example, the multiple second-first connection lines 122a can be formed of the same material as the multiple first-first connection lines 121a.

[0132] Multiple second-second connection lines 122b can be disposed on the second protective layer 114. Multiple second-second connection lines 122b can be disposed in the second inactive area NA2. The second-second connection lines 122b can be electrically connected to the second-first connection line 122a through contact holes in the second protective layer 114. Therefore, signals from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 can be transmitted to the second-first connection line 122a through the second-second connection lines 122b. For example, the multiple second-second connection lines 122b can be disposed on the same layer as the multiple first-second connection lines 121b. For example, the multiple second-second connection lines 122b can be formed of the same material as the multiple first-second connection lines 121b.

[0133] The second-third connecting line 122c can be disposed on the first insulating layer 115a. Multiple second-third connecting lines 122c can be disposed in the second inactive area NA2. The second-third connecting line 122c can be electrically connected to the second-second connecting line 122b through contact holes in the first insulating layer 115a. Therefore, signals from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 can be transmitted to the second-first connecting line 122a through the second-third connecting line 122c and the second-second connecting line 122b. For example, the second-third connecting line 122c can be disposed on the same layer as the first-third connecting line 121c. For example, multiple second-third connecting lines 122c can be formed of the same material as multiple first-third connecting lines 121c.

[0134] The second-fourth connection line 122d can be disposed on the second insulating layer 115b. Multiple second-fourth connection lines 122d can be disposed in the second inactive area NA2. The second-fourth connection line 122d can be electrically connected to the second-third connection line 122c through contact holes in the second insulating layer 115b. Therefore, signals from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 can be transmitted to the second-first connection line 122a through the second-fourth connection line 122d, the second-third connection line 122c, and the second-second connection line 122b. For example, multiple second-fourth connection lines 122d can be disposed on the same layer as multiple first-fourth connection lines 121d. For example, the second-fourth connection lines 122d can be formed of the same material as the first-fourth connection lines 121d.

[0135] The plurality of first connecting lines 121 and the plurality of second connecting lines 122 can be formed of any of the conductive materials with excellent ductility or various conductive materials used in the effective region AA. For example, the second connecting lines 122, which are partially disposed in the curved region BA, can be made of conductive materials with excellent ductility such as gold (Au), silver (Ag), or aluminum (Al), but the exemplary embodiments of this disclosure are not limited thereto. As another example, the plurality of first connecting lines 121 and the plurality of second connecting lines 122 can be made of alloys or alloys of molybdenum (Mo), chromium (Cr), titanium (Ti), nickel (Ni), neodymium (Nd), copper (Cu), silver (Ag), and magnesium (Mg), but the exemplary embodiments of this disclosure are not limited thereto.

[0136] The third insulating layer 115c may be disposed on a plurality of first connecting lines 121 and a plurality of second connecting lines 122. The third insulating layer 115c may be disposed entirely within the active region AA and the inactive region NA, but exemplary embodiments of this disclosure are not limited thereto. For example, the third insulating layer 115c may be disposed on the second insulating layer 115b of the active region AA and the second inactive region NA2 (or pad region). The third insulating layer 115c may be composed of an organic insulating material, but exemplary embodiments of this disclosure are not limited thereto. For example, the third insulating layer 115c may be configured with photoresist, polyimide (PI), or acrylic-based materials, but exemplary embodiments of this disclosure are not limited thereto.

[0137] Multiple barrier BNKs can be disposed on the third insulating layer 115c in the effective area AA. Multiple barrier BNKs can be configured to overlap with each of the multiple sub-pixels. One or more micro LEDs of the same type can be disposed above each of the multiple barrier BNKs.

[0138] Multiple signal lines TL can be disposed on the third insulation layer 115c within the effective area AA. Multiple signal lines TL can be disposed in the area between multiple partition walls BNK. For example, multiple signal lines TL can be disposed adjacent to any one of the multiple partition walls BNK. Multiple signal lines TL can be electrically connected to multiple first-to-fourth connection lines 121d. For example, multiple signal lines TL can be electrically connected to the first-to-fourth connection lines 121d through contact holes in the third insulation layer 115c.

[0139] Multiple contact electrodes CCE can be disposed on the third insulating layer 115c in the effective area AA. The multiple contact electrodes CCE can provide cathode voltage from the pixel driving circuit PD to the second electrode CE2.

[0140] The first electrode CE1 can be disposed on the partition BNK. For example, the first electrode CE1 can be configured to extend from the adjacent signal line TL toward the top of the partition BNK. The first electrode CE1 can be disposed on the top surface and side surface of the partition BNK. For example, the first electrode CE1 can be configured to extend from the signal line TL on the top surface of the third insulating layer 115c to the side surface and top surface of the partition BNK.

[0141] refer to Figure 9 The first electrode CE1 may be configured with multiple conductive layers. For example, the first electrode CE1 may include a first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d, but exemplary embodiments of this disclosure are not limited thereto.

[0142] The first conductive layer CE1a can be disposed on the spacer BNK. The second conductive layer CE1b can be disposed on the first conductive layer CE1a. The third conductive layer CE1c can be disposed on the second conductive layer CE1b. The fourth conductive layer CE1d can be disposed on the third conductive layer CE1c. For example, the first conductive layer CE1a, the second conductive layer CE1b, the third conductive layer CE1c, and the fourth conductive layer CE1d can be made of titanium (Ti), molybdenum (Mo), aluminum (Al), or titanium (Ti) and indium tin oxide (ITO), but the exemplary embodiments of this disclosure are not limited thereto.

[0143] According to this disclosure, some of the conductive layers with good reflectivity among the plurality of conductive layers constituting the first electrode CE1 can be configured as alignment keys for aligning the micro-LED ED and / or a reflector. For example, the second conductive layer CE1b among the plurality of conductive layers of the first electrode CE1 may include a reflective material. For example, the second conductive layer CE1b may include aluminum (Al), but exemplary embodiments of this disclosure are not limited thereto. Therefore, the second conductive layer CE1b can be configured as a reflector. Furthermore, the second conductive layer CE1b has high reflectivity to be easily identifiable during the manufacturing process, such that the position or relocation position of the micro-LED ED can be aligned based on the second conductive layer CE1b.

[0144] For example, to configure the second conductive layer CE1b as a reflector, the third conductive layer CE1c and the fourth conductive layer CE1d covering the second conductive layer CE1b can be partially removed or etched. For example, a portion of the third conductive layer CE1c and the fourth conductive layer CE1d disposed on the partition BNK can be removed or etched to expose the top surface of the second conductive layer CE1b. For example, the central and edge portions (or boundary portions) of the third conductive layer CE1c and the fourth conductive layer CE1d, where the solder pattern SDP is disposed, can be retained, and the remaining portions can be removed. For example, the edge portions (or boundary portions) of each of the third conductive layer CE1c formed of titanium (Ti) and the fourth conductive layer CE1d formed of indium tin oxide (ITO) can be left unetched. Therefore, corrosion of the other conductive layer of the first electrode CE1 caused by the tetramethylammonium hydroxide (TMAH) solution used in the masking process for the first electrode CE1 can be suppressed.

[0145] According to this disclosure, the first conductive layer CE1a and the third conductive layer CE1c may comprise titanium (Ti) or molybdenum (Mo). The second conductive layer CE1b may comprise aluminum (Al). The fourth conductive layer CE1d may comprise a transparent conductive oxide layer, such as indium tin oxide (ITO) or indium zinc oxide (IZO), which is bonded to the solder pattern SPD and has corrosion resistance and acid resistance, but the exemplary embodiments of this disclosure are not limited thereto.

[0146] A first conductive layer CE1a, a second conductive layer CE1b, a third conductive layer CE1c, and a fourth conductive layer CE1d are deposited sequentially, followed by photolithography and etching processes to pattern the material. However, exemplary embodiments of this disclosure are not limited thereto.

[0147] According to this specification, the signal line TL, contact electrode CCE, and first pad electrode PE1 disposed on the same layer as the first electrode CE1 can be made of multilayer conductive materials, but the exemplary embodiments of this disclosure are not limited thereto. For example, the signal line TL, contact electrode CCE, and first pad electrode PE1 can be formed of multilayer indium tin oxide (ITO) / titanium (Ti) / aluminum (Al) / titanium (Ti), but the exemplary embodiments of this disclosure are not limited thereto.

[0148] According to this disclosure, in each of a plurality of sub-pixels, a solder pattern SDP can be disposed on a first electrode CE1. The solder pattern SDP can be disposed between the first electrode CE1 and the anode electrode 134 of the micro-LED ED. The solder pattern SDP bonds the micro-LED ED to the first electrode CE1 to electrically connect the first electrode CE1 and the micro-LED ED. For example, the first electrode CE1 and the anode electrode 134 of the micro-LED ED can be electrically connected via eutectic bonding using the solder pattern SDP, but exemplary embodiments of this disclosure are not limited thereto. For example, when the solder pattern SDP is configured with indium (In) and the anode electrode 134 of the micro-LED ED is configured with gold (Au), the solder pattern SDP and the anode electrode 134 are bonded by applying heat and pressure during the transfer process of the micro-LED ED. The micro-LED ED can be bonded to the solder pattern SDP and the first electrode CE1 using eutectic bonding without a separate adhesive material. For example, the solder pattern SDP can be configured with indium (Id), tin (Sn), or alloys thereof, but exemplary embodiments of this disclosure are not limited thereto. For example, the solder pattern SDP can be a bonding pad or an adhesive pad, but exemplary embodiments of this disclosure are not limited thereto.

[0149] According to this specification, passivation layer 116 can be disposed on multiple signal lines TL, multiple first electrodes CE1, multiple contact electrodes CCE, and a third insulating layer 115c. For example, passivation layer 116 can be disposed in an active region AA, a first inactive region NA1, and a second inactive region NA2. For example, passivation layer can be disposed on multiple organic insulating layers in inactive region NA. The portion of passivation layer 116 disposed in the curved region BA can be removed. In the second inactive region NA2, passivation layer 116 can overlap with at least some of the multiple first pad electrodes PE1. For example, the portion of passivation layer 116 covering the multiple first pad electrodes PE1 can be removed. In the second inactive region NA2, at least a portion of passivation layer 116 can be disposed in an opening region (e.g., a hole H) of the third insulating layer 115c. For example, passivation layer 116 can be configured to overlap with at least a portion of the first pad electrodes PE1 and multiple holes H. For example, in the second ineffective region NA2, a portion of the passivation layer 116 disposed in the hole H of the third insulating layer 115c can be removed. The passivation layer 116 is configured to cover the remaining region except for the region where the curved region BA, the plurality of first pad electrodes PE1, and the solder pattern SDP are disposed, to reduce the penetration of moisture or impurities introduced into the micro LED ED. For example, the passivation layer 116 may be configured as a single layer or multiple layers of silicon oxide (SiOx) or silicon nitride (SiNx), but exemplary embodiments of the present disclosure are not limited thereto. For example, the passivation layer 116 may be a protective layer or an insulating layer, but exemplary embodiments of the present disclosure are not limited thereto. For example, the passivation layer 116 may include holes through which the solder pattern SDP is exposed.

[0150] In each of the multiple sub-pixels, a micro-LED ED can be disposed on the solder pattern SDP. A first micro-LED 130 can be disposed in the first sub-pixel SP1. A second micro-LED 140 can be disposed in the second sub-pixel SP2. A third micro-LED 150 can be disposed in the third sub-pixel SP3.

[0151] Micro-LEDs can be formed on silicon wafers using metal-organic chemical vapor deposition (MOCVD), chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), or sputtering methods. However, exemplary embodiments of this disclosure are not limited thereto.

[0152] Reference Figure 9The first micro-LED 130 may include an anode electrode 134, a first semiconductor layer 131 disposed on the anode electrode 134, an active layer 132 disposed on the first semiconductor layer 131, a second semiconductor layer 133 disposed on the active layer 132, a cathode electrode 135 disposed on the second semiconductor layer 133, and an encapsulation film 136, but exemplary embodiments of the present disclosure are not limited thereto. For example, the encapsulation film 136 may not be included in the first micro-LED 130.

[0153] The first semiconductor layer 131 can be disposed on the solder pattern SDP. The second semiconductor layer 133 can be disposed on the first semiconductor layer 131.

[0154] For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be implemented using a compound semiconductor such as a group III-V or group II-VI semiconductor, and may be doped with impurities (or dopants). For example, one of the first semiconductor layer 131 and the second semiconductor layer 133 may be an n-type impurity-doped semiconductor layer, and the other may be a p-type impurity-doped semiconductor layer, but the exemplary embodiments of this disclosure are not limited thereto. For example, one or more of the first semiconductor layer 131 and the second semiconductor layer 133 may be layers doped with n-type or p-type impurities on a material such as gallium nitride (GaN), gallium phosphide (GaP), gallium arsenide phosphide (GaAsP), aluminum gallium indium phosphide (AlGaInP), indium aluminum phosphide (InAlP), aluminum gallium nitride (AlGaN), aluminum indium nitride (AlInN), aluminum indium gallium nitride (AlInGaN), aluminum gallium arsenide (AlGaAs), or gallium arsenide (GaAs). However, the exemplary embodiments of this disclosure are not limited thereto. For example, n-type impurities can be silicon (Si), germanium (Ge), selenium (Se), carbon (C), tellurium (Te), or tin (Sn), but exemplary embodiments of this disclosure are not limited thereto. For example, p-type impurities can be magnesium (Mg), zinc (Zn), calcium (Ca), strontium (Sr), barium (Ba), or beryllium (Be), but exemplary embodiments of this disclosure are not limited thereto.

[0155] For example, the first semiconductor layer 131 and the second semiconductor layer 133 may be nitride semiconductors including n-type impurities or nitride semiconductors including p-type impurities, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first semiconductor layer 131 may be a nitride semiconductor including p-type impurities, and the second semiconductor layer 133 may be a nitride semiconductor including n-type impurities, but the exemplary embodiments of this disclosure are not limited thereto.

[0156] An active layer 132 may be disposed between a first semiconductor layer 131 and a second semiconductor layer 133. Holes and electrons are supplied from the first semiconductor layer 131 and the second semiconductor layer 133 to the active layer 132 to emit light. For example, the active layer 132 may be configured as a single-well structure, a multi-well structure, a signal quantum well structure, a multiple quantum well (MQW) structure, a quantum dot structure, and a quantum wire structure, but the exemplary embodiments of this disclosure are not limited thereto. For example, the active layer 132 may be made of indium gallium nitride (InGaN) or gallium nitride (GaN), but the exemplary embodiments of this disclosure are not limited thereto.

[0157] As another example, the active layer 132 may have a multiple quantum well (MQW) structure having a well layer and a barrier layer with a band gap higher than the well layer. For example, in the active layer 132, InGaN may be configured as the well layer and AlGaN layer may be configured as the barrier layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0158] An anode electrode 134 may be disposed between the first semiconductor layer 131 and the solder pattern SDP. For example, the anode electrode 134 may be electrically connected to the first semiconductor layer 131 and the first electrode CE1. The anode voltage output from the pixel driving circuit PD may be applied to the first semiconductor layer 131 through the signal line TL, the first electrode CE1, and the anode electrode 134. For example, the anode electrode 134 may be configured with a conductive material capable of forming a eutectic bond with the solder pattern SDP, but exemplary embodiments of the present disclosure are not limited thereto. For example, the anode electrode 134 may be configured with gold (Au), tin (Sn), tungsten (W), silicon (Si), silver (Ag), titanium (Ti), iridium (Ir), chromium (Cr), indium (In), zinc (Zn), lead (Pb), nickel (Ni), platinum (Pt), and copper (Cu), or alloys thereof, but exemplary embodiments of the present disclosure are not limited thereto.

[0159] A cathode electrode 135 may be disposed on the second semiconductor layer 133. For example, the cathode electrode 135 may be electrically connected to the second semiconductor layer 133 and the second electrode CE2. The cathode voltage output from the pixel driving circuit PD may be applied to the second semiconductor layer 133 through the contact electrode CCE, the second electrode CE2, and the cathode electrode 135. The cathode electrode 135 may be configured with a transparent conductive material to allow light emitted from the micro LED ED to be guided to the top of the micro LED ED, but exemplary embodiments of this disclosure are not limited thereto. For example, the cathode electrode 135 may be configured with a material such as indium tin oxide (ITO), indium zinc oxide (IZO), or indium gallium zinc oxide (IGZO), but exemplary embodiments of this disclosure are not limited thereto.

[0160] The encapsulation film 136 may be disposed in at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135. For example, the encapsulation film 136 may surround at least a portion of the first semiconductor layer 131, the active layer 132, the second semiconductor layer 133, the anode electrode 134, and the cathode electrode 135.

[0161] For example, the encapsulation film 136 can protect the first semiconductor layer 131, the active layer 132, and the second semiconductor layer 133. For example, the encapsulation film 136 can be disposed on the side surface of the first semiconductor layer 131, the side surface of the active layer 132, and the side surface of the second semiconductor layer 133.

[0162] For example, the encapsulation film 136 may be disposed on at least a portion of the anode electrode 134 and the cathode electrode 135, for example, on the edge portion (or boundary portion or side) of the anode electrode 134 and the edge portion (or boundary portion or side) of the cathode electrode 135. At least a portion of the anode electrode 134 may be exposed from the encapsulation film 136, allowing the anode electrode 134 and the solder pattern SDP to be connected. For example, at least a portion of the cathode electrode 135 may be exposed from the encapsulation film 136, allowing the cathode electrode 135 and the second electrode CE2 to be connected. For example, the encapsulation film 136 may be formed of an insulating material such as silicon nitride (SiNx) or silicon oxide (SiOx), but exemplary embodiments of this disclosure are not limited thereto.

[0163] As another example, the encapsulation film 136 may have a structure in which reflective material is dispersed in a resin layer, but the exemplary embodiments of this disclosure are not limited thereto. For example, the encapsulation film 136 may be made of a reflector having various structures, but the exemplary embodiments of this disclosure are not limited thereto. Light emitted from the active layer 132 can be reflected upward by the encapsulation film 136, thereby improving light extraction efficiency. For example, the encapsulation film 136 may be a reflective layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0164] According to this specification, the micro LED ED can have a vertical structure, but the exemplary embodiments disclosed herein are not limited thereto. For example, the micro LED ED can also have a lateral structure or a flip-chip structure.

[0165] Already referenced Figure 9 A first micro-LED 130 is described, and a second micro-LED 140 and a third micro-LED 150 may have substantially the same structure as the first micro-LED 130. For example, the second micro-LED 140 and the third micro-LED 150 may be substantially the same as the first semiconductor layer 131, active layer 132, second semiconductor layer 133, anode electrode 134, cathode electrode 135 and encapsulation film 136 of the first micro-LED 130.

[0166] According to this specification, a first optical layer 117a can be provided in the effective area AA, surrounding multiple micro-LEDs. For example, the first optical layer 117a can be configured to cover multiple micro-LEDs and spacers BNK in a region of multiple sub-pixels. For example, the first optical layer 117a can cover the spacers BNK, a portion of the passivation layer 116, and the spaces between the multiple micro-LEDs. The first optical layer 117a can be provided or covered between the multiple micro-LEDs and between the multiple spacers BNK included in a pixel PX. (See also...) Figure 5 For example, the first optical layers 117a extend in a first direction X and are spaced apart from each other in a second direction Y. For example, the first optical layers 117a may be configured to surround the side portion of the micro-LED ED and the spacer BNK between the passivation layer 116 and the second electrode CE2, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first optical layer 117a may be a diffuse layer or a sidewall diffuse layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0167] The first optical layer 117a may include an organic insulating material in which microparticles are dispersed, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first optical layer 117a may be configured with siloxane in which micro-metal particles such as titanium dioxide (TiO2) particles are dispersed, but the exemplary embodiments of this disclosure are not limited thereto. Light from the plurality of micro-LEDs is scattered by the microparticles dispersed in the first optical layer 117a to be emitted to the outside of the display device 1000. Therefore, the first optical layer 117a can improve the extraction efficiency of light emitted from the plurality of micro-LEDs.

[0168] For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX or disposed together in some pixels PX arranged in the same row, but the exemplary embodiments of the present disclosure are not limited thereto. For example, the first optical layer 117a may be disposed in each of the plurality of pixels PX, or the plurality of pixels PX may share a first optical layer 117a. As another example, each sub-pixel may include a first optical layer 117a, but the exemplary embodiments of the present disclosure are not limited thereto.

[0169] According to this disclosure, in the effective region AA, the second optical layer 117b may be disposed on the passivation layer 116. For example, the second optical layer 117b may be configured to surround the first optical layer 117a. For example, the second optical layer 117b may contact the side surface of the first optical layer 117a. For example, the second optical layer 117b may be disposed in the region between a plurality of pixels PX. However, exemplary embodiments of this disclosure are not limited thereto. For example, the second optical layer 117b may be a diffuse layer, a diffuse layer window, or a window diffuse layer, but exemplary embodiments of this disclosure are not limited thereto.

[0170] The second optical layer 117b may be made of an organic insulating material, but the exemplary embodiments of this disclosure are not limited thereto. The second optical layer 117b may be configured with the same material as the first optical layer 117a, but the exemplary embodiments of this disclosure are not limited thereto. For example, the first optical layer 117a may include microparticles, but the second optical layer 117b may not include microparticles. For example, the second optical layer 117b may be made of siloxane, but the exemplary embodiments of this disclosure are not limited thereto.

[0171] For example, the thickness of the first optical layer 117a may be less than the thickness of the second optical layer 117b, but the exemplary embodiments of this disclosure are not limited thereto. Therefore, in a plan view, the region where the first optical layer 117a is disposed may include a recess that is recessed inward from the upper surface of the second optical layer 117b.

[0172] According to this disclosure, the second electrode CE2 can be disposed on the first optical layer 117a and the second optical layer 117b. For example, the second electrode CE2 can be electrically connected to a plurality of contact electrodes CCE through contact holes in the second optical layer 117b. For example, the second electrode CE2 can be disposed on a plurality of micro LEDs ED. For example, the second electrode CE2 can include a transparent conductive oxide, such as indium tin oxide (ITO) or indium zinc oxide (IZO), but exemplary embodiments of this disclosure are not limited thereto. For example, the second electrode CE2 can be configured to contact the cathode electrode 135. For example, the second electrode CE2 can overlap the first optical layer 117a. For example, the second electrode CE2 can cover the outer plane of the first optical layer 117a.

[0173] refer to Figure 7 For example, the second electrode CE2 can extend continuously to the first direction X of the substrate 110. Therefore, the second electrode can be jointly connected to a plurality of pixels PX disposed along the first direction X of the substrate 110. For example, the second electrode CE2 can be jointly connected to a plurality of pixels PX.

[0174] According to this specification, the second electrode CE2 can extend continuously over the first optical layer 117a, the second optical layer 117b, and the micro LEDED. The region where the first optical layer 117a is disposed may include a recess that is recessed inward from the upper surface of the second optical layer 117b. Therefore, a first portion of the second electrode CE2 disposed on the first optical layer 117a is disposed along the recess, such that the first portion can be configured to be lower than the second portion of the second electrode CE2 disposed on the second optical layer 117b.

[0175] A third optical layer 117c can be disposed on the second electrode CE2. The third optical layer 117c can be configured to overlap with the plurality of micro-LEDs and the first optical layer 117a. The third optical layer 117c is disposed above the second electrode CE2 and the plurality of micro-LEDs, thereby reducing mura that can occur in a portion of the plurality of micro-LEDs. For example, when the plurality of micro-LEDs are transferred onto the substrate 110 of the display device 1000, uneven spacing between the plurality of micro-LEDs may occur due to process variations. When the spacing between the plurality of micro-LEDs is uneven, the emission area of ​​each of the plurality of micro-LEDs is unevenly distributed, making the mura visible to the user. Therefore, the third optical layer 117c, configured to uniformly scatter light, is disposed above the plurality of micro-LEDs, thereby reducing the light emitted from some of the micro-LEDs that is visible as mura. Thus, the light emitted from the plurality of micro-LEDs is uniformly diffused by the third optical layer 117c to be extracted to the outside of the display device 1000, thereby improving the brightness uniformity of the display device 1000.

[0176] The third optical layer 117c may be configured with an organic insulating material in which microparticles are dispersed, but the exemplary embodiments of this disclosure are not limited thereto. For example, the third optical layer 117c may be configured with a siloxane in which micro-metallic particles such as titanium dioxide (TiO2) particles are dispersed, but the exemplary embodiments of this disclosure are not limited thereto. For example, the third optical layer 117c may be configured with the same material as the first optical layer 117a, but the exemplary embodiments of this disclosure are not limited thereto. For example, the third optical layer 117c may be a diffuse layer or an upward diffuse layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0177] According to this specification, light from multiple micro-LEDs is scattered by microparticles in the third optical layer 117c to be emitted to the outside of the display device 1000. The third optical layer 117c uniformly mixes the light emitted from the multiple micro-LEDs to further improve the brightness uniformity of the display device 1000. The light extraction efficiency of the display device 1000 can be improved by the light scattered from the multiple microparticles, allowing the display device 1000 to be driven at low power.

[0178] Within the effective area AA, a black matrix BM can be disposed on the second electrode CE2, the first optical layer 117a, the second optical layer 117b, and the third optical layer 117c. For example, the contact hole of the second optical layer 117b can be filled with the black matrix BM. The black matrix BM is used to cover the effective area AA to reduce color mixing of light from multiple sub-pixels and reflection of external light. For example, the black matrix BM is disposed in the contact hole connecting the second electrode CE2 and the contact electrode CCE to suppress light leakage between multiple adjacent sub-pixels.

[0179] For example, the black matrix BM can be made of an opaque material, but the exemplary embodiments of this disclosure are not limited thereto. For example, the black matrix BM can be made of an organic insulating material with added black pigment or black dye, but the exemplary embodiments of this disclosure are not limited thereto.

[0180] Within the effective region AA, a cover layer 118 may be disposed on the black matrix BM. The cover layer 118 may protect the configuration beneath it. For example, the cover layer 118 may be made of an organic insulating material, but the exemplary embodiments of this disclosure are not limited thereto. For example, the cover layer 118 may be configured with photoresist, polyimide (PI), or photoacrylic-based materials, but the exemplary embodiments of this disclosure are not limited thereto. For example, the cover layer 118 may be a cover layer or an insulating layer, but the exemplary embodiments of this disclosure are not limited thereto.

[0181] The polarizing layer 293 can be disposed on the cover layer 118 via the first adhesive layer 291. The cover member 200 can be disposed on the polarizing layer 293 via the second adhesive layer 295. For example, the first adhesive layer 291 and the second adhesive layer 295 may include optically transparent adhesive (OCA), optically transparent resin (OCR), or pressure-sensitive adhesive (PSA), but exemplary embodiments of this disclosure are not limited thereto.

[0182] According to this specification, a plurality of first pad electrodes PE1 may be disposed on a third insulating layer 115c in a second inactive region NA2. For example, at least some of the plurality of first pad electrodes PE1 may be exposed from a passivation layer 116. For example, the plurality of first pad electrodes PE1 may be electrically connected to the second-fourth connection line 122d through contact holes in the third insulating layer 115c. See also... Figure 3 For example, multiple first pad electrodes PE1 extend toward the effective area AA in the second direction Y and are spaced apart from each other in the first direction X perpendicular to the second direction Y.

[0183] In the second ineffective region NA2, the total thickness of the plurality of organic insulating layers beneath the first pad electrode PE1 varies in each region. In the second ineffective region NA2, the total thickness of the plurality of organic insulating layers in the region overlapping with the plurality of first pad electrodes PE1 is greater than the total thickness of the plurality of organic insulating layers in the region between the plurality of first pad electrodes PE1, the plurality of first pad electrodes PE1 being spaced apart from each other in the first direction X.

[0184] For example, a first insulating layer 115a, a second insulating layer 115b, and a third insulating layer 115c may be sequentially disposed below a plurality of first pad electrodes PE1. In this case, in the regions between the plurality of first pad electrodes PE1 that do not overlap with the plurality of first pad electrodes PE1, the third insulating layer 115c may include a plurality of insulating patterns formed by etching at least a portion of the top surface. A plurality of opening regions, such as a plurality of grooves or a plurality of holes H, may be formed from the plurality of insulating patterns between the plurality of first pad electrodes PE1. As described above, the plurality of opening regions are formed in a portion of the third insulating layer 115c, thereby reducing the overall thickness of the plurality of organic insulating layers in the regions where the plurality of opening regions are formed.

[0185] As another example, the third insulating layer 115c may include multiple opening regions (e.g., vias H) formed between the plurality of first pad electrodes PE1. In regions overlapping with the plurality of first pad electrodes PE1, the first insulating layer 115a, the second insulating layer 115b, and the third insulating layer 115c may be provided. Conversely, in regions not overlapping with the plurality of first pad electrodes PE1, the first insulating layer 115a and the second insulating layer 115b may be provided. As described above, the third insulating layer 115c may not be provided in at least a portion of the regions not overlapping with the plurality of first pad electrodes PE1. In the ineffective region NA, at least a portion of the top surface of the second insulating layer 115b (i.e., the layer disposed below the top layer of the plurality of organic insulating layers) may be exposed through the multiple opening regions. As described above, the number of the plurality of organic insulating layers disposed in the regions overlapping with the plurality of first pad electrodes PE1 may differ from the number of the plurality of organic insulating layers disposed in the regions not overlapping with the plurality of first pad electrodes PE1.

[0186] Multiple holes H can be positioned between multiple first pad electrodes PE1 (see...) Figure 10 For example, refer to together. Figure 3 The plurality of holes H may extend toward the effective region AA in the second direction Y. As another example, one end of the plurality of holes H may be adjacent to one end of the second pad electrode PE2 included in the flexible circuit board, but exemplary embodiments of the present disclosure are not limited thereto.

[0187] The passivation layer 116 may be disposed in a portion of the plurality of holes H. For example, the passivation layer 116 may be removed from a portion of the plurality of holes H, but the exemplary embodiments of this disclosure are not limited thereto. The width of the plurality of holes H may decrease toward the lower substrate 110, but the exemplary embodiments of this disclosure are not limited thereto.

[0188] An adhesive layer ACF may be disposed on a plurality of first pad electrodes PE1. The adhesive layer ACF may be an adhesive layer in which conductive adhesive members are dispersed in an insulating material, and may be, for example, an anisotropic conductive film, but exemplary embodiments of this disclosure are not limited thereto. The conductive adhesive members may include a plurality of conductive balls CB. Therefore, when heat or pressure is applied to the adhesive layer ACF, the plurality of conductive balls CB are electrically connected in the portions where heat or pressure is applied to have conductive properties.

[0189] An adhesive layer ACF is disposed between a plurality of first pad electrodes PE1 and a flexible circuit board (or flexible film) 400, such that a plurality of second pad electrodes PE2 of the flexible circuit board (or flexible film) 400 can be attached to or bonded to the plurality of first pad electrodes PE1. Therefore, the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 of the flexible circuit board (or flexible film) 400 can be electrically connected to each other. For example, at least one conductive ball CB can contact the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2, but exemplary embodiments of this disclosure are not limited thereto. Figure 8 As shown, in the non-active region NA, a flexible circuit board (or flexible film) 400 can be disposed on multiple first pad electrodes PE1. Conductive adhesive members can be disposed between the multiple first pad electrodes PE1 and the flexible circuit board (or flexible film) 400. The conductive adhesive members can be configured to fill multiple open areas (e.g., holes H). Some of the conductive balls in the multiple conductive balls CB can be disposed in the multiple holes H.

[0190] The adhesive layer ACF can be configured to fill the plurality of holes H disposed between the plurality of first pad electrodes PE1. Therefore, some of the plurality of conductive balls CB can be dispersed within the plurality of holes H. For example, some of the plurality of conductive balls CB can be disposed in the space formed between the plurality of holes H and the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2, but exemplary embodiments of this disclosure are not limited thereto.

[0191] A flexible circuit board (or flexible film) 400, including a second pad electrode PE2, can be disposed on an adhesive layer ACF. The flexible circuit board (or flexible film) 400 can be electrically connected to multiple first pad electrodes PE1 via the adhesive layer ACF and the second pad electrode PE2 connected thereto. Therefore, signals output from the flexible circuit board (or flexible film) 400 and the printed circuit board 500 can be transmitted to the pixel driving circuit PD of the effective area AA via multiple first pad electrodes PE1, second-4 connection line 122d, second-3 connection line 122c, second-2 connection line 122b, and second-1 connection line 122a.

[0192] As described above, when a pad unit including a flexible circuit board is bonded to a display panel, an adhesive member comprising multiple conductive balls can be used. However, the irregular dispersion of the multiple conductive balls within the adhesive member makes it difficult to control the spacing between them. Consequently, the multiple conductive balls aggregate in the small space formed between the multiple pad electrodes. Furthermore, even if the multiple conductive balls are dispersed to be aligned in a row within the adhesive member, the aligned conductive balls in that row are still concentrated in the small space formed between the multiple pad electrodes. Therefore, the angular gradient of the alignment increases due to interference from the multiple pad electrodes, leading to agglomeration of the multiple conductive balls. As described above, when multiple conductive balls aggregate between the multiple pad electrodes, a short circuit occurs between adjacent pad electrodes. If adjacent pad electrodes are electrically connected by a short circuit, the brightness is uneven compared to normal pixels, and unnecessary signals are applied to cause pixels that should not emit light to do so, resulting in poor display quality of the display device. Moreover, when multiple conductive balls agglomerate between the multiple pad electrodes, the area where the multiple conductive balls agglomerate is susceptible to burn-out caused by external factors. Therefore, the following problem exists: in areas where multiple conductive balls are clustered, burnout due to external factors may be more concentrated than in normal areas where conductive balls are not clustered.

[0193] In the display device 1000 according to an exemplary embodiment of the present disclosure, the total thickness of the plurality of organic insulating layers in the regions overlapping with the plurality of first pad electrodes PE1 is greater than the total thickness of the plurality of organic insulating layers in the regions not overlapping with the plurality of first pad electrodes PE1. For example, the top layer (e.g., the third insulating layer 115c) of the plurality of organic insulating layers between the plurality of first pad electrodes PE1 may include a plurality of holes H disposed between the plurality of first pad electrodes PE1. Therefore, in the display device 1000 according to an exemplary embodiment of the present disclosure, the space between the plurality of first pad electrodes PE1 can be expanded through the plurality of holes H, such that the region in which a plurality of conductive balls CB are dispersed between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 is also expanded. Therefore, sufficient space can be provided between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 to prevent the plurality of conductive balls CB from agglomerating with each other. That is, agglomeration of the plurality of conductive balls CB between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 can be suppressed. By doing so, short circuits between the plurality of first pad electrodes PE1 or the plurality of second pad electrodes PE2 caused by agglomeration of the plurality of conductive balls CB can be suppressed.

[0194] Furthermore, burn-out defects that may be caused by the agglomeration of multiple conductive balls CB between multiple first pad electrodes PE1 and multiple second pad electrodes PE2 can be minimized.

[0195] Furthermore, the display device 1000 according to an exemplary embodiment of the present disclosure suppresses defects generated in the pad unit PAD where a plurality of first pad electrodes PE1 are provided, thereby improving the lifespan of the display device 1000. Therefore, the display device 1000 according to an exemplary embodiment of the present disclosure can be driven efficiently at low power.

[0196] Figure 11 This is a cross-sectional view of a display device 2000 according to another exemplary embodiment of the present disclosure. Figure 11 Is with Figure 8 Cross-sectional view of the same region. Figure 12 This is an enlarged cross-sectional view of a display device 2000 according to another exemplary embodiment of the present disclosure. For example, Figure 11 This is a cross-sectional view of the effective region AA, the first ineffective region NA1, the bending region BA, and the second ineffective region NA2. For example, Figure 12 This is an enlarged cross-sectional view of a portion of the second ineffective region NA2. Apart from the third insulating layer 215c and the fourth insulating layer 215d of the second ineffective region NA2, the display device 2000 according to another exemplary embodiment of this disclosure is configured with… Figure 8 The display device 1000 is basically the same. Therefore, redundant descriptions will be omitted.

[0197] In the second ineffective region NA2 of the display device 2000 according to another exemplary embodiment of the present disclosure, a plurality of organic insulating layers including a first insulating layer 115a, a second insulating layer 115b, a third insulating layer 215c and a fourth insulating layer 215d may be provided.

[0198] The third insulating layer 215c may be disposed on the plurality of first connecting lines 121 and the plurality of second connecting lines 122. The third insulating layer 215c may be entirely disposed in the effective region AA and the ineffective region NA, but exemplary embodiments of this disclosure are not limited thereto. The third insulating layer 215c may be composed of an organic insulating material, but exemplary embodiments of this disclosure are not limited thereto. For example, the third insulating layer 215c may be configured with photoresist, polyimide (PI), or an acrylic-based material, but exemplary embodiments of this disclosure are not limited thereto.

[0199] The third insulating layer 215c can be disposed in the region overlapping with the plurality of first pad electrodes PE1. Alternatively, the third insulating layer 215c can be disposed between the plurality of first pad electrodes PE1 in regions where they do not overlap. For example, in the region overlapping with the plurality of first pad electrodes PE1, a plurality of organic insulating layers including the first insulating layer 115a, the second insulating layer 115b, and the third insulating layer 215c can be disposed below the plurality of first pad electrodes PE1. Alternatively, the first insulating layer 115a, the second insulating layer 115b, and the third insulating layer 215c can also be disposed in regions where they do not overlap with the plurality of first pad electrodes PE1.

[0200] The top surface of the third insulating layer 215c disposed in the region overlapping with the plurality of first pad electrodes PE1 can be disposed on the same plane as the top surface of the third insulating layer 215c disposed between the plurality of first pad electrodes PE1.

[0201] The fourth insulating layer 215d can be disposed on the third insulating layer 215c. (See also...) Figure 3 For example, the plurality of fourth insulating layers 215d may be spaced apart from each other in the first direction X. Therefore, in at least a portion of the region between the plurality of first pad electrodes PE1 that does not overlap with the plurality of first pad electrodes PE1, the fourth insulating layer 215d may not be provided. For example, in the region that overlaps with the plurality of first pad electrodes PE1, the first insulating layer 115a, the second insulating layer 115b, the third insulating layer 215c, and the fourth insulating layer 215d may be provided. In the region between the plurality of first pad electrodes PE1, the first insulating layer 115a, the second insulating layer 115b, and the third insulating layer 215c may be provided.

[0202] Multiple fourth insulating layers 215d are spaced apart from each other in the region between multiple first pad electrodes PE1 to form multiple holes H'. Therefore, at least a portion of the top surface of the third insulating layer 215c can be exposed through the multiple holes H'.

[0203] Let's refer to each other. Figure 3 For example, multiple fourth insulating layers 215d may extend in the second direction Y. Alternatively, one end of each of the multiple fourth insulating layers 215d may protrude from one end of each of the multiple first pad electrodes PE1 in the second direction Y. Therefore, one end of each of the multiple fourth insulating layers 215d may be adjacent to the effective region AA in more ways than one end of each of the multiple first pad electrodes PE1.

[0204] Multiple fourth insulating layers 215d can be disposed on the same layer as multiple dikes BNK of the effective area AA.

[0205] The plurality of fourth insulating layers 215d may be formed of the same material as the plurality of spacers BNK. For example, the fourth insulating layer 215d may be formed of an organic insulating material. For example, the fourth insulating layer 215d may be configured with photoresist, polyimide (PI) or acrylic-based materials, but the exemplary embodiments of this disclosure are not limited thereto.

[0206] The thickness of the plurality of fourth insulating layers 215d may be the same as the thickness of the plurality of spacer BNKs, but the exemplary embodiments of this disclosure are not limited thereto.

[0207] A display device 2000 according to another exemplary embodiment of the present disclosure includes a fourth insulating layer 215d, which is disposed in regions overlapping with a plurality of first pad electrodes PE1. As described above, the fourth insulating layer 215d is not configured such that a plurality of holes H' are disposed between the plurality of first pad electrodes PE1. As described above, the space between the plurality of first pad electrodes PE1 is expanded by the plurality of holes H', such that the region between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 in which a plurality of conductive balls CB are dispersed is also expanded. Therefore, the agglomeration of the plurality of conductive balls CB between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 can be suppressed. Furthermore, short circuits between the plurality of first pad electrodes PE1 or the plurality of second pad electrodes PE2 can be suppressed.

[0208] Furthermore, burn-out defects that may be caused by the agglomeration of multiple conductive balls CB between multiple first pad electrodes PE1 and multiple second pad electrodes PE2 can be minimized.

[0209] Figure 13 This is an enlarged cross-sectional view of a display device according to yet another exemplary embodiment of the present disclosure. For example, Figure 13 This is an enlarged cross-sectional view of a portion of the second ineffective region NA2 of a display device 3000 according to yet another exemplary embodiment of the present disclosure.

[0210] Figure 13 The display device 3000, except for the third insulating layer 315c, has all the same configuration as Figure 11 The display device is basically the same as the 2000, so redundant descriptions will be omitted.

[0211] The third insulating layer 315c may be disposed on the plurality of first connecting lines 121 and the plurality of second connecting lines 122. The third insulating layer 315c may be entirely disposed in the effective region AA and the ineffective region NA, but exemplary embodiments of this disclosure are not limited thereto. The third insulating layer 315c may be composed of an organic insulating material, but exemplary embodiments of this disclosure are not limited thereto. For example, the third insulating layer 315c may be configured with photoresist, polyimide (PI), or an acrylic-based material, but exemplary embodiments of this disclosure are not limited thereto.

[0212] The third insulating layer 315c may include a plurality of additional holes H” formed in the region between a plurality of first pad electrodes PE1 in the second ineffective region NA2. The plurality of additional holes H” may be connected to a plurality of holes H’ formed by a plurality of fourth insulating layers 215d. For example, in a display device 3000 according to yet another exemplary embodiment of the present disclosure, Figure 11 The multiple holes H' of the display device 2000 can extend to the third insulating layer 315c.

[0213] The third insulating layer 315c may be disposed in the region overlapping with the plurality of first pad electrodes PE1. The third insulating layer 315c may not be disposed in the region between the plurality of first pad electrodes PE1. For example, in the region overlapping with the plurality of first pad electrodes PE1, a first insulating layer 115a, a second insulating layer 115b, a third insulating layer 315c, and a fourth insulating layer 215d may be disposed. In the region between the plurality of first pad electrodes PE1 that does not overlap with the plurality of first pad electrodes PE1, a first insulating layer 115a and a second insulating layer 115b may be disposed.

[0214] At least a portion of the top surface of the second insulating layer 115b may be exposed through a plurality of holes H' and a plurality of additional holes H' in the region between the plurality of first pad electrodes PE1.

[0215] Let's refer to each other. Figure 3 For example, multiple additional holes H” can extend in the second direction Y and can be spaced apart from each other in the first direction X. One end of the multiple additional holes H” can be adjacent to the effective area AA, more than one end of the multiple first pad electrodes PE1.

[0216] According to another exemplary embodiment of the present disclosure, the display device 3000 may further include a plurality of additional holes H' connected from a plurality of holes H'. Therefore, the space in which the plurality of conductive balls CB are dispersed can be further extended in the region between the plurality of first pad electrodes PE1. Furthermore, agglomeration of the plurality of conductive balls CB between the plurality of first pad electrodes PE1 and the plurality of second pad electrodes PE2 can be suppressed. Additionally, short circuits between the plurality of first pad electrodes PE1 or the plurality of second pad electrodes PE2 can be suppressed.

[0217] Furthermore, burn-out defects that may be caused by the agglomeration of multiple conductive balls CB between multiple first pad electrodes PE1 and multiple second pad electrodes PE2 can be minimized.

[0218] Figures 14 to 17 This is a view showing an apparatus to which a display device according to an exemplary embodiment of the present disclosure is applied.

[0219] refer to Figures 14 to 17 The display devices 1000, 2000, and 3000 according to exemplary embodiments of the present disclosure can be included in various devices or electronic devices. For example, see reference to Figures 14 to 17 Various electronic devices may include wearable devices 1100, mobile devices 1200, laptops 1300 and monitors or TVs 1400, but exemplary embodiments disclosed herein are not limited thereto.

[0220] Each of the wearable device 1100, mobile device 1200, laptop 1300, and monitor or TV 1400 may include, respectively, in Figures 1 to 13 The housing units 1005, 1010, 1015 and 1020, as well as the display panel 100 and display devices 1000, 2000 and 3000, described in the exemplary embodiments of the present disclosure.

[0221] For example, the display devices 1000, 2000, and 3000 according to exemplary embodiments of the present disclosure can be applied to mobile devices, video phones, smartwatches, watch phones, wearable devices, foldable devices, rollable devices, bendable devices, flexible devices, curved devices, sliding devices, variable devices, electronic notebooks, e-books, portable multimedia players (PMPs), personal digital assistants (PDAs), MP3 players, mobile medical devices, desktop PCs, laptop PCs, netbooks, workstations, navigation systems, display devices for vehicles, display devices for theaters, televisions, wallpaper devices, signage devices, gaming devices, laptops, monitors, cameras, camcorders, and consumer electronic devices.

[0222] Exemplary embodiments of this disclosure can also be described as follows:

[0223] A display device according to one aspect of the present disclosure includes: a substrate including an effective region and an ineffective region; a pixel driving circuit disposed on the substrate in the effective region; a plurality of micro-LEDs disposed on the pixel driving circuit in the effective region and electrically connected to the pixel driving circuit; a plurality of organic insulating layers disposed on the substrate in each of the effective region and the ineffective region; and a plurality of first pad electrodes disposed on the plurality of organic insulating layers in the ineffective region, wherein the total thickness of the plurality of organic insulating layers in the region overlapping with the plurality of first pad electrodes is greater than the total thickness of the plurality of organic insulating layers in the region between the plurality of first pad electrodes.

[0224] In non-effective regions, the top layer of a plurality of organic insulating layers may include a plurality of holes disposed between the plurality of first pad electrodes.

[0225] Multiple holes can expose at least a portion of the top surface of a layer disposed beneath the top layer of the multiple organic insulating layers.

[0226] At least one of the plurality of organic insulating layers may extend between the pixel driving circuit and the plurality of microLEDs in the effective region.

[0227] The top layer of multiple organic insulating layers in the effective region and the top layer of multiple organic insulating layers in the ineffective region can be disposed on the same layer, and in the ineffective region, the first pad electrode is configured to contact the top layer of the organic insulating layer.

[0228] The top layers of multiple organic insulating layers in the non-active region and the top layers of multiple organic insulating layers in the active region can be connected to each other and formed of the same material.

[0229] The display device may further include a plurality of partitions disposed between the plurality of organic insulating layers and the plurality of micro-LEDs in the effective region, wherein the top layer of the plurality of organic insulating layers is disposed on the same layer as the plurality of partitions in the non-effective region, and the plurality of pad electrodes are configured to contact the top layer of the plurality of organic insulating layers.

[0230] The top layer of the organic insulating layer in the non-effective region may be formed of the same material as the plurality of dikes in the effective region.

[0231] The plurality of holes may extend to at least one layer below the top layer of the plurality of organic insulating layers disposed in the non-effective region.

[0232] The display device may further include: a flexible circuit board disposed on the plurality of first pad electrodes and including a plurality of second pad electrodes electrically connected to the plurality of first pad electrodes respectively; and a conductive adhesive member disposed between the plurality of first pad electrodes and the flexible circuit board, wherein the conductive adhesive member is configured to fill the plurality of holes.

[0233] The conductive adhesive component may include a plurality of conductive balls, and some of the conductive balls may be disposed in the plurality of holes.

[0234] The display device may also include a passivation layer disposed on the plurality of organic insulating layers in the non-effective area.

[0235] The passivation layer may be configured to overlap with at least a portion of the first pad electrode and the plurality of holes.

[0236] Multiple micro LEDs may include an anode electrode, a first semiconductor layer disposed on the anode electrode, an active layer disposed on the first semiconductor layer, a second semiconductor layer disposed on the active layer, and a cathode electrode disposed on the second semiconductor layer.

[0237] The display device may further include a first electrode disposed below the plurality of micro-LEDs to electrically connect the pixel driving circuit to the anode electrode of the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anode electrode, wherein the first electrode and the anode electrode are electrically connected by eutectic bonding using the solder pattern.

[0238] A display device according to another aspect of this disclosure includes: a substrate including an effective region and a pad region; a pixel driving circuit disposed on the substrate in the effective region; a first insulating layer disposed on the pixel driving circuit in the effective region and on the substrate in the pad region; a second insulating layer disposed on the first insulating layer in the effective region and the pad region; a third insulating layer disposed on the second insulating layer in the effective region and the pad region; a plurality of partitions disposed on the third insulating layer in the effective region; a plurality of micro-LEDs disposed on the plurality of partitions; a plurality of insulating patterns formed in the third insulating layer in the pad region; a plurality of first pad electrodes disposed on the plurality of insulating patterns in the pad region; and a plurality of opening regions formed by the plurality of insulating patterns between the plurality of first pad electrodes.

[0239] The opening area can expose at least a portion of the top surface of the second insulating layer of the pad area.

[0240] The display device may also include a flexible circuit board, which may be disposed on the plurality of first pad electrodes in the pad area, and may include a plurality of second pad electrodes that are electrically connected to the plurality of first pad electrodes respectively.

[0241] One end of the plurality of opening regions may extend into the effective region and be closer to the effective region than one end of the plurality of second pad electrodes.

[0242] The display device may further include a conductive adhesive member disposed between the plurality of first pad electrodes and the flexible circuit board, and may include a plurality of conductive balls, wherein the conductive adhesive member fills the plurality of opening regions, and at least some of the plurality of conductive balls are disposed in the plurality of opening regions.

[0243] The display device may further include a passivation layer disposed on at least some of the plurality of conductive patterns, wherein the passivation layer may overlap with at least a portion of the opening region.

[0244] While exemplary embodiments of the present disclosure have been described in detail with reference to the accompanying drawings, the present disclosure is not limited thereto and may be embodied in many different forms without departing from the technical concept of the present disclosure. Therefore, the exemplary embodiments of the present disclosure are provided for illustrative purposes only and are not intended to limit the technical concept of the present disclosure. The scope of the technical concept of the present disclosure is not limited thereto. Therefore, it should be understood that the above exemplary embodiments are illustrative in all respects and do not limit the present disclosure. All technical concepts within the equivalent scope of the present disclosure should be understood to fall within the scope of the present disclosure.

Claims

1. A display device comprising: a substrate including an active area and an inactive area; a pixel driving circuit disposed on the substrate in the active area; a plurality of micro-LEDs disposed on the pixel driving circuit in the active area and electrically connected to the pixel driving circuit; a plurality of organic insulating layers disposed on the substrate in each of the active area and the inactive area; and a plurality of first pad electrodes disposed on the plurality of organic insulating layers in the inactive area, wherein a total thickness of the plurality of organic insulating layers in an area overlapping the plurality of first pad electrodes is greater than a total thickness of the plurality of organic insulating layers in an area between the plurality of first pad electrodes. In the inactive area, a top layer of the plurality of organic insulating layers includes a plurality of holes disposed between the plurality of first pad electrodes.

2. The display device according to claim 1, wherein The plurality of holes expose at least a portion of a top surface of a layer disposed below the top layer of the plurality of organic insulating layers.

3. The display device according to claim 2, wherein At least one of the plurality of organic insulating layers extends between the pixel driving circuit and the plurality of micro-LEDs in the active area.

4. The display device according to claim 2, wherein A top layer of the plurality of organic insulating layers in the active area is disposed on a same layer as a top layer of the plurality of organic insulating layers in the inactive area, and in the inactive area, the first pad electrodes are disposed in contact with the top layer of the organic insulating layers.

5. The display device according to claim 1, wherein The top layer of the plurality of organic insulating layers in the inactive area is connected to the top layer of the plurality of organic insulating layers in the active area and is formed of a same material.

6. The display device of claim 5, wherein, 7.The display device of claim 1, further comprising: a plurality of banks disposed between the plurality of organic insulating layers and the plurality of micro-LEDs in the active area, wherein a top layer of the plurality of organic insulating layers is disposed on a same layer as the plurality of banks in the inactive area, and the plurality of first pad electrodes are disposed in contact with the top layer of the plurality of organic insulating layers. The top layer of the organic insulating layers in the inactive area is formed of a same material as the plurality of banks in the active area.

8. The display device of claim 7, wherein, The plurality of holes extend to at least one layer disposed below the top layer of the plurality of organic insulating layers in the inactive area.

9. The display device according to claim 2, wherein 10.The display device of claim 2, further comprising: a flexible circuit board disposed on the plurality of first pad electrodes and including a plurality of second pad electrodes electrically connected to the plurality of first pad electrodes, respectively; and a conductive adhesive member disposed between the plurality of first pad electrodes and the flexible circuit board, wherein the conductive adhesive member is disposed to fill in the plurality of holes. The conductive adhesive member includes a plurality of conductive balls, and some of the plurality of conductive balls are disposed in the plurality of holes.

11. The display device of claim 10, wherein, 12.The display device of claim 2, further comprising: ​ a passivation layer disposed on the plurality of organic insulating layers in the non-active area.

13. The display device of claim 12, wherein, The passivation layer is disposed to overlap at least a portion of the first pad electrode and the plurality of holes.

14. The display device of claim 1, wherein, The plurality of micro-LEDs include: an anode electrode; a first semiconductor layer disposed on the anode electrode; an active layer disposed on the first semiconductor layer; a second semiconductor layer disposed on the active layer; and a cathode electrode disposed on the second semiconductor layer.

15. The display device of claim 14, further comprising: a first electrode disposed under the plurality of micro-LEDs to electrically connect the pixel driving circuit with the anode electrodes of the plurality of micro-LEDs; and a solder pattern disposed between the first electrode and the anode electrodes, wherein the first electrode and the anode electrodes are electrically connected by eutectic bonding using the solder pattern.

16. A display device comprising: a substrate including an active area and a pad area; a pixel driving circuit disposed on the substrate in the active area; a first insulating layer disposed on the pixel driving circuit in the active area and disposed on the substrate in the pad area; a second insulating layer disposed on the first insulating layer in the active area and the pad area; a third insulating layer disposed on the second insulating layer in the active area and the pad area; a plurality of banks disposed on the third insulating layer in the active area; a plurality of micro-LEDs disposed on the plurality of banks; a plurality of insulating patterns formed in the third insulating layer in the pad area; a plurality of first pad electrodes disposed on the plurality of insulating patterns in the pad area; and a plurality of opening areas formed by the plurality of insulating patterns between the plurality of first pad electrodes.

17. The display device of claim 16, wherein the opening areas expose at least a portion of a top surface of the second insulating layer of the pad area.

18. The display device of claim 16, further comprising: a flexible circuit board disposed on the plurality of first pad electrodes of the pad area and including a plurality of second pad electrodes electrically connected with the plurality of first pad electrodes, respectively. One end portion of the plurality of opening areas extends to the active area and is closer to the active area than one end portion of the plurality of second pad electrodes.

19. The display device of claim 18, wherein, 20. The display device of claim 18, further comprising: a conductive adhesive member disposed between the plurality of first pad electrodes and the flexible circuit board and including a plurality of conductive balls, ​ The conductive adhesive member is filled in the plurality of open regions, and at least some of the plurality of conductive balls are disposed in the plurality of open regions. 21.The display apparatus according to claim 16, further comprising: a passivation layer disposed on at least some of the plurality of conductive patterns, wherein the passivation layer overlaps at least a portion of the open region.

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