Display device

By connecting the semiconductor layers of all pixel units in parallel in a Micro LED display, the electrical connection is simplified and the ESD resistance is improved. This solves the testing difficulties and ESD breakdown problems in the detection stage of traditional Micro LED displays, and achieves efficient photoelectric characteristic detection and yield control.

CN121285147APending Publication Date: 2026-01-06XIAMEN SANAN OPTOELECTRONICS CO LTD
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Patent Information

Application Number
CN202511581318.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-10-31
Publication Date
2026-01-06

AI Technical Summary

Technical Problem

Traditional Micro LED displays struggle to detect the photoelectric properties of each pixel during the chip inspection stage, resulting in the retention of defective chips. Furthermore, they have poor ESD resistance and are prone to breakdown failures during the thinning and cutting process.

Method used

The semiconductor layers of all pixel units are connected in parallel using a first temporary electrode layer and a second temporary electrode layer, which simplifies the electrical connection method and improves the ESD resistance by covering them with a temporary insulating layer.

Benefits of technology

It reduces the testing difficulty in the chip testing stage, enables simultaneous testing of photoelectric characteristics of multiple pixel units, prevents defective products from being released, and improves the overall anti-static discharge capability.

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Abstract

The invention relates to the technical field of semiconductor manufacturing, in particular to a display device which comprises a plurality of pixel units, a first electrode, a second electrode, an insulating layer, a first temporary electrode layer and a second temporary electrode layer, and each pixel unit comprises a first semiconductor layer, a light-emitting layer and a second semiconductor layer which are stacked in sequence. The first electrode is electrically connected with the first semiconductor layer, the second electrode is electrically connected with the second semiconductor layer, the insulating layer covers the pixel units, the first electrode and the second electrode, the first temporary electrode layer is arranged on the insulating layer and electrically connected with the first electrode, and the second temporary electrode layer is arranged on the insulating layer and electrically connected with the second electrode. The second temporary electrode layer connects the second semiconductor layers of the pixel units in parallel, and the first temporary electrode layer connects the first semiconductor layers of the pixel units in parallel. By means of the arrangement, the photoelectric characteristics, the yield and other characteristics of a plurality of pixel units can be tested at the same time, and the anti-ESD performance of the whole display device is improved.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, and in particular to a display device. Background Technology

[0002] In recent years, light-emitting diodes (LEDs) have been widely used in commercial lighting applications. As a light source, LEDs offer many advantages, including lower energy consumption, longer lifespan, smaller size, and faster switching speeds. Therefore, traditional lighting sources, such as incandescent lamps, are gradually being replaced by LED light sources. In LEDs, when electrons and holes recombine across the semiconductor band gap, the recombination energy is emitted as photons, producing light. This recombination mechanism is known as radiative recombination. Using miniature LED arrays to control current flow and maintain the efficiency and uniformity of LED displays is one of the projects that the industry is currently focusing its research and development efforts on.

[0003] With the continuous development of display technology, Micro LED display technology, with its advantages of low power consumption, high reliability, wide color gamut, high brightness, and high contrast, is regarded as the development direction of the next generation of semiconductor display technology. Traditional Micro LED displays typically use an array structure, which contains multiple LED pixel units. Each pixel unit needs to be independently electrically connected to external circuitry. Due to its extremely small electrode size, the chip testing stage is difficult, making it impossible to detect the photoelectric properties of each pixel. This results in defective chips remaining, and the quality of the LED can only be determined after bonding with CMOS, leading to significant waste in yield and cost. Furthermore, because Micro LED chips have an extremely small surface area, their ESD resistance is very poor. After chip thinning and cutting, there are multiple film peeling and film application processes, which can easily cause ESD breakdown failure of the chip.

[0004] It should be noted that the information disclosed in this background section is intended only to enhance the understanding of the overall background of the present invention, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0005] The present invention provides a display device comprising a plurality of pixel units, a first electrode, a second electrode, an insulating layer, a first temporary electrode layer, and a second temporary electrode layer.

[0006] Each pixel unit includes a first semiconductor layer, a light-emitting layer, and a second semiconductor layer stacked sequentially. A first electrode is electrically connected to the first semiconductor layer. A second electrode is electrically connected to the second semiconductor layer. An insulating layer partially covers the pixel unit, the first electrode, and the second electrode, and the insulating layer has a first opening and a second opening. A first temporary electrode layer is disposed on the insulating layer and is electrically connected to the first electrode through the first opening. A second temporary electrode layer is disposed on the insulating layer and is electrically connected to the second electrode through the second opening. The second temporary electrode layer connects the second semiconductor layers of each pixel unit in parallel, and the first temporary electrode layer connects the first semiconductor layers of each pixel unit in parallel.

[0007] Furthermore, the first semiconductor layers of two adjacent pixel units are interconnected.

[0008] Furthermore, the display device also includes a third electrode and a fourth electrode, which are disposed on the insulating layer. The third electrode is electrically connected to the first electrode, and the fourth electrode is electrically connected to the second electrode. A first temporary electrode layer is disposed on the third electrode, and a second temporary electrode layer is disposed on the fourth electrode.

[0009] Furthermore, the display device also includes a temporary insulating layer that partially covers the third electrode, the fourth electrode, and the insulating layer. The temporary insulating layer has a third opening and a fourth opening. A first temporary electrode layer and a second temporary electrode layer are disposed on the temporary insulating layer. The first temporary electrode layer is electrically connected to the third electrode through the third opening, and the second temporary electrode layer is electrically connected to the fourth electrode through the fourth opening.

[0010] Furthermore, the temporary insulating layer is made of materials including polyisoprene and photoresist.

[0011] Furthermore, the temporary insulating layer is removable.

[0012] Furthermore, the materials of the first temporary electrode layer and the second temporary electrode layer include at least one of Ag, Cu, Ni, or TiW.

[0013] Furthermore, both the first temporary electrode layer and the second temporary electrode layer are removable.

[0014] Furthermore, viewed from above, the second semiconductor layers of the plurality of pixel units are arranged in an array, the first temporary electrode layer is in a ring shape, and the plurality of second semiconductor layers are located within the first temporary electrode layer.

[0015] Furthermore, viewed from above, at least a portion of each of the second semiconductor layers overlaps with the second temporary electrode layer.

[0016] Furthermore, the pixel unit is a Micro LED or Mini LED, and the minimum size of a single side of the pixel unit ranges from 0.5 to 250 μm.

[0017] This invention provides a display device that simplifies the electrical connection between pixel units by using a first temporary electrode layer and a second temporary electrode layer. Specifically, the first temporary electrode layer connects the first semiconductor layers of all pixel units in parallel, and the second temporary electrode layer connects the second semiconductor layers of all pixel units in parallel. This reduces the testing difficulty during the chip testing stage, enabling simultaneous testing of the photoelectric properties and yield of multiple pixel units, thus preventing defective products from being shipped. Furthermore, the first and second electrodes on each pixel unit are also connected in parallel, improving the overall ESD resistance.

[0018] Other features and advantages of the present invention will be set forth in the following description, and some of the technical features and advantages may be apparent from the description or learned by practicing the invention. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, some of the drawings in the following description are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the structure of a traditional display device; Figure 2 This is a schematic diagram of the structure of a traditional display device; Figure 3 This is a top view of the display device provided in the first embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of the display device provided in the first embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of the display device provided in the second embodiment of the present invention.

[0021] Figure label: 10-Substrate; 12-First semiconductor layer; 14-Light-emitting layer; 16-Second semiconductor layer; 18-First electrode; 20-Second electrode; 22-Insulating layer; 221-First opening; 222-Second opening; 24-First temporary electrode layer; 26-Second temporary electrode layer; 28-Third electrode; 30-Fourth electrode; 40-Temporary insulating layer. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, not all embodiments. The technical features designed in the different embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0023] In the description of this invention, it should be understood that the terms "center," "lateral," "upper," "lower," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicating orientation or positional relationships based on the orientation or positional relationships shown in the accompanying drawings, are only for the convenience of describing the invention and simplifying the description, and do not indicate or imply that the device or component referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of the invention. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, unless otherwise stated, "a plurality of" means two or more. Additionally, the term "comprising" and any variations thereof mean "at least comprising."

[0024] Please see Figure 3 and Figure 4 , Figure 3 This is a top view of the display device provided in the first embodiment of the present invention. Figure 4 This is a schematic diagram of the structure of a display device provided in the first embodiment of the present invention. To achieve at least one or more of the advantages mentioned above, the first embodiment of the present invention provides a display device, which includes at least a plurality of pixel units, a first electrode 18, a second electrode 20, an insulating layer 22, a first temporary electrode layer 24, and a second temporary electrode layer 26. Figure 3 In the diagram, the first temporary electrode layer 24 refers to an N-polarity temporary electrode, and the second temporary electrode layer 26 refers to a P-polarity temporary electrode.

[0025] Pixel units can be disposed on substrate 10. Substrate 10 can be a sapphire substrate 10. In some embodiments, substrate 10 can be a patterned sapphire substrate 10, but the invention is not limited thereto. Figure 3 The number of pixel units is 9, in Figure 4 The number of pixel units is 2.

[0026] Each pixel unit includes a first semiconductor layer 12, a light-emitting layer 14, and a second semiconductor layer 16 stacked sequentially. The first semiconductor layer 12 is disposed on the substrate 10, and the light-emitting layer 14 is located between the first semiconductor layer 12 and the second semiconductor layer 16.

[0027] The first semiconductor layer 12 can be an N-type semiconductor layer, which can provide electrons to the light-emitting layer 14 under the influence of a power source. In some embodiments, the first semiconductor layer 12 includes an N-type doped nitride layer. The N-type doped nitride layer may include N-type impurities. N-type impurities may include one or a combination of Si, Ge, and Sn.

[0028] The light-emitting layer 14 can be a quantum well (QW) structure. In some embodiments, the light-emitting layer 14 can also be a multiple quantum well (MQW) structure, wherein the multiple quantum well structure includes multiple quantum well layers (Wells) and multiple quantum barrier layers (Barriers) arranged alternately in a repeating manner, such as a GaN / AlGaN, InAlGaN / InAlGaN, or InGaN / AlGaN multi-quantum well structure. Furthermore, the composition and thickness of the well layers within the light-emitting layer 14 determine the wavelength of the generated light. To improve the luminous efficiency of the light-emitting layer 14, this can be achieved by changing the depth of the quantum wells, the number of paired quantum wells and quantum barriers, the thickness, and / or other characteristics within the light-emitting layer 14.

[0029] The second semiconductor layer 16 can be a P-type semiconductor layer, which can provide holes to the light-emitting layer 14 under power. In some embodiments, the second semiconductor layer 16 includes a P-type doped nitride layer. The P-type doped nitride layer may include one or more P-type impurities. The P-type impurities may include one or a combination of Mg, Zn, and Be. The second semiconductor layer 16 can be a single-layer structure or a multi-layer structure with different compositions.

[0030] In some embodiments, the first semiconductor layer 12, the light-emitting layer 14, and the second semiconductor layer 16 may be formed from materials such as aluminum gallium indium nitride, gallium nitride, aluminum gallium nitride, aluminum indium phosphide, aluminum gallium indium phosphide, gallium arsenide, or aluminum gallium arsenide. The first semiconductor layer 12 or the second semiconductor layer 16 includes a capping layer that provides electrons or holes, and may include other layer materials, such as a current spreading layer, a window layer, or an ohmic contact layer, etc., configured as different multilayers depending on the doping concentration or composition content. The light-emitting layer 14 is the region that provides light radiation for electron-hole recombination, and different materials may be selected according to different emission wavelengths. The light-emitting layer 14 may be a periodic structure of a single quantum well or multiple quantum wells. By adjusting the composition ratio of the semiconductor materials in the light-emitting layer 14, it is desired to radiate light of different wavelengths.

[0031] The first electrode 18 is electrically connected to the first semiconductor layer 12. The first electrode 18 can be a metal electrode with a multilayer structure, such as a metal stack structure of Cr / Ti / Ni / Ti / Pt, Cr / Ti / Al / Ni / Au, etc.

[0032] The second electrode 20 is electrically connected to the second semiconductor layer 16. The second electrode 20 can be made of a transparent conductive material or a metallic material, and its suitability can be selected according to the doping of the surface layer (such as a p-type GaN surface layer) of the second semiconductor layer 16. In some embodiments, the second electrode 20 is made of a transparent conductive material, which may include indium tin oxide (ITO), indium zinc oxide (IZO), indium oxide (InO), tin oxide (SnO), cadmium tin oxide (CTO), antimony tin oxide (ATO), aluminum zinc oxide (AZO), zinc tin oxide (ZTO), gallium-doped zinc oxide (GZO), tungsten-doped indium oxide (IWO), or zinc oxide (ZnO), but the embodiments disclosed herein are not limited thereto.

[0033] The insulating layer 22 partially covers the pixel unit, the first electrode 18, and the second electrode 20. The insulating layer 22 has a first opening 221 and a second opening 222. The insulating layer 22 can be used to prevent electrical connection between the first semiconductor layer 12 and the second semiconductor layer 16 due to leakage of conductive material, reducing short-circuit abnormalities, but the embodiments disclosed herein are not limited thereto. The material of the insulating layer 22 includes a non-conductive material. The non-conductive material is preferably an inorganic material or a dielectric material. The inorganic material may include silicone. The dielectric material includes electrically insulating materials such as aluminum oxide, silicon nitride, silicon oxide, titanium oxide, or magnesium fluoride. For example, the insulating layer 22 may be silicon dioxide, silicon nitride, titanium oxide, tantalum oxide, niobium oxide, barium titanate, or a combination thereof, such as a Bragg mirror (DBR) formed by repeatedly stacking two materials with different refractive indices.

[0034] A first temporary electrode layer 24 is disposed on the insulating layer 22 and electrically connected to the first electrode 18 through a first opening 221. A second temporary electrode layer 26 is disposed on the insulating layer 22 and electrically connected to the second electrode 20 through a second opening 222. Both the first temporary electrode layer 24 and the second temporary electrode layer 26 are conductive. The materials of the first temporary electrode layer 24 and the second temporary electrode layer 26 may include TiW, Ag, Cu, Ni, and related alloys. The first temporary electrode layer 24 and the second temporary electrode layer 26 are removable and can be removed by physical or chemical means to avoid affecting the chip structure. For example, TiW material can be removed by immersion in SC-1 solution without affecting the chip structure.

[0035] The second temporary electrode layer 26 connects the second semiconductor layers 16 of each pixel unit in parallel, and the first temporary electrode layer 24 connects the first semiconductor layers 12 of each pixel unit in parallel. (The last sentence appears to be incomplete and possibly refers to a different topic.) Figure 1 , Figure 2 The display device shown has separate electrodes on each pixel module, requiring independent electrical connections to external circuits. This makes it impossible to test the photoelectric properties of each pixel module during subsequent chip testing, resulting in the retention of defective chips. Furthermore, because the pixel modules use Micro LED chips, which have extremely small surface areas and poor ESD resistance, the multiple film peeling and reapplying processes after chip thinning and cutting easily cause ESD breakdown failures. To address this issue, this invention simplifies the electrical connection between pixel units by using a first temporary electrode layer 24 and a second temporary electrode layer 26. Specifically, the first temporary electrode layer 24 connects the first semiconductor layers 12 of all pixel units in parallel, and the second temporary electrode layer 26 connects the second semiconductor layers 16 of all pixel units in parallel. This reduces the testing difficulty during the chip testing stage, enabling simultaneous testing of the photoelectric properties and yield of multiple pixel units, thus preventing defective products from being released. Furthermore, by setting the first temporary electrode layer 24 and the second temporary electrode layer 26, the first electrode 18 and the second electrode 20 on each pixel unit are also connected in parallel, thereby improving the overall ESD resistance.

[0036] In this embodiment, the first semiconductor layers 12 of two adjacent pixel units are interconnected. Specifically, the first semiconductor layer 12 is disposed as a single piece to facilitate parallel connection of the first semiconductor layers 12 between each pixel unit. This allows for simultaneous testing of the photoelectric properties and yield of multiple pixel units, and improves the overall ESD resistance.

[0037] In some embodiments, the display device further includes a third electrode 28 and a fourth electrode 30, which are disposed on an insulating layer 22. The third electrode 28 is electrically connected to the first electrode 18, and the fourth electrode 30 is electrically connected to the second electrode 20. A first temporary electrode layer 24 is disposed on the third electrode 28, and a second temporary electrode layer 26 is disposed on the fourth electrode 30. The third electrode 28 and the fourth electrode 30 can be metal pads and can be formed together using the same material in the same process, thus having the same layer structure. In some embodiments, the second temporary electrode layer 26 covers the fourth electrode 30 on each pixel unit to facilitate simultaneous testing of the photoelectric properties and yield of multiple pixel units and improve the overall ESD resistance.

[0038] In some embodiments, viewed from above, reference Figure 3 As shown, the second semiconductor layers 16 of multiple pixel units are arranged in an array, the first temporary electrode layer 24 is in a ring shape, and the multiple second semiconductor layers 16 are located within the first temporary electrode layer 24, so as to simultaneously test the photoelectric properties and yield of multiple pixel units and improve the overall ESD resistance.

[0039] In some embodiments, viewed from above, reference Figure 3 As shown, at least a portion of each second semiconductor layer 16 overlaps with the second temporary electrode layer 26, so as to simultaneously test the photoelectric properties and yield of multiple pixel units and improve the overall ESD resistance.

[0040] Please see Figure 5 , Figure 5 This is a schematic diagram of the structure of a display device provided in the second embodiment of the present invention. Compared with the display device of the first embodiment, the main difference of this embodiment is that the display device further includes a temporary insulating layer 40.

[0041] A temporary insulating layer 40 partially covers the third electrode 28, the fourth electrode 30, and the insulating layer 22. The temporary insulating layer 40 has a third opening and a fourth opening. A first temporary electrode layer 24 and a second temporary electrode layer 26 are disposed on the temporary insulating layer 40. The first temporary electrode layer 24 is electrically connected to the third electrode 28 through the third opening, and the second temporary electrode layer 26 is electrically connected to the fourth electrode 30 through the fourth opening. The temporary insulating layer 40 allows for better simultaneous testing of the photoelectric properties and yield of multiple pixel units, avoiding short-circuit anomalies.

[0042] In some embodiments, the temporary insulating layer 40 is made of materials such as polyisoprene (e.g., photosensitive PI) or photoresist. The temporary insulating layer 40 is removable to avoid affecting the chip structure. For example, openings can be formed thereon using photolithography, and then the temporary insulating layer 40 can be selectively removed using an organic solution.

[0043] In some embodiments, each pixel unit is a Micro LED or Mini LED, with a minimum single-side size ranging from 0.5 to 250 μm.

[0044] In summary, the display device provided by this invention simplifies the electrical connection between pixel units by using a first temporary electrode layer 24 and a second temporary electrode layer 26. Specifically, the first temporary electrode layer 24 connects the first semiconductor layers 12 of all pixel units in parallel, and the second temporary electrode layer 26 connects the second semiconductor layers 16 of all pixel units in parallel. This reduces the testing difficulty during the chip testing stage, enabling simultaneous testing of the photoelectric properties and yield of multiple pixel units, thus preventing defective products from being shipped. Furthermore, the first electrode 18 and the second electrode 20 on each pixel unit are also connected in parallel, improving the overall ESD resistance.

[0045] Furthermore, those skilled in the art should understand that although many problems exist in the prior art, each embodiment or technical solution of the present invention can be improved in only one or a few aspects, without necessarily solving all the technical problems listed in the prior art or the background art simultaneously. Those skilled in the art should understand that any content not mentioned in a claim should not be construed as a limitation on that claim.

[0046] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A display device, characterized by comprising: The display device comprises: a plurality of pixel units, each of the pixel units comprising a first semiconductor layer, a light-emitting layer and a second semiconductor layer stacked in sequence; a first electrode electrically connected to the first semiconductor layer; a second electrode electrically connected to the second semiconductor layer; an insulating layer partially covering the pixel units, the first electrode and the second electrode, the insulating layer having a first opening and a second opening; a first temporary electrode layer disposed on the insulating layer and electrically connected to the first electrode through the first opening; a second temporary electrode layer disposed on the insulating layer and electrically connected to the second electrode through the second opening; wherein the second temporary electrode layer connects the second semiconductor layers of the pixel units in parallel, and the first temporary electrode layer connects the first semiconductor layers of the pixel units in parallel.

2. The display device according to claim 1, wherein: The first semiconductor layers of two adjacent pixel units are connected to each other.

3. The display device according to claim 1, wherein: The display device further comprises a third electrode and a fourth electrode disposed on the insulating layer, the third electrode being electrically connected to the first electrode, and the fourth electrode being electrically connected to the second electrode, the first temporary electrode layer being disposed on the third electrode, and the second temporary electrode layer being disposed on the fourth electrode.

4. The display device according to claim 3, wherein: The display device further comprises a temporary insulating layer partially covering the third electrode, the fourth electrode and the insulating layer, the temporary insulating layer having a third opening and a fourth opening, the first temporary electrode layer and the second temporary electrode layer being disposed on the temporary insulating layer, the first temporary electrode layer being electrically connected to the third electrode through the third opening, and the second temporary electrode layer being electrically connected to the fourth electrode through the fourth opening.

5. The display device of claim 4, wherein: The material of the temporary insulating layer comprises polyisoprene or photoresist.

6. The display device of claim 4, wherein: The temporary insulating layer is removable.

7. The display device of claim 1, wherein: The material of the first temporary electrode layer and the second temporary electrode layer comprises at least one of Ag, Cu, Ni or TiW.

8. The display device of claim 1, wherein: The first temporary electrode layer and the second temporary electrode layer are removable.

9. The display device of claim 1, wherein: In plan view, the second semiconductor layers of the pixel units are arranged in an array, and the first temporary electrode layer has a ring shape, with the second semiconductor layers located within the first temporary electrode layer.

10. The display device of claim 9, wherein: In plan view, at least part of each second semiconductor layer overlaps the second temporary electrode layer.

11. The display device of claim 1, wherein: The pixel units are Micro LED or Mini LED, and the minimum size of a single side of the pixel units ranges from 0.5 to 250 μm.