Power battery pack external access type charge-discharge data acquisition module

Abstract

This invention relates to the field of battery monitoring technology, specifically to an external access charging and discharging data acquisition module for a power battery pack. The method includes: a cell group, a single cell voltage monitoring unit, an equalization unit, a microcontroller unit, a communication unit, and a power supply unit. The cell group consists of N cells connected in series. The single cell voltage monitoring unit has a differential channel for each cell and converts it to a single-ended voltage via differential / single-ended conversion. The equalization unit has a dissipation branch for each cell containing an isolated gate driver, an MCU-controlled N-channel MOSFET, and a power resistor, along with an overcurrent fuse and overvoltage clamp. The microcontroller unit collects the single-ended voltage of each cell via a low-pass filter and controls the equalization. The algorithm averages and calibrates the voltage for each cell ≥10 times, using the lowest voltage as a reference. The equalization is activated when the difference is ≥ a threshold. The collection is paused during the hold period and then cycled again. This method is applicable to both charging and discharging. The communication unit connects to a CAN controller and transceiver via SPI, encapsulating the single cell voltage into a two-byte CAN frame for uploading to the bus. The power supply unit obtains a first bus from the total voltage drop for monitoring and equalization, and then linearly regulates it to obtain a second bus for the MCU and communication. This invention can solve the problems of inconsistent voltage / SOC during the charging and discharging process of series-connected power cells, making it difficult to accurately collect and quickly equalize the data without modifying the original system; the data collection process is easily affected by the equalization current; and there is a lack of remote online monitoring.

Description

Technical Field

[0001] This invention relates to the field of battery monitoring technology, and in particular to an external access charging and discharging data acquisition module for power battery packs. Background Technology

[0002] In applications such as electric vehicles, LiFePO4 power batteries are widely used due to their low self-discharge rate, energy density and safety. However, high-rate charging strategies can exacerbate the inconsistency and imbalance of SOC between series cells, which in turn affects lifespan and safety. Therefore, it is necessary to rely on the battery management system (BMS) to collect and balance the cell voltage and SOC / SOH, and to realize remote monitoring and fault handling through a dedicated communication interface.

[0003] Existing engineering projects mostly adopt passive equalization schemes due to their low cost, high reliability, and simple control circuits, making them more suitable for automotive scenarios. However, much of this work remains at the simulation / methodological level or involves low equalization current (typically ≤200mA), and lacks remote monitoring capabilities. To improve project usability, individual cell voltage acquisition needs to convert high common-mode differential voltages into single-ended quantities referenced to system ground, and combine this with software bias calibration to reduce errors introduced by wiring and analog front-ends. Simultaneously, acquisition and equalization should be mutually exclusive in timing to avoid voltage drop interference from equalization current via wiring. Summary of the Invention

[0004] In view of the above technical problems, the present invention provides an external access charging and discharging data acquisition module for power battery packs to solve the problems of inconsistent voltage / SOC of series-connected power cells during charging and discharging, making it difficult to accurately acquire and quickly equalize the data without modifying the original system, the acquisition process being easily affected by equalization current interference, and the lack of remote online monitoring.

[0005] Other features and advantages of this disclosure will become apparent from the following detailed description, or may be learned in part from practice of this disclosure.

[0006] According to one aspect of the present invention, an external access charging and discharging data acquisition module for a power battery pack is provided, comprising:

[0007] A battery cell assembly, wherein the battery cell assembly consists of N individual battery cells connected in series;

[0008] A single-cell voltage monitoring unit is provided, wherein a differential measurement channel is set for each single cell, the two ends of the differential measurement channel are respectively connected to the positive and negative terminals of the single cell, and the obtained differential voltage is output as a single-ended voltage with the system ground as a reference after differential / single-ended conversion;

[0009] The equalization unit provides a dissipative equalization branch for each individual cell. The equalization branch includes an isolated gate driver, an N-channel power MOSFET controlled by a microcontroller unit, and a power resistor network connected in series / parallel with the MOSFET. During equalization, the MOSFET is turned on, allowing the individual cell to dissipate charge through the power resistor network. The equalization branch also includes an overcurrent protection fuse connected in series with the individual cell and an overvoltage clamping device connected in parallel across the individual cell.

[0010] The microcontroller unit has its analog input terminals connected to the single-ended voltage outputs of each individual voltage monitoring unit via low-pass filters, and its digital output terminals connected to the control terminals of each equalization unit. The microcontroller unit is configured to execute the following data acquisition algorithm:

[0011] The voltage of each cell is sampled at least 10 times and the average value is taken as the measured value of the cell.

[0012] Software calibration is applied to the measured values ​​to compensate for deviations caused by the analog front end and wiring;

[0013] The lowest value among all the individual cell voltages is selected as the reference voltage. The voltage of any individual cell is compared with the reference voltage. When the difference is not lower than a preset threshold, the corresponding equalization unit is driven to conduct to implement dissipative equalization. Voltage acquisition is paused during the equalization conduction period. After the set holding time is reached, the conduction is turned off and the acquisition, judgment, and equalization conduction cycle is restarted so that equalization can be implemented during both charging and discharging.

[0014] The module also includes:

[0015] The communication unit includes a CAN controller connected to the microcontroller via an SPI bus and a CAN transceiver connected to the CAN controller. The communication unit is used to encode and encapsulate the voltage of each individual cell into a CAN data frame and output it to the CAN bus to achieve remote monitoring. The voltage data of each individual cell is carried in two-byte order.

[0016] The power supply unit has its input connected to the positive and negative terminals of the battery cell assembly. It uses a step-down DC / DC converter to convert the total voltage into a first bus voltage to power the individual cell voltage monitoring unit and the equalization unit. The first bus voltage is then converted into a second bus voltage by a linear regulator and stepped down to power the microcontroller unit and the communication unit.

[0017] Furthermore, the CAN bus terminal is equipped with a termination matching resistor and a bidirectional transient suppression device, which are systematically referenced to the negative terminal of the first individual cell connected to the cell group;

[0018] The individual cell voltage monitoring unit and the equalization unit are configured as a group per individual cell and can be expanded and replicated in N steps to adapt to cell groups with different series numbers.

[0019] Furthermore, the individual unit voltage monitoring unit employs a high common-mode differential amplifier to output accurate single-ended voltage under single power supply.

[0020] Furthermore, the gate of the MOSFET is connected in series with a speed-limiting resistor to control the switching edge; the equivalent resistance of the power resistor network is selected to keep the balancing current in the range of approximately 0.5–0.75A.

[0021] The equalization unit has an overvoltage clamping diode connected in parallel across both ends of the individual cell; and a fuse is connected in series in its branch.

[0022] Furthermore, the power supply unit includes a buck switch controller, which operates on a constant on-time adjustment principle. The various ports of the buck switch controller are as follows:

[0023] The input power port is connected to the main positive terminal of the battery pack;

[0024] The on-time control and off-time port are connected to the positive terminal of the battery pack through a first external resistor and grounded through a capacitor;

[0025] The output port of the negative voltage regulator is connected to the input power port and one end of the second external resistor via a capacitor, and the other end of the second external resistor is connected to the drain of the PMOS transistor.

[0026] A current limiting adjustment port is connected to one end of an RC structure, and the other end of the RC structure is connected to the input power port and the second external resistor respectively.

[0027] The drive port is connected to the gate of the PMOS transistor;

[0028] The current detection input port is connected to the second external resistor;

[0029] The voltage feedback port is connected to the output branch of the PMOS.

[0030] The technical solution disclosed herein has the following beneficial effects:

[0031] This external charging and discharging data acquisition module for the power battery pack can be directly connected to existing series cell packs without modifying the original system, facilitating upgrades and deployment. Its individual cell voltage monitoring unit uses a high common-mode differential amplifier to output single-ended voltage. The microcontroller performs multiple samplings of each cell, averages the results, and incorporates software bias calibration, reducing the relative measurement error to approximately 0.03%–0.12%, meeting the requirements for precise monitoring. The equalization unit consists of an isolated gate driver, a low RDS(on) N-channel power MOSFET, and a power resistor network. It starts and stops based on a criterion of comparing the voltage with the lowest individual cell; a difference ≥ a threshold triggers the process. It can achieve a passive equalization current of approximately 0.5–0.73A within the 2.5–3.65V range and can operate under both charging and discharging conditions, significantly shortening the equalization time.

[0032] The communication unit consists of a CAN controller and a CAN transceiver. It reports the voltage of each cell in two-byte format, from low to high bit, according to the cell number. Its modular structure of "each cell as a group" is easy to expand and replicate by N, adapting to cell groups with different series numbers. Attached Figure Description

[0033] Figure 1 This is a structural block diagram of an external charging and discharging data acquisition module for a product power battery pack, as described in one of the embodiments of this specification.

[0034] Figure 2 This is a circuit schematic diagram of the single-unit voltage detection unit in the embodiments of this specification;

[0035] Figure 3 This is a circuit schematic diagram of the equalization unit in the embodiments of this specification;

[0036] Figure 4 This is a circuit schematic diagram of the microcontroller unit in the embodiments of this specification;

[0037] Figure 5 This is a circuit diagram of the CAN transceiver of the communication unit in the embodiments of this specification;

[0038] Figure 6 This is a circuit schematic diagram of the CAN controller of the communication unit in the embodiments of this specification;

[0039] Figure 7 This is a circuit diagram of the step-down switch controller of the power supply unit in the embodiments of this specification;

[0040] Figure 8 This is a circuit diagram of the linear regulator of the power supply unit in the embodiments of this specification. Detailed Implementation

[0041] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in many forms and should not be construed as limited to the examples set forth herein; rather, these embodiments are provided to make this disclosure more comprehensive and complete, and to fully convey the concept of the example embodiments to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a full understanding of embodiments of this disclosure. However, those skilled in the art will recognize that the technical solutions of this disclosure can be practiced with one or more of the specific details omitted, or other methods, components, apparatus, steps, etc., can be employed. In other instances, well-known technical solutions are not shown or described in detail to avoid obscuring various aspects of this disclosure.

[0042] Furthermore, the accompanying drawings are merely illustrative of this disclosure. The same reference numerals in the drawings denote the same or similar parts, and therefore repeated descriptions of them will be omitted. Some block diagrams shown in the drawings are functional entities and do not necessarily correspond to physically or logically independent entities. These functional entities may be implemented in software, in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0043] This invention provides an externally connected charge and discharge data acquisition module for a product's power battery pack. (Refer to...) Figure 1 The diagram shown is a flowchart of an external charging and discharging data acquisition module for a power battery pack according to an embodiment of the present invention. The module specifically includes a cell assembly 101, a single-cell voltage monitoring unit 102, an equalization unit 103, a microcontroller unit 104, a communication unit 105, and a power supply unit 106.

[0044] A battery cell assembly 101 is composed of N individual battery cells connected in series.

[0045] The individual cell voltage monitoring unit 102 provides a differential measurement channel for each individual cell. The two ends of the differential measurement channel are respectively connected to the positive and negative terminals of the individual cell, and the obtained differential voltage is output as a single-ended voltage with the system ground as the reference after differential / single-ended conversion.

[0046] The individual unit voltage monitoring unit employs a high common-mode differential amplifier to output accurate single-ended voltage under single power supply.

[0047] The main function of the individual cell voltage monitoring unit 102 is to output a single-ended voltage relative to the system ground based on the differential voltage between the "+" and "−" terminals of each cell, which can be equivalent to a differential amplifier.

[0048] The schematic diagram of the single-unit voltage monitoring unit 102 is as follows: Figure 2 As shown. Input ports CEL+ and CEL− represent the "+" and "−" terminals of the battery cell, respectively, and the output port CELL_VOLTAGE represents the voltage difference between CEL+ and CEL−. The circuit is powered by a 7V supply relative to system ground (GND). This circuit is based on the high common-mode voltage differential amplifier INA149AIDR(U1), which can accurately measure small differential voltages within a common-mode voltage range of −275V to +275V. Under 7V single-supply conditions, its input differential voltage range is 1.5V to 5.5V, covering the 2.5V to 3.65V voltage range of lithium iron phosphate (LiFePO4) cells.

[0049] The equalization unit 103 provides a dissipative equalization branch for each individual cell. The equalization branch includes an isolated gate driver, an N-channel power MOSFET controlled by a microcontroller unit, and a power resistor network connected in series / parallel with the MOSFET. During equalization, the MOSFET is turned on, allowing the individual cell to dissipate charge through the power resistor network. The equalization branch also includes an overcurrent protection fuse connected in series with the individual cell and an overvoltage clamping device connected in parallel across the individual cell.

[0050] The gate of the MOSFET is connected in series with a speed-limiting resistor to control the switching edge; the equivalent resistance of the power resistor network is selected to keep the balancing current in the range of approximately 0.5–0.75A.

[0051] The equalization unit 103 has an overvoltage clamping diode connected in parallel across both ends of the individual cell; and a fuse is connected in series in its branch.

[0052] Specifically, such as Figure 3 As shown, the N-channel power MOSFET is CSD15577Q3A (Q1), and the isolated gate driver is ADUM4121ARIZ (U1). CEL+ and CEL− represent the two connection ports of a single LiFePO4 cell, respectively; CEL4+ represents the port of the fourth cell in the four-cell battery pack, used to power the secondary side of the isolated gate driver; GND indicates the system ground connection. CTRL is a high-active control pin used to initiate the equalization process, while the primary side of the isolated gate driver is powered by a 7V supply, i.e., the first bus voltage described below.

[0053] exist Figure 3In the diagram, VDD1 represents the primary power supply pin, with an input voltage range of 2.5V to 6.5V. Therefore, a diode D2 is added between the 7V power supply and the VDD1 pin to ensure that the VDD1 voltage is below 6.5V. VI+ is the positive control terminal, and VI− is the negative control terminal. All primary-side pins are referenced to GND1.

[0054] VDD2 represents the secondary power supply pin, with an input voltage range of 4.5V to 35V. VOUT is the gate drive output pin; when the drive is on, its voltage is VDD2; when the drive is off, its voltage is GND2 (secondary-side reference ground). CLAMP is the effective Miller clamp pin. When the VOUT voltage is below 2V during the turn-off phase, the internal N-channel MOSFET is turned on, thereby reducing the risk of parasitic mis-turn-on.

[0055] The gate driver is turned on when the difference between VI+ and VI− is greater than 3.5V; it is turned off when the difference is less than 0.3*VDD1. The device also includes an undervoltage lockout (UVLO) function: the driver will stop operating normally when VDD1 is lower than 2.35V or VDD2 is lower than 4.2V.

[0056] An isolated gate driver is used to drive an N-channel power MOSFET. The resistor RGATE of the N-channel power MOSFET is used to limit the rise / fall rate of the VOUT signal to control the gate voltage of the N-channel power MOSFET. The N-channel power MOSFET is connected in series with resistors R1 and R2, while R1 and R2 are connected in parallel. Here, D is the drain of the N-channel power MOSFET, and S is the source. When the isolated gate driver turns on the N-channel power MOSFET, the individual cell discharges through R1, R2, and Q1. Therefore, the on-resistance RDSON of the N-channel power MOSFET is critical to the application.

[0057] The microcontroller unit 104 has its analog input terminals connected to the single-ended voltage outputs of each individual voltage monitoring unit via low-pass filters, and its digital output terminals connected to the control terminals of each equalization unit. The microcontroller unit is configured to execute the following data acquisition algorithm:

[0058] The voltage of each cell is sampled at least 10 times and the average value is taken as the measured value of the cell.

[0059] Software calibration is applied to the measured values ​​to compensate for deviations caused by the analog front end and wiring;

[0060] The lowest value among all the individual cell voltages is taken as the reference voltage. The voltage of any individual cell is compared with the reference voltage. When the difference is not lower than a preset threshold, the corresponding equalization unit is driven to conduct to implement dissipative equalization. Voltage acquisition is paused during the equalization conduction period. After the set holding time is reached, the conduction is turned off and the acquisition, judgment, and equalization conduction cycle is restarted so that equalization can be implemented during charging and discharging.

[0061] The circuit schematic of the microcontroller is as follows: Figure 4 As shown, its main functions include acquiring the voltage of the series-connected cells in the battery pack, controlling the battery balancing circuit based on the aforementioned data acquisition algorithm, and controlling the communication unit 105 to remotely monitor the battery voltage. In the microcontroller unit 104, the digital voltage VCC is provided by a 5V second bus voltage. The analog-to-digital converter (ADC) (AVCC, pin 18) is also supplied with 5V through an LC low-pass filter composed of inductor L2 and capacitor C7. The reset function (pin 29) is connected to 5V via a pull-up resistor, enabling the microcontroller unit to operate normally. The reset pin is also connected to ground via button KEY1; when the button is pressed, the reset pin is pulled to ground, and the microcontroller unit restarts operation. The ground (GND) of the microcontroller unit is connected to the negative terminal of the first individual cell in the battery pack.

[0062] The microcontroller unit (MCU) uses a 10-bit ADC to acquire the voltage of the series-connected battery cells via a 6-pin HADC male interface. Pins 5 and 6 of the interface are connected to GND, while pins 1-4 represent the actual battery voltages, named CEL1_ADC, CEL2_ADC, CEL3_ADC, and CEL4_ADC, respectively. These battery voltages are connected to the ADC channels PC0, PC1, PC2, and PC3 of the MCU (corresponding to pins 23-26 of the controller) via low-pass filters to eliminate high-frequency noise. The low-pass filters are defined by R1-C13, R2-C14, R3-C15, and R14-C16.

[0063] The control signals for the equalization unit 103 are provided by the CTRL1, CTRL2, CTRL3, and CTRL4 network, where CTRLx corresponds to the equalization circuit of individual cell x. CTRL1 is connected to the controller PD3 pin, CTRL2 is connected to PD5, CTRL3 is connected to PD6, and CTRL4 is connected to PB1; therefore, the port D data register and port B data register will be used for the control signals.

[0064] The CAN interface is controlled via a Serial Peripheral Interface (SPI), using the SS, MOSI, MISO, and SCK signals. SS represents the slave select pin, connected to PB2 of the microcontroller; MOSI represents the master output / slave input pin, connected to PB3; MISO represents the master input / slave output pin, connected to PB4; and SCK (serial clock pin) is connected to PB5. The ATMEGA328P-AU microcontroller transmits 1 byte (8 bits) of data via SPI; therefore, to transmit a 10-bit ADC result, two SPI data transmissions are required.

[0065] The communication unit 105 includes a CAN controller connected to the microcontroller via an SPI bus and a CAN transceiver connected to the CAN controller. The communication unit is used to encode and encapsulate the voltage of each individual cell into a CAN data frame and output it to the CAN bus to achieve remote monitoring. The voltage data of each individual cell is carried in two-byte order.

[0066] Among them, such as Figure 5-6 As shown, the battery voltage is transmitted via a CAN transceiver, enabling remote monitoring of the battery cell assembly. The communication unit 1 mainly consists of two components: a CAN controller U7 (model MCP2515 CAN) and a CAN transceiver U13 (model TJA1050T).

[0067] The power supply unit 106 has its input connected to the total positive and total negative terminals of the battery cell assembly. It uses a step-down DC / DC converter to convert the total voltage into a first bus voltage to power the individual cell voltage monitoring unit and the equalization unit. The first bus voltage is then converted into a second bus voltage by a linear regulator and stepped down to power the microcontroller unit and the communication unit.

[0068] Specifically, such as Figure 7-8 As shown, the power supply unit includes a buck switch controller U1, which operates on a constant on-time adjustment principle. The various ports of the buck switch controller are as follows:

[0069] The input power port VIN is connected to the positive terminal (CEL4+) of the battery pack.

[0070] The on-time control and off-time port RT are connected to the positive terminal of the battery pack via a first external resistor and grounded via a capacitor; wherein, if the first external resistor R1 is connected to VIN, the on-time and switching frequency can be set. If RT is grounded, the buck switch controller is turned off.

[0071] The output port VCC of the negative voltage regulator is connected to the input power port and one end of the second external resistor R2 through a capacitor. The other end of the second external resistor R2 is connected to the drain of the PMOS transistor. VCC is used to bias the PMOS transistor.

[0072] The current limit adjustment port ADJ is connected to one end of an RC structure, and the other end of the RC structure is connected to the input power port and the second external resistor R2 respectively; wherein, the current limit threshold is set by the second external resistor R2 between VIN and ADJ.

[0073] The drive port PGATE is connected to the gate of the PMOS transistor;

[0074] The current sensing input port ISEN is connected to the second external resistor;

[0075] The voltage feedback port FB is connected to the output branch of the PMOS, which has a feedback loop consisting of resistors R3, R4, R5 and R6.

[0076] In one embodiment, the CAN bus terminal is equipped with a termination matching resistor and a bidirectional transient suppression device, which are systematically referenced to the negative terminal of the first individual cell connected to the cell group;

[0077] The individual cell voltage monitoring unit and the equalization unit are configured as a group per individual cell and can be expanded and replicated in N steps to adapt to cell groups with different series numbers.

[0078] In summary, after power-on, the power supply unit 106 provides power: the first bus voltage of approximately 7V supplies the individual voltage monitoring unit 102 and the equalization unit 103, and the linearly regulated voltage drop to the second bus of approximately 5V supplies the microcontroller unit 104 and the communication unit 105; after the microcontroller unit 104 completes reset, it initializes SPI and CTRL1…CTRLN as outputs and disables equalization by default. It configures the MCP2515 to 500 kbps and an external clock of 16 MHz via SPI and enters normal mode → enters loop: it samples each individual channel (CEL1_ADC…CELN_ADC after low-pass filtering) ≥10 times and calculates the average value to suppress noise. It performs software calibration on the average value according to the calibration coefficient to obtain the individual voltage Vi → calculates Vmin and compares it with each Vi; if Vi−Vmin≥th threshold Vth, it sets the corresponding CTRLLi to conduct the equalization branch (the isolated gate driver drives the N-channel MOSFET and the power resistor network to achieve dissipative equalization, and RGATE speed limit control switches on the edge), otherwise it remains off and the equalization state is maintained. During the holding period, voltage acquisition is paused to avoid the equalization current introducing measurement errors. Voltage data is packaged and sent via SPI / CAN: Since the ADC is 10-bit and SPI is 8-bit at a time, each unit is carried by two bytes. The lower 8 bits (LSB) are sent first, followed by the higher bits (MSB), in the order CEL1→CEL2→…→CELN. The bus expires and is uniformly shut down and balanced via MCP2515 and TJA1050. The sampling steps are then repeated. In case of abnormal reset / communication failure, all CTRLs are turned off by default. The parameters Vth, bus expiration time and sampling number can be configured to adapt to different serial numbers N and scenarios.

[0079] This external charging and discharging data acquisition module for the power battery pack can be directly connected to existing series cell packs without modifying the original system, facilitating upgrades and deployment. Its individual cell voltage monitoring unit uses a high common-mode differential amplifier to output single-ended voltage. The microcontroller performs multiple samplings of each cell, averages the results, and incorporates software bias calibration, reducing the relative measurement error to approximately 0.03%–0.12%, meeting the requirements for precise monitoring. The equalization unit consists of an isolated gate driver, a low RDS(on) N-channel power MOSFET, and a power resistor network. It starts and stops based on a criterion of comparing the voltage with the lowest individual cell; a difference ≥ a threshold triggers the process. It can achieve a passive equalization current of approximately 0.5–0.73A within the 2.5–3.65V range and can operate under both charging and discharging conditions, significantly shortening the equalization time.

[0080] The communication unit consists of a CAN controller and a CAN transceiver. It reports the voltage of each cell in two-byte format, from low to high bit, according to the cell number. Its modular structure of "each cell as a group" is easy to expand and replicate by N, adapting to cell groups with different series numbers.

[0081] It should be noted that although several modules or units of the system have been mentioned in the detailed description above, this division is not mandatory. In fact, according to exemplary embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0082] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the claims.

[0083] It should be understood that this disclosure is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of this disclosure is limited only by the appended claims.

Claims

1. An externally connected charging and discharging data acquisition module for a power battery pack, characterized in that, include: A battery cell assembly, wherein the battery cell assembly consists of N individual battery cells connected in series; A single-cell voltage monitoring unit is provided, wherein a differential measurement channel is set for each single cell, the two ends of the differential measurement channel are respectively connected to the positive and negative terminals of the single cell, and the obtained differential voltage is output as a single-ended voltage with the system ground as a reference after differential / single-ended conversion; The equalization unit provides a dissipative equalization branch for each individual cell. The equalization branch includes an isolated gate driver, an N-channel power MOSFET controlled by a microcontroller unit, and a power resistor network connected in series / parallel with the MOSFET. During equalization, the MOSFET is turned on, allowing the individual cell to dissipate charge through the power resistor network. The equalization branch also includes an overcurrent protection fuse connected in series with the individual cell and an overvoltage clamping device connected in parallel across the individual cell. The microcontroller unit has its analog input terminals connected to the single-ended voltage outputs of each individual voltage monitoring unit via low-pass filters, and its digital output terminals connected to the control terminals of each equalization unit. The microcontroller unit is configured to execute the following data acquisition algorithm: The voltage of each cell is sampled at least 10 times and the average value is taken as the measured value of the cell. Software calibration is applied to the measured values ​​to compensate for deviations caused by the analog front end and wiring; The lowest value among all the individual cell voltages is selected as the reference voltage. The voltage of any individual cell is compared with the reference voltage. When the difference is not lower than a preset threshold, the corresponding equalization unit is driven to conduct to implement dissipative equalization. Voltage acquisition is paused during the equalization conduction period. After the set holding time is reached, the conduction is turned off and the acquisition, judgment, and equalization conduction cycle is restarted so that equalization can be implemented during both charging and discharging. The module also includes: The communication unit includes a CAN controller connected to the microcontroller via an SPI bus and a CAN transceiver connected to the CAN controller. The communication unit is used to encode and encapsulate the voltage of each individual cell into a CAN data frame and output it to the CAN bus to achieve remote monitoring. The voltage data of each individual cell is carried in two-byte order. The power supply unit has its input connected to the positive and negative terminals of the battery cell assembly. It uses a step-down DC / DC converter to convert the total voltage into a first bus voltage to power the individual cell voltage monitoring unit and the equalization unit. The first bus voltage is then converted into a second bus voltage by a linear regulator and stepped down to power the microcontroller unit and the communication unit.

2. The power battery pack external access charging and discharging data acquisition module according to claim 1, characterized in that, The CAN bus terminal is equipped with a termination matching resistor and a bidirectional transient suppression device, which are systematically referenced to the negative terminal of the first individual cell in the cell group; The individual cell voltage monitoring unit and the equalization unit are configured as a group per individual cell and can be expanded and replicated in N steps to adapt to cell groups with different series numbers.

3. The power battery pack external access charging and discharging data acquisition module according to claim 1, characterized in that, The individual unit voltage monitoring unit employs a high common-mode differential amplifier to output accurate single-ended voltage under single power supply.

4. The power battery pack external access charging and discharging data acquisition module according to claim 1, characterized in that, The MOSFET has a gate connected in series with a speed-limiting resistor to control the switching edge; the equivalent resistance of the power resistor network is selected to keep the balancing current in the range of 0.5–0.75A. The equalization unit has an overvoltage clamping diode connected in parallel across both ends of the individual battery cell; And its branch circuits are connected in series with fuses.

5. The power battery pack external access charging and discharging data acquisition module according to claim 1, characterized in that, The power supply unit includes a buck switch controller, which operates on a constant on-time adjustment principle. The various ports of the buck switch controller are as follows: The input power port is connected to the main positive terminal of the battery pack; The on-time control and off-time port are connected to the positive terminal of the battery pack through a first external resistor and grounded through a capacitor; The output port of the negative voltage regulator is connected to the input power port and one end of the second external resistor via a capacitor, and the other end of the second external resistor is connected to the drain of the PMOS transistor. A current limiting adjustment port is connected to one end of an RC structure, and the other end of the RC structure is connected to the input power port and the second external resistor respectively. The drive port is connected to the gate of the PMOS transistor; The current detection input port is connected to the second external resistor; The voltage feedback port is connected to the output branch of the PMOS.

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