Non-planar wafer simulation method, device, storage medium and electronic equipment

By decomposing the coupled simulation problem of mask and non-planar wafer into three independent models for separate solutions, and employing rigorous coupled-wave analysis, finite-difference time-domain method and transfer matrix method, the problem of low simulation efficiency in existing technologies is solved, and efficient simulation of non-planar wafers is achieved.

CN121328238BActive Publication Date: 2026-03-24HUAXINCHENG (HANGZHOU) TECH CO LTD
View PDF 2 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2025-12-15
Publication Date
2026-03-24

AI Technical Summary

Technical Problem

Existing technologies require full-field electromagnetic solutions for high-dimensional incident angles, multiple polarizations, and three-dimensional spatial meshes when performing joint simulations of masks and non-planar wafers. This leads to a sharp increase in computational load, low simulation efficiency, and difficulty in meeting the needs of rapid iteration of lithography processes and engineering applications.

Method used

The simulation problem of the coupling between the mask and the non-flat wafer is decomposed into three independent models for separate solutions: a model containing both the mask and the flat wafer, a model without the mask but containing the non-flat wafer, and a model without the mask but containing the flat wafer. The simulation is performed using the rigorous coupled-wave analysis method, the finite-difference time-domain method or the finite element method and the transfer matrix method. Finally, the simulated complex amplitude field is generated through combination operations.

Benefits of technology

It effectively avoids the high-dimensional coupling and repetitive calculation problems in traditional simulation, reduces simulation complexity, and thus significantly improves the simulation efficiency of non-planar wafers.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN121328238B_ABST
    Figure CN121328238B_ABST
Patent Text Reader

Abstract

The application discloses a non-flat wafer simulation method, device, storage medium and electronic equipment, wherein the non-flat wafer simulation method comprises the following steps: obtaining a to-be-simulated structure containing a mask and a non-flat wafer; constructing a first simulation model, a second simulation model and a third simulation model based on the to-be-simulated structure, wherein the first simulation model is a model containing the mask and a flat wafer, the second simulation model is a model without the mask and containing the non-flat wafer, and the third simulation model is a model without the mask and containing the flat wafer; performing strict simulation on the first simulation model and the second simulation model to obtain a first complex amplitude field and a second complex amplitude field; performing calculation on the third simulation model by using a transfer matrix method to obtain a third complex amplitude field; and performing combination operation on the first complex amplitude field, the second complex amplitude field and the third complex amplitude field to generate a simulation complex amplitude field of the to-be-simulated structure. The application can improve the simulation efficiency of the non-flat wafer.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This application relates to the field of semiconductor technology, specifically to a non-flat wafer simulation method, apparatus, storage medium, and electronic device. Background Technology

[0002] In advanced semiconductor manufacturing, the accuracy of photolithography directly affects the chip's critical dimensions, edge roughness, and yield. As process nodes advance and the complexity of multilayer interconnect processes increases, wafer surfaces are gradually evolving from approximately planar surfaces to three-dimensional non-planar structures containing trenches, steps, and multilayer stacks. Non-planar topography introduces complex optical effects such as light scattering, phase distortion, and multiple interferences, making it difficult to accurately predict the photolithography light field using traditional flat assumptions. Therefore, the accuracy and efficiency of photolithography simulation have become key challenges in process co-optimization.

[0003] For the simulation of complex photolithographic structures, rigorous electromagnetic solution methods are commonly used, such as the finite-difference time-domain (FDTD), rigorous coupled-wave analysis (RCWA), and the finite element method (FEM), to perform full-model simulations of the mask and non-planar wafer. These methods can describe multiple scattering and phase propagation of the light field to a certain extent.

[0004] However, when performing joint simulation of masks and non-planar wafers, it is necessary to perform full-field electromagnetic solutions for high-dimensional incident angles, multiple polarizations, and three-dimensional spatial grids. The computational load increases sharply with the structural complexity and angle sampling density, resulting in low overall simulation efficiency and difficulty in meeting the needs of rapid iteration of lithography processes and engineering applications. Summary of the Invention

[0005] This application provides a method, apparatus, storage medium, and electronic device for simulating non-planar wafers, which can improve the simulation efficiency of non-planar wafers.

[0006] In a first aspect, embodiments of this application provide a method for simulating non-planar wafers, including:

[0007] Obtain the structure to be simulated, including the mask and the non-planar wafer;

[0008] Based on the structure to be simulated, a first simulation model, a second simulation model, and a third simulation model are constructed. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0009] Rigorous simulations were performed on the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field;

[0010] The third complex amplitude field is obtained by calculating the third simulation model using the transfer matrix method;

[0011] The first complex amplitude field, the second complex amplitude field, and the third complex amplitude field are combined to generate the simulated complex amplitude field of the structure to be simulated.

[0012] In the non-flat wafer simulation method provided in this application embodiment, the step of rigorously simulating the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field includes:

[0013] The first simulation model was simulated using the rigorous coupled-wave analysis method to calculate the complex amplitude field formed on the flat wafer by multiple diffraction orders generated by mask diffraction, thus obtaining the first complex amplitude field.

[0014] The second simulation model is simulated using the finite-difference time-domain method or the finite element method to calculate the scattering field inside the non-flat wafer under direct illumination by the light source, thus obtaining the second complex amplitude field.

[0015] In the non-flat wafer simulation method provided in this application embodiment, the step of calculating the third simulation model using the transfer matrix method to obtain the third complex amplitude field includes:

[0016] Obtain the structural parameters of each film layer in the third simulation model, including thickness, refractive index, and stacking order;

[0017] Construct the overall transmission matrix based on the aforementioned structural parameters;

[0018] Based on the preset incident light source parameters and the overall transmission matrix, the third complex amplitude field of the third simulation model at the wafer surface or equivalent observation surface is calculated.

[0019] In the non-flat wafer simulation method provided in this application embodiment, the step of constructing the overall transfer matrix based on the structural parameters includes:

[0020] Each membrane layer is traversed according to the stacking order;

[0021] The propagation matrix of the currently traversed film layer is calculated based on its thickness and refractive index, and the interface feature matrix at the interface is calculated by combining the refractive indices of the adjacent film layers.

[0022] According to the stacking order, the propagation matrix of each film layer and the interface feature matrix are cascaded layer by layer to generate an overall transmission matrix.

[0023] In the non-planar wafer simulation method provided in this application embodiment, the step of combining the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulation complex amplitude field of the structure to be simulated includes:

[0024] An initial complex amplitude field is obtained by performing an interaction operation on the first complex amplitude field and the second complex amplitude field;

[0025] Based on the third complex amplitude field, the initial complex amplitude field is corrected to generate the simulated complex amplitude field of the structure to be simulated.

[0026] In the non-planar wafer simulation method provided in this application embodiment, the step of performing a reference correction on the initial complex amplitude field based on the third complex amplitude field to generate the simulation complex amplitude field of the structure to be simulated includes:

[0027] The correction coefficient is calculated based on the error between the reference light field and the initial complex amplitude field;

[0028] The initial complex amplitude field is corrected based on the third complex amplitude field and the correction coefficient to generate the simulated complex amplitude field of the structure to be simulated.

[0029] In the non-planar wafer simulation method provided in this application embodiment, the step of correcting the initial complex amplitude field according to the third complex amplitude field and the correction coefficient to generate the simulation complex amplitude field of the structure to be simulated includes:

[0030] The third complex amplitude field is weighted and corrected according to the correction coefficient to generate correction parameters;

[0031] The initial complex amplitude field is corrected using the correction parameters to generate the simulated complex amplitude field of the structure to be simulated.

[0032] Secondly, embodiments of this application provide a non-flat wafer simulation device, comprising:

[0033] The acquisition unit is used to acquire the structure to be simulated, including the mask and the non-planar wafer;

[0034] The construction unit is used to construct a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0035] The simulation unit is used to perform rigorous simulations on the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field;

[0036] The calculation unit is used to calculate the third simulation model using the transfer matrix method to obtain the third complex amplitude field;

[0037] The generation unit is used to perform combined operations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulated complex amplitude field of the structure to be simulated.

[0038] Thirdly, this application provides a storage medium storing a plurality of instructions adapted for loading by a processor to execute any of the above-described non-planar wafer simulation methods.

[0039] Fourthly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the non-flat wafer simulation method described in any of the preceding claims.

[0040] In summary, the non-flat wafer simulation method provided in this application includes obtaining a structure to be simulated that includes a mask and a non-flat wafer; constructing a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated, wherein the first simulation model is a model including a mask and a flat wafer, the second simulation model is a model without a mask and including a non-flat wafer, and the third simulation model is a model without a mask and including a flat wafer; performing rigorous simulation on the first simulation model and the second simulation model to obtain a first complex amplitude field and a second complex amplitude field; calculating the third simulation model using the transfer matrix method to obtain a third complex amplitude field; and performing combined operations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulated complex amplitude field of the structure to be simulated. This application embodiment decomposes the simulation problem of the coupling between the mask and the non-planar wafer into three physically decoupled models for separate solving, and generates a simulated complex amplitude field through combination operations. This effectively avoids the high-dimensional coupling and repetitive calculation problems in traditional simulations, transforms the complexity from combinatorial growth to linear growth, fundamentally reduces the number of calls to rigorous electromagnetic simulation, and thus significantly improves the simulation efficiency of non-planar wafers. Attached Figure Description

[0041] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0042] Figure 1 This is a schematic diagram illustrating an application scenario of the non-flat wafer simulation method provided in the embodiments of this application.

[0043] Figure 2 This is a flowchart illustrating the non-flat wafer simulation method provided in the embodiments of this application.

[0044] Figure 3 This is a schematic diagram of the non-flat wafer simulation device provided in the embodiments of this application.

[0045] Figure 4 This is a schematic diagram of the structure of the electronic device provided in the embodiments of this application. Detailed Implementation

[0046] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0047] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0048] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0049] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0050] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, terms such as "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0051] Currently, when performing joint simulation of masks and non-planar wafers, it is necessary to perform full-field electromagnetic solutions for high-dimensional incident angles, multiple polarizations, and three-dimensional spatial meshes. The computational load increases sharply with the structural complexity and angle sampling density, resulting in low overall simulation efficiency and making it difficult to meet the needs of rapid iteration of lithography processes and engineering applications.

[0052] Based on this, embodiments of this application provide a non-flat wafer simulation method, apparatus, storage medium, and electronic device. Specifically, the non-flat wafer simulation apparatus can be integrated into an electronic device, which can be a server or a terminal, etc. The terminal can include mobile phones, wearable smart devices, tablet computers, laptops, and personal computers (PCs), etc. The server can be a single server or a server cluster composed of multiple servers, and can be a physical server or a virtual server.

[0053] For example, such as Figure 1 As shown, the electronic device can acquire a structure to be simulated, including a mask and a non-planar wafer; based on the structure to be simulated, a first simulation model, a second simulation model, and a third simulation model are constructed. The first simulation model is a model including a mask and a planar wafer, the second simulation model is a model without a mask and including a non-planar wafer, and the third simulation model is a model without a mask and including a planar wafer; the first and second simulation models are rigorously simulated to obtain a first complex amplitude field and a second complex amplitude field; the third simulation model is calculated using the transfer matrix method to obtain a third complex amplitude field; the first, second, and third complex amplitude fields are combined to generate the simulated complex amplitude field of the structure to be simulated.

[0054] The technical solutions shown in this application will be described in detail below through specific embodiments. It should be noted that the order of description of the following embodiments is not intended to limit the priority of the embodiments.

[0055] Please see Figure 2 , Figure 2 This is a flowchart illustrating the non-planar wafer simulation method provided in this application embodiment. The specific flow of the non-planar wafer simulation method is as follows:

[0056] 101. Obtain the structure to be simulated, including the mask and the non-flat wafer.

[0057] In this embodiment of the application, the complete parameters of the structure to be simulated can be obtained from the chip design database or process file.

[0058] The parameters may include two-dimensional or three-dimensional geometric data of the mask layer and its optical constants (complex refractive index), the specific stacking structure of the non-planar wafer, including the three-dimensional morphology of the underlying existing devices (such as FinFET, isolation layer, metal interconnect, etc.), the thickness of each layer of material and its optical constants; and the light source parameters used in the simulation, such as wavelength, polarization state, and illumination mode (conventional, off-axis, etc.).

[0059] 102. Construct a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0060] In this simulation, the physical process of the model to be simulated involves the incident light source first undergoing mask diffraction and then interacting with the non-planar wafer. In this embodiment, this coupling process is decomposed into two independent main effects and a background effect for calibration, thus transforming a large and difficult computational problem into three small and easy sub-problems.

[0061] In the embodiments of this application, a first simulation model, a second simulation model, and a third simulation model can be constructed based on the structure to be simulated.

[0062] The first simulation model comprises a mask and a flat wafer. Its purpose is to study the diffraction effect of the mask in isolation. Specifically, all the geometry (two-dimensional or three-dimensional) of the mask and its material optical constants (complex refractive index) can be completely replicated from the structure to be simulated. The non-flat wafer in the structure to be simulated is then replaced entirely with an equivalent flat wafer, thus obtaining the first simulation model. This embodiment removes all lateral inhomogeneities (such as fins, holes, steps, etc.), making the wafer portion a uniform layer or multiple uniform dielectric layers extending infinitely in the lateral direction.

[0063] It should be noted that the flat wafer is typically defined by the host substrate material (such as silicon) in the wafer stack, or by a calculated equivalent homogeneous dielectric layer that approximates the average optical effect of the entire stack.

[0064] Understandably, this first simulation model simulates the diffraction field formed when an incident light source propagates through an ideal, uniform medium space after passing through a mask. It is the "ideal subject" part of photolithography imaging.

[0065] The second simulation model is a maskless model containing a non-planar wafer. Its purpose is to study the scattering effects of the wafer's own structure in isolation. Specifically, the mask is first completely removed from the structure to be simulated, meaning the simulation domain no longer contains any mask pattern. Then, the entire stacking structure, three-dimensional morphology (including all fins, holes, steps, etc.), and material optical constants of each layer of the non-planar wafer are completely preserved, thus obtaining the second simulation model.

[0066] The second simulation model simulates the reflection, scattering, and interference fields generated when an incident light source directly illuminates a non-planar wafer. Since there is no mask, the incident light source is no longer modulated into hundreds of diffraction orders. Therefore, the simulation only needs to calculate a limited number of incident angles inherent to the incident light source itself (e.g., an off-axis illumination source may have only 2-4 main incident directions), resulting in an order-of-magnitude reduction in computational complexity compared to the original problem, which required calculating hundreds or thousands of angles.

[0067] The third simulation model is a maskless model containing a flat wafer. This third simulation model serves as a calibration or benchmark model to correct for repetitive calculations during the final synthesis. Specifically, it can be constructed in the same way as the second simulation model, by completely removing the mask from the structure to be simulated. Then, in the same way as the first simulation model, the non-flat wafer in the structure to be simulated is replaced entirely with an equivalent flat wafer, thus obtaining the third simulation model.

[0068] The third simulation model describes a simplified background scenario: the propagation of an incident light source in a homogeneous planar multilayer medium. It does not include any diffraction effects from the mask or any lateral scattering effects from the wafer.

[0069] In the specific implementation process, the above construction process can be automated in the following ways:

[0070] For example, scripts can be written to control the "retention", "removal" or "replacement" of each membrane layer through conditional judgment (IF / ELSE) based on the complete parameters of the structure to be simulated, thereby generating definition files for three simulation models in batches.

[0071] For example, in memory, the structure to be simulated can be copied by manipulating the data tree or object describing the structure, and specific films can be "disabled" (removed) or "attribute rewritten" (replaced with flat wafers) to quickly instantiate three simulation models in memory.

[0072] 103. Perform rigorous simulations on the first and second simulation models to obtain the first complex amplitude field and the second complex amplitude field.

[0073] The first simulation model is periodic or quasi-periodic in the horizontal direction (determined by the repeating units of the mask pattern) and is layered and uniform in the vertical direction. Rigorous Coupled-Wave Analysis (RCWA) is designed to handle such periodic structures. This algorithm can calculate the diffraction characteristics of periodic structures extremely efficiently by solving Maxwell's equations in Fourier space (reciprocal space).

[0074] Therefore, the first simulation model can be simulated using the rigorous coupled-wave analysis method to calculate the complex amplitude field formed on the flat wafer by multiple diffraction orders generated by mask diffraction, and thus obtain the first complex amplitude field.

[0075] Specifically, the dielectric constant distribution (or refractive index distribution) of the mask can be expanded into a two-dimensional Fourier series in the transverse direction. Similarly, the electromagnetic field is also expressed in the form of a Fourier series. Then, the expanded dielectric constant and electromagnetic field expressions are substituted into Maxwell's equations. Through rigorous mathematical derivation, Maxwell's equations are transformed into an eigenvalue problem concerning the Fourier coefficients (i.e., the amplitudes of each diffraction order). Subsequently, numerically solving this eigenvalue problem yields the eigenvalues ​​(related to the propagation constant) and eigenvectors (related to the field distribution) of each propagation mode. If the first simulation model contains multiple layers (such as different thin films on a mask, or multiple stacks of flat wafers), boundary conditions with continuous tangential components of the electromagnetic field need to be applied at the interfaces of each layer to decouple the layers. The response of the entire multi-layer structure is then calculated using the S-Matrix method or the transfer matrix method. Finally, the RCWA solver outputs the first complex amplitude field on the surface of the flat wafer or within the photoresist layer.

[0076] It should be noted that the simulation process of this first simulation model was performed one by one for hundreds of incident angles (i.e., diffraction orders) determined by the illumination source and the mask pattern. Although the number of angles is large, the overall calculation is still within an acceptable range due to the efficiency of RCWA for periodic structures.

[0077] The second simulation model is non-periodic in the horizontal direction and non-uniform in the vertical direction, possessing an arbitrary and complex three-dimensional morphology. Therefore, the finite-difference time-domain (FDTD) method or the finite element method (EM) can be used to simulate the second simulation model to calculate the scattering field inside the non-planar wafer under direct illumination by the light source, thus obtaining the second complex amplitude field.

[0078] For example, when using the FDTD method, the entire non-planar wafer structure can be placed in a three-dimensional computational domain first; then, the Yee grid can be used to spatially discretize it. The Yee grid can interleave the electric and magnetic field components in space and time, thereby satisfying Maxwell's equations. In addition, for key areas of complex morphology (such as the edges of fins and the sidewalls of holes), the grid can be refined to accurately capture drastic changes in the field.

[0079] Next, a time step Δt that satisfies the stability condition is selected; a wideband excitation source (such as a Gaussian pulse) is set, whose spectrum covers the wavelength required for the simulation. At each time step, the field value at the next time step can be calculated based on the current field value according to the FDTD update equation (obtained directly from the Maxwell curl equation by difference). It can be understood that this process proceeds step-by-step in the time domain.

[0080] Next, a closed virtual surface is set up within the computational domain to surround the wafer structure. The time-varying electromagnetic field on this surface is recorded. Through near-field to far-field transformation, these time-domain data are converted into frequency-domain data, and the steady-state complex amplitude field distribution on the plane of interest (such as the photoresist layer) is calculated, finally obtaining the second complex amplitude field.

[0081] The simulation process of this second simulation model only requires calculation of a few incident angles of the incident light source itself (for example, there may be 2 for ring illumination and 4 for quadrupole illumination). Compared with the first simulation model, which requires calculation of hundreds of diffraction orders, the computational workload is reduced by 1-2 orders of magnitude.

[0082] In some embodiments, when the wafer structure contains very sharp features or complex materials, the simulation of the second simulation model can be performed using a finite element model (FEM). The steps may include region discretization (mesh generation), basis function selection, constructing the stiffness and mass matrices, and solving large sparse linear equations.

[0083] 104. The third complex amplitude field is obtained by calculating the third simulation model using the transfer matrix method.

[0084] Since the third simulation model is a standard planar multilayer film stack, which is infinitely uniform and isotropic in the lateral direction and does not have any scattering structure, the transfer matrix method (TMM) with extremely fast computation speed can be used to simulate this type of one-dimensional light propagation problem.

[0085] Specifically, the structural parameters of each film layer in the third simulation model can be obtained; an overall transmission matrix can be constructed based on the structural parameters; and the third complex amplitude field of the third simulation model at the wafer surface or equivalent observation surface can be calculated according to the preset incident light source parameters and the overall transmission matrix. The structural parameters include thickness, refractive index, and stacking order.

[0086] The overall transfer matrix describes the total field relationship between the incident and exiting media and is composed of the cascaded characteristic matrices of each film layer.

[0087] Therefore, the step "constructing the overall transmission matrix based on structural parameters" can be specifically as follows: traverse each film layer according to the stacking order; calculate the propagation matrix of the currently traversed film layer based on the thickness and refractive index of the currently traversed film layer, and calculate the interface feature matrix at the interface by combining the refractive index of the adjacent film layers; and cascade the propagation matrix and interface feature matrix of each film layer in the stacking order to generate the overall transmission matrix.

[0088] Then, using the overall transmission matrix, the reflection coefficient and transmission coefficient of the third simulation model can be calculated, and the third complex amplitude field at the wafer surface or equivalent observation surface can be obtained.

[0089] 105. Perform combined calculations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulated complex amplitude field of the structure to be simulated.

[0090] Understandably, the first complex amplitude field describes the pure diffraction effect of the mask and is the main signal for imaging. The second complex amplitude field describes the pure scattering effect of the non-planar wafer structure, which alters the background environment for light propagation. The third complex amplitude field describes the light field distribution against the simplest flat background, which can serve as a reference.

[0091] The goal of the combination operation is to combine the effects represented by the first and second complex amplitude fields, while eliminating redundant calculations or spurious responses that may be introduced by model decomposition. Its mathematical expression can be: Where E1 is the first complex amplitude field, E2 is the second complex amplitude field, E3 is the third complex amplitude field, and E... real To simulate complex amplitude fields, This represents an interaction operator. It is a correction factor.

[0092] Specifically, the interaction operation can first be performed on the first complex amplitude field E1 and the second complex amplitude field E2 to obtain the initial complex amplitude field E. initial : .

[0093] In practical numerical calculations, this interaction operation can be achieved through angular spectrum propagation and local scattering superposition. That is, E1 is decomposed into plane waves in different directions, each plane wave is modulated with E2, which describes the scattering characteristics of the wafer, and then recombined into a new field distribution. This process approximately simulates the interaction between mask diffraction light and the wafer structure.

[0094] Understandably, while the initial complex amplitude field combines two main effects, it may contain errors. The primary source of error is: in In the interaction operations, the contribution of light propagation in the "flat background" is implicitly and repeatedly calculated. To construct this repeating "flat background" portion, a third complex amplitude field E3 needs to be introduced to the initial complex amplitude field E. initial Make corrections.

[0095] That is, after obtaining the initial complex amplitude field E initial Then, based on the third complex amplitude field, the initial complex amplitude field can be corrected to generate the simulated complex amplitude field of the structure to be simulated. Specifically, the correction coefficient can be calculated based on the error between the reference light field and the initial complex amplitude field; the initial complex amplitude field is corrected according to the third complex amplitude field and the correction coefficient to generate the simulated complex amplitude field of the structure to be simulated.

[0096] In the embodiments of this application, the correction coefficient It is not a fixed theoretical value, but an optimized parameter obtained through a calibration process.

[0097] For example, select one or a few representative test structures (e.g., a typical mask pattern and wafer structure). Perform a complete, unsplit, rigorous electromagnetic field simulation on this test structure (e.g., directly simulating "mask + non-planar wafer" using FDTD). The simulation result is then used as a high-precision reference optical field E. ref Simultaneously, steps 101 to 105 of this method can be executed using this test structure to obtain the uncorrected initial field E. initial Then, by optimizing the algorithm, adjustments were made. The value of makes the final result E real =E initial E3 and the reference light field E ref Minimize the difference between them (e.g., minimize the root mean square error).

[0098] In some embodiments, it can be based on the correction factor. The third complex amplitude field E3 is weighted and corrected to generate correction parameters. E3. Finally, using the correction parameters... ·E3 for the initial complex amplitude field E initial Make corrections to generate the simulated complex amplitude field E of the structure to be simulated. real .

[0099] In summary, the non-flat wafer simulation method provided in this application includes obtaining a structure to be simulated that includes a mask and a non-flat wafer; constructing a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated, wherein the first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask that includes a non-flat wafer, and the third simulation model is a model without a mask that includes a flat wafer; performing rigorous simulation on the first simulation model and the second simulation model to obtain a first complex amplitude field and a second complex amplitude field; calculating the third simulation model using the transfer matrix method to obtain a third complex amplitude field; and performing combined operations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulated complex amplitude field of the structure to be simulated. This application embodiment decomposes the simulation problem of the coupling between the mask and the non-planar wafer into three physically decoupled models for separate solving, and generates a simulated complex amplitude field through combination operations. This effectively avoids the high-dimensional coupling and repetitive calculation problems in traditional simulations, transforms the complexity from combinatorial growth to linear growth, fundamentally reduces the number of calls to rigorous electromagnetic simulation, and thus significantly improves the simulation efficiency of non-planar wafers.

[0100] To facilitate better implementation of the non-flat wafer simulation method provided in this application, this application also provides a non-flat wafer simulation apparatus. The meanings of the terms used are the same as in the non-flat wafer simulation method described above, and specific implementation details can be found in the descriptions within the method embodiments.

[0101] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of the non-flat wafer simulation device provided in an embodiment of this application. The non-flat wafer simulation device may include an acquisition unit 201, a construction unit 202, a simulation unit 203, a calculation unit 204, and a generation unit 205.

[0102] Acquisition unit 201 is used to acquire the structure to be simulated, including the mask and the non-planar wafer;

[0103] The construction unit 202 is used to construct a first simulation model, a second simulation model and a third simulation model based on the structure to be simulated. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0104] Simulation unit 203 is used to perform rigorous simulations on the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field;

[0105] The calculation unit 204 is used to calculate the third simulation model using the transfer matrix method to obtain the third complex amplitude field;

[0106] The generation unit 205 is used to perform combined calculations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulated complex amplitude field of the structure to be simulated.

[0107] For specific implementation methods of each of the above units, please refer to the embodiments of the above-described non-planar wafer simulation method, which will not be repeated here.

[0108] In summary, the non-flat wafer simulation device provided in this application embodiment can acquire the structure to be simulated, including a mask and a non-flat wafer, through the acquisition unit 201; the construction unit 202 constructs a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated, wherein the first simulation model is a model including a mask and a flat wafer, the second simulation model is a model without a mask and including a non-flat wafer, and the third simulation model is a model without a mask and including a flat wafer; the simulation unit 203 performs rigorous simulation on the first simulation model and the second simulation model to obtain a first complex amplitude field and a second complex amplitude field; the calculation unit 204 calculates the third simulation model using the transfer matrix method to obtain a third complex amplitude field; and the generation unit 205 performs combined calculations on the first complex amplitude field, the second complex amplitude field, and the third complex amplitude field to generate the simulation complex amplitude field of the structure to be simulated. This application embodiment decomposes the simulation problem of the coupling between the mask and the non-planar wafer into three physically decoupled models for separate solving, and generates a simulated complex amplitude field through combination operations. This effectively avoids the high-dimensional coupling and repetitive calculation problems in traditional simulations, transforms the complexity from combinatorial growth to linear growth, fundamentally reduces the number of calls to rigorous electromagnetic simulation, and thus significantly improves the simulation efficiency of non-planar wafers.

[0109] This application also provides an electronic device that may integrate the non-flat wafer simulation device of this application, such as... Figure 4 As shown, it illustrates a structural schematic diagram of the electronic device involved in the embodiments of this application, specifically:

[0110] The electronic device may include components such as a processor 301 with one or more processing cores and a memory 302 with one or more computer-readable storage media. Those skilled in the art will understand that... Figure 4 The electronic device structure shown does not constitute a limitation on the electronic device and may include more or fewer components than shown, or combine certain components, or have different component arrangements. Wherein:

[0111] The processor 301 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs stored in the memory 302 and / or this application, and by calling data stored in the memory 302, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. Optionally, the processor 301 may include one or more processing cores; preferably, the processor 301 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operation of the storage medium, user interface, and application programs, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 301.

[0112] The memory 302 can be used to store software programs and this application. The processor 301 executes various functional applications and data processing by running the software programs and this application stored in the memory 302. The memory 302 may mainly include a program storage area and a data storage area. The program storage area may store applications required for operating the storage medium and at least one function; the data storage area may store data created based on the use of the electronic device. In addition, the memory 302 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 302 may also include a memory controller to provide the processor 301 with access to the memory 302.

[0113] Although not shown, the electronic device may also include a display unit, an input unit, and a power supply, etc., which will not be described in detail here. Specifically, in this embodiment, the processor 301 in the electronic device loads the executable files corresponding to the processes of one or more application programs into the memory 302 according to the following instructions, and the processor 301 runs the application programs stored in the memory 302 to realize various functions, as follows:

[0114] Obtain the structure to be simulated, including the mask and the non-planar wafer;

[0115] Based on the structure to be simulated, a first simulation model, a second simulation model, and a third simulation model are constructed. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0116] Rigorous simulations were performed on the first and second simulation models to obtain the first and second complex amplitude fields.

[0117] The third complex amplitude field was obtained by calculating the third simulation model using the transfer matrix method;

[0118] The first complex amplitude field, the second complex amplitude field, and the third complex amplitude field are combined to generate the simulated complex amplitude field of the structure to be simulated.

[0119] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be performed by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor.

[0120] Therefore, embodiments of this application provide a storage medium storing a plurality of instructions that can be loaded by a processor to execute steps in any of the methods provided in embodiments of this application. For example, the instructions can execute the following steps:

[0121] Obtain the structure to be simulated, including the mask and the non-planar wafer;

[0122] Based on the structure to be simulated, a first simulation model, a second simulation model, and a third simulation model are constructed. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer.

[0123] Rigorous simulations were performed on the first and second simulation models to obtain the first and second complex amplitude fields.

[0124] The third complex amplitude field was obtained by calculating the third simulation model using the transfer matrix method;

[0125] The first complex amplitude field, the second complex amplitude field, and the third complex amplitude field are combined to generate the simulated complex amplitude field of the structure to be simulated.

[0126] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0127] The storage medium may include: read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0128] Since the instructions stored in the storage medium can execute the steps of any method provided in the embodiments of this application, the beneficial effects that any method provided in the embodiments of this application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0129] The above provides a detailed description of the non-flat wafer simulation method, apparatus, storage medium, and electronic device provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the core ideas of this application. At the same time, those skilled in the art will recognize that there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for simulating non-planar wafers, characterized in that, include: Obtain the structure to be simulated, including the mask and the non-planar wafer; Based on the structure to be simulated, a first simulation model, a second simulation model, and a third simulation model are constructed. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer. Rigorous simulations were performed on the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field; The third complex amplitude field is obtained by calculating the third simulation model using the transfer matrix method; An initial complex amplitude field is obtained by performing an interaction operation on the first complex amplitude field and the second complex amplitude field; The correction coefficient is calculated based on the error between the reference light field and the initial complex amplitude field; The initial complex amplitude field is corrected based on the third complex amplitude field and the correction coefficient to generate the simulated complex amplitude field of the structure to be simulated.

2. The non-planar wafer simulation method as described in claim 1, characterized in that, The rigorous simulation of the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field includes: The first simulation model was simulated using the rigorous coupled-wave analysis method to calculate the complex amplitude field formed on the flat wafer by multiple diffraction orders generated by mask diffraction, thus obtaining the first complex amplitude field. The second simulation model is simulated using the finite-difference time-domain method or the finite element method to calculate the scattering field inside the non-flat wafer under direct illumination by the light source, thus obtaining the second complex amplitude field.

3. The non-planar wafer simulation method as described in claim 1, characterized in that, The calculation of the third simulation model using the transfer matrix method to obtain the third complex amplitude field includes: Obtain the structural parameters of each film layer in the third simulation model, including thickness, refractive index, and stacking order; Construct the overall transmission matrix based on the aforementioned structural parameters; Based on the preset incident light source parameters and the overall transmission matrix, the third complex amplitude field of the third simulation model at the wafer surface or equivalent observation surface is calculated.

4. The non-planar wafer simulation method as described in claim 3, characterized in that, The construction of the overall transmission matrix based on the structural parameters includes: Each membrane layer is traversed according to the stacking order; The propagation matrix of the currently traversed film layer is calculated based on its thickness and refractive index, and the interface feature matrix at the interface is calculated by combining the refractive indices of the adjacent film layers. According to the stacking order, the propagation matrix of each film layer and the interface feature matrix are cascaded layer by layer to generate an overall transmission matrix.

5. The non-planar wafer simulation method as described in claim 1, characterized in that, The step of correcting the initial complex amplitude field based on the third complex amplitude field and the correction coefficient to generate the simulated complex amplitude field of the structure to be simulated includes: The third complex amplitude field is weighted and corrected according to the correction coefficient to generate correction parameters; The initial complex amplitude field is corrected using the correction parameters to generate the simulated complex amplitude field of the structure to be simulated.

6. A non-planar wafer simulation device, characterized in that, include: The acquisition unit is used to acquire the structure to be simulated, including the mask and the non-planar wafer; The construction unit is used to construct a first simulation model, a second simulation model, and a third simulation model based on the structure to be simulated. The first simulation model is a model that includes a mask and a flat wafer, the second simulation model is a model without a mask and includes a non-flat wafer, and the third simulation model is a model without a mask and includes a flat wafer. The simulation unit is used to perform rigorous simulations on the first simulation model and the second simulation model to obtain the first complex amplitude field and the second complex amplitude field; The calculation unit is used to calculate the third simulation model using the transfer matrix method to obtain the third complex amplitude field; A generation unit is used to perform interaction operations on the first complex amplitude field and the second complex amplitude field to obtain an initial complex amplitude field; Based on the error between the reference light field and the initial complex amplitude field, a correction coefficient is calculated; the initial complex amplitude field is corrected according to the third complex amplitude field and the correction coefficient to generate the simulated complex amplitude field of the structure to be simulated.

7. A storage medium, characterized in that, The storage medium stores a plurality of instructions, which are adapted for loading by a processor to execute the non-flat wafer simulation method according to any one of claims 1-5.

8. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the non-flat wafer simulation method as described in any one of claims 1-5.

Citation Information

Patent Citations

  • Modeling method for establishing chip three-dimensional diffusion model in EDA software

    CN113420525A

  • Method, device and medium for simulating wafer processing process

    CN118862368A