Embedded double-layer driving power module and preparation method thereof
By embedding the power chip into the insulating laminate and connecting it with an array of electroplated copper pillars through an embedded dual-layer drive power module structure, the problems of long current paths and thermal stress in traditional power modules are solved. This achieves higher integration and smaller size, reduces parasitic inductance and electromagnetic interference, and improves the reliability of drive signals.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2025-12-10
- Publication Date
- 2026-03-17
AI Technical Summary
Traditional wire-bonded power modules suffer from problems such as long current paths, large parasitic inductance, severe electromagnetic interference, connection failure due to thermal stress, and high complexity in drive signal transmission, making it difficult to meet the design requirements of high-density integrated power electronic systems.
An embedded dual-layer drive power module structure is adopted, in which the power chip is embedded in an insulating laminate, and electrical connection is achieved through an array of electroplated copper pillars. Vertical heat dissipation is carried out at the heat dissipation window, and the upper and lower half-bridge drive circuit layers are integrated to reduce parasitic inductance and optimize the drive circuit layout.
This results in a compact power module structure, reduced parasitic inductance, reduced electromagnetic interference, reduced thermal stress, improved reliability of drive signal transmission, and enhanced overall integration and space utilization.
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Figure CN121335604B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of power device technology, and in particular to an embedded dual-layer drive power module and its fabrication method. Background Technology
[0002] In fields such as power electronic converters, new energy power generation, and industrial drives, power modules serve as the core components for energy conversion and transmission, and their performance determines the efficiency, reliability, and integration of the entire system. Traditional wire-bonded power modules achieve electrical connections between the chip electrodes and substrate pads through bonding wires. The power circuit and commutation path are distributed in a two-dimensional plane, and the drive circuit board is independently connected to the power module body through connectors or additional leads, thus forming a complete working system.
[0003] However, traditional power modules rely on bonding wires ranging from a few millimeters to tens of millimeters in length for power circuit connections. Furthermore, the two-dimensional power circuitry and commutation result in long, dispersed current paths, significantly increasing the parasitic inductance of the power module. This leads to voltage overshoot and current oscillations, while also triggering strong electromagnetic interference (EMI). To suppress EMI, additional high-capacity filtering devices and shielding structures are required, further increasing the device's size, weight, and cost.
[0004] Secondly, during the operation of the power module, the Joule heat generated when the chip is turned on and the heat dissipation when it is turned off create a periodic temperature fluctuation. This leads to significant thermal stress between different materials such as the chip, bonding wires, and substrate due to the mismatch in their coefficients of thermal expansion. This thermal stress repeatedly acts on the bonding wires and their interfaces, and over time, it can easily cause failures such as bond point detachment, bonding wire breakage, or interface cracks.
[0005] Furthermore, in traditional wire-bonded power modules, the power unit and drive unit are independent. The drive circuit board needs to be connected to the control electrodes and detection ports of the power module through multiple sets of connectors and leads. This discrete design not only increases the complexity of the assembly process and labor costs, but also results in a longer drive signal transmission path, making it more susceptible to external interference and affecting the accuracy and synchronization of the drive signal. At the same time, the independent drive board and power module occupy a large space, which is not conducive to the optimization of the internal layout of the equipment and makes it difficult to meet the design requirements of high-density integrated power electronic systems. Summary of the Invention
[0006] To address the aforementioned issues, this invention proposes an embedded dual-layer drive power module and its fabrication method. The power chip is embedded in an insulating laminate, and an array-type electroplated copper pillar process is used to replace bonding wires for electrical connection. This shortens the path of the power main circuit and freewheeling loop in the upper and lower half-bridge drive circuits, thereby reducing parasitic inductance.
[0007] To achieve the above objectives, the present invention adopts the following technical solution:
[0008] In a first aspect, the present invention provides an embedded dual-layer drive power module, which includes, from top to bottom, an upper half-bridge drive circuit layer, a first solder mask layer, a first copper layer, an insulating laminate, a second copper layer, a second solder mask layer, a lower half-bridge drive circuit layer, and a heat sink.
[0009] The insulating laminate contains an embedded power chip, which is electrically connected to the first copper layer via an array of electroplated copper pillars. A heat dissipation window is provided in the second solder mask area directly below the power chip.
[0010] As an alternative implementation, the drive terminals of the power chip are electrically connected to the first copper layer by an array of electroplated copper pillars.
[0011] As an alternative implementation, an array of electroplated copper pillars is used to achieve electrical connection between the gate / source of the power chip and the upper and lower half-bridge drive circuit layers.
[0012] As an alternative implementation method, an array of electroplated copper pillars is prepared using a drilling and copper deposition technique.
[0013] As an alternative implementation, a nano-silver sintered bonding layer is prepared beneath the power chip, and the power terminals of the power chip are connected to the second copper layer through the nano-silver sintered bonding layer.
[0014] As an alternative implementation, a semi-insulating silicon carbide ceramic plate is welded at the heat dissipation window using an active solder.
[0015] As an alternative implementation, a heat sink is provided below the semi-insulating silicon carbide ceramic plate.
[0016] As an alternative implementation, the semi-insulating silicon carbide ceramic plate uses polycrystalline diamond.
[0017] As an alternative implementation, an electrical connection is made between the first copper layer and the second copper layer via a rectangular copper pillar.
[0018] Secondly, the present invention provides a method for fabricating an embedded dual-layer drive power module, comprising:
[0019] The upper half-bridge driver circuit layer, the first solder mask layer, the first copper layer, the insulating laminate, the second copper layer, the second solder mask layer, the lower half-bridge driver circuit layer, and the heat sink are sequentially mounted on the PCB from top to bottom.
[0020] Embed power chips in insulating laminates;
[0021] The power chip's drive terminals are electrically connected to the first copper layer, the upper half-bridge drive circuit layer, and the lower half-bridge drive circuit layer via an array of electroplated copper pillars.
[0022] A nano-silver sintered bonding layer is fabricated beneath the power chip, and the power terminals of the power chip are electrically connected to the second copper layer through the nano-silver sintered bonding layer.
[0023] A heat dissipation window is set in the area of the second solder mask layer directly below the power chip, and a semi-insulating silicon carbide ceramic plate is welded at the heat dissipation window.
[0024] A heat sink is placed below the semi-insulating silicon carbide ceramic plate.
[0025] Compared with the prior art, the beneficial effects of the present invention are as follows:
[0026] This invention proposes an embedded dual-layer drive power module and its fabrication method. An upper half-bridge drive circuit layer and a lower half-bridge drive circuit layer are integrated on the upper and lower surfaces of the power module body, respectively, resulting in higher overall integration and a smaller size. The power chip is embedded in an insulating laminate, and an array-type electroplated copper pillar process is used instead of bonding wires for electrical connection, making the power module structure more compact. This shortens the paths of the main power circuit and freewheeling loop in the upper and lower half-bridge drive circuits, reducing parasitic inductance and solving the problem of high parasitic inductance in the power module. A window-type heat dissipation method is used on the lower side of the power module to reduce the junction temperature of the power chip. The window portion is made by welding highly thermally conductive polycrystalline diamond with active solder.
[0027] Advantages of additional aspects of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description
[0028] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.
[0029] Figure 1 This is a schematic diagram of the embedded dual-layer drive power module structure provided in Embodiment 1 of the present invention;
[0030] Figure 2 This is a schematic diagram of a three-dimensional model of the embedded dual-layer drive power module provided in Embodiment 1 of the present invention;
[0031] Figure 3 A schematic diagram of a traditional bonded wire power module in three dimensions;
[0032] The components are as follows: 1. Upper half-bridge drive circuit layer; 2. Rectangular copper pillars; 3. Arrayed electroplated copper pillars; 4. SiC MOSFET chip; 5. Insulating laminate; 6. Polycrystalline diamond; 7. Heat sink; 8. Nano-silver sintered bonding layer; 9. First copper layer; 10. First solder resist layer; 11. Second copper layer; 12. Second solder resist layer; 13. Lower half-bridge drive circuit layer. Detailed Implementation
[0033] The present invention will be further described below with reference to the accompanying drawings and embodiments.
[0034] It should be noted that the following detailed descriptions are exemplary and intended to provide further illustration of the invention. Unless otherwise specified, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains.
[0035] It should be noted that the terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the scope of exemplary embodiments according to the invention. As used herein, unless the context clearly indicates otherwise, the singular form is intended to include the plural form as well. Furthermore, it should be understood that the terms “comprising” and “including”, and any variations thereof, are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.
[0036] Where there is no conflict, the embodiments and features in the embodiments of the present invention can be combined with each other.
[0037] Example 1
[0038] To address the issue of high parasitic inductance in power modules, this embodiment provides an embedded dual-layer drive power module based on array-type electroplated copper pillar connections. The power chip (using a SiC MOSFET chip as an example in this embodiment) is embedded in an insulating laminate, and an array-type electroplated copper pillar process is used to replace bonding wires for electrical connection. This makes the power module structure more compact, shortens the path of the power main circuit and freewheeling loop in the upper and lower half-bridge drive circuits, and reduces parasitic inductance.
[0039] like Figures 1-2 As shown, the embedded dual-layer drive power module includes a PCB board, and from top to bottom, the following components are arranged on the PCB board: an upper half-bridge drive circuit layer 1, a first solder mask layer 10, a first copper layer 9, an insulating laminate 5, a second copper layer 11, a second solder mask layer 12, a lower half-bridge drive circuit layer 13, and a heat sink 7.
[0040] An insulating laminate 5 is embedded with a power chip. The power chip is electrically connected to the first copper layer 9 through an array of electroplated copper pillars 3. A heat dissipation window is provided in the area of the second solder mask layer 12 directly below the power chip.
[0041] like Figure 3 The image shows a 3D model of a traditional bonded wire power module. Due to the fact that traditional bonded wire power modules are prone to bond point detachment and cracking under temperature fluctuations during operation, the reliability of the circuit connection is affected.
[0042] Therefore, in this embodiment, the SiC MOSFET chip 4 is embedded in the insulating laminate 5, which is made of epoxy board FR4; and the SiC MOSFET chip 4 is electrically connected to the first copper layer 9 by using an array of electroplated copper pillars 3 instead of traditional bonding wires. The array of electroplated copper pillars 3 has high reliability, is easy to implement in terms of process, has low manufacturing cost, and long service life; and the average current density at the connection between the SiC MOSFET chip 4 and the upper first copper layer 9 is small, resulting in less electrical stress on the SiC MOSFET chip 4.
[0043] In addition, the SiC MOSFET chip 4 is embedded in the insulating laminate 5, making the overall structure of the power module more compact and the parasitic inductance smaller. The thermal expansion forces of the upper and lower SiC MOSFET chip 4 are similar, and they cancel each other out well.
[0044] In this embodiment, an array of electroplated copper pillars is prepared using a drilling and copper plating technique to facilitate the internal circuit design of the PCB board. This also enables the connection of the gate and source of the SiC MOSFET chip 4 to the upper and lower half-bridge drive circuit layers mounted on the PCB board surface (i.e., the gate / source of the upper half-bridge is connected to the upper half-bridge drive circuit layer, and the gate / source of the lower half-bridge is connected to the lower half-bridge drive circuit layer). The array of electroplated copper pillars serves two purposes: firstly, to allow a large current to flow from the source of the SiC MOSFET chip 4, and secondly, to transmit the gate drive signal with a small current flowing from the gate.
[0045] In this embodiment, a rectangular copper pillar 2 is used to electrically connect the first copper layer 9 and the second copper layer 11 to achieve three-dimensional commutation.
[0046] In this embodiment, a nano-silver sintered connection layer 8 is prepared under the SiC MOSFET chip 4 using silver sintering technology. The power terminal (drain) of the SiC MOSFET chip 4 is connected to the second copper layer 11 through the nano-silver sintered connection layer 8. The small size of the power terminal of the SiC MOSFET chip 4 helps to reduce the parasitic inductance of the terminal.
[0047] In some existing technologies, the driving circuit is not integrated on the PCB board. Instead, there is an ultra-high thermal conductivity insulating layer on the underside of the PCB board, followed by a layer of copper metal. There is no solder mask layer, which means that it is impossible to place the components required for the driving circuit below. Alternatively, the lower circuit board is a ceramic substrate, and the components required for the driving circuit are not considered for placement below it.
[0048] In this embodiment, the upper layer of the power module adopts the form of a first copper layer 9 superimposed on a first solder mask layer 10. Above the first solder mask layer 10, i.e., on the top surface of the PCB board, the upper half-bridge drive circuit layer 1 is mounted. The lower layer of the power module adopts the form of a second copper layer 11 superimposed on a second solder mask layer 12. Below the second solder mask layer 12, i.e. on the bottom surface of the PCB board, the lower half-bridge drive circuit layer 13 is mounted. The drive circuit part can be laid out in a larger space, so that the space occupied by the drive circuit part and the power chip part together is smaller, the overall integration of the power module is higher, and the size is smaller.
[0049] Furthermore, by placing the upper half-bridge drive circuit layer 1 and the lower half-bridge drive circuit layer 13 on the upper and lower surfaces of the PCB board respectively, they can achieve better independent operation and have less electromagnetic interference with each other. The interference signal generated by the upper half-bridge drive circuit layer 1 is effectively isolated and shielded by the insulating laminate 5 to avoid interference with the lower half-bridge drive circuit layer 13. Similarly, the interference signal generated by the lower half-bridge drive circuit layer 13 is effectively isolated and shielded by the insulating laminate 5 to avoid interference with the upper half-bridge drive circuit layer 1.
[0050] Although the embedded dual-layer drive power module provided in this embodiment has a smaller parasitic inductance, a layer of solder resist is coated on both the upper and lower parts of the PCB board, thus forming a solder resist layer, which has poor heat dissipation performance. In order to integrate the drive circuit layer on both the upper and lower surfaces of the power module, this embodiment performs a windowing treatment in the vertically downward second solder resist layer 12 region of the SiC MOSFET chip 4 to dissipate heat through the heat dissipation window and reduce the junction temperature of the SiC MOSFET chip 4.
[0051] At the heat dissipation window, a semi-insulating silicon carbide ceramic plate slightly larger than the surface area of the SiC MOSFET chip 4 is soldered using active solder. A heat sink 7 is placed below the semi-insulating silicon carbide ceramic plate to enable vertical heat dissipation of the SiC MOSFET chip 4, thus solving the heat dissipation problem of the power module.
[0052] Among them, the semi-insulating silicon carbide ceramic plate uses polycrystalline diamond 6 with high thermal conductivity.
[0053] In this process, a solder mask layer is applied to the copper layer using methods such as curtain coating, spraying, or screen printing. The drive circuit can only be mounted with a solder mask layer. The solder mask layer serves as insulation protection, prevents short circuits, prevents oxidation of the surface copper, restricts solder placement, and improves soldering quality.
[0054] Verification example.
[0055] (1) Multiphysics simulation software was used to perform multiphysics simulation on the above-mentioned embedded dual-layer drive power module.
[0056] Based on the packaging model of the power module, material parameters are set to perform electro-thermal-mechanical multiphysics coupling simulation, and electrical stress simulation is performed on the chip part of the traditional power module and the chip part of the power module in this embodiment.
[0057] Simulation conditions: Steady-state simulations were performed with a rated current of 120A applied to the upper half-bridge of both power modules. The module base plate used oil cooling for heat dissipation, with a convective heat transfer coefficient of 3000 W / (m·K). The base plate was fixed and subjected to rigid body motion suppression. Multiphysics simulation results are shown in Table 1. It can be seen that the maximum current density of the power chip within the embedded dual-layer drive power module provided in this embodiment is relatively small, avoiding large local current stress.
[0058] Table 1. Multiphysics simulation results;
[0059] .
[0060] (2) The parasitic inductance of the embedded dual-layer drive power module of this embodiment is extracted and compared with that of the wire bonded power module of the same voltage and current level. The results of the parasitic inductance extraction are shown in Table 2. Compared with the traditional wire bonded power module, the embedded dual-layer drive power module provided in this embodiment has smaller parasitic inductance and parasitic resistance, which is more advantageous in use, with faster switching speed, lower switching loss, and avoidance of voltage spikes.
[0061] Table 2. Results of parasitic inductance extraction;
[0062] .
[0063] Example 2
[0064] This embodiment provides a method for fabricating an embedded dual-layer drive power module, including:
[0065] The upper half-bridge driver circuit layer, the first solder mask layer, the first copper layer, the insulating laminate, the second copper layer, the second solder mask layer, the lower half-bridge driver circuit layer, and the heat sink are sequentially mounted on the PCB from top to bottom.
[0066] Embed power chips in insulating laminates;
[0067] The power chip's drive terminals are electrically connected to the first copper layer, the upper half-bridge drive circuit layer, and the lower half-bridge drive circuit layer via an array of electroplated copper pillars.
[0068] A nano-silver sintered bonding layer is fabricated beneath the power chip, and the power terminals of the power chip are electrically connected to the second copper layer through the nano-silver sintered bonding layer.
[0069] A heat dissipation window is set in the area of the second solder mask layer directly below the power chip, and a semi-insulating silicon carbide ceramic plate is welded at the heat dissipation window.
[0070] A heat sink is placed below the semi-insulating silicon carbide ceramic plate.
[0071] While the specific embodiments of the present invention have been described above in conjunction with the accompanying drawings, this is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art without creative effort based on the technical solutions of the present invention are still within the scope of protection of the present invention.
Claims
1. An embedded double layer drive power module, characterized by, From top to bottom in turn includes: the upper half bridge drive circuit layer, the first solder resist layer, the first copper layer, the insulation laminate, the second copper layer, the second solder resist layer, the lower half bridge drive circuit layer and the heat sink; The power chip is embedded in the insulation laminate, and the power chip is electrically connected with the first copper layer through the array type electroplated copper column, and the gate electrode / source electrode of the power chip is electrically connected with the upper half bridge drive circuit layer and the lower half bridge drive circuit layer through the array type electroplated copper column; A nano-silver sintering connection layer is prepared below the power chip, and the power terminal of the power chip is connected with the second copper layer through the nano-silver sintering connection layer; A heat dissipation window is arranged in the second solder resist layer region directly below the power chip, and the semi-insulating silicon carbide ceramic plate is welded at the heat dissipation window through active solder.
2. An embedded double-sided drive power module as claimed in claim 1, characterized in that The driving terminal of the power chip is electrically connected with the first copper layer through the array type electroplated copper column.
3. An embedded double-sided drive power module as defined in claim 1, wherein, The array type electroplated copper column is prepared by drilling and then sinking copper.
4. An embedded double-sided drive power module as defined in claim 1, wherein, The heat sink is arranged below the semi-insulating silicon carbide ceramic plate.
5. An embedded double-sided drive power module as defined in claim 1, wherein, The semi-insulating silicon carbide ceramic plate adopts polycrystalline diamond.
6. An embedded double-sided drive power module as defined in claim 1, wherein, The rectangular copper column is arranged between the first copper layer and the second copper layer to electrically connect them.
7. A method of fabricating an embedded double layer drive power module, characterized by, It comprises: From top to bottom in turn on the PCB, the upper half bridge drive circuit layer, the first solder resist layer, the first copper layer, the insulation laminate, the second copper layer, the second solder resist layer, the lower half bridge drive circuit layer and the heat sink are attached; The power chip is embedded in the insulation laminate; The driving terminal of the power chip is electrically connected with the first copper layer and the upper half bridge drive circuit layer and the lower half bridge drive circuit layer through the array type electroplated copper column; A nano-silver sintering connection layer is prepared below the power chip, and the power terminal of the power chip is electrically connected with the second copper layer through the nano-silver sintering connection layer; A heat dissipation window is arranged in the second solder resist layer region directly below the power chip, and the semi-insulating silicon carbide ceramic plate is welded at the heat dissipation window through active solder. The heat sink is arranged below the semi-insulating silicon carbide ceramic plate.
Citation Information
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