Ultrasonic fingerprint chip, integral clock generation method and device of ultrasonic fingerprint chip

Abstract

This specification provides an ultrasonic fingerprint chip, a method for generating an integrating clock for the ultrasonic fingerprint chip, and an apparatus. Suitable fingerprint pixel units can be selected from multiple fingerprint pixel units as a first type of pixel unit and a second type of pixel unit, and then connected to a first type of detection circuit and a second type of detection circuit, respectively. In the first type of detection circuit, a first integrator is sequentially connected to a first comparator, a time delay adjuster, a clock frequency replicator, and a frequency divider circuit; the frequency divider circuit is connected to the second type of detection circuit. In the second type of detection circuit, a second integrator is connected to an amplification structure; the amplification structure is also connected to a second comparator; the second comparator is connected to the time delay adjuster in the first type of detection circuit. This circuit can automatically generate an integrating clock signal with high accuracy and good performance that is adapted to the ultrasonic fingerprint echo signal, thereby accurately processing the received ultrasonic fingerprint echo signal and obtaining a high-quality target signal.

Description

Technical Field

[0001] This specification pertains to the field of fingerprint recognition technology, and particularly relates to ultrasonic fingerprint chips, methods and apparatus for generating an integral clock for ultrasonic fingerprint chips. Background Technology

[0002] Compared to traditional capacitive fingerprint recognition technology, ultrasonic fingerprint recognition technology has attracted increasing attention due to its higher recognition capabilities, better applicability, and greater integration.

[0003] However, most existing ultrasonic fingerprint recognition technologies simply generate an integral clock signal based on the start of coding in the ultrasonic signal transmitting circuit. The integral clock signal generated in this way often has significant uncertainties, making it impossible to ensure that the actual integral clock signal used by the receiving circuit is aligned with the received ultrasonic echo signal. This results in poor quality and large errors in the fingerprint signal output by the receiving circuit after processing the ultrasonic echo signal based on the integral clock signal, affecting the accuracy of subsequent fingerprint recognition processing.

[0004] There is currently no effective solution to the above problems. Summary of the Invention

[0005] This specification provides an ultrasonic fingerprint chip, a method and apparatus for generating an integral clock for the ultrasonic fingerprint chip, which can automatically generate an integral clock signal with high accuracy and good effect that is compatible with the ultrasonic fingerprint echo signal.

[0006] This specification provides an ultrasonic fingerprint chip, including an ultrasonic fingerprint pixel unit array; the ultrasonic fingerprint pixel unit array includes at least a first type of pixel unit and a second type of pixel unit.

[0007] The first type of pixel unit is connected to the first type of detection circuit. The first integrator in the first type of detection circuit is sequentially connected to the first comparator, the time delay regulator, the clock frequency replicator, and the frequency divider circuit; wherein, the frequency divider circuit is connected to the second type of detection circuit.

[0008] The second type of pixel unit is connected to the second type of detection circuit, and the second integrator in the second type of detection circuit is connected to the amplification structure; wherein, the amplification structure is also connected to the second comparator; the second comparator is connected to the time delay adjuster in the first type of detection circuit;

[0009] When the ultrasonic fingerprint chip receives the ultrasonic fingerprint echo signal, it generates a target signal that meets the requirements based on the first type of pixel unit and the second type of pixel unit.

[0010] In one embodiment, when an ultrasonic fingerprint echo signal is received, the first type of detection circuit is used to generate at least a first integral clock signal and a second integral clock signal, respectively; the second type of detection circuit is used to detect and generate a first integral effect with respect to the first integral clock signal and the second integral clock signal, and feed the first integral effect back to the first type of detection circuit; the first type of detection circuit is also used to generate a target integral clock signal that meets the requirements based on the first integral effect.

[0011] The target integration clock signal is used to generate a target signal that meets the requirements.

[0012] In one embodiment, the frequency division circuit is also connected to the remaining fingerprint pixel units in the ultrasonic fingerprint pixel unit array, excluding the first type of pixel units and the second type of pixel units; wherein, the fingerprint pixel units are used to process the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

[0013] In one embodiment, the first input terminal of the first integrator is connected to the lower plate of the first piezoelectric sensor of the first type of detection circuit, and the upper plate of the first piezoelectric sensor is used to receive ultrasonic fingerprint echo signals.

[0014] A first branch is connected between the lower electrode plate of the first piezoelectric sensor and the first input terminal of the first integrator; wherein the first branch is grounded and a first switch is provided on the first branch.

[0015] In one embodiment, the second input terminal of the first integrator is connected to a second branch; wherein the second branch is grounded and a second switch is provided on the second branch.

[0016] In one embodiment, the second input terminal of the second integrator is connected to the lower plate of the second piezoelectric sensor of the second type of detection circuit, and the upper plate of the second piezoelectric sensor is used to receive the ultrasonic fingerprint echo signal; the amplification structure is also connected to a digital-to-analog converter;

[0017] A third branch is connected between the lower electrode of the second piezoelectric sensor and the second input terminal of the second integrator; wherein, the third branch is connected to the first reference voltage.

[0018] In one embodiment, the first input terminal of the second integrator is connected to a second reference voltage.

[0019] In one embodiment, the second type of detection circuit is further configured to process the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

[0020] In one embodiment, the first type of detection circuit is further connected to a temperature sensing circuit, or the ultrasonic fingerprint chip further includes a temperature sensing circuit; wherein the temperature sensing circuit is used to monitor ambient temperature change data.

[0021] This specification also provides an embodiment of an integral clock generation method for an ultrasonic fingerprint chip, applied to the ultrasonic fingerprint chip, comprising:

[0022] When an ultrasonic fingerprint echo signal is received, the first type of detection circuit generates a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal.

[0023] The first type of detection circuit generates a second integral clock signal based on the first integral clock signal through time delay adjustment;

[0024] The ultrasonic echo signal is processed using the second type of detection circuit based on the first and second integral clock signals, respectively, to obtain the first integration effect of the first and second integral clock signals; and the first integration effect is fed back to the first type of detection circuit.

[0025] The target integration clock signal that meets the requirements is determined by using the first type of detection circuit based on the first integration effect.

[0026] In one embodiment, after processing the ultrasonic echo signal using a second type of detection circuit based on a first integrating clock signal and a second integrating clock signal respectively to obtain a first integrating effect with respect to the first integrating clock signal and the second integrating clock signal; and feeding back the first integrating effect to the first type of detection circuit, the method further includes:

[0027] When the first integration effect does not meet the preset requirements, the first type of detection circuit generates a third integration clock signal based on the second integration clock signal and through time delay adjustment.

[0028] The ultrasonic echo signal is processed using the second type of detection circuit based on the second and third integral clock signals, respectively, to obtain the second integration effect of the second and third integral clock signals; and the second integration effect is fed back to the first type of detection circuit.

[0029] In one embodiment, after processing the ultrasonic echo signal using a second type of detection circuit based on a first integrating clock signal and a second integrating clock signal respectively to obtain a first integrating effect with respect to the first integrating clock signal and the second integrating clock signal; and feeding back the first integrating effect to the first type of detection circuit, the method further includes:

[0030] When the first integration effect meets the preset requirements, the target integration clock signal that meets the requirements is determined by the first type of detection circuit based on the first integration clock signal and the second integration clock signal.

[0031] The target integration clock signal is sent to the connected fingerprint pixel unit using a first type of detection circuit; and a corresponding processing trigger signal is sent to the fingerprint pixel unit; wherein, the fingerprint pixel unit responds to the processing trigger signal and processes the received ultrasonic fingerprint echo signal based on the target integration clock signal.

[0032] This specification also provides an integrating clock generating device for an ultrasonic fingerprint chip, applied to an ultrasonic fingerprint chip, comprising:

[0033] The first generation module is used to generate a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal when the ultrasonic fingerprint echo signal is received, using the first type of detection circuit.

[0034] The second generation module is used to generate a second integral clock signal by adjusting the time delay based on the first integral clock signal using the first type of detection circuit.

[0035] The feedback module is used to process the ultrasonic echo signal based on the first integrating clock signal and the second integrating clock signal using the second type of detection circuit, respectively, to obtain the first integration effect with respect to the first integrating clock signal and the second integrating clock signal; and to feed back the first integration effect to the first type of detection circuit.

[0036] The determination module is used to determine the target integration clock signal that meets the requirements based on the first integration effect using the first type of detection circuit.

[0037] This specification also provides an electronic device, including a processor and a memory for storing processor-executable instructions, wherein the processor executes the instructions to implement the steps of the ultrasonic fingerprint chip integration clock generation method.

[0038] This specification also provides a computer-readable storage medium storing computer instructions that, when executed by a processor, implement the steps of the ultrasonic fingerprint chip's integral clock generation method.

[0039] Based on the ultrasonic fingerprint chip, the method and apparatus for generating an integrating clock for the ultrasonic fingerprint chip provided in this specification, the structure of the ultrasonic fingerprint chip can be modified before implementation. First, suitable fingerprint pixel units are selected from multiple fingerprint pixel units as first-type pixel units and second-type pixel units. Then, the first-type pixel units and second-type pixel units are respectively connected to corresponding first-type detection circuits and second-type detection circuits to obtain the modified ultrasonic fingerprint chip. Specifically, in the ultrasonic fingerprint chip, the first integrator in the first-type detection circuit is sequentially connected to a first comparator, a time delay regulator, a clock frequency replicator, and a frequency divider circuit; the frequency divider circuit is connected to the second-type detection circuit; the second integrator in the second-type detection circuit is connected to an amplification structure; the amplification structure is also connected to a second comparator; the second comparator is connected to the time delay regulator in the first-type detection circuit. In practical implementation, based on this ultrasonic fingerprint chip, when an ultrasonic fingerprint echo signal is received, at least two different integral clock signals, a first integral clock signal and a second integral clock signal, can be generated locally using a first type of detection circuit. A second type of detection circuit detects and generates a first integration effect of the first and second integral clock signals, and feeds this first integration effect back to the first type of detection circuit. Then, based on the first integration effect, the first type of detection circuit finally generates a target integral clock signal that meets the requirements. This allows for the automatic generation of an integral clock signal with high accuracy and good effect that is compatible with the ultrasonic fingerprint echo signal. Furthermore, based on this integral clock signal, the received ultrasonic fingerprint echo signal can be accurately processed to obtain a high-quality target signal. Attached Figure Description

[0040] To more clearly illustrate the embodiments of this specification, the accompanying drawings used in the embodiments will be briefly introduced below. The drawings described below are only some embodiments recorded in this specification. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 This is a schematic diagram of the structural composition of an ultrasonic fingerprint chip provided in one embodiment of this specification;

[0042] Figure 2 This is a schematic diagram of the circuit structure of a fingerprint pixel unit provided in one embodiment of this specification;

[0043] Figure 3 This is a schematic diagram illustrating one embodiment of the ultrasonic fingerprint chip provided in this specification, applied in a scenario example.

[0044] Figure 4This is a schematic diagram illustrating one embodiment of the ultrasonic fingerprint chip provided in this specification, applied in a scenario example.

[0045] Figure 5 This is a schematic flowchart of an embodiment of the ultrasonic fingerprint chip integration clock generation method provided in this specification;

[0046] Figure 6 This is a schematic diagram of one embodiment of the ultrasonic fingerprint chip integration clock generation method provided in the embodiments of this specification, applied in a scenario example.

[0047] Figure 7 This is a schematic diagram of one embodiment of the ultrasonic fingerprint chip integration clock generation method provided in the embodiments of this specification, applied in a scenario example.

[0048] Figure 8 This is a schematic diagram of one embodiment of the ultrasonic fingerprint chip integration clock generation method provided in the embodiments of this specification, applied in a scenario example.

[0049] Figure 9 This is a schematic diagram of the structural composition of an electronic device provided in one embodiment of this specification;

[0050] Figure 10 This is a schematic diagram of the structural composition of an integrating clock generating device for an ultrasonic fingerprint chip provided in one embodiment of this specification;

[0051] Figure 11 This is a schematic diagram illustrating one embodiment of the ultrasonic fingerprint chip provided in this specification, applied in a scenario example.

[0052] Figure 12 This is a schematic diagram illustrating one embodiment of the ultrasonic fingerprint chip provided in the embodiments of this specification, applied in a scenario example. Detailed Implementation

[0053] To enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this specification, and not all embodiments. Based on the embodiments in this specification, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this specification.

[0054] It should be noted that the information and data related to users involved in the embodiments of this specification are all information and data authorized by the user or fully authorized by the relevant parties. Furthermore, the collection, storage, use, processing, transmission, provision, disclosure, and application of the relevant data all comply with relevant laws, regulations, and standards, and necessary confidentiality measures have been taken. They do not violate public order and good morals, and corresponding operation entry points are provided for users or relevant parties to choose to authorize or refuse.

[0055] It should also be noted that in the embodiments of this specification, certain software, components, models and other existing solutions in the industry may be mentioned. These should be regarded as exemplary and are only intended to illustrate the feasibility of implementing the technical solution of this application. However, they do not mean that the applicant has used or necessarily used the solution.

[0056] See Figure 1 As shown in the figure, this specification provides an ultrasonic fingerprint chip, including an ultrasonic fingerprint pixel unit array; the ultrasonic fingerprint pixel unit array includes at least a first type of pixel unit and a second type of pixel unit;

[0057] The first type of pixel unit is connected to the first type of detection circuit. The first integrator in the first type of detection circuit is sequentially connected to the first comparator, the time delay regulator, the clock frequency replicator, and the frequency divider circuit; wherein, the frequency divider circuit is connected to the second type of detection circuit.

[0058] The second type of pixel unit is connected to the second type of detection circuit, and the second integrator in the second type of detection circuit is connected to the amplification structure; wherein, the amplification structure is also connected to the second comparator; the second comparator is connected to the time delay adjuster in the first type of detection circuit;

[0059] When the ultrasonic fingerprint chip receives the ultrasonic fingerprint echo signal, it generates a target signal that meets the requirements based on the first type of pixel unit and the second type of pixel unit.

[0060] Specifically, the ultrasonic fingerprint chip can be applied in ultrasonic fingerprint devices. These ultrasonic fingerprint devices can include at least one of the following: ultrasonic fingerprint-based door locks, ultrasonic fingerprint-based identity information entry devices, and mobile phones that perform identity recognition based on ultrasonic fingerprints, etc. It should be noted that the ultrasonic fingerprint devices listed above are only illustrative. In actual implementation, depending on the specific application scenario and processing requirements, the ultrasonic fingerprint devices may also include other devices based on ultrasonic fingerprint recognition technology. This specification does not limit this.

[0061] The aforementioned target signal can be used to generate fingerprint images or to perform other fingerprint-related data processing.

[0062] The first type of detection circuit mentioned above can also be called an initial integration clock generation circuit, which can be used to generate an integration clock signal.

[0063] The second type of detection circuit mentioned above can also be called an integration effect monitoring and detection circuit. Specifically, it can be used to detect and judge the integration effect of the integration clock signal generated by the first type of detection circuit when processing the ultrasonic fingerprint echo signal, and feed the integration effect back to the first type of detection circuit so as to cooperate with the first type of detection circuit to realize adaptive feedback adjustment of the integration clock signal, and finally obtain a target integration clock signal that is compatible with the ultrasonic fingerprint echo signal and has a better effect.

[0064] The first type of detection circuit mentioned above can be specifically connected to the first type of pixel unit; the second type of detection circuit mentioned above can be specifically connected to the second type of pixel unit.

[0065] Specifically, the first type of pixel unit and the second type of pixel unit mentioned above can be fingerprint pixel units (e.g., PXL) in an ultrasonic fingerprint pixel unit array.

[0066] Accordingly, the aforementioned first-type and second-type detection circuits can be specifically obtained by modifying the existing connection circuits of the fingerprint pixel units. The connection circuits of the existing fingerprint pixel units can be found in [reference needed]. Figure 2 As shown.

[0067] The aforementioned fingerprint pixel unit can be understood as a processing unit used to receive and process ultrasonic fingerprint echo signals, generate and output fingerprint signals containing corresponding pixel fingerprint information.

[0068] The aforementioned ultrasonic fingerprint echo signal can be specifically understood as the echo signal carrying fingerprint information reflected back after the user's fingerprint encounters the ultrasonic signal generated by the ultrasonic signal transmitting circuit, for example, the echo voltage V1.

[0069] For details, please refer to Figure 1 As shown, the first integrator (e.g., pxl_op1) in the first type of detection circuit can be sequentially connected to a first comparator (or comparator 1), a time delay adjuster, a clock frequency replicator (e.g., ReplicaOSC), and a frequency divider circuit; wherein the frequency divider circuit is connected to the second type of detection circuit.

[0070] Specifically, the first input terminal (e.g., the positive input terminal) of the first integrator can be connected to the lower plate of the first piezoelectric sensor of the first type of detection circuit, the upper plate of which is used to receive the ultrasonic fingerprint echo signal.

[0071] Specifically, the piezoelectric sensor mentioned above can be a PVDF-based sensor or a PMUT-based sensor. The lower electrode plate mentioned above can be a discrete electrode set in the top metal layer of the fingerprint chip, or in some cases, it can be a metal electrode plate (e.g., silver Ag), and can also be called a metal electrode plate.

[0072] A first branch can also be connected between the lower electrode plate of the first piezoelectric sensor and the first input terminal of the first integrator; wherein, the first branch is grounded and a first switch (e.g., s1) is provided on the first branch.

[0073] The second input terminal (e.g., the negative input terminal) of the first integrator is connected to a second branch; wherein the second branch is grounded, and a second switch (e.g., s5) is provided on the second branch. A control switch s6 is also provided on the circuit between the first branch and the first input terminal of the first integrator.

[0074] Further reading Figure 1 As shown, a capacitor Cfb and a control switch s4 are connected in parallel between the first input and output (e.g., px_out) of the first integrator. Correspondingly, a corresponding capacitor and a control switch are also connected in parallel between the second input and output of the first integrator.

[0075] Furthermore, a first parasitic capacitance will be formed between the lower electrode of the first piezoelectric sensor in the first type of detection circuit and the circuit below it (e.g., A second parasitic capacitance will also be formed on the second branch (for example, ).

[0076] For details, please refer to Figure 1 As shown, the circuit outlined by the dashed line in the first type of detection circuit can form a continuous-time integrator.

[0077] See Figure 1 As shown, the second integrator (e.g., pxl_op2) in the aforementioned second-type detection circuit is connected to an amplification structure (e.g., a PGA, i.e., a programmable gain amplifier); wherein, the amplification structure is further connected to an analog-to-digital converter (e.g., an ADC) and a second comparator (or comparator 2); the second comparator is connected to the time delay adjuster in the first-type detection circuit. Specifically, the aforementioned amplification structure includes at least a gain amplifier circuit. Accordingly, the fingerprint signal output by the second integrator can be further amplified using the aforementioned amplification structure.

[0078] Specifically, the second input terminal (e.g., the negative input terminal) of the second integrator is connected to the lower plate of the second piezoelectric sensor of the second type of detection circuit, and the upper plate of the second piezoelectric sensor is used to receive the ultrasonic fingerprint echo signal.

[0079] A third branch is connected between the lower electrode of the second piezoelectric sensor and the second input terminal of the second integrator; wherein, the third branch is connected to a first reference voltage (e.g., Vref1). Specifically, the first reference voltage may be used to provide a reset voltage.

[0080] The first input terminal (e.g., the positive input terminal) of the second integrator is connected to a second reference voltage (e.g., Vref2). Specifically, the second reference voltage can be used to provide a reference voltage.

[0081] Furthermore, an integration switch (e.g., switch s6) is also provided on the circuit between the lower plate of the second piezoelectric sensor of the second type of detection circuit and the second input terminal of the second integrator.

[0082] Specifically, the output of the frequency divider circuit in the first type of detection circuit can be connected to the integrating switch. In this way, the integrating clock signal output by the first type of detection circuit can be used to control the integrating switch to close by pulling it high and to control it to open by pulling it low. This allows the second type of detection circuit to process the received ultrasonic fingerprint echo signal based on the integrating clock signal output by the first type of detection circuit.

[0083] For details, please refer to Figure 1 As shown, the circuit outlined in the dashed box in the second type of detection circuit can be understood as a partial circuit structure that is the same as the connection circuit of the fingerprint pixel unit (e.g., PXL or PIXEL).

[0084] The specific structure of the aforementioned fingerprint pixel unit can be found in [reference needed]. Figure 2 As shown. The second input terminal of the integrator (e.g., pxl_op) of the fingerprint pixel unit can be connected to the lower plate of the piezoelectric sensor, and the first input terminal can be connected to the second reference voltage (e.g., vref2). The output terminal of the integrator of the fingerprint pixel unit is also connected in sequence to an amplification structure and an analog-to-digital converter.

[0085] Since the second type of detection circuit actually contains almost the complete circuit structure of a fingerprint pixel unit, the second type of pixel unit connected to the second type of detection circuit can not only be used to detect and judge the integration effect of the integration clock signal and to perform adaptive feedback adjustment in conjunction with the first type of detection circuit to generate a target integration clock signal that meets the requirements, but also can be used as a fingerprint pixel unit. Together with other fingerprint pixel units, it processes the received ultrasonic fingerprint echo signal based on the target integration clock signal to generate and output the corresponding target signal. However, the first type of pixel unit connected to the first type of detection circuit, due to the significant difference in circuit structure between it and the fingerprint pixel unit, cannot be used as a fingerprint pixel unit simultaneously like the second type of pixel unit.

[0086] For details, please refer to Figure 3 As shown, the aforementioned ultrasonic fingerprint device can be provided with an active area (AA). Multiple fingerprint pixel units can be arranged within this active area to form an ultrasonic fingerprint pixel unit array. For example, see [reference needed]. Figure 3 As shown, the recognition area can contain an ultrasonic fingerprint pixel unit array consisting of N*M fingerprint pixel units. Each fingerprint pixel unit can be independent of each other.

[0087] The aforementioned target integral clock signal that meets the requirements can be specifically understood as an integral clock signal that is locally generated by the first type of detection circuit, detected and judged by the second type of detection circuit, and adapted to the ultrasonic fingerprint echo signal to be processed.

[0088] Specifically, the target integration clock signal adapted to the ultrasonic fingerprint echo signal can be a square wave signal with the same signal period as the ultrasonic fingerprint echo signal and aligned with it. For example, a square wave signal whose high-level band is aligned with the band from peak to trough (or from trough to peak) in the ultrasonic fingerprint echo signal. When the fingerprint pixel unit processes the ultrasonic fingerprint echo signal based on the aforementioned target integration clock signal, the effective signals carrying fingerprint information in the ultrasonic fingerprint echo signal will not be canceled out, thus obtaining a target signal with higher clarity and better quality.

[0089] The aforementioned integration effect is used to indicate whether the target integration clock signal that meets the requirements has been found in the current iteration, and whether it is necessary to generate a new integration clock signal for the next detection and judgment.

[0090] Specifically, when the integration effect meets the preset requirements, it can be determined that a target integration clock signal meeting the requirements has been found in the current iteration, and there is no need to generate a new integration clock signal for the next detection and judgment. Conversely, when the integration effect does not meet the preset requirements, it can be determined that a target integration clock signal meeting the requirements has not been found in the current iteration, and a new integration clock signal needs to be generated for the next detection and judgment.

[0091] Before implementation, based on the specific application scenario and processing requirements, at least one fingerprint pixel unit that is rarely used or relatively unimportant during the fingerprint signal acquisition process can be selected from the above-mentioned recognition area (e.g., a fingerprint pixel unit located in a corner); and refer to Figure 1 As shown, the fingerprint pixel unit and related connection circuit are modified to obtain the corresponding first type of pixel unit.

[0092] Simultaneously, at least one fingerprint pixel unit (e.g., a fingerprint pixel unit located in the center) that is relatively close to other fingerprint pixels within the aforementioned recognition area is selected; and see also Figure 1 As shown, the fingerprint pixel unit and related connection circuit are modified to obtain the corresponding second type of pixel unit.

[0093] In specific implementation, upon receiving the ultrasonic fingerprint echo signal, firstly, a first voltage signal (e.g., Vc1) can be generated using the first comparator of the first type of detection circuit; and this first voltage signal is sent to the time delay regulator. The time delay regulator, in response to the first voltage signal, generates and sends a first enable signal (e.g., EN) to the clock frequency replicator. The clock frequency replicator, in response to the first enable signal, generates a main frequency clock signal with the same integration frequency as the system based on an initial delay (e.g., t10) according to the ultrasonic echo signal; and this main frequency clock signal is provided to the frequency divider circuit. The frequency divider circuit (e.g., an 8-division circuit) performs a matched frequency division process (e.g., 8-division processing) on ​​the main frequency clock signal according to the frequency of the ultrasonic fingerprint echo signal to obtain the corresponding first integrated clock signal. The aforementioned first integrated clock signal can be found in [reference needed]. Figure 4 The image shows the integration clock signal output by the 8-division circuit, used to control the integration switch S3. The first integration clock signal is then sent to the second type of detection circuit using the frequency divider circuit.

[0094] Correspondingly, the received ultrasonic fingerprint echo signal can be processed by the second type of detection circuit based on the first integration clock signal by controlling the closing and opening state of the integration switch to obtain the first integration result (e.g., Vo(1)).

[0095] Next, the first type of detection circuit can be used in a similar manner to generate a second integral clock signal based on the first integral clock signal, using a corresponding step length. For example, the second integral clock signal can be obtained by adding the current step length (the first step length) to the first integral clock signal. Then, a frequency divider circuit is used to send the second integral clock signal to the second type of detection circuit.

[0096] Correspondingly, the received ultrasonic fingerprint echo signal can be processed by the second type of detection circuit based on the second integration clock signal by controlling the closing and opening state of the integration switch to obtain the second integration result (e.g., Vo(2)).

[0097] Furthermore, for the current iteration (e.g., the first iteration), the second type of detection circuit can be used to determine the evaluation value of the current integration result based on the first integration result and the second integration result (e.g., the evaluation value of the first integration result corresponding to the first iteration: Vo(2) - Vo(1)); and the second comparator can be used to compare the evaluation value of the current integration result with the preset evaluation threshold to generate the corresponding integration effect of the current iteration (e.g., the first integration effect corresponding to the first iteration).

[0098] The current integration result indicates whether an integration clock signal compatible with the ultrasonic fingerprint echo signal has been found (i.e., a target integration clock signal that meets the requirements). If the current integration result meets the preset requirements, it means that an integration clock signal compatible with the ultrasonic fingerprint echo signal has been found, and it is not necessary to generate a next integration clock signal (e.g., a third integration clock signal) or perform a next detection judgment (e.g., a second detection). If the current integration result does not meet the preset requirements, it means that an integration clock signal compatible with the ultrasonic fingerprint echo signal has not yet been found, and it is necessary to generate a next integration clock signal and perform a next detection judgment.

[0099] The second type of detection circuit can feed back the first integration effect to the delay regulator of the first type of detection circuit through a corresponding signal (e.g., Vc2).

[0100] Based on the first integration effect, when the first integration effect meets the preset requirements, the first type of detection circuit can determine that a target integration clock signal that meets the requirements has been found for the current iteration. Then, according to the corresponding processing rules, it can determine the first-generated integration clock signal (i.e., the first integration clock signal and the second integration clock signal) from the two integration clock signals used to determine the integration effect for the current iteration, and use this first integration clock signal as the target integration clock signal that meets the requirements. After determining the target integration clock signal, the first type of detection circuit can send this target integration clock signal to the connected fingerprint pixel unit through a frequency divider circuit.

[0101] Conversely, if the first integration result does not meet the preset requirements, it can be determined that a target integration clock signal that meets the requirements has not yet been found. Then, according to the corresponding processing rules, the delay adjustment unit generates a third clock signal based on the second clock signal and the corresponding step length for a second detection and judgment, until the obtained integration result meets the preset requirements and a target integration clock signal that meets the requirements is found.

[0102] Accordingly, the fingerprint pixel unit can process the received ultrasonic fingerprint echo signal based on the target clock signal provided by the first type of detection circuit, and obtain and output the corresponding target signal. This target signal can then be used for further fingerprint data processing, such as fingerprint unlocking, identity recognition, and information entry.

[0103] In some cases, the second type of pixel unit can also be used as a fingerprint pixel unit to process the ultrasonic echo signal. In this case, the first type of detection circuit can also send the finally determined target integration clock signal to the second type of pixel unit, so that the second type of pixel unit and other fingerprint pixel units can process the received ultrasonic fingerprint echo signal based on the target integration clock signal through the relevant circuit structure.

[0104] Based on the above embodiments, by combining the first type of detection circuit connected to the first type of pixel unit and the second type of detection circuit connected to the second type of pixel unit in the ultrasonic fingerprint chip to generate a target integral clock signal that meets the requirements, on the one hand, unlike existing methods, a target integral clock signal that meets the requirements and is adapted to the ultrasonic fingerprint echo signal to be processed can be generated accurately and efficiently, and then a target signal with high clarity and good quality can be obtained based on the target integral clock signal. On the other hand, unlike existing methods, by generating and sending the target integral clock signal that meets the requirements locally using the first type of detection circuit connected to the first type of pixel unit obtained by modifying the relevant circuit in the fingerprint chip, the transmission time of the target integral clock signal is shortened, and the error caused by the time delay during the transmission of the target integral clock signal on the subsequent processing of the ultrasonic fingerprint echo signal using the target integral clock signal can be effectively reduced.

[0105] In some embodiments, when an ultrasonic fingerprint echo signal is received, the first type of detection circuit is used to generate at least a first integral clock signal and a second integral clock signal, respectively; the second type of detection circuit is used to detect and generate a first integral effect with respect to the first integral clock signal and the second integral clock signal, and feed the first integral effect back to the first type of detection circuit; the first type of detection circuit is also used to generate a target integral clock signal that meets the requirements based on the first integral effect.

[0106] The target integration clock signal is used to generate a target signal that meets the requirements. Specifically, the target signal can be a corresponding fingerprint image.

[0107] In some embodiments, the frequency division circuit may be further connected to the remaining fingerprint pixel units in the ultrasonic fingerprint pixel unit array, excluding the first type of pixel unit and the second type of pixel unit; wherein the fingerprint pixel unit is used to process the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

[0108] Specifically, the frequency divider circuit described above can be connected to the integrating switch in the fingerprint pixel unit. Correspondingly, the frequency divider circuit can send the finally determined target integrating clock signal to the connected fingerprint pixel unit.

[0109] The aforementioned frequency divider circuit can support multiple frequency division modes. Accordingly, in specific implementations, depending on the specific application scenario and processing requirements, it can be used in conjunction with different types of received ultrasonic fingerprint echo signals to perform various matching frequency division processes on the main frequency clock signal output by the clock main frequency replicator in order to obtain the required integrated clock signal.

[0110] In some cases, after the target integration clock signal is determined, the second type of pixel unit, based on its own circuit structure, can also be used as a fingerprint pixel unit to process the received ultrasonic fingerprint echo signal. Therefore, the aforementioned frequency divider circuit can also send the target integration clock signal to the connected second type of pixel unit. The second type of pixel unit, together with other fingerprint pixel units, processes the received ultrasonic fingerprint echo signal based on the target integration clock signal to obtain the corresponding target signal.

[0111] In some embodiments, the first input terminal of the first integrator is connected to the lower electrode of the first piezoelectric sensor of the first type of detection circuit, and the upper electrode of the first piezoelectric sensor is used to receive ultrasonic fingerprint echo signals.

[0112] A first branch is connected between the lower electrode plate of the first piezoelectric sensor and the first input terminal of the first integrator; wherein the first branch is grounded and a first switch is provided on the first branch.

[0113] In some embodiments, the second input terminal of the first integrator is connected to a second branch; wherein the second branch is grounded and a second switch is provided on the second branch.

[0114] In some embodiments, the second input terminal of the second integrator is connected to the lower electrode of the second piezoelectric sensor of the second type of detection circuit, and the upper electrode of the second piezoelectric sensor is used to receive ultrasonic fingerprint echo signals.

[0115] A third branch is connected between the lower electrode of the second piezoelectric sensor and the second input terminal of the second integrator; wherein, the third branch is connected to the first reference voltage.

[0116] In some embodiments, the first input terminal of the second integrator is connected to a second reference voltage.

[0117] In some embodiments, the second type of detection circuit is further configured to process the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

[0118] In some embodiments, the first type of detection circuit may also be connected to a temperature sensing circuit, or the ultrasonic fingerprint chip may also include a temperature sensing circuit; wherein the temperature sensing circuit is used to monitor ambient temperature change data.

[0119] The aforementioned temperature sensing circuit may specifically include: a temperature sensor.

[0120] In some cases, the first type of detection circuit described above may also be connected to a pressure sensing circuit, or the ultrasonic fingerprint chip may also include a pressure sensing circuit; wherein, the pressure sensing circuit is used to monitor environmental pressure change data.

[0121] The aforementioned temperature sensing circuit may specifically include a pressure sensor.

[0122] Based on the above-described structure, the ultrasonic fingerprint chip, upon initial startup, requires the combined use of the first and second type of detection circuits to re-determine and generate a target integrated clock signal that meets the requirements. Subsequently, the received ultrasonic fingerprint signal can be processed based on this target integrated clock signal. Simultaneously, the aforementioned temperature and / or pressure sensing circuits are used to monitor, in real-time or periodically, changes in the ambient temperature and / or ambient pressure of the environment surrounding the integrated clock generation circuit.

[0123] In practical implementation, for example, when the temperature sensing circuit detects that the ambient temperature change of the environment in which the integrating clock generation circuit is located is greater than or equal to a preset fluctuation range, it can be determined that due to a significant change in the performance parameters of the circuit components, the change in circuit delay exceeds a preset tolerance threshold. At this point, the previously determined target integrating clock signal and the ultrasonic fingerprint echo signal are no longer compatible. Therefore, a new integrating clock signal can be automatically triggered by combining the first and second type of detection circuits to re-determine a new integrating clock signal that matches the performance parameters of the circuit components under the current external environment and is compatible with the ultrasonic fingerprint echo signal. This new integrated clock signal serves as the target integrating clock signal that meets the requirements. Based on this newly determined target integrating clock signal, the received ultrasonic fingerprint echo signal is further processed to obtain a high-quality target signal even under this external environment.

[0124] The aforementioned preset fluctuation range was determined in advance through clustering learning of a large number of test records under different temperature environments.

[0125] In some embodiments, the first type of pixel unit connected to the first type of detection circuit can be specifically disposed in a first position region of the ultrasonic fingerprint pixel array circuit. The first position region can be a corner position in the ultrasonic fingerprint pixel array circuit.

[0126] This is based on the actual usage situation and habits of users. The fingerprint pixel unit located in the corner of the ultrasonic fingerprint pixel array circuit does not involve acquiring and processing fingerprint information of key locations in the user's fingerprint. On the other hand, when the user touches the recognition area, they will often not touch the fingerprint pixel unit in the corner.

[0127] Therefore, by selecting the fingerprint pixel unit at the corner position in the ultrasonic fingerprint pixel array circuit and modifying it to be used as a first-type pixel unit, there will be no significant impact on the overall reception and processing of ultrasonic fingerprint echo signals by the ultrasonic fingerprint pixel array circuit, ensuring that the ultrasonic fingerprint pixel array circuit can receive and process ultrasonic fingerprint echo signals normally and completely.

[0128] Furthermore, the aforementioned first location region can also be a corner location in the ultrasonic fingerprint pixel array circuit adjacent to the PGA structure.

[0129] This is because the first-type detection circuit of the first-type pixel unit differs from the second-type detection circuit of the second-type pixel unit, requiring relatively more modifications to the circuit structure. By placing the first-type pixel unit in a corner adjacent to the PGA structure (or, a PGA array integrating an amplified structure with multiple fingerprint pixel units), the existing PGA circuit structure can be fully utilized to route the additional circuitry added during the modification of the first-type detection circuit. This eliminates the need for additional design and wiring, facilitating fabrication, reducing overall manufacturing costs, and minimizing chip circuit area overhead.

[0130] The second type of pixel unit connected to the second type of detection circuit can be specifically arranged in the second position region of the ultrasonic fingerprint pixel array circuit. The second position region can be the central position region of the ultrasonic fingerprint pixel array circuit.

[0131] This is because the center position in the ultrasonic fingerprint pixel array circuit is relatively close to other fingerprint pixel units. Therefore, by selecting fingerprint pixel units in the center region of the ultrasonic fingerprint pixel array circuit and modifying these units to be used as second-type pixel units, these second-type pixel units can better represent the majority of fingerprint pixel units in the ultrasonic fingerprint pixel array. This allows for the detection and judgment of the integral clock signal generated by the first-type detection circuit, obtaining an integral effect with high reference value for the entire ultrasonic fingerprint pixel array circuit. Furthermore, based on this integral effect, the first-type detection circuit can effectively coordinate with targeted adaptive feedback adjustment of the integral clock signal, ultimately determining a target integral clock signal with better integration performance and wider applicability.

[0132] In specific implementation, the aforementioned ultrasonic fingerprint pixel array circuit may include multiple partitions;

[0133] Each of the plurality of partitions is provided with a first type of pixel unit and a second type of pixel unit corresponding to that partition; wherein, the frequency division circuit of the first type of detection circuit of the first type of pixel unit is connected to the second type of pixel unit and the fingerprint pixel unit in the same partition.

[0134] In practical implementation, when the ultrasonic fingerprint pixel array circuit is large in scale and contains a large number of fingerprint pixel units, the fingerprint pixel array circuit can be divided into multiple partitions; each partition contains at least one corner position of the ultrasonic fingerprint pixel array circuit. Furthermore, a first type of pixel unit and a first type of detection circuit connected to the first type of pixel unit can be arranged at the corner position of the ultrasonic fingerprint pixel array circuit in each partition. Simultaneously, the center position region of each partition is determined, and a second type of pixel unit and a second type of detection circuit connected to the second type of pixel unit are arranged in the center position region of each partition.

[0135] As can be seen from the above, based on the ultrasonic fingerprint chip provided in the embodiments of this specification, the structure of the ultrasonic fingerprint chip can be modified before specific implementation. First, suitable fingerprint pixel units are selected from multiple fingerprint pixel units as the first type of pixel unit and the second type of pixel unit; then, the first type of pixel unit and the second type of pixel unit are respectively connected to the corresponding first type of detection circuit and second type of detection circuit to obtain the modified ultrasonic fingerprint chip. Specifically, in the ultrasonic fingerprint chip, the first integrator in the first type of detection circuit is sequentially connected to a first comparator, a time delay regulator, a clock frequency replicator, and a frequency divider circuit; the frequency divider circuit is connected to the second type of detection circuit; the second integrator in the second type of detection circuit is connected to an amplification structure; the amplification structure is also connected to a second comparator; the second comparator is connected to the time delay regulator in the first type of detection circuit. In practical implementation, based on this ultrasonic fingerprint chip, when an ultrasonic fingerprint echo signal is received, at least two different integral clock signals, a first integral clock signal and a second integral clock signal, can be generated locally using a first type of detection circuit. A second type of detection circuit detects and generates a first integration effect of the first and second integral clock signals, and feeds this first integration effect back to the first type of detection circuit. Then, based on the first integration effect, the first type of detection circuit finally generates a target integral clock signal that meets the requirements. This allows for the automatic generation of an integral clock signal with high accuracy and good effect that is compatible with the ultrasonic fingerprint echo signal. Furthermore, based on this integral clock signal, the received ultrasonic fingerprint echo signal can be accurately processed to obtain a high-quality target signal.

[0136] See Figure 5 As shown, for the ultrasonic fingerprint chip described above, this specification also provides a method for generating an integrating clock for the ultrasonic fingerprint chip. In specific implementation, this method may include the following:

[0137] S501: When an ultrasonic fingerprint echo signal is received, the first type of detection circuit generates a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal.

[0138] S502: The first type of detection circuit generates a second integral clock signal based on the first integral clock signal through time delay adjustment;

[0139] S503: Using the second type of detection circuit, the ultrasonic echo signal is processed based on the first and second integral clock signals respectively to obtain the first integration effect of the first and second integral clock signals; and the first integration effect is fed back to the first type of detection circuit.

[0140] S504: Using the first type of detection circuit, determine the target integration clock signal that meets the requirements based on the first integration effect.

[0141] In practice, the time delay adjustment of the first type of detection circuit can be used to detect whether the first integration effect meets the preset requirements (e.g., whether it is a specified voltage signal value) to determine whether the first detection has found a target integration clock signal that meets the requirements.

[0142] If the first integration result meets the preset requirements, it can be determined that the first detection has found a target integration clock signal that meets the requirements. At this point, the target integration clock signal that meets the requirements can be finally determined based on the first integration clock signal and the second integration clock signal.

[0143] Conversely, if the first integration result does not meet the preset requirements, it can be determined that the first detection and judgment has not yet found a target integration clock signal that meets the requirements. At this time, it is necessary to use the first type of detection circuit to generate a new integration clock signal as the third integration clock signal based on the second integration clock signal; then, the first type of detection circuit and the second type of detection circuit are combined to perform a second detection and judgment based on the second integration clock signal and the third integration clock signal to obtain the corresponding second integration result.

[0144] If the second integration result meets the preset requirements, it can be determined that the second detection and judgment has found a target integration clock signal that meets the requirements. At this point, the target integration clock signal that meets the requirements can be finally determined based on the second integration clock signal and the third integration clock signal.

[0145] Conversely, if the second integration result does not meet the preset requirements, the above process needs to be repeated to redetermine the next integration clock signal (e.g., the fourth integration clock signal) and perform the next detection and judgment (e.g., the third detection and judgment) until the obtained integration result meets the preset requirements.

[0146] After determining the target integral clock signal that meets the requirements, the method further includes: processing the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

[0147] Specifically, the received ultrasonic fingerprint echo signal can be processed using the fingerprint pixel unit based on the target integration clock signal; alternatively, the received ultrasonic fingerprint echo signal can be processed simultaneously using the second type pixel unit connected to the second type detection circuit and the fingerprint pixel unit based on the target integration clock signal.

[0148] Based on the above embodiments, by combining the first type of detection circuit and the second type of detection circuit in the ultrasonic fingerprint chip to generate an integral clock signal locally and adaptively adjust the feedback, a high-precision and high-performance integral clock signal adapted to the ultrasonic fingerprint echo signal can be automatically generated accurately and efficiently. Subsequently, based on this integral clock signal, the received ultrasonic fingerprint echo signal can be precisely processed to obtain a high-quality target signal.

[0149] In some embodiments, after processing the ultrasonic echo signal based on the first integrating clock signal and the second integrating clock signal using a second type of detection circuit to obtain a first integrating effect on the first integrating clock signal and the second integrating clock signal, and feeding the first integrating effect back to the first type of detection circuit, the method may further include the following:

[0150] S1: When the first integration effect does not meet the preset requirements, the first type of detection circuit generates a third integration clock signal based on the second integration clock signal and through time delay adjustment.

[0151] S2: Using the second type of detection circuit, the ultrasonic echo signal is processed based on the second and third integral clock signals respectively to obtain the second integration effect of the second and third integral clock signals; and the second integration effect is fed back to the first type of detection circuit.

[0152] In practical implementation, the first type of detection circuit can be used to determine the corresponding step length (for example, the second step length corresponding to the second detection judgment can be denoted as...). The second integral clock signal is delayed to generate the third integral clock signal.

[0153] In some embodiments, after processing the ultrasonic echo signal based on the first integrating clock signal and the second integrating clock signal using a second type of detection circuit to obtain a first integrating effect on the first integrating clock signal and the second integrating clock signal, and feeding the first integrating effect back to the first type of detection circuit, the method may further include the following:

[0154] S1: When the first integration effect meets the preset requirements, the target integration clock signal that meets the requirements is determined by the first type of detection circuit based on the first integration clock signal and the second integration clock signal.

[0155] S2: The target integration clock signal is sent to the connected fingerprint pixel unit using the first type of detection circuit; and a corresponding processing trigger signal is sent to the fingerprint pixel unit; wherein, the fingerprint pixel unit responds to the processing trigger signal and processes the received ultrasonic fingerprint echo signal based on the target integration clock signal.

[0156] In practice, when the first integration result meets the preset requirements, it can be determined that the current detection judgment (i.e., the first detection judgment) has found a target integration clock signal that meets the requirements. At this time, it is not necessary to generate the next integration clock signal or to perform another detection judgment. The target integration clock signal that meets the requirements can be quickly determined based on the first integration clock signal and the second integration clock signal used in the first detection judgment.

[0157] In practice, after generating a target integration clock signal that meets the requirements, the first type of detection circuit can determine that the fingerprint pixel unit can accurately process the currently received ultrasonic fingerprint signal based on the target integration clock signal. Then, the target integration clock signal and a processing trigger signal can be sent to the connected fingerprint pixel unit. The processing trigger signal indicates that the target integration clock signal is reliable and valid, and the fingerprint pixel unit can begin formally processing the ultrasonic fingerprint echo signal based on the target integration clock signal.

[0158] Correspondingly, the fingerprint pixel unit can process the received ultrasonic fingerprint echo signal normally based on the target integration clock signal, and obtain and output the corresponding target signal.

[0159] In specific implementation, the first type of detection circuit can be configured to send the integral clock signal to the fingerprint pixel unit only when a target integral clock signal that meets the requirements is generated; at the same time, the fingerprint pixel unit can be configured to allow processing of the received ultrasonic fingerprint echo signal based on the integral clock signal only when it receives the integral clock signal provided by the first type of detection circuit.

[0160] At this point, the first type of detection circuit can be used to send only the aforementioned target integration clock signal to the connected fingerprint pixel unit. Correspondingly, after receiving the target integration clock signal, the fingerprint pixel unit can trigger the processing of the received ultrasonic fingerprint echo signal based on the target integration clock signal to obtain the corresponding target signal.

[0161] In some embodiments, see Figure 6 As shown, before receiving the ultrasonic fingerprint echo signal, the method may further include the following in its specific implementation:

[0162] S6-1: When the high-voltage coding device in the ultrasonic signal transmitting circuit of the ultrasonic fingerprint chip is detected to be running, the first switch is controlled to close so as to conduct the first branch of the first type of detection circuit;

[0163] S6-2: When the high-voltage coding device is detected to have finished operating, the first switch is disconnected and the control switch of the first integrator is closed to perform the first reset operation;

[0164] S6-3: Close the second switch; and connect the circuit between the first input terminal of the first integrator and the lower plate of the first piezoelectric sensor of the first type of detection circuit to perform a second reset operation, so that the first integrator outputs a reset voltage.

[0165] The high-voltage coding device is used to generate a coding signal. The ultrasonic signal transmitting circuit is used to transmit a corresponding ultrasonic signal based on the coding signal.

[0166] Based on the above embodiments, the relevant structure of the ultrasonic fingerprint chip can be effectively utilized to accurately complete the reset operation, thus preparing for the subsequent generation of a target integral clock signal that meets the requirements.

[0167] In some embodiments, the method may further include the following:

[0168] S1: Use the first comparator to monitor whether the output (Vop-Von) of the first integrator is greater than the preset lower threshold.

[0169] S2: When the output of the first integrator is detected to be greater than the preset lower threshold, it is determined that an ultrasonic fingerprint echo signal has been received.

[0170] The aforementioned preset lower threshold can be determined based on the transmission parameters of the ultrasonic signal transmitting circuit and the ambient noise.

[0171] In practice, when the output of the first integrator is detected to be greater than the preset lower threshold, it is determined that an ultrasonic fingerprint echo signal has been received, and the ultrasonic fingerprint chip integration clock generation method can be automatically triggered.

[0172] Correspondingly, when the output of the first integrator is detected to be less than or equal to the preset lower threshold, it is determined that no ultrasonic fingerprint echo signal has been received, and thus there is no need to trigger the execution of the ultrasonic fingerprint chip's integration clock generation method, which helps to reduce unnecessary circuit power consumption.

[0173] Based on the above embodiments, the first type of detection circuit can be used to accurately and automatically detect and determine whether an ultrasonic fingerprint echo signal has been received.

[0174] In some embodiments, when it is determined that an ultrasonic fingerprint echo signal has been received, it can be further determined whether preset generation conditions are met.

[0175] When it is determined that the preset generation conditions are not met, the ultrasonic fingerprint chip integration clock generation method described above can be used to determine a target integration clock signal that meets the requirements without triggering the execution.

[0176] When the preset generation conditions are met, the above-mentioned ultrasonic fingerprint chip integration clock generation method can be triggered to determine the target integration clock signal that meets the requirements.

[0177] Specifically, the aforementioned preset generation conditions can be understood as triggering conditions that instruct the regeneration of a target integral clock signal that meets the requirements. Specifically, the automatic generation of a target integral clock signal that meets the requirements using the ultrasonic fingerprint chip will only be triggered when the preset generation conditions are met. Conversely, the automatic generation of a target integral clock signal that meets the requirements using the ultrasonic fingerprint chip will not be triggered when the preset generation conditions are not met.

[0178] The above determination of whether the preset generation conditions are met may, in specific implementation, include: detecting whether the time interval between the current time and the last reset time is greater than or equal to the preset update cycle; or, detecting whether the current ambient temperature change data is greater than or equal to the preset fluctuation range; or, detecting whether the power supply voltage of the current circuit has changed.

[0179] Specifically, when the time interval between the current time and the last reset time is greater than or equal to a preset update period, it can be determined that the preset generation conditions are met. The preset update period can be determined through statistical analysis based on the change records of the integral clock signal within the most recent time period. Conversely, when the time interval between the current time and the last reset time is less than the preset update period, it can be determined that the preset generation conditions are not met.

[0180] Specifically, when the detected change in current ambient temperature is greater than or equal to a preset fluctuation range, it can be determined that the preset generation conditions are met. Conversely, when the detected change in current ambient temperature is less than the preset fluctuation range, it can be determined that the preset generation conditions are not met.

[0181] Specifically, when a change in the power supply voltage of the current circuit is detected, it can be determined that the preset generation conditions are met. For example, when it is detected that the current circuit has just been powered on, it is determined that the preset generation conditions are met.

[0182] In some embodiments, see Figure 7 As shown, the above-mentioned first type of detection circuit generates a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal. In specific implementation, it may include the following:

[0183] S7-1: Use the first comparator to send the first voltage signal to the time delay regulator;

[0184] S7-2: Using the time delay regulator to respond to the first voltage signal, send the first enable signal to the clock frequency replicator;

[0185] S7-3: Utilizes the clock frequency replicator to respond to the first enable signal and generate a clock signal with the same clock frequency as the system clock frequency;

[0186] S7-4: Using a frequency divider circuit, the main frequency clock signal is divided according to the frequency of the ultrasonic fingerprint echo signal to obtain the corresponding first integral clock signal.

[0187] The frequency divider circuit described above can determine a matching frequency division mode based on the received ultrasonic echo signal and the system's main clock signal. Then, based on this frequency division mode, the main clock signal is divided accordingly to obtain the corresponding first integrated clock signal. For example, the frequency division mode could be an 8-division mode.

[0188] In some embodiments, the above-described method of using a first type of detection circuit to generate a second integral clock signal by adjusting the time delay based on the first integral clock signal may specifically include the following: determining a matching first step amplitude duration using a time delay adjuster; and adjusting the time delay of the first integral clock signal based on the first step amplitude duration to generate a corresponding second integral clock signal.

[0189] The specific stride duration can be determined based on the current ambient temperature and / or ambient pressure.

[0190] In some embodiments, see Figure 8 As shown, the above-described method utilizes a second type of detection circuit to process the ultrasonic echo signal based on the first and second integrating clock signals, respectively, to obtain a first integration effect with respect to the first and second integrating clock signals. In specific implementations, this may include the following:

[0191] S8-1: The ultrasonic echo signal is processed based on the first integration clock signal using the second type of detection circuit to obtain the first integration result;

[0192] S8-2: The ultrasonic echo signal is processed based on the second integration clock signal using the second type of detection circuit to obtain the second integration result;

[0193] S8-3: Calculate the evaluation value of the first integral result based on the first integral result and the second integral result;

[0194] S8-4: Determine the effect of the first integration based on the evaluation value of the first integration result.

[0195] In practice, the evaluation value of the current integration result (e.g., the evaluation value of the first integration result in the first detection judgment) can be determined by calculating the difference between the previous integration result and the subsequent integration result (e.g., the difference between the second integration result and the first integration result). Then, based on the evaluation value of the current integration result, the integration effect of the current integration (e.g., the first integration effect corresponding to the first detection judgment) can be determined.

[0196] In some embodiments, specifically, according to processing rules, a clock frequency replicator responds to the first enable signal and, combined with the initial delay (e.g., t10) provided by the delay regulator, generates a clock signal with the same main frequency as the system's integral main frequency. Then, a frequency divider circuit is used to perform corresponding frequency division processing on this main frequency clock signal to obtain an integral clock signal adapted to the ultrasonic fingerprint echo signal. The initial delay satisfies a preset time relationship.

[0197] For details, please refer to Figure 4 As shown, the preset time relationship can include: the sum of the initial delay (t10), the ultrasonic fingerprint echo signal delay (t8), the first comparator flip delay (t9), and the specified stabilization delay (t11) is less than or equal to 6T and greater than 2T. Here, T is the period of the integrating clock signal, and the period of the ultrasonic fingerprint echo signal is 8T; correspondingly, the frequency divider circuit used can be an 8-division circuit.

[0198] Specifically, the initial delay (e.g., t10) refers to the delay between when the clock frequency replicator receives the first voltage signal from the delay regulator and when the clock frequency replicator outputs the corresponding main frequency clock signal. The ultrasonic fingerprint echo signal delay (e.g., t8) refers to the delay between when the first type of detection circuit actually receives the ultrasonic fingerprint echo signal and when the first integrator of the first type of detection circuit outputs the corresponding integrated signal. The first comparator flip delay (e.g., t9) refers to the delay between when the first comparator receives the integrated signal output by the first integrator and when the first comparator sends the first voltage signal (e.g., Vc1) to the delay regulator. The specified stabilization delay (e.g., t11) refers to the waiting time for the clock frequency replicator to stabilize after it starts oscillating and outputs the main frequency clock signal (e.g., Replica OSC output). Typically, the main frequency clock signal output by the clock frequency replicator after it starts oscillating takes 1T to 2T to stabilize; therefore, the specified stabilization delay can be set to a value of [value missing].

[0199] In addition, see Figure 4As shown, the ultrasonic fingerprint echo signal here can specifically be the echo voltage V1 obtained based on the ultrasonic fingerprint echo signal. The time interval between the start time of the coding signal (e.g., Tx coding) in the ultrasonic signal transmitting circuit and the start time of the clock integration signal output by the frequency divider circuit (e.g., the output signal of the 8-frequency divider circuit) can be denoted as t7.

[0200] See Figure 4 As shown, based on this preset time relationship, the integration start time (e.g., point A) of the first integration clock signal (i.e., the first integration clock signal) can be located between the peak (e.g., P1) and trough (e.g., P2) of the ultrasonic fingerprint echo signal. At this time, the trend of the integration result evaluation value is definite and can be denoted as the first trend: that is, before finding a target integration clock signal that meets the requirements, the subsequent integration result must be greater than the earlier integration result. Based on this first trend, when the current integration result evaluation value is detected to be less than or equal to 0, it can be determined that the current integration effect meets the preset requirements. Specifically, if the current integration result evaluation value is less than 0, the earlier integration clock signal among the two integration clock signals used to determine the current integration result evaluation value can be determined as the target integration clock signal that meets the requirements. If the current integration result evaluation value is equal to 0, the median value of the two integration clock signals used to determine the current integration result evaluation value can be calculated as the target integration clock signal that meets the requirements. When the current integration result evaluation value is detected to be greater than 0, it can be determined that the current integration effect does not meet the preset requirements. At this point, it is necessary to continue calculating the next integral clock signal and perform the next detection and judgment.

[0201] See Figure 4 As shown, the preset time relationship may also include: the sum of the ultrasonic fingerprint echo signal delay (t8), the first comparator flip delay (t9), the initial delay (t10), and the specified stable delay (t11) is less than or equal to 10T and greater than 6T; where T is the period of the first integrating clock signal.

[0202] See Figure 4As shown, based on this preset time relationship, the integration start time (e.g., point B) of the first integration clock signal (i.e., the first integration clock signal) can be located between the trough and peak of the ultrasonic fingerprint echo signal. At this time, the trend of the integration result evaluation value is also determined, which can be denoted as the second trend: before finding a target integration clock signal that meets the requirements, the subsequent integration result must be smaller than the earlier integration result. Based on this second trend, when the current integration result evaluation value is detected to be greater than or equal to 0, it can be determined that the current integration effect meets the preset requirements. Specifically, if the current integration result evaluation value is greater than 0, the earlier integration clock signal among the two integration clock signals used to determine the current integration result evaluation value can be determined as the target integration clock signal that meets the requirements. If the current integration result evaluation value is equal to 0, the median value of the two integration clock signals used to determine the current integration result evaluation value can be calculated as the target integration clock signal that meets the requirements. When the current integration result evaluation value is detected to be less than 0, it can be determined that the current integration effect does not meet the preset requirements. At this point, it is necessary to continue calculating the next integral clock signal and perform the next detection and judgment.

[0203] Based on the above embodiments, an initial delay can be set based on a preset time relationship so that the trend of the integral result evaluation value is determined before a target clock integral signal that meets the requirements is found. Then, the target integral clock signal that meets the requirements can be found more accurately and efficiently based on the determined trend of the integral result evaluation value.

[0204] In some embodiments, if the initial delay is not set according to the preset time relationship described above, since the trend of the integral result evaluation value cannot be determined in advance, it is necessary to calculate at least two integral result evaluation values, namely the first integral result evaluation value and the second integral result evaluation value, and to perform at least two detection judgments, namely the first detection judgment and the second detection judgment, in order to determine the target integral clock signal that meets the requirements. In specific implementation, the following may be included: detecting whether the first integral result evaluation value and the second integral result evaluation value are less than 0.

[0205] When the product of the first integral result evaluation value and the second integral result evaluation value is greater than 0, and both the first integral result evaluation value and the second integral result evaluation value are less than 0, the change trend is determined to be the second change trend. At this time, the next integral result evaluation value can be calculated and the next detection judgment can be performed until the integral result evaluation value is detected to be greater than or equal to 0, and the integral effect is determined to meet the preset requirements. Then, based on the two integral clock signals used when calculating the last integral result evaluation value, the target integral clock signal that meets the requirements is found.

[0206] When the product of the first integral result evaluation value and the second integral result evaluation value is greater than 0, and both the first integral result evaluation value and the second integral result evaluation value are greater than 0, the change trend is determined to be the first change trend. At this time, the next integral result evaluation value can be calculated and the next detection judgment can be performed until the integral result evaluation value is detected to be less than or equal to 0, and the integral effect is determined to meet the preset requirements. Then, based on the two integral clock signals used when calculating the last integral result evaluation value, the target integral clock signal that meets the requirements is found.

[0207] When the product of the first integration result evaluation value and the second integration result evaluation value is less than or equal to 0, it can be determined that the integration effect meets the preset requirements. There is no need to determine the next integration result evaluation value or to perform another detection and judgment. Instead, the target integration clock signal that meets the requirements can be determined based on the first integration clock signal and the second integration clock signal.

[0208] In some embodiments, the current step length can be determined based on the previous integral evaluation value and / or the current ambient temperature change data. This allows for a faster identification of the target integral clock signal that meets the requirements.

[0209] In some embodiments, when implementing the system, the upper limit of the number of times the first type of detection circuit and the second type of detection circuit can adjust the integration clock signal can be determined based on the stride duration and the ultrasonic fingerprint echo signal (half of the cycle) to avoid consuming excessive processing resources and processing time to continuously adjust the integration clock signal within a local small range.

[0210] As can be seen from the above, the ultrasonic fingerprint chip integration clock generation method provided in the embodiments of this specification can fully utilize the relevant structure of the ultrasonic fingerprint chip. When an ultrasonic fingerprint echo signal is received, a first type of detection circuit first generates at least a first integration clock signal and a second integration clock signal respectively; a second type of detection circuit detects and generates a first integration effect of the first and second integration clock signals, and feeds this first integration effect back to the first type of detection circuit; then, the first type of detection circuit generates a target integration clock signal that meets the requirements based on the first integration effect. This automatically generates an integration clock signal with high accuracy and good effect that is compatible with the ultrasonic fingerprint echo signal. Furthermore, based on this integration clock signal, the received ultrasonic fingerprint echo signal can be accurately processed to obtain a high-quality target signal.

[0211] This specification provides an electronic device through its embodiments. (See attached document.) Figure 9As shown. The electronic device includes a network communication port 901, a processor 902, and a memory 903. These structures are connected by internal cables so that they can perform specific data interaction.

[0212] Specifically, the network communication port 901 can be used to receive start trigger commands.

[0213] The processor 902 can specifically be used to respond to a start trigger command. When an ultrasonic fingerprint echo signal is received, it uses a first type of detection circuit to generate a corresponding first integral clock signal locally based on the ultrasonic fingerprint echo signal; it uses the first type of detection circuit to generate a second integral clock signal based on the first integral clock signal through time delay adjustment; it uses the second type of detection circuit to process the ultrasonic echo signal based on the first integral clock signal and the second integral clock signal respectively to obtain a first integral effect of the first integral clock signal and the second integral clock signal; it feeds back the first integral effect to the first type of detection circuit; and it uses the first type of detection circuit to determine a target integral clock signal that meets the requirements based on the first integral effect.

[0214] The memory 903 can be used to store the corresponding instruction program and related intermediate data.

[0215] Based on the above method, the relevant structural performance of electronic devices can be effectively utilized to improve the data processing speed of electronic devices and efficiently realize the data processing generated by the integral clock of the ultrasonic fingerprint chip.

[0216] In this embodiment, the network communication port 901 can be a virtual port bound to different communication protocols, thereby enabling the sending or receiving of different data. For example, the network communication port can be a port responsible for web data communication, a port responsible for FTP data communication, or a port responsible for email data communication. Furthermore, the network communication port can also be a physical communication interface or communication chip. For example, it can be a wireless mobile network communication chip, such as GSM or CDMA; it can also be a Wi-Fi chip; or it can be a Bluetooth chip.

[0217] In this embodiment, the processor 902 can be implemented in any suitable manner. For example, the processor can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers, etc. This specification is not limiting.

[0218] In this embodiment, the memory 903 may include multiple layers. In a digital system, anything that can store binary data can be a memory. In an integrated circuit, a circuit with storage function but no physical form is also called a memory, such as RAM, FIFO, etc. In a system, a storage device with a physical form is also called a memory, such as a memory stick, TF card, etc.

[0219] This specification also provides a computer-readable storage medium for the integration clock generation method based on the above-described ultrasonic fingerprint chip. The computer-readable storage medium stores computer program instructions that, when executed, implement the following: when an ultrasonic fingerprint echo signal is received, a first type of detection circuit generates a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal; the first type of detection circuit generates a second integration clock signal based on the first integration clock signal through time delay adjustment; the second type of detection circuit processes the ultrasonic echo signal based on the first integration clock signal and the second integration clock signal respectively to obtain a first integration effect of the first integration clock signal and the second integration clock signal; the first integration effect is fed back to the first type of detection circuit; and the first type of detection circuit determines a target integration clock signal that meets the requirements based on the first integration effect.

[0220] In this embodiment, the storage medium includes, but is not limited to, Random Access Memory (RAM), Read-Only Memory (ROM), Cache, Hard Disk Drive (HDD), or Memory Card. The memory can be used to store computer program instructions. The network communication unit can be an interface configured according to standards specified in the communication protocol for network connection communication.

[0221] In this embodiment, the specific functions and effects implemented by the program instructions stored in the computer-readable storage medium can be explained in comparison with other embodiments, and will not be repeated here.

[0222] This specification also provides a computer program product, comprising at least a computer program, which, when executed by a processor, implements the following method steps: when an ultrasonic fingerprint echo signal is received, a first type of detection circuit generates a corresponding first integral clock signal locally based on the ultrasonic fingerprint echo signal; the first type of detection circuit generates a second integral clock signal based on the first integral clock signal through time delay adjustment; the second type of detection circuit processes the ultrasonic echo signal based on the first integral clock signal and the second integral clock signal respectively to obtain a first integral effect of the first integral clock signal and the second integral clock signal; the first integral effect is fed back to the first type of detection circuit; and the first type of detection circuit determines a target integral clock signal that meets the requirements based on the first integral effect.

[0223] See Figure 10 As shown in the embodiments of this specification, an integrating clock generation device for an ultrasonic fingerprint chip is also provided. This device may specifically include the following structural modules:

[0224] The first generation module 1001 can be specifically used to generate a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal when the ultrasonic fingerprint echo signal is received using a first type of detection circuit.

[0225] The second generation module 1002 can be specifically used to generate a second integral clock signal by adjusting the time delay based on the first integral clock signal using the first type of detection circuit.

[0226] Feedback module 1003 can be used to process ultrasonic echo signals based on the first integrating clock signal and the second integrating clock signal using the second type of detection circuit, respectively, to obtain a first integrating effect of the first integrating clock signal and the second integrating clock signal; and to feed back the first integrating effect to the first type of detection circuit.

[0227] The determination module 1004 can be used to determine the target integration clock signal that meets the requirements based on the first integration effect using the first type of detection circuit.

[0228] In some embodiments, after processing the ultrasonic echo signal based on the first and second integral clock signals using the second type of detection circuit to obtain a first integration effect with respect to the first and second integral clock signals, and feeding the first integration effect back to the first type of detection circuit, the device can also be further used to: when the first integration effect does not meet preset requirements, using the first type of detection circuit to generate a third integral clock signal based on the second integral clock signal through time delay adjustment; using the second type of detection circuit to process the ultrasonic echo signal based on the second and third integral clock signals to obtain a second integration effect with respect to the second and third integral clock signals; and feeding the second integration effect back to the first type of detection circuit.

[0229] In some embodiments, after processing the ultrasonic echo signal based on the first and second integral clock signals using a second type of detection circuit to obtain a first integration effect with respect to the first and second integral clock signals, and feeding the first integration effect back to the first type of detection circuit, the device can also be used to: when the first integration effect meets preset requirements, determine a target integral clock signal that meets the requirements using the first type of detection circuit based on the first and second integral clock signals; send the target integral clock signal to the connected fingerprint pixel unit using the first type of detection circuit; and send a corresponding processing trigger signal to the fingerprint pixel unit; wherein the fingerprint pixel unit responds to the processing trigger signal and processes the received ultrasonic fingerprint echo signal based on the target integral clock signal.

[0230] It should be noted that the units, devices, or modules described in the above embodiments can be implemented by computer chips or physical entities, or by products with certain functions. For ease of description, the above devices are described by dividing them into various modules according to their functions. Of course, in implementing this specification, the functions of each module can be implemented in one or more software and / or hardware, or the module that implements the same function can be implemented by a combination of multiple sub-modules or sub-units, etc. The device embodiments described above are merely illustrative. For example, the division of units is only a logical functional division, and there may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection between the devices or units shown or discussed can be through some interfaces, and the indirect coupling or communication connection between devices or units can be electrical, mechanical, or other forms.

[0231] As can be seen from the above, the integrating clock generating device for the ultrasonic fingerprint chip provided in the embodiments of this specification can automatically generate an integrating clock signal with high accuracy and good effect that is compatible with the ultrasonic fingerprint echo signal. Furthermore, based on this integrating clock signal, the received ultrasonic fingerprint echo signal can be accurately processed to obtain a high-quality target signal.

[0232] In a specific scenario example, the ultrasonic fingerprint chip provided in this manual can be used to generate the ultrasonic fingerprint chip's integration clock. For detailed implementation procedures, please refer to the following content.

[0233] In this scenario example, considering traditional ultrasonic fingerprint readout circuit solutions, please refer to [link / reference]. Figure 2 As shown. PXL is formed by the top metal layer of the detection unit (an ultrasonic fingerprint chip has many detection units) and is used to receive the ultrasonic echo voltage V1. V1 is applied to a capacitor Ct formed by Ag and the top metal plate as conductive layers and PVDF or PMUT as dielectric layers. When a finger is pressed on the surface of the ultrasonic fingerprint chip, the amplitude of the echo voltage V1 detected by the detection unit below the ridge or valley of the finger is different. By reading the echo V1 received by each detection unit, we can determine whether there is a valley or a ridge above that detection unit, thus identifying the fingerprint. Cp refers to the parasitic capacitance of the detection unit, Vref1 is the PXL reset voltage, and Vref2 is the reference voltage of pxl_op. In the design, Vref1 = Vref2 = half of the power supply voltage. See reference. Figure 11 The diagram shows a usable timing sequence based on a traditional scheme. When the high-voltage coding circuit (e.g., the ultrasonic signal transmitting circuit) of the ultrasonic fingerprint chip is working, s1 jumps high, pulling PXL low. After coding is complete, s1 is set low, then s4 is pulled high, resetting pxl_op. Subsequently, s2 is pulled high, and PXL is also reset to Vref1. At this point, both pxl_op and PXL have completed their resets. Immediately afterwards, s4 can be pulled low, ending the pxl_op reset. At a certain moment in time t3, the PGA performs its first sampling on px_out to obtain vs1. Then, s2 can be pulled low and s3 pulled high, causing the PIXEL circuit to integrate the peak to the trough of V1 for the first time. After integration, s3 is pulled low and s2 is pulled high to reset PXL. After the reset, s2 is pulled low and s3 is pulled high, causing the PIXEL circuit to integrate the peak to the trough of V1 for the second time. This integration process is repeated multiple times. Figure 11 The timing diagram is drawn using 5 integrations as an example. We can see that t4 is the integration time of the PIXEL circuit. After 5 integrations, s3 is pulled low and s2 is pulled high. At some point during time t5, the PGA samples px_out for the second time to obtain vs2. The output of the PGA is gain * (vs2 - vs1), where gain is the known gain of the PGA. By quantizing the output of the PGA by the ADC, we can determine the magnitude of (vs2 - vs1), and thus determine the fingerprint status above the detection unit.

[0234] However, combined Figure 11 As shown, the biggest problem with the above scheme is that it is difficult to guarantee that the high level of the integrating clock s3 falls exactly between the peak and trough of V1. Since the generation time of the echo V1 is related to the start time of the high-voltage coding circuit, the traditional approach is to use the start time of coding by the high-voltage coding circuit as a reference and delay for a certain period of time (e.g., ...). Figure 11 The integration clock s3 is generated after t0+t1+t2+t3. Because this delay is so long (reaching the microsecond level), it is difficult to control precisely. Each chip must be adjusted and aligned to ensure the high level of the integration clock aligns with the peaks and troughs. This is very costly to adjust and cannot withstand changes in temperature and power supply voltage. Once the temperature and power supply voltage change, s3 must be readjusted to ensure the integration of the echo peaks and troughs.

[0235] To address the aforementioned issues and considering their root causes, the integrating clock generation circuit presented in this scenario example can be found here. Figure 2 As shown, it mainly includes two parts: an initial integration clock generation circuit (e.g., a first type of detection circuit) and an integration effect detection circuit (e.g., a second type of detection circuit).

[0236] The initial integration clock generation circuit includes a continuous-time integrator (e.g., a first integrator), comparator 1 (e.g., a first comparator), a delay adjustment circuit (e.g., a delay adjuster), a replica OSC (an OSC identical to the main frequency clock generation circuit to ensure that the generated clock frequency is consistent with the main frequency clock), and an 8-division circuit (the division depends on the relationship between the main frequency clock period T and the integration clock period; here we assume it to be 8-division).

[0237] In specific implementation, the initial integrating clock generation circuit operates as follows: When the high-voltage coding circuit (Tx) is working, s1 is pulled high to ground PXL. After coding is completed, PXL is disconnected from ground, s4 closes to reset pxl_op to its output common-mode voltage, and then s5 also closes, resetting PXL and Cpxl (used to match the parasitic capacitance of PXL) to the output common-mode voltage of pxl_op. Then s4 opens, while s5 remains closed, and the continuous-time integrator begins preparing to receive the echo signal. As the echo voltage V1 arrives, the integrator integrates the echo voltage and outputs (Vop-Von) as follows. Figure 4As shown. There is a time delay of t8 between the echo voltage and the integrator output. When (Vop-Von) exceeds the threshold of comparator 1, the comparator output Vc1 jumps high. After passing through the time delay circuit, it generates the Replica OSC enable signal EN, controlling the OSC to immediately start oscillating and output a clock with the same frequency as the main frequency. Since the first 1-2 cycles after oscillation are unstable, these two unstable cycles are ignored. Starting from the third cycle after oscillation, the OSC output clock is divided by 8 to obtain the integrated clock s3. Figure 4 It can be seen that the high-level pulse width of the generated S3 is not aligned with the peaks and troughs of the echo voltage, defined as... Figure 4 The voltages at points A and B are VA and VB, respectively. The integrator's gain is gain1, and the PGA's gain is gain2. Because the integration pulse width is not aligned with the peaks and troughs, the PGA's output gain1*gain2*(VB-VA) after integration is relatively small. A circuit for detecting the integration effect is needed to adjust s3 to a suitable position so that the PGA's output reaches its maximum, i.e., the signal strength also reaches its maximum.

[0238] The integration effect detection circuit is almost identical in structure to a traditional ultrasonic fingerprint reading circuit, except that the output of its PGA is sent to comparator 2 (e.g., a second comparator) in addition to the ADC. Comparator 2 compares the output Vo(n) of the PGA in the current scan with the output Vo(n-1) of the PGA in the previous scan. The only difference between these two scans is the amount of time delay adjustment. Figure 4 In this context, t8 refers to the time delay from the echo voltage to the output of the continuous-time integrator, t9 refers to the time delay from the start of the continuous-time integrator's output to the comparator's flip, t10 is the delay time controlled by the time delay adjustment circuit, and t11 is the initial two cycles of the OSC output. Assuming the coding period is 8T, the echo voltage period is also 8T, and t11 = 2T, this ensures that the sum of t8 + t9 + t10 + t11 is less than 6T and greater than 2T. In other words, the initial integration clock generation circuit can guarantee that the first rising edge of the generated initial integration clock s3 is located between the peak and trough of the echo voltage. Figure 4 (between P1 and P2). Therefore, assuming the delay adjustment configuration was t10=d0 during the previous scan, and the delay adjustment configuration is […] during the current scan... If the output of the PGA in the current scan is greater than the output of the PGA in the previous scan, it indicates that the delay adjustment direction is correct. In this case, the delay can be increased further until the PGA output reaches its maximum (once the PGA output reaches its maximum, further increases in the delay will reduce the PGA output). When the PGA output reaches its maximum, the integrating clock S3 is adjusted to its optimal position, and its high level aligns perfectly with the peak and trough of the echo voltage. (See reference...) Figure 12As shown. The process of comparator 2 comparing the outputs of the PGA before and after and adjusting the delay time t10 of the delay circuit accordingly can be performed in the foreground (before the fingerprint scan begins) or in the background (during the fingerprint scan).

[0239] In practice, the following can be included:

[0240] 1) Divide all pixel units (e.g., fingerprint pixel units) into a first type of pixel (e.g., first type of pixel unit) and a second type of pixel (e.g., second type of pixel unit). The first type of pixels is used to generate the initial integration clock, and the second type of pixels is used to detect the integration effect. The entire chip only needs one pixel unit to generate the initial integration clock. After generating the initial integration clock, it is sent to all other pixels. One pixel can be selected from all other pixels to continuously monitor the integration effect. This continuously working unit can be used for fingerprint scanning; the only unit that cannot be used for fingerprint scanning is the one that generates the initial integration clock.

[0241] 2) The second type of pixel unit is best placed in the center of the array, while the first type of pixel can be placed anywhere on the chip, preferably in the four corners (because the first type of pixel cannot be used for fingerprint scanning, which means that a bad pixel will be generated, and this bad pixel is best located in the corner to minimize the impact). The two types of pixels do not need to be isolated, nor do they need to be adjacent.

[0242] 3) In this scenario example, a "pre-detection operation" (i.e., the operation to determine the target integration clock signal that meets the requirements) can be defined. A better way to trigger this "pre-detection operation" is to start it periodically (because the chip's operating environment may change at different times, and the internal latency may also change, requiring constant adjustment). Periodic startup first generates an initial integration clock, and then adjusts it through feedback to obtain the optimal integration clock before starting fingerprint scanning. During the fingerprint scanning process, feedback adjustment can be turned off or continued.

[0243] 4) The number of times the first and second type pixels in the above pre-detection operation can be set to an upper limit. The upper limit depends on the step size of the delay adjustment and the maximum range that needs to be adjusted (assuming it is half of the echo period). If the echo period is divided into 40 parts, then the maximum adjustment is 40 times. In this way, the upper limit can be set to 40, ensuring that the optimal integration clock can be adjusted within 40 times.

[0244] The above scenario examples verify the ultrasonic fingerprint chip, its integral clock generation method, and apparatus provided in this specification. First, the generated integral clock is not based on the coding time of the high-voltage coding circuit, but rather on the received echo voltage. The time interval from receiving the echo to starting echo integration is very short, resulting in minimal accumulated clock jitter. Second, the generated integral clock does not originate from the master clock, but from a replica of the master clock (Replica OSC), ensuring it operates at the same frequency as the master clock but with a shorter transmission path (the integral clock is directly generated locally through the output of the Replica OSC). Finally, the accurate integral clock is obtained through feedback adjustment, allowing it to run in the foreground / background and is suitable for various scenarios without requiring additional manual adjustment.

[0245] While this specification provides the steps of operation for the methods described in the embodiments or flowcharts, more or fewer steps may be included based on conventional or non-inventive means. The order of steps listed in the embodiments is merely one possible order of execution among many steps and does not represent the only possible order. In actual device or client product execution, the methods shown in the embodiments or drawings may be executed sequentially or in parallel (e.g., in a parallel processor or multi-threaded processing environment, or even a distributed data processing environment). The terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, product, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, product, or apparatus. Without further limitations, the presence of other identical or equivalent elements in a process, method, product, or apparatus that includes said elements is not excluded. The terms "first," "second," etc., are used to denote names and do not indicate any particular order.

[0246] Those skilled in the art will also know that, besides implementing the controller using purely computer-readable program code, the same functions can be achieved by logically programming the method steps, making the controller function as logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers (PLCs), and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the devices within it used to implement various functions can also be considered structures within that hardware component. Alternatively, the devices used to implement various functions can be considered as both software modules implementing the method and structures within a hardware component.

[0247] This specification can be described in the general context of computer-executable instructions that are executed by a computer, such as program modules. Generally, program modules include routines, programs, objects, components, data structures, classes, etc., that perform a specific task or implement a specific abstract data type. This specification can also be practiced in distributed computing environments, where tasks are performed by remote processing devices connected via a communication network. In distributed computing environments, program modules can reside in local and remote computer-readable storage media, including storage devices.

[0248] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this specification can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solutions of this specification can essentially be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, mobile terminal, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments of this specification.

[0249] The various embodiments in this specification are described in a progressive manner. Similar or identical parts between embodiments can be referred to interchangeably. Each embodiment focuses on its differences from other embodiments. This specification can be used in numerous general-purpose or special-purpose computer system environments or configurations. Examples include: personal computers, server computers, handheld or portable devices, tablet devices, multiprocessor systems, microprocessor-based systems, set-top boxes, programmable electronic devices, network PCs, minicomputers, mainframe computers, and distributed computing environments including any of the above systems or devices, etc.

[0250] Although this specification has been described by way of examples, those skilled in the art will recognize that many variations and modifications are possible without departing from the spirit of this specification, and it is intended that the appended claims cover such variations and modifications without departing from the spirit of this specification.

Claims

1. An ultrasonic fingerprint chip, characterized in that, It includes an ultrasonic fingerprint pixel unit array; the ultrasonic fingerprint pixel unit array includes at least a first type of pixel unit and a second type of pixel unit. The first type of pixel unit is connected to the first type of detection circuit. The first integrator in the first type of detection circuit is sequentially connected to the first comparator, the time delay regulator, the clock frequency replicator, and the frequency divider circuit; wherein, the frequency divider circuit is connected to the second type of detection circuit. The second type of pixel unit is connected to the second type of detection circuit, and the second integrator in the second type of detection circuit is connected to the amplification structure; wherein, the amplification structure is also connected to the second comparator; the second comparator is connected to the time delay adjuster in the first type of detection circuit; When the ultrasonic fingerprint chip receives the ultrasonic fingerprint echo signal, it generates a target signal that meets the requirements based on the first type of pixel unit and the second type of pixel unit.

2. The ultrasonic fingerprint chip according to claim 1, characterized in that, When an ultrasonic fingerprint echo signal is received, the first type of detection circuit is used to generate at least a first integral clock signal and a second integral clock signal respectively; the second type of detection circuit is used to detect and generate a first integral effect with respect to the first integral clock signal and the second integral clock signal, and feed the first integral effect back to the first type of detection circuit; the first type of detection circuit is also used to generate a target integral clock signal that meets the requirements based on the first integral effect. The target integration clock signal is used to generate a target signal that meets the requirements.

3. The ultrasonic fingerprint chip according to claim 1, characterized in that, The frequency division circuit is also connected to the remaining fingerprint pixel units in the ultrasonic fingerprint pixel unit array, excluding the first type of pixel unit and the second type of pixel unit; wherein, the fingerprint pixel unit is used to process the received ultrasonic fingerprint echo signal based on the target integral clock signal to obtain the corresponding target signal.

4. The ultrasonic fingerprint chip according to claim 1, characterized in that, The first input terminal of the first integrator is connected to the lower electrode plate of the first piezoelectric sensor of the first type of detection circuit, and the upper electrode plate of the first piezoelectric sensor is used to receive the ultrasonic fingerprint echo signal. A first branch is connected between the lower electrode plate of the first piezoelectric sensor and the first input terminal of the first integrator; wherein the first branch is grounded and a first switch is provided on the first branch.

5. The ultrasonic fingerprint chip according to claim 4, characterized in that, The second input terminal of the first integrator is connected to a second branch; wherein the second branch is grounded and a second switch is provided on the second branch.

6. The ultrasonic fingerprint chip according to claim 4, characterized in that, The second input terminal of the second integrator is connected to the lower plate of the second piezoelectric sensor of the second type of detection circuit, and the upper plate of the second piezoelectric sensor is used to receive the ultrasonic fingerprint echo signal; the amplification structure is also connected to a digital-to-analog converter; A third branch is connected between the lower electrode of the second piezoelectric sensor and the second input terminal of the second integrator; wherein, the third branch is connected to the first reference voltage.

7. The ultrasonic fingerprint chip according to claim 6, characterized in that, The first input terminal of the second integrator is connected to a second reference voltage.

8. The ultrasonic fingerprint chip according to claim 1, characterized in that, The second type of detection circuit is also used to process the received ultrasonic fingerprint echo signal based on the target integration clock signal to obtain the corresponding target signal.

9. The ultrasonic fingerprint chip according to claim 1, characterized in that, The first type of detection circuit is also connected to a temperature sensing circuit, or the ultrasonic fingerprint chip further includes a temperature sensing circuit; wherein, the temperature sensing circuit is used to monitor ambient temperature change data.

10. A method for generating an integrating clock for an ultrasonic fingerprint chip, characterized in that, The ultrasonic fingerprint chip used in any one of claims 1 to 8 comprises: When an ultrasonic fingerprint echo signal is received, the first type of detection circuit generates a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal. The first type of detection circuit generates a second integral clock signal based on the first integral clock signal through time delay adjustment; The ultrasonic echo signal is processed using the second type of detection circuit based on the first and second integral clock signals, respectively, to obtain the first integration effect of the first and second integral clock signals; and the first integration effect is fed back to the first type of detection circuit. The target integration clock signal that meets the requirements is determined by using the first type of detection circuit based on the first integration effect.

11. The method according to claim 10, characterized in that, By using a second type of detection circuit to process the ultrasonic echo signal based on the first and second integral clock signals respectively, the first integration effect of the first and second integral clock signals is obtained. After feeding back the first integration result to the first type of detection circuit, the method further includes: When the first integration effect does not meet the preset requirements, the first type of detection circuit generates a third integration clock signal based on the second integration clock signal and through time delay adjustment. The ultrasonic echo signal is processed using the second type of detection circuit based on the second and third integral clock signals, respectively, to obtain the second integration effect of the second and third integral clock signals; and the second integration effect is fed back to the first type of detection circuit.

12. The method according to claim 10, characterized in that, By using a second type of detection circuit to process the ultrasonic echo signal based on the first and second integral clock signals respectively, the first integration effect of the first and second integral clock signals is obtained. After feeding back the first integration result to the first type of detection circuit, the method further includes: When the first integration effect meets the preset requirements, the target integration clock signal that meets the requirements is determined by the first type of detection circuit based on the first integration clock signal and the second integration clock signal. The target integration clock signal is sent to the connected fingerprint pixel unit using a first type of detection circuit; and a corresponding processing trigger signal is sent to the fingerprint pixel unit; wherein, the fingerprint pixel unit responds to the processing trigger signal and processes the received ultrasonic fingerprint echo signal based on the target integration clock signal.

13. An integrating clock generation device for an ultrasonic fingerprint chip, characterized in that, The ultrasonic fingerprint chip used in any one of claims 1 to 8 comprises: The first generation module is used to generate a corresponding first integration clock signal locally based on the ultrasonic fingerprint echo signal when the ultrasonic fingerprint echo signal is received, using the first type of detection circuit. The second generation module is used to generate a second integral clock signal by adjusting the time delay based on the first integral clock signal using the first type of detection circuit. The feedback module is used to process the ultrasonic echo signal based on the first integrating clock signal and the second integrating clock signal using the second type of detection circuit, respectively, to obtain the first integration effect with respect to the first integrating clock signal and the second integrating clock signal; and to feed back the first integration effect to the first type of detection circuit. The determination module is used to determine the target integration clock signal that meets the requirements based on the first integration effect using the first type of detection circuit.

14. An electronic device, characterized in that, It includes a processor and a memory for storing processor-executable instructions, wherein the processor, when executing the instructions, implements the steps of the method according to any one of claims 10 to 12.

15. A computer-readable storage medium, characterized in that, It stores computer instructions that, when executed by a processor, implement the steps of the method according to any one of claims 10 to 12.

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