Space vector pulse width modulation method and system of multi-level series winding topology

Abstract

The invention belongs to the technical field of motor control, and discloses a space vector pulse width modulation method and system of a multi-level series winding topology. The method comprises the steps that three-phase stator current is collected, three-phase stator voltage is reconstructed, and the rotating speed and angle of a motor are obtained; performing Clark transformation on the three-phase stator current to obtain an alpha-beta-gamma component, determining the amplitude, angle and spatial position of a reference voltage vector, and dividing a three-level inverter switching vector into 36 small triangular region positioning reference vectors; three nearest basic voltage vectors are selected, and action time is calculated according to an amplitude-second balance principle to generate a PWM (Pulse-Width Modulation) waveform; a direct-current bus double-capacitor voltage difference value is collected, and the duty ratio is corrected in combination with the duty ratio and three-phase stator current hysteresis control; and converting the corrected duty ratio into a PWM signal to drive a motor. The DC bus voltage utilization rate can be improved, output harmonic waves are reduced, the waveform quality is improved, and the DC capacitor voltage balance capability and the system stability are enhanced.

Description

Technical Field

[0001] This invention belongs to the field of motor control technology, and particularly relates to a space vector pulse width modulation method and system for a multi-level series winding topology. Background Technology

[0002] In modern motor drive systems, voltage source inverters are the core components for power conversion and control. While traditional three-level voltage source inverters can provide multi-level outputs, they still have shortcomings in DC link voltage utilization, output harmonic suppression, and switching stress. In recent years, series-end winding (SEW) topologies have attracted attention due to their potential for improved voltage utilization and waveform quality. However, existing technologies still have limitations in modulation strategies for suppressing zero-sequence interference and optimizing multi-level outputs, making it difficult to meet the demands of high-precision, low-harmonic applications, such as electric vehicle and robot drive systems.

[0003] Patent CN106712564B - Generalized Three-Level SVPWM Modulation Algorithm. This patent relates to an SVPWM algorithm for three-level inverters, and its technical features include:

[0004] Determine whether the reference voltage vector is located in a large or small sector;

[0005] Based on the small sector, three voltage vectors (large vector, medium vector, and small vector) are selected to synthesize a reference vector, and the duration of action of these voltage vectors is calculated.

[0006] This algorithm specifically addresses the problem of severe common-mode voltage when the modulation ratio is small (i.e., the output voltage is lower than the reference bus voltage), and proposes an optimization scheme to reduce the common-mode voltage while maintaining a low total harmonic distortion (THD). Although CN106712564B has made improvements in common-mode voltage and THD control, the following technical problems still exist and have not been completely overcome compared to the problems that your method aims to solve:

[0007] 1. Insufficient introduction and management of the zero-sequence component (γ-axis) of three-dimensional current.

[0008] In CN106712564B, the reference voltage vector is mainly divided into sectors and decomposed in the α-β plane. The handling of the zero-sequence component or γ component is relatively indirect or lacks detail. Therefore, when the system load or current is not completely balanced, or under high dynamic conditions and rapid load changes, the midpoint voltage drift and capacitance imbalance caused by the zero-sequence and γ components may still be quite serious.

[0009] 2. Insufficient details in duty cycle correction and DC capacitor midpoint voltage balance control.

[0010] Although the patent considers reducing common-mode voltage and THD, its monitoring and real-time control mechanism for the midpoint voltage of the capacitors in the DC bus (i.e., the voltage balance between the two DC-side capacitors) is not detailed enough, and it lacks a mechanism that combines three-phase stator current and duty cycle dynamic correction factors. Such control lacks the ability to respond to the rate of change of DC midpoint voltage difference, which may lead to aggravated capacitor voltage imbalance when the motor starts, the load changes rapidly, or the inverter output voltage reference changes drastically, thereby reducing system stability and lifespan. Summary of the Invention

[0011] To address the problems existing in the prior art, this invention provides a space vector pulse width modulation method and system for multi-level series winding topology. The method decomposes and reconstructs the voltage vector using an α-β-γ orthogonal coordinate system; selects the basic voltage vector based on the principle of nearest three vector synthesis and calculates its duration; employs a zero-sequence component cancellation strategy to suppress common-mode voltage; and corrects the duty cycle through hysteresis control to balance the DC bus capacitor voltage.

[0012] This invention is implemented as follows: a space vector pulse width modulation method for a multi-level series winding topology includes:

[0013] S1. Acquire the three-phase stator current i through a current sensor. a i b with i c The three-phase stator voltage u is reconstructed by collecting the voltage value from the DC bus voltage sensor and the inverter switching state. s The rotational speed ω is obtained by a photoelectric encoder. e With angle information σ;

[0014] S2. The collected three-phase stator current i a i b with i c After Clark transformation, we obtain i in the α-β-γ coordinate system. α i β and i γ According to i α i β and i γ The magnitude and angle of the voltage vector are determined, thereby determining the spatial location of the voltage vector;

[0015] S3. For a vector in the α-β plane, based on the calculated spatial position of the reference voltage vector in the α-β coordinate system, determine its large sector and subdivided small triangular regions through coordinate transformation; the small triangular region is composed of the three nearest spatial voltage vector vertices.

[0016] The division of this region is based on the following: the switching vector of the three-level inverter is decomposed into 36 independent small triangular regions according to spatial geometric relationships; the basic voltage vectors V1, V2 and V3 used for modulation are determined according to the principle of closest spatial distance; and the voltage vector with γ component is synthesized by selecting three basic voltage vectors V1, V2 and V3 with the same magnitude and 120° difference in direction in the projection of the α-β plane.

[0017] S4. Based on the selected basic voltage vector, and in accordance with the basic principle of voltage vector switching, determine the PWM waveform corresponding to each sector, and in accordance with the amplitude-second balance principle, determine the action time T1, T2 and T3 of each basic voltage vector V1, V2 and V3.

[0018] S5. The voltage values ​​V of the two capacitors are acquired by the DC bus voltage sensor. C1 and V C2 The difference between the two is calculated, and combined with the duty cycle and the three-phase stator current, hysteresis control is performed to obtain the duty cycle adjustment factor np, thereby adjusting the duty cycle.

[0019] S6. Compare the corrected duty cycle with the carrier wave and convert it into a PWM signal, which is then sent to the gate drive circuit so that the gate drive circuit can drive the motor to run according to the PWM signal.

[0020] Furthermore, the calculation method for the magnitude and angle of the reference voltage vector in S2 is as follows:

[0021] In a three-phase stationary coordinate system, while keeping the voltage amplitude constant, the stator current i a i b and i c with i α i β and i γ The relationship between them is:

[0022] ,

[0023] ,

[0024] ,

[0025] Where θ is the angle value of the reference voltage vector, V m This is the magnitude of the reference voltage vector.

[0026] Furthermore, the calculation method for the action times T1, T2, and T3 of the basic voltage vectors V1, V2, and V3 in S4 is as follows:

[0027] ,

[0028] Among them, V s For the reference voltage vector, T s The duration of the reference voltage vector.

[0029] Furthermore, the duty cycle adjustment factor np in S5 is calculated as follows:

[0030] ,

[0031] ,

[0032] ,

[0033] ,

[0034] ,

[0035] ,

[0036] Where C is the capacitance value, D i For the duty cycle of each bridge arm, I i These are the stator currents for each phase.

[0037] Another object of the present invention is to provide a space vector pulse width modulation system with a multilevel series winding topology, comprising:

[0038] The acquisition module is used to acquire the three-phase stator current i through a current sensor. a i b with i c The three-phase stator voltage u is reconstructed by collecting the voltage value from the DC bus voltage sensor and the inverter switching state. s The rotational speed ω is obtained by a photoelectric encoder. e With angle information σ;

[0039] The conversion module is used to convert the acquired three-phase stator current i a i b with i c After Clark transformation, we obtain i in the α-β-γ coordinate system. α i β and i γ According to i α i β and i γ The magnitude and angle of the voltage vector are determined, thereby determining the spatial location of the voltage vector;

[0040] The region determination module is used to determine the large sector and subdivided small triangular regions to which a vector located in the α-β plane belongs, based on the calculated spatial position of the reference voltage vector in the α-β coordinate system, through coordinate transformation. Each small triangular region is composed of the three nearest spatial voltage vector vertices. The division of this region is based on the following criteria: the switching vector of the three-level inverter is decomposed into 36 independent small triangular regions according to spatial geometric relationships; the basic voltage vectors V1, V2, and V3 used for modulation are determined according to the principle of closest spatial distance; and the voltage vector with the γ component is synthesized by selecting three basic voltage vectors V1, V2, and V3 that are the same in magnitude but 120° apart in direction in the projection of the α-β plane.

[0041] The voltage determination module is used to determine the PWM waveform corresponding to each sector according to the selected basic voltage vector and the basic principle of voltage vector switching, and to determine the action time T1, T2 and T3 of each basic voltage vector V1, V2 and V3 according to the amplitude-second balance principle.

[0042] The adjustment module is used to acquire the voltage values ​​V of the two capacitors respectively through a DC bus voltage sensor. C1 and V C2 The difference between the two is calculated, and combined with the duty cycle and the three-phase stator current, hysteresis control is performed to obtain the duty cycle adjustment factor np, thereby adjusting the duty cycle.

[0043] The comparison module is used to compare the corrected duty cycle with the carrier wave and convert it into a PWM signal, which is then sent to the gate drive circuit so that the gate drive circuit can drive the motor to run according to the PWM signal.

[0044] Another object of the present invention is to provide a computer device including a memory and a processor, the memory storing a computer program, which, when executed by the processor, causes the processor to perform the steps of the space vector pulse width modulation method of the multilevel series winding topology.

[0045] Another object of the present invention is to provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the space vector pulse width modulation method of the multilevel series winding topology.

[0046] Another object of the present invention is to provide an information data processing terminal for implementing the aforementioned system.

[0047] Based on the above technical solutions and the technical problems solved, the advantages and positive effects of the technical solution to be protected by this invention are as follows:

[0048] First, addressing the problems of low DC voltage utilization and high output harmonic content in existing two-level inverters with series windings, and the difficulties in reconstructing voltage vector distribution and suppressing zero-sequence components when applying traditional multi-level modulation strategies to three-level series winding topologies, this invention proposes an innovative strategy based on three-dimensional spatial vector pulse width modulation (3D-SVPWM). This strategy reconstructs the voltage vector distribution in an orthogonal α-β-γ coordinate system, dividing the voltage vectors corresponding to 81 switching states into 27 vectors in the α-β plane, and 27 vectors each with positive and negative zero-sequence components, laying the foundation for subsequent vector synthesis and zero-sequence suppression. Within the α-β plane, the nearest three-vector synthesis method is used, dividing the space into 36 small triangular regions. Based on the position of the reference voltage vector, the three nearest basic voltage vectors are selected, and the action time of each vector is accurately calculated using the volt-second balance principle, achieving high-precision tracking. To address the zero-sequence component, three vectors with equal amplitudes and a 120° phase difference are synthesized and their zero-sequence cancellation is achieved when their action times are equal, thereby effectively suppressing common-mode voltage without requiring additional hardware circuitry. Furthermore, this invention optimizes the modulation sequence based on minimizing switching state changes and prohibiting P-N shoot-through, further reducing switching losses and electromagnetic interference.

[0049] Through the above method, the present invention significantly improves the DC voltage utilization rate, and the maximum output voltage vector amplitude can reach 2V. dc The three-level SEW-VSI modulation strategy (√3) outperforms traditional three-level modulation strategies and is particularly suitable for low-voltage, high-power applications. Simultaneously, the output phase and line voltages exhibit clear three-level stepped waveforms, significantly reducing THD, resulting in smoother motor operation and smaller electromagnetic torque fluctuations. This modulation strategy also demonstrates good compatibility and scalability, independent of specific topologies, and can be extended to higher-level SEW-VSI systems, providing a unified modulation framework for multi-level motor drives. System simulation and experimental platform verification results in the MATLAB / Simulink environment show that the three-level SEW-VSI exhibits superior performance in torque response and waveform quality, confirming its application potential in practical engineering.

[0050] Second, as supplementary evidence of the inventive step of the claims of this invention, it is also reflected in the following important aspects:

[0051] The technical solution of this invention successfully solves a long-standing and unresolved core technical challenge in high-performance motor drive systems: how to simultaneously achieve extremely high DC voltage utilization, extremely low output harmonic distortion, effective common-mode voltage suppression, and high dynamic control performance under limited DC bus voltage conditions. Traditional star-connected two-level inverters, limited by their topology, can only achieve a maximum output line voltage amplitude of 2 / 3 of the DC bus voltage. This makes it difficult to output sufficient voltage to drive the motor at high speeds in battery-powered or low-voltage applications, severely limiting system performance. While multi-level inverters can improve output waveform quality by increasing the number of levels, they introduce a series of new problems such as midpoint potential balance, complex switching sequences, and difficulty in zero-sequence current suppression. Especially in the emerging three-level series winding topology, its voltage vector distribution is fundamentally different from that of traditional three-level inverters. It has more switching states and a more complex space vector distribution. Directly applying the existing two-dimensional SVPWM modulation strategy will lead to drawbacks such as zero-sequence component runaway, excessive common-mode voltage, aggravated electromagnetic interference, and significant midpoint potential fluctuations. This not only causes motor torque pulsation and additional losses, but may also affect system stability and safety. This has made the practical application of the three-level SEW topology face significant technical obstacles.

[0052] This invention introduces a three-dimensional spatial vector pulse width modulation strategy to systematically reconstruct the voltage vector distribution under 81 switching states. These vectors are explicitly divided into α-β plane vectors and vectors with positive / negative zero-sequence components. By employing the nearest three-vector synthesis and zero-sequence cancellation strategies, high-precision tracking of the reference voltage within the α-β plane is achieved, while effectively suppressing zero-sequence current and common-mode voltage. This method not only increases the maximum output voltage amplitude to 2V... dc The modulation scheme, with a resolution of / √3, is significantly superior to traditional three-level modulation schemes. Furthermore, by optimizing the switching sequence, it reduces switching losses and electromagnetic interference, achieving a substantial reduction in harmonic distortion and a significant improvement in waveform quality. This systematic solution completely overcomes the contradiction between voltage utilization, waveform quality, and control complexity that was difficult to balance in previous technologies. It provides a reliable, efficient, and easy-to-implement modulation method for high-performance motor drive systems, possessing significant engineering application value and theoretical breakthrough significance. Attached Figure Description

[0053] Figure 1 This is a flowchart of the space vector pulse width modulation method for a multilevel series winding topology provided in an embodiment of the present invention.

[0054] Figure 2 This is a system structure block diagram of the space vector pulse width modulation method for multilevel series winding topology provided in the embodiments of the present invention.

[0055] Figure 3 This is a control block diagram provided in an embodiment of the present invention.

[0056] Figure 4 This is a topology diagram provided in an embodiment of the present invention.

[0057] Figure 5 This is a projection diagram of a three-dimensional spatial vector on various planes provided in the embodiments of the present invention.

[0058] Figure 6 This is a vector diagram in the α-β plane provided in the embodiments of the present invention.

[0059] Figure 7 This is a sector division diagram in the α-β plane provided in an embodiment of the present invention.

[0060] Figure 8 This is a vector projection diagram of a vector with a γ component in the α-β plane provided in the embodiments of the present invention.

[0061] Figure 9 This is a schematic diagram of the voltage vector synthesis sequence of the first large sector provided in an embodiment of the present invention.

[0062] Figure 10 This is a simulation waveform diagram of the experimental effect provided in the embodiment of the present invention.

[0063] Figure 11 This is a simulation waveform diagram of bridge arm voltage and current provided in an embodiment of the present invention. Detailed Implementation

[0064] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0065] like Figure 1 As shown, the space vector pulse width modulation method for a multilevel series winding topology provided by this embodiment of the invention includes the following steps:

[0066] S1. Acquire the three-phase stator current i through a current sensor. a i b with i c The three-phase stator voltage u is reconstructed by collecting the voltage value from the DC bus voltage sensor and the inverter switching state. s The rotational speed ω is obtained by a photoelectric encoder. e With angle information σ;

[0067] S2. The collected three-phase stator current i a i b with i c After Clark transformation, we obtain i in the α-β-γ coordinate system. α i βand i γ According to i α i β and i γ The magnitude and angle of the voltage vector are determined, thereby determining the spatial location of the voltage vector;

[0068] S3. For a vector in the α-β plane, based on the calculated spatial position of the reference voltage vector in the α-β coordinate system, determine its large sector and subdivided small triangular regions through coordinate transformation; the small triangular region is composed of the three nearest spatial voltage vector vertices.

[0069] The division of this region is based on the following: the switching vector of the three-level inverter is decomposed into 36 independent small triangular regions according to spatial geometric relationships; the basic voltage vectors V1, V2 and V3 used for modulation are determined according to the principle of closest spatial distance; and the voltage vector with γ component is synthesized by selecting three basic voltage vectors V1, V2 and V3 with the same magnitude and 120° difference in direction in the projection of the α-β plane.

[0070] S4. Based on the selected basic voltage vector, and in accordance with the basic principle of voltage vector switching, determine the PWM waveform corresponding to each sector, and in accordance with the amplitude-second balance principle, determine the action time T1, T2 and T3 of each basic voltage vector V1, V2 and V3.

[0071] S5. The voltage values ​​V of the two capacitors are acquired by the DC bus voltage sensor. C1 and V C2 The difference between the two is calculated, and combined with the duty cycle and the three-phase stator current, hysteresis control is performed to obtain the duty cycle adjustment factor np, thereby adjusting the duty cycle.

[0072] S6. Compare the corrected duty cycle with the carrier wave and convert it into a PWM signal, which is then sent to the gate drive circuit so that the gate drive circuit can drive the motor to run according to the PWM signal.

[0073] The method for calculating the magnitude and angle of the reference voltage vector in S2 provided in this embodiment of the invention is as follows:

[0074] In a three-phase stationary coordinate system, while keeping the voltage amplitude constant, the stator current i a i b and i c with i α i β and i γ The relationship between them is:

[0075] ,

[0076] ,

[0077] ,

[0078] Where θ is the angle value of the reference voltage vector, V m The reference voltage vector magnitude is T, and the duration of the voltage vector's action is T.

[0079] The calculation method for the action times T1, T2, and T3 of the basic voltage vectors V1, V2, and V3 in S4 provided in this embodiment of the invention is as follows:

[0080] ,

[0081] Among them, V s For the reference voltage vector, T s The duration of the reference voltage vector.

[0082] The calculation method for the duty cycle adjustment factor np in S5 provided in this embodiment of the invention is as follows:

[0083] ,

[0084] ,

[0085] ,

[0086] ,

[0087] ,

[0088] ,

[0089] Where C is the capacitance value, D i For the duty cycle of each bridge arm, I i These are the stator currents for each phase.

[0090] like Figure 2 As shown, an embodiment of the present invention provides a space vector pulse width modulation system with a multilevel series winding topology, comprising:

[0091] The acquisition module is used to acquire the three-phase stator current i through a current sensor. a i b with i c The three-phase stator voltage u is reconstructed by collecting the voltage value from the DC bus voltage sensor and the inverter switching state. s The rotational speed ω is obtained by a photoelectric encoder. e With angle information σ;

[0092] The conversion module is used to convert the acquired three-phase stator current i a i b with ic After Clark transformation, we obtain i in the α-β-γ coordinate system. α i β and i γ According to i α i β and i γ The magnitude and angle of the voltage vector are determined, thereby determining the spatial location of the voltage vector;

[0093] The region determination module is used to determine the large sector and subdivided small triangular regions to which a vector located in the α-β plane belongs, based on the calculated spatial position of the reference voltage vector in the α-β coordinate system, through coordinate transformation. Each small triangular region is composed of the three nearest spatial voltage vector vertices. The division of this region is based on the following criteria: the switching vector of the three-level inverter is decomposed into 36 independent small triangular regions according to spatial geometric relationships; the basic voltage vectors V1, V2, and V3 used for modulation are determined according to the principle of closest spatial distance; and the voltage vector with the γ component is synthesized by selecting three basic voltage vectors V1, V2, and V3 that are the same in magnitude but 120° apart in direction in the projection of the α-β plane.

[0094] The voltage determination module is used to determine the PWM waveform corresponding to each sector according to the selected basic voltage vector and the basic principle of voltage vector switching, and to determine the action time T1, T2 and T3 of each basic voltage vector V1, V2 and V3 according to the amplitude-second balance principle.

[0095] The adjustment module is used to acquire the voltage values ​​V of the two capacitors respectively through a DC bus voltage sensor. C1 and V C2 The difference between the two is calculated, and combined with the duty cycle and the three-phase stator current, hysteresis control is performed to obtain the duty cycle adjustment factor np, thereby adjusting the duty cycle.

[0096] The comparison module is used to compare the corrected duty cycle with the carrier wave and convert it into a PWM signal, which is then sent to the gate drive circuit so that the gate drive circuit can drive the motor to run according to the PWM signal.

[0097] Another object of the present invention is to provide a computer device including a memory and a processor, the memory storing a computer program, which, when executed by the processor, causes the processor to perform the steps of the space vector pulse width modulation method of the multilevel series winding topology.

[0098] Another object of the present invention is to provide a computer-readable storage medium storing a computer program, which, when executed by a processor, causes the processor to perform the steps of the space vector pulse width modulation method of the multilevel series winding topology.

[0099] Another objective of the present invention is to provide an information data processing terminal for implementing the space vector pulse width modulation system of the multi-level series winding topology.

[0100] like Figure 3 — Figure 9 As shown, the three-dimensional space vector modulation strategy and three-level series-wound inverter topology proposed in this invention have significant application value in aerospace and UAV electric propulsion systems. High-end equipment such as electric vertical takeoff and landing aircraft and spacecraft actuation systems place extremely stringent requirements on the power density, reliability, and fault tolerance of drive systems. These systems must provide maximum thrust or torque under limited onboard energy and strict weight constraints, while maintaining stable operation in extreme environments and possessing the ability to cope with potential unit failures.

[0101] This invention offers an innovative solution for aerospace electric propulsion systems through its unique three-level SEW-VSI topology. Its high DC voltage utilization allows for greater output power at the same input voltage, a feature particularly important for battery-powered electric aircraft. By improving voltage utilization efficiency, the system can meet power requirements without increasing the number of battery packs connected in series, effectively reducing system weight and significantly improving overall power density—a crucial factor for lightweight aerospace applications.

[0102] Meanwhile, this topology itself possesses excellent fault tolerance, and the three-level design further enhances the system's reliability. When a single switching device fails in the system, it can continue operating at a reduced derating rate through control algorithm reconfiguration. This characteristic is crucial for ensuring flight safety. In aerospace applications, system failures can have serious consequences; therefore, this inherent fault tolerance provides vital redundancy for aircraft.

[0103] Furthermore, the three-level output waveform generated by this invention has a low dv / dt, which not only reduces switching losses but, more importantly, significantly lowers the level of electromagnetic interference (EMI). In the complex environment of airborne electronic equipment, low EMI characteristics are of great value in ensuring the normal operation of various sensitive avionics devices and meeting stringent electromagnetic compatibility standards, thus providing a guarantee for the stable operation of the entire avionics system.

[0104] In summary, this invention provides a high-performance, high-reliability power electronics solution for next-generation electric aircraft and spacecraft. Its technical characteristics perfectly match the special requirements of the aerospace field for drive systems, demonstrating significant technical advantages and application potential.

[0105] The application of the three-dimensional space vector modulation strategy proposed in this invention in a three-level series winding inverter demonstrates significant technical advantages and stable control performance through system simulation analysis and preliminary experimental verification. To comprehensively evaluate its technical effectiveness, we built a detailed simulation model based on the MATLAB / Simulink platform and set experimental parameters highly consistent with those of a real motor drive system, including the DC bus voltage V. dc = 300V, switching frequency 10kHz, the load is a three-phase permanent magnet synchronous motor, and its specific parameters are: stator resistance R s = 0.9Ω, d / q axis inductance L d = 3.7mH, L q =5.0mH, rotor flux ψ f = 0.08Wb. During the simulation, we focused on quantitative analysis of the output voltage waveform quality, DC voltage utilization, torque response characteristics, and common-mode voltage suppression effect.

[0106] Regarding the output voltage waveform, such as Figure 10 As shown, the phase and line voltages of the three-level SEW-VSI output using the proposed 3D-SVPWM strategy exhibit typical three-level stepped waveforms, with smoothness and good symmetry. FFT analysis reveals that the total harmonic distortion (THD) of the output phase voltage is only 8.2%, significantly lower than the 28.5% of the traditional two-level SEW-VSI, and even about 5% lower than the traditional three-level star-connected NPC inverter. This result clearly demonstrates the superiority of this modulation strategy in harmonic suppression, especially in low- and medium-voltage motor drives, where it can significantly reduce motor iron and copper losses and improve system efficiency.

[0107] In terms of DC voltage utilization, this scheme achieves a maximum linear modulation ratio of 1.154 and a maximum output line voltage fundamental amplitude of 2V. dc / √3, which is about 15.5% higher than the traditional three-level modulation method. Figure 5 and Figure 6 The α-β plane vector distribution diagram clearly shows that the vector amplitude of the outer hexagon vertex is significantly greater than that of the traditional three-level topology, confirming that the topology combined with 3D-SVPWM can achieve higher DC voltage utilization capability, making it particularly suitable for applications requiring low-voltage, high-power output, such as battery-powered electric vehicles and aerospace electric propulsion systems.

[0108] In terms of system dynamic performance, such as Figure 10As shown, the three-level SEW-VSI exhibits fast torque response during load abrupt changes, with overshoot less than 5%, and a settling time approximately 30% shorter than the two-level structure. Furthermore, torque ripple is significantly reduced during steady-state operation, with fluctuations controlled within ±0.05 Nm. This demonstrates that the proposed modulation strategy not only effectively improves steady-state waveform quality but also enhances the system's dynamic control accuracy and disturbance rejection capability, meeting the demands of high-dynamic servo applications.

[0109] Regarding common-mode voltage suppression, this invention employs a strategy of synthesizing zero-sequence axis component cancellation, resulting in a lower common-mode voltage peak compared to traditional methods. Furthermore, through a midpoint potential balance control algorithm, the voltage difference V between the two capacitors on the DC side is reduced. C1 -V C2 The voltage was consistently kept below 5V, verifying that the strategy has good midpoint stability in actual operation.

[0110] In summary, through detailed simulation data and preliminary experimental verification, the three-dimensional space vector modulation strategy proposed in this invention is not only innovative at the theoretical level, but also demonstrates high voltage utilization, low harmonic distortion, excellent dynamic response, and effective common-mode suppression capability in practical performance, providing solid data support and technical guarantee for the engineering application of three-level SEW topologies.

[0111] This invention is applied to the series-parallel balancing control of battery modules in energy storage power stations. In this scenario, traditional energy storage systems are prone to voltage imbalance due to differences in charging and discharging characteristics among battery modules, leading to reduced system efficiency and shortened lifespan. The method of this invention decomposes the battery pack output voltage vector using an α-β-γ orthogonal coordinate system, employs a zero-sequence component cancellation strategy to suppress common-mode interference between modules, uses hysteresis control to correct the duty cycle, and dynamically balances the output voltage of each battery module. It also optimizes PWM waveform generation by combining amplitude-second balancing principles to reduce harmonic losses during battery charging and discharging. Experimental data shows that this application can improve the DC voltage utilization rate of the energy storage system by 12%, control the voltage difference between battery modules to within 2%, and reduce the peak common-mode voltage by 30%, significantly enhancing the stability and energy conversion efficiency of the energy storage system.

[0112] It should be noted that embodiments of the present invention can be implemented in hardware, software, or a combination of both. The hardware portion can be implemented using dedicated logic; the software portion can be stored in memory and executed by a suitable instruction execution system, such as a microprocessor or dedicated-design hardware. Those skilled in the art will understand that the above-described devices and methods can be implemented using computer-executable instructions and / or included in processor control code, for example, such code provided on a carrier medium such as a disk, CD, or DVD-ROM, a programmable memory such as read-only memory (firmware), or a data carrier such as an optical or electronic signal carrier. The devices and modules of the present invention can be implemented by hardware circuitry such as very large-scale integrated circuits or gate arrays, semiconductors such as logic chips, transistors, or programmable hardware devices such as field-programmable gate arrays, programmable logic devices, etc., or by software executed by various types of processors, or by a combination of the above-described hardware circuitry and software, such as firmware.

[0113] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any modifications, equivalent substitutions, and improvements made by those skilled in the art within the scope of the technology disclosed in the present invention, and within the spirit and principles of the present invention, should be covered within the scope of protection of the present invention.

Claims

1. A method of space vector pulse width modulation for a multi-level series winding topology, characterized by, The method comprises the following steps: decomposing and reconstructing the voltage vector through an α-β-γ orthogonal coordinate system; selecting basic voltage vectors based on the principle of the synthesis of the last three vectors and calculating the action time of the basic voltage vectors; adopting a zero sequence component offset strategy to suppress common-mode voltage and correcting the duty cycle through hysteresis control to balance the capacitor voltage of the DC bus.

2. The method of claim 1, wherein, The method further comprises the following steps: collecting three-phase stator current through a current sensor, collecting voltage values through a DC bus voltage sensor, and reconstructing three-phase stator voltage in combination with the switching state of the inverter; performing Clark transformation on the three-phase stator current to obtain current components in the α-β-γ coordinate system, determining the amplitude and angle of the reference voltage vector according to the current components, and determining the spatial position of the reference voltage vector; dividing the switching vector of the three-level inverter into 36 small triangular regions, determining the sector and small triangular region to which the reference voltage vector belongs according to the spatial position of the reference voltage vector, and selecting the three nearest basic voltage vectors as modulation vectors; calculating the action time of each basic voltage vector according to the amplitude-second balance principle and generating a PWM waveform; collecting the voltage values of the two capacitors in the DC bus, calculating the voltage difference, performing hysteresis control in combination with the duty cycle and the three-phase stator current, obtaining a duty cycle adjustment factor, and correcting the duty cycle; comparing the corrected duty cycle with a carrier wave, converting the comparison result into a PWM signal, and outputting the PWM signal to a gate drive circuit to drive the motor.

3. The method of claim 2, wherein, The amplitude and angle of the reference voltage vector are obtained through square sum operation and arctangent operation on the current components after Clark transformation.

4. The method of claim 2, wherein, The action time of each basic voltage vector is calculated through the amplitude-second balance principle, and the reference voltage vector is synthesized by the weighted combination of the three basic voltage vectors in a modulation period.

5. The method of claim 2, wherein, The duty cycle adjustment factor is obtained through the operation of the voltage difference of the two DC capacitors, the duty cycle of each bridge arm, and the three-phase stator current.

6. A space vector pulse width modulation system implementing a multi-level series wound topology for a method as claimed in any one of claims 1 to 5, characterised in that, The method comprises the following steps: a collection module for collecting three-phase stator current, DC bus voltage, inverter switching state, and motor speed and angle; a transformation module for performing Clark transformation on the three-phase stator current and calculating the amplitude and angle of the reference voltage vector; a region determination module for determining the sector and small triangular region to which the reference voltage vector belongs and selecting the three nearest basic voltage vectors; a voltage determination module for calculating the action time of each basic voltage vector and generating a PWM waveform; an adjustment module for calculating a duty cycle adjustment factor through the voltage difference of the DC capacitors and hysteresis control and correcting the duty cycle; a comparison module for comparing the corrected duty cycle with a carrier wave and outputting a PWM signal to a gate drive circuit.

7. The system of claim 6, wherein, The collection module comprises a current sensor, a DC bus voltage sensor, and an optical encoder.

8. The system of claim 6, wherein, The region determination module divides the switching vector of the three-level inverter into 36 independent small triangular regions.

9. A three-dimensional space vector pulse width modulation apparatus, characterized by, The system comprises a motor and a multi-level series winding topology space vector pulse width modulation system as claimed in any one of claims 6 to 8, and the system is used to generate a PWM signal and drive the motor to operate.

10. An electric motor drive system characterized by comprising: The system comprises a motor and a multi-level series winding topology space vector pulse width modulation system as claimed in any one of claims 6 to 8, and the system is used to generate a PWM signal and drive the motor to operate.

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