Bidirectional amplifier chip

Abstract

The invention provides a bidirectional amplifier chip, which relates to the technical field of amplifier devices and comprises a broadband low-noise amplifier, a transistor logic circuit and a plurality of single-pole double-throw switches, the transistor logic circuit is used for controlling the turn-on and turn-off states of the plurality of single-pole double-throw switches; the common end of the first single-pole double-throw switch is connected with a first radio frequency signal source, the common end of the third single-pole double-throw switch is connected with a second radio frequency signal source, the common end of the second single-pole double-throw switch is connected with the input end of the broadband low-noise amplifier, and the common end of the fourth single-pole double-throw switch is connected with the output end of the broadband low-noise amplifier; the first single-pole double-throw switch to the fourth single-pole double-throw switch are connected through a switching end. The method has the advantages that the self-excitation problem during power supply modulation is solved, and the power supply modulation speed is increased.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of amplifier devices, in particular to a bidirectional amplifier chip. BACKGROUND

[0002] With the rapid development and popularization of wireless communication, the requirements for transceiver components in the radio frequency field are also becoming higher and higher. In the traditional transceiver system, multiple switches and amplification units are often needed, which will make the system require more area and cost.

[0003] The traditional bidirectional amplifier is composed of two single-pole double-throw switches, two low-noise amplifiers and a transistor-logic circuit. The disadvantage of this structure is that the receiving and transmitting two paths are prone to self-excitation when the power is modulated, affecting use. Moreover, the speed of power modulation of the bidirectional amplifier is slow, which cannot meet the needs of some users.

[0004] Therefore, it is urgent to optimize the bidirectional amplifier to solve the problem of self-excitation when the power is modulated and to improve the speed of power modulation. SUMMARY

[0005] The purpose of the present application is to provide a bidirectional amplifier chip which can solve the problem of self-excitation when the power is modulated and improve the speed of power modulation.

[0006] The present application is implemented by the following technical solutions: A bidirectional amplifier chip, comprising a wideband low-noise amplifier, a transistor logic circuit and a plurality of single-pole double-throw switches; The transistor logic circuit is used to control the on and off states of each of the plurality of single-pole double-throw switches to realize the switching of the bidirectional signal source channel; the common end of the first single-pole double-throw switch is connected to a first radio frequency signal source, the common end of the third single-pole double-throw switch is connected to a second radio frequency signal source, the common end of the second single-pole double-throw switch is connected to the input end of the wideband low-noise amplifier, and the common end of the fourth single-pole double-throw switch is connected to the output end of the wideband low-noise amplifier; the first switching end of the first single-pole double-throw switch is connected to the first switching end of the second single-pole double-throw switch, the second switching end of the second single-pole double-throw switch is connected to the first switching end of the third single-pole double-throw switch, the second switching end of the third single-pole double-throw switch is connected to the first switching end of the fourth single-pole double-throw switch, and the second switching end of the fourth single-pole double-throw switch is connected to the second switching end of the first single-pole double-throw switch.

[0007] Preferably, the wideband low-noise amplifier comprises an input matching network, a first-stage negative feedback matching network, a first-stage active bias matching network, a second-stage active bias matching network, an inter-stage matching network, a second-stage negative feedback matching network, an output matching network and a feed matching network; The first end of the input matching network is the input end of the wideband low noise amplifier, the second end of the input matching network is connected to the first end of the first stage negative feedback matching network, the third end of the input matching network is connected to the first end of the inter-stage matching network through a transistor, the second end of the first stage negative feedback matching network is connected to the second end of the inter-stage matching network, the third end of the first stage negative feedback matching network is connected to the first end of the first stage active bias matching network, the fourth end of the first stage negative feedback matching network and the second end of the first stage active bias matching network are connected to the first end of the feeding matching network through the ninth inductor and the thirteenth resistor, the third end of the inter-stage matching network is connected to the first end of the second stage negative feedback matching network, the first end of the second active bias matching network through the eighth resistor, and the first end of the output matching network through a transistor, the second end of the second active bias matching network is connected to the first end of the feeding matching network through the ninth resistor, the second end of the second stage negative feedback matching network is connected to the second end of the output matching network, the third end of the output matching network is connected to the second end of the feeding matching network, and the fourth end of the output matching network is the output end of the wideband low noise amplifier.

[0008] Preferably, the input matching network comprises a first capacitor, a first inductor and a second inductor. The first end of the first capacitor is the input end of the wideband low noise amplifier, the second end of the first capacitor is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the second inductor and is the second end of the input matching network, and the second end of the second inductor is the third end of the input matching network.

[0009] Preferably, the first stage negative feedback matching network comprises a fifth resistor, a second capacitor, a first microstrip line and a third microstrip line. The first end of the fifth resistor is connected to the common node of the first inductor and the second inductor, the second end of the fifth resistor is connected to the first end of the first microstrip line and is the third end of the first stage negative feedback matching network, the second end of the first microstrip line is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the first end of the third microstrip line and is the fourth end of the first stage negative feedback matching network, and the second end of the third microstrip line is the second end of the first stage negative feedback matching network.

[0010] Preferably, the first stage active bias matching network comprises a first resistor, a second resistor, a third resistor and a third transistor, and the first stage active bias matching network is connected to the first stage negative feedback matching network through a fourth resistor. a first end of the first resistor is connected to ground, a second end of the first resistor is connected to a source of the third transistor, a gate of the third transistor is connected to a first end of the second resistor and a drain of the third transistor, a second end of the second resistor is connected to a first end of the third resistor and a first end of the fourth resistor, a second end of the third resistor is connected to a first end of the third microstrip line and is a second end of the first stage active bias matching network, the drain of the third transistor is connected to a power supply voltage, and a second end of the fourth resistor is connected to a second end of the fifth resistor.

[0011] Preferably, the inter-stage matching network comprises a third inductor, a fourth inductor, a thirteenth capacitor and a fourth microstrip line; a gate of the first transistor is connected to a third end of the input matching network, a first end of the third inductor is connected to a drain of the first transistor, a source of the first transistor is connected to ground through a second microstrip line, a second end of the third inductor is connected to a first end of the fourth inductor and is a second end of the inter-stage matching network, a second end of the fourth inductor is connected to a first end of the third capacitor, a second end of the third capacitor is connected to a first end of the fourth microstrip line, and a second end of the fourth microstrip line is a third end of the inter-stage matching network.

[0012] Preferably, the second stage negative feedback matching network comprises a tenth resistor, a fourth capacitor, an eighth microstrip line and a fifth inductor; a first end of the tenth resistor is connected to a second end of the fourth microstrip line, a second end of the tenth resistor is connected to a first end of the fifth inductor, a second end of the fifth inductor is connected to a first end of the fourth capacitor, a second end of the fourth capacitor is connected to a first end of the eighth microstrip line, and a second end of the eighth microstrip line is a second end of the second stage negative feedback matching network.

[0013] Preferably, the output matching network comprises a sixth inductor, a seventh resistor and a fifth capacitor, and the output matching network is connected to the inter-stage matching network through a fifth microstrip line and a second transistor; a second end of the fourth microstrip line is connected to a first end of the fifth microstrip line, a second end of the fifth microstrip line is connected to a gate of the second transistor, a source of the second transistor is connected to ground through a sixth microstrip line, a drain of the second transistor is connected to a first end of the sixth inductor, a second end of the sixth inductor is connected to a first end of the seventh microstrip line and a second end of the eighth microstrip line, a second end of the seventh microstrip line is connected to a first end of the fifth capacitor and the feed matching network, and a second end of the fifth capacitor is an output end of the wideband low noise amplifier.

[0014] Preferably, the feed matching network comprises a seventh inductor, an eighth inductor, an eleventh resistor, a sixth capacitor and a twelfth resistor; the thirteenth resistor is connected to a first end of the third resistor, and a second end of the thirteenth resistor is connected to a first end of the ninth inductor; The first end of the eleventh resistor, the first end of the eighth inductor and the first end of the sixth capacitor are connected to the second end of the ninth inductor, the second end of the eleventh resistor and the second end of the eighth inductor are connected to the first end of the seventh inductor, the second end of the sixth capacitor is connected to the first end of the twelfth resistor, the second end of the twelfth resistor is grounded, and the second end of the seventh inductor is connected to the common node of the seventh microstrip line and the fifth capacitor; The second-stage active bias matching network comprises a sixth resistor, a seventh resistor and a fourth transistor; The gate of the fourth transistor is connected to the first end of the seventh resistor, the second end of the seventh resistor is connected to the drain of the fourth transistor, the first end of the eighth resistor and the first end of the ninth resistor, the source of the fourth transistor is grounded through the sixth resistor, the second end of the eighth resistor is connected to the common node of the fourth microstrip line and the tenth resistor; The second end of the ninth inductor and the second end of the ninth resistor are connected to the common node of the sixth capacitor, the eighth inductor and the eleventh resistor.

[0015] Preferably, the method for controlling the on and off states of the multiple single-pole double-throw switches by the transistor logic circuit is that: The power supply end of the transistor logic circuit is loaded with a-5V power supply, the power supply of the control port is controlled to be 0V or 5V to control the on and off states of the multiple single-pole double-throw switches, and the first radio frequency signal source-second radio frequency signal source channel and the second radio frequency signal source-first radio frequency signal source channel are realized.

[0016] The technical scheme of the present application has at least the following advantages and beneficial effects: The present application meets the needs of the communication system for switching the receiving and transmitting channels of the amplifier, and when the receiving and transmitting channels are switched, the low-noise amplifier does not need to be modulated by the power supply, and only the on and off states of the switch need to be controlled to realize the switching between the receiving and transmitting channels, and no self-excitation phenomenon occurs to affect the use. The switching speed of the present application is relatively fast, and the speed can usually reach about 30ns, meeting the needs of users for the switching speed. The present application meets the use while having high integration, wide working bandwidth, reducing the use of power supply modulation chips and other devices, and being more convenient to use. BRIEF DESCRIPTION OF DRAWINGS

[0017] Figure 1 A structure schematic diagram of a bidirectional amplifier chip is provided for the embodiment of the present application; Figure 2 A structure schematic diagram of a wideband low-noise amplifier is provided for the embodiment of the present application; Reference signs: SPDT1 - first single-pole double-throw switch, SPDT2 - second single-pole double-throw switch, SPDT3 - third single-pole double-throw switch, SPDT4 - fourth single-pole double-throw switch, Q - transistor logic circuit, LNA - wideband low noise amplifier, R1 - first resistor, R2 - second resistor, R3 - third resistor, R4 - fourth resistor, R5 - fifth resistor, R6 - sixth resistor, R7 - seventh resistor, R8 - eighth resistor, R9 - ninth resistor, R10 - tenth resistor, R11 - eleventh resistor, R12 - twelfth resistor, R13 - thirteenth resistor, L1 - first inductor, L2 - second inductor, L3 - third inductor, L4 - fourth inductor, L5 - fifth inductor, L6 - sixth inductor, L7 - seventh inductor, L8 - eighth inductor, L9 - ninth inductor, FET1 - first transistor, FET2 - second transistor, FET3 - third transistor, FET4 - fourth transistor, ML1 - first microstrip line, ML2 - second microstrip line, ML3 - third microstrip line, ML4 - fourth microstrip line, ML5 - fifth microstrip line, ML6 - sixth microstrip line, ML7 - seventh microstrip line, ML8 - eighth microstrip line. DETAILED DESCRIPTION

[0018] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are some but not all of the embodiments of the present application. The components of the embodiments of the present application described and shown in the drawings herein can be arranged and designed in various different configurations.

[0019] EMBODIMENT The embodiment provides a bidirectional amplifier chip, referring to Figure 1 , comprising a wideband low noise amplifier LNA, a transistor logic circuit Q and a plurality of single-pole double-throw switches. The transistor logic circuit Q is used to control the on and off states of each of the single-pole double-throw switches, so as to realize the switching of the bidirectional signal source channel; the common terminal of the first single-pole double-throw switch SPDT1 is connected with a first radio frequency signal source, the common terminal of the third single-pole double-throw switch SPDT3 is connected with a second radio frequency signal source, the common terminal of the second single-pole double-throw switch SPDT2 is connected with the input terminal of the wideband low noise amplifier LNA, and the common terminal of the fourth single-pole double-throw switch SPDT4 is connected with the output terminal of the wideband low noise amplifier LNA; the first switching terminal of the first single-pole double-throw switch SPDT1 is connected with the first switching terminal of the second single-pole double-throw switch SPDT2, the second switching terminal of the second single-pole double-throw switch SPDT2 is connected with the first switching terminal of the third single-pole double-throw switch SPDT3, the second switching terminal of the third single-pole double-throw switch SPDT3 is connected with the first switching terminal of the fourth single-pole double-throw switch SPDT4, and the second switching terminal of the fourth single-pole double-throw switch SPDT4 is connected with the second switching terminal of the first single-pole double-throw switch SPDT1.

[0020] The bidirectional amplifier of the embodiment adopts a clever design: a transistor logic circuit Q is used to control the on and off of four single-pole double-throw switches, so as to realize the switching of different receiving / transmitting states. This way does not need to make complex power modulation to the core low noise amplifier, and brings two great advantages: one is that the state switching is extremely fast, and the other is that there is no self-excitation during the whole receiving / transmitting switching process.

[0021] In the embodiment, referring to Figure 2 , the wideband low noise amplifier comprises an input matching network, a first-stage negative feedback matching network, a first-stage active bias matching network, a second-stage active bias matching network, an inter-stage matching network, a second-stage negative feedback matching network, an output matching network and a feeding matching network; The first end of the input matching network is the input end of the broadband low noise amplifier, the second end of the input matching network is connected to the first end of the first stage negative feedback matching network, the third end of the input matching network is connected to the first end of the inter-stage matching network through a transistor, the second end of the first stage negative feedback matching network is connected to the second end of the inter-stage matching network, the third end of the first stage negative feedback matching network is connected to the first end of the first stage active bias matching network, the fourth end of the first stage negative feedback matching network and the second end of the first stage active bias matching network are connected to the first end of the feed matching network through the ninth inductor L9 and the thirteenth resistor R13, the third end of the inter-stage matching network is connected to the first end of the second stage negative feedback matching network, the first end of the second active bias matching network through the eighth resistor R8, and the first end of the output matching network through a transistor, the second end of the second active bias matching network is connected to the first end of the feed matching network through the ninth resistor R9, the second end of the second stage negative feedback matching network is connected to the second end of the output matching network, the third end of the output matching network is connected to the second end of the feed matching network, and the fourth end of the output matching network is the output end of the broadband low noise amplifier.

[0022] Firstly, the input matching network comprises a first capacitor, a first inductor L1 and a second inductor L2. The first end of the first capacitor is the input end of the broadband low noise amplifier LNA, the second end of the first capacitor is connected to the first end of the first inductor L1, the second end of the first inductor L1 is connected to the first end of the second inductor L2 and is the second end of the input matching network, and the second end of the second inductor L2 is the third end of the input matching network.

[0023] The first capacitor is used as a DC blocking capacitor.

[0024] Secondly, the first stage negative feedback matching network comprises a fifth resistor R5, a second capacitor, a first microstrip line ML1 and a third microstrip line ML3. The first end of the fifth resistor R5 is connected to the common node of the first inductor L1 and the second inductor L2, the second end of the fifth resistor R5 is connected to the first end of the first microstrip line ML1 and is the third end of the first stage negative feedback matching network, the second end of the first microstrip line ML1 is connected to the first end of the second capacitor, the second end of the second capacitor is connected to the first end of the third microstrip line ML3 and is the fourth end of the first stage negative feedback matching network, and the second end of the third microstrip line ML3 is the second end of the first stage negative feedback matching network.

[0025] The first stage negative feedback matching network arranged above can improve the gain flatness of the amplifier, improve the working bandwidth and the stability factor.

[0026] In addition, the first-stage active bias matching network comprises a first resistor R1, a second resistor R2, a third resistor R3 and a third transistor FET3; the first-stage active bias matching network is connected to the first-stage negative feedback matching network through a fourth resistor R4; A first end of the first resistor R1 is grounded, a second end of the first resistor R1 is connected to a source of the third transistor FET3, a gate of the third transistor FET3 is connected to a first end of the second resistor R2 and a drain of the third transistor FET3, a second end of the second resistor R2 is connected to a first end of the third resistor R3 and a first end of the fourth resistor R4, a second end of the third resistor R3 is connected to a first end of the third microstrip line ML3 and is a second end of the first-stage active bias matching network, the drain of the third transistor FET3 is connected to a power supply voltage, and a second end of the fourth resistor R4 is connected to a second end of the fifth resistor R5.

[0027] The first-stage active bias matching network of the embodiment can reduce the sensitivity of the circuit to process fluctuations and reduce the influence of process fluctuations on the performance of the amplifier.

[0028] In addition, the inter-stage matching network comprises a third inductor L3, a fourth inductor L4, a thirteenth capacitor and a fourth microstrip line ML4; A gate of the first transistor FET1 is connected to a third end of the input matching network, a first end of the third inductor L3 is connected to a drain of the first transistor FET1, a source of the first transistor FET1 is grounded through the second microstrip line ML2, a second end of the third inductor L3 is connected to a first end of the fourth inductor L4 and is a second end of the inter-stage matching network, a second end of the fourth inductor L4 is connected to a first end of the third capacitor, a second end of the third capacitor is connected to a first end of the fourth microstrip line ML4, and a second end of the fourth microstrip line ML4 is a third end of the inter-stage matching network.

[0029] On the other hand, the second-stage negative feedback matching network comprises a tenth resistor R10, a fourth capacitor, an eighth microstrip line ML8 and a fifth inductor L5; A first end of the tenth resistor R10 is connected to a second end of the fourth microstrip line ML4, a second end of the tenth resistor R10 is connected to a first end of the fifth inductor L5, a second end of the fifth inductor L5 is connected to a first end of the fourth capacitor, a second end of the fourth capacitor is connected to a first end of the eighth microstrip line ML8, and a second end of the eighth microstrip line ML8 is a second end of the second-stage negative feedback matching network.

[0030] The second-stage negative feedback matching network can improve the gain flatness of the amplifier, improve the working bandwidth and the stability factor Meanwhile, the output matching network comprises a sixth inductor L6, a seventh resistor R7 and a fifth capacitor, and the output matching network is connected with the inter-stage matching network through a fifth microstrip line ML5 and a second transistor FET2; The second end of the fourth microstrip line ML4 is connected with the first end of a fifth microstrip line ML5, the second end of the fifth microstrip line ML5 is connected with the gate of the second transistor FET2, the source of the second transistor FET2 is grounded through a sixth microstrip line ML6, the drain of the second transistor FET2 is connected with the first end of a sixth inductor L6, the second end of the sixth inductor L6 is connected with the first end of a seventh microstrip line ML7 and the second end of an eighth microstrip line ML8, the second end of the seventh microstrip line ML7 is connected with the first end of a fifth capacitor and the feeding matching network, and the second end of the fifth capacitor is the output end of the broadband low noise amplifier LNA, which can be output through a pad.

[0031] Finally, the feeding matching network comprises a seventh inductor L7, an eighth inductor L8, an eleventh resistor R11, a sixth capacitor and a twelfth resistor R12; The thirteenth resistor R13 is connected with the first end of the third resistor R3, and the second end of the thirteenth resistor R13 is connected with the first end of the ninth inductor L9; The first end of the eleventh resistor R11, the first end of the eighth inductor L8 and the first end of the sixth capacitor are connected with the second end of the ninth inductor L9, the second end of the eleventh resistor R11 and the second end of the eighth inductor L8 are connected with the first end of the seventh inductor L7, the second end of the sixth capacitor is connected with the first end of the twelfth resistor R12, the second end of the twelfth resistor R12 is grounded, and the second end of the seventh inductor L7 is connected with the common node of the seventh microstrip line ML7 and the fifth capacitor; The second-stage active bias matching network comprises a sixth resistor R6, a seventh resistor R7 and a fourth transistor FET4; The gate of the fourth transistor FET4 is connected with the first end of the seventh resistor R7, the second end of the seventh resistor R7 is connected with the drain of the fourth transistor FET4, the first end of the eighth resistor R8 and the first end of the ninth resistor R9, the source of the fourth transistor FET4 is grounded through the sixth resistor R6, and the second end of the eighth resistor R8 is connected with the common node of the fourth microstrip line ML4 and a tenth resistor R10; The second end of the ninth inductor L9 and the second end of the ninth resistor R9 are connected with the common node of the sixth capacitor, the eighth inductor L8 and the eleventh resistor R11.

[0032] Based on the above scheme of the embodiment, the operating frequency of the bidirectional amplifier is 0.3-8GHz, and the inductance is large when operating at 0.3GHz. If a single inductor structure is used, the resonance frequency of the inductor cannot reach 8GHz. Therefore, the structure of two inductors in series and one inductor in parallel with a resistor (i.e., the structure of the eleventh resistor R11, the eighth inductor L8, and the seventh inductor L7) is creatively proposed, which can improve the resonance frequency of the inductor and increase the operating bandwidth, so as to widen the operating frequency of the bidirectional amplifier to 0.3-8GHz, facilitating user use.

[0033] Based on the above scheme, the method for controlling the on and off states of the plurality of single-pole double-throw switches by the transistor logic circuit Q is: The power supply end VEE of the transistor logic circuit Q is loaded with a-5V power supply, the on and off states of the plurality of single-pole double-throw switches are controlled by controlling the power supply of the control port A to be 0V or 5V, and the first radio frequency signal source-second radio frequency signal source channel and the second radio frequency signal source-first radio frequency signal source channel are realized. For example, when A=+5V, the bidirectional amplifier is in the first radio frequency signal source RF1-second radio frequency signal source RF2 channel; when A=0V, the bidirectional amplifier is in the second radio frequency signal source RF2-first radio frequency signal source RF1 channel. The VD port of the low noise amplifier is always loaded with +5V, and does not need to be modulated. The advantage of this structure is that only the on and off states of the switches need to be switched by the transistor logic circuit Q, so as to realize the mutual switching of the two channels mentioned above, and the low noise amplifier does not need to be modulated in use, avoiding the self-excitation phenomenon of the bidirectional amplifier during the switching process, and facilitating user use.

[0034] In summary, the device of the embodiment is composed of four single-pole double-throw switches, a low noise amplifier, and a transistor logic circuit. The on and off states of the four single-pole double-throw switches are switched by the transistor logic circuit, the low noise amplifier is always powered on during operation, and does not need to be modulated, and does not produce self-excitation and other phenomena to affect use. The switching speed of this structure is fast, and the speed is usually about 30ns, which meets the user's demand for switching speed. In the feed matching network of the low noise amplifier, an inductor is connected in parallel with a resistor and then connected in series with another inductor (i.e., the structure of the eleventh resistor R11, the eighth inductor L8, and the seventh inductor L7), which can effectively improve the resonance frequency of the inductor and further widen the operating bandwidth of the product, and the operating bandwidth can be widened to 0.3-8GHz.

[0035] The above merely describes the preferred embodiments of the present application, and is not used to limit the present application. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

Claims

1. A bidirectional amplifier chip, characterized by The wideband low noise amplifier, the transistor logic circuit and the plurality of single-pole double-throw switches are included. The transistor logic circuit is used for controlling the on and off states of the plurality of single-pole double-throw switches respectively to realize the switching of the bidirectional signal source channel; the common terminal of the first single-pole double-throw switch is connected with a first radio frequency signal source, the common terminal of the third single-pole double-throw switch is connected with a second radio frequency signal source, the common terminal of the second single-pole double-throw switch is connected with the input terminal of the wideband low noise amplifier, the common terminal of the fourth single-pole double-throw switch is connected with the output terminal of the wideband low noise amplifier; the first switching terminal of the first single-pole double-throw switch is connected with the first switching terminal of the second single-pole double-throw switch, the second switching terminal of the second single-pole double-throw switch is connected with the first switching terminal of the third single-pole double-throw switch, the second switching terminal of the third single-pole double-throw switch is connected with the first switching terminal of the fourth single-pole double-throw switch, and the second switching terminal of the fourth single-pole double-throw switch is connected with the second switching terminal of the first single-pole double-throw switch.

2. A bidirectional amplifier chip according to claim 1, characterized in that The wideband low noise amplifier includes an input matching network, a first-stage negative feedback matching network, a first-stage active bias matching network, a second-stage active bias matching network, an inter-stage matching network, a second-stage negative feedback matching network, an output matching network and a feed matching network. The first end of the input matching network is the input terminal of the wideband low noise amplifier, the second end of the input matching network is connected to the first end of the first-stage negative feedback matching network, the third end of the input matching network is connected to the first end of the inter-stage matching network through a transistor, the second end of the first-stage negative feedback matching network is connected to the second end of the inter-stage matching network, the third end of the first-stage negative feedback matching network is connected to the first end of the first-stage active bias matching network, the fourth end of the first-stage negative feedback matching network and the second end of the first-stage active bias matching network are connected to the first end of the feed matching network through a ninth inductor and a thirteenth resistor, the third end of the inter-stage matching network is connected to the first end of the second-stage negative feedback matching network, the first end of the second-stage active bias matching network through an eighth resistor and the first end of the output matching network through a transistor, the second end of the second-stage active bias matching network is connected to the first end of the feed matching network through a ninth resistor, the second end of the second-stage negative feedback matching network is connected to the second end of the output matching network, the third end of the output matching network is connected to the second end of the feed matching network, and the fourth end of the output matching network is the output terminal of the wideband low noise amplifier.

3. A bidirectional amplifier chip according to claim 2, wherein, The input matching network includes a first capacitor, a first inductor and a second inductor. The first end of the first capacitor is the input terminal of the wideband low noise amplifier, the second end of the first capacitor is connected to the first end of the first inductor, the second end of the first inductor is connected to the first end of the second inductor and is the second end of the input matching network, and the second end of the second inductor is the third end of the input matching network.

4. A bidirectional amplifier chip according to claim 3, wherein, The first-stage negative feedback matching network includes a fifth resistor, a second capacitor, a first microstrip line and a third microstrip line. A first end of the fifth resistor is connected to a common node of the first inductor and the second inductor, a second end of the fifth resistor is connected to a first end of the first microstrip line and is a third end of the first stage negative feedback matching network, a second end of the first microstrip line is connected to a first end of the second capacitor, a second end of the second capacitor is connected to a first end of the third microstrip line and is a fourth end of the first stage negative feedback matching network, and a second end of the third microstrip line is a second end of the first stage negative feedback matching network.

5. A bidirectional amplifier chip according to claim 4, wherein, The first stage active bias matching network comprises a first resistor, a second resistor, a third resistor and a third transistor; the first stage active bias matching network is connected to the first stage negative feedback matching network through a fourth resistor; a first end of the first resistor is grounded, a second end of the first resistor is connected to a source of the third transistor, a gate of the third transistor is connected to a first end of the second resistor and a drain of the third transistor, a second end of the second resistor is connected to a first end of the third resistor and a first end of the fourth resistor, a second end of the third resistor is connected to a first end of the third microstrip line and is a second end of the first stage active bias matching network, a drain of the third transistor is connected to a power supply voltage, and a second end of the fourth resistor is connected to a second end of the fifth resistor.

6. A bidirectional amplifier chip according to claim 5, wherein, The inter-stage matching network comprises a third inductor, a fourth inductor, a thirteenth capacitor and a fourth microstrip line; a gate of the first transistor is connected to a third end of the input matching network, a first end of the third inductor is connected to a drain of the first transistor, a source of the first transistor is grounded through a second microstrip line, a second end of the third inductor is connected to a first end of the fourth inductor and is a second end of the inter-stage matching network, a second end of the fourth inductor is connected to a first end of the third capacitor, a second end of the third capacitor is connected to a first end of the fourth microstrip line, and a second end of the fourth microstrip line is a third end of the inter-stage matching network.

7. A bidirectional amplifier chip according to claim 6, wherein The second stage negative feedback matching network comprises a tenth resistor, a fourth capacitor, an eighth microstrip line and a fifth inductor; a first end of the tenth resistor is connected to a second end of the fourth microstrip line, a second end of the tenth resistor is connected to a first end of the fifth inductor, a second end of the fifth inductor is connected to a first end of the fourth capacitor, a second end of the fourth capacitor is connected to a first end of the eighth microstrip line, and a second end of the eighth microstrip line is a second end of the second stage negative feedback matching network.

8. A bidirectional amplifier chip according to claim 7, wherein, The output matching network comprises a sixth inductor, a seventh resistor and a fifth capacitor, and the output matching network is connected to the inter-stage matching network through a fifth microstrip line and a second transistor; a second end of the fourth microstrip line is connected to a first end of the fifth microstrip line, a second end of the fifth microstrip line is connected to a gate of the second transistor, a source of the second transistor is grounded through a sixth microstrip line, a drain of the second transistor is connected to a first end of the sixth inductor, a second end of the sixth inductor is connected to a first end of a seventh microstrip line and a second end of an eighth microstrip line, a second end of the seventh microstrip line is connected to a first end of the fifth capacitor and the feed matching network, and a second end of the fifth capacitor is an output end of the wideband low noise amplifier.

9. A bidirectional amplifier chip according to claim 8, wherein, The feed matching network comprises a seventh inductor, an eighth inductor, an eleventh resistor, a sixth capacitor and a twelfth resistor; The thirteenth resistor is connected with the first end of the third resistor, and the second end of the thirteenth resistor is connected with the first end of the ninth inductor; The first end of the eleventh resistor, the first end of the eighth inductor and the first end of the sixth capacitor are connected with the second end of the ninth inductor, the second end of the eleventh resistor and the second end of the eighth inductor are connected with the first end of the seventh inductor, the second end of the sixth capacitor is connected with the first end of the twelfth resistor, the second end of the twelfth resistor is grounded, and the second end of the seventh inductor is connected with the common node of the seventh microstrip line and the fifth capacitor; The second-stage active bias matching network comprises a sixth resistor, a seventh resistor and a fourth transistor; The gate of the fourth transistor is connected with the first end of the seventh resistor, the second end of the seventh resistor is connected with the drain of the fourth transistor, the first end of the eighth resistor and the first end of the ninth resistor, the source of the fourth transistor is grounded through the sixth resistor, and the second end of the eighth resistor is connected with the common node of the fourth microstrip line and the tenth resistor; The second end of the ninth inductor and the second end of the ninth resistor are connected with the common node of the sixth capacitor, the eighth inductor and the eleventh resistor.

10. The bidirectional amplifier chip of claim 1, wherein, The method for controlling the on and off states of the multiple single-pole double-throw switches by the transistor logic circuit is as follows: The power supply end of the transistor logic circuit is loaded with a-5V power supply, the power supply of the control port is controlled to be 0V or 5V to control the on and off states of the multiple single-pole double-throw switches, and the first radio frequency signal source-second radio frequency signal source channel and the second radio frequency signal source-first radio frequency signal source channel are realized.

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