A power supply circuit for an APD detector and an APD detector

Abstract

The application discloses a power supply circuit of an APD detector and the APD detector, and relates to the technical field of photoelectric detection. The power supply circuit comprises a temperature control module for monitoring the junction temperature and the ambient temperature of the APD detector, a power management chip for outputting a bias voltage, a range switching network for providing different voltage adjustment ranges, and a control module; and the control module is used for controlling the bias voltage in combination with the junction temperature and the ambient temperature. The application realizes wide-range and high-precision bias voltage compensation, effectively stabilizes the gain and performance of the APD, and realizes low-cost adaptation to APD detectors of different specifications.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of photoelectric detection, and in particular to a power supply circuit of an APD detector and an APD detector. BACKGROUND

[0002] An avalanche photodiode detector (APD) is widely used in the fields of optical communication, laser radar, and weak light detection due to its high gain and high sensitivity. The working principle of the APD is based on the avalanche multiplication effect of carriers, and the APD must work under a reverse bias voltage close to its breakdown voltage to obtain ideal avalanche gain.

[0003] However, in the prior art, the APD bias power supply scheme mostly only performs rough compensation through a single environmental temperature sensor or a single feedback resistor network, and has the following disadvantages:

[0004] (1) Only single environmental temperature compensation is performed, without considering the difference between the junction temperature in the APD chip and the environmental temperature, and lacking the ability to predict the rate of change of the environmental temperature, so that the compensation signal lags behind the temperature change, and the APD gain cannot be stabilized in real time;

[0005] (2) The APD needs to work in a wide voltage range of several volts to hundreds of volts in different application scenarios, and the power supply circuit using a single feedback resistor network has a limited adjustment range or a large decrease in accuracy in the high voltage interval, resulting in fluctuations in detection sensitivity;

[0006] (3) Customized high-voltage power supply modules can meet some requirements, but are costly and have poor versatility, making it difficult to adapt to APD detectors of different specifications.

[0007] The above problems directly lead to poor gain stability and weak adaptability of the APD detector, limiting its application in high-precision detection scenarios. SUMMARY

[0008] The present application provides a power supply circuit of an APD detector and an APD detector to solve the problems of inaccurate temperature compensation, difficulty in balancing wide voltage regulation and high precision, and weak scene adaptability in the existing power supply scheme.

[0009] The present application is achieved by the following technical solutions:

[0010] In a first aspect of the present application, a power supply circuit of an APD detector is provided, comprising:

[0011] a temperature control module for monitoring the junction temperature in the APD detector and the environmental temperature and outputting corresponding temperature signals;

[0012] The power management chip has a digital interface, a feedback pin, and a high-voltage output terminal. The high-voltage output terminal is used to provide a bias voltage to the avalanche diode of the APD detector.

[0013] The range switching network includes a multi-channel analog switch and a resistor network with different resistance values ​​connected to each channel; the common terminal of the multi-channel analog switch is connected to the feedback pin of the power management chip, and the channel selection terminal is used to select the channel to be connected to, so as to switch the access resistance value.

[0014] The control module is used to receive the temperature signal, calculate the target bias voltage based on the temperature signal, control the multi-channel analog switch to select channels, and send a voltage control signal to the power management chip through the digital interface to adjust the output voltage of its high-voltage output terminal to the target bias voltage.

[0015] Furthermore, the control module is configured to execute the following switching control strategy:

[0016] Based on the target bias voltage, a target voltage range is determined from a plurality of preset voltage ranges;

[0017] A corresponding channel selection signal is generated based on the target voltage range and sent to the channel selection terminal of the multi-channel analog switch to control the channel selection terminal to select the resistor network corresponding to the target voltage range.

[0018] Furthermore, the control module is configured to execute the following voltage control strategy:

[0019] Real-time monitoring of the on-chip junction temperature and ambient temperature of the APD detector;

[0020] The target bias voltage is obtained by executing a control function that takes the current on-chip junction temperature and current ambient temperature as input and the target bias voltage as output.

[0021] The voltage compensation amount is obtained based on the correspondence between the target bias voltage and the target voltage range, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip;

[0022] The control function includes at least one feedback term based on the on-chip junction temperature and one feedforward compensation term based on the rate of change of ambient temperature, so that the output voltage can be compensated in advance when the ambient temperature changes.

[0023] Furthermore, the temperature control module includes:

[0024] The first temperature acquisition submodule is used to obtain the on-chip junction temperature by reading the electrical parameters of the temperature-sensitive element integrated inside the APD chip, and then performing analog-to-digital conversion and table lookup calculation.

[0025] The second temperature acquisition submodule is used to obtain the ambient temperature through a digital temperature sensor.

[0026] Furthermore, the temperature control module also includes a cooling drive circuit, the controlled end of which is connected to the control module, and the driving end of which is connected to a semiconductor cooling chip; the semiconductor cooling chip is attached to the APD detector.

[0027] The control module is also used to output a temperature control signal to the cooling drive circuit to activate the semiconductor cooling chip for active cooling.

[0028] Furthermore, the control module is configured to execute the following temperature control strategy:

[0029] When the junction temperature on the chip exceeds the first threshold, or when the ambient temperature exceeds the second threshold, a temperature control signal is output to the cooling drive circuit to activate the semiconductor cooling chip for active cooling.

[0030] Furthermore, the control module is also configured to execute the following voltage control strategy when the semiconductor cooling chip is activated for active cooling:

[0031] Real-time monitoring of the cooling power of the cooling chip;

[0032] Based on the current on-chip junction temperature, the current ambient temperature, and the current cooling power, predict the expected on-chip junction temperature detected by the APD;

[0033] Based on the expected on-chip junction temperature and the current ambient temperature, the expected bias voltage is calculated using the control function.

[0034] The voltage compensation amount is obtained based on the correspondence between the target bias voltage and the target voltage range, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip.

[0035] Furthermore, the power supply circuit also includes a current sampling circuit, which is used to collect the bias current flowing through the avalanche diode;

[0036] The control module is connected to the current sampling circuit and is configured to control the power management chip to shut down the output or reduce the output voltage when the bias current is detected to exceed the safety limit.

[0037] Furthermore, the control module is a field-programmable gate array (FPGA);

[0038] The power supply circuit also includes a level shifting buffer, which is connected between the digital interface of the field-programmable gate array and the digital interface of the power management chip, and is used to perform level shifting and drive enhancement on the voltage control signal output by the field-programmable gate array.

[0039] A second aspect of the present invention provides an APD detector, comprising:

[0040] Avalanche photodiode;

[0041] The power supply circuit of the APD detector as described in any one of the first aspects of the present invention;

[0042] The high-voltage output terminal of the power supply circuit is connected to the cathode of the avalanche photodiode to provide a reverse bias voltage for the avalanche photodiode.

[0043] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0044] The power supply circuit of this invention dynamically calculates the required target bias voltage by monitoring the on-chip junction temperature and ambient temperature in real time. It then coordinates the range switching and fine-tuning of the power management chip to achieve closed-loop precise control of the APD bias voltage. The range switching network sets the basic output voltage range of the power management chip by changing the feedback resistor value, while the digital interface is used for fine-tuning within this range, thereby expanding the circuit's voltage regulation range and accuracy. Simultaneously, by integrating the on-chip junction temperature and ambient temperature into the control algorithm, it compensates for voltage shifts caused by junction temperature changes and anticipates ambient temperature change trends, achieving proactive and rapid compensation of the bias voltage for temperature variations, effectively stabilizing the APD's gain and performance. Furthermore, by configuring internal parameters and control logic through the control module, it enables low-cost adaptation to APD detectors of different specifications. Attached Figure Description

[0045] To more clearly illustrate the technical solutions of the exemplary embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly described below. It should be understood that the following drawings only show some embodiments of the present invention and should not be considered as a limitation of the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort. In the drawings:

[0046] Figure 1 This is a schematic diagram of the overall power supply circuit of an APD detector;

[0047] Figure 2 This is a schematic diagram of a multi-channel analog switch for a power supply circuit.

[0048] Figure 3This is a schematic diagram of a temperature control module for a power supply circuit;

[0049] Figure 4 This is an overall structural diagram of the power supply circuit for another type of APD detector;

[0050] Figure 5 This is a schematic diagram of a control method for the power supply circuit of an APD detector. Detailed Implementation

[0051] To make the objectives, technical solutions, and advantages of the present invention clearer, the present invention will be further described in detail below with reference to the embodiments and accompanying drawings. The illustrative embodiments and descriptions of the present invention are only used to explain the present invention and are not intended to limit the present invention.

[0052] It should be noted that the terms "comprising" and "having" and any variations thereof in the specification, claims, and accompanying drawings of this invention are intended to cover non-exclusive inclusion, for example, a process, method, system, product, or device that includes a series of steps or units is not necessarily limited to other steps or units inherent in the device.

[0053] The terminology used in the various embodiments of the invention is for the purpose of describing particular embodiments only and is not intended to limit the various embodiments of the invention. As used herein, the singular form is intended to include the plural form as well, unless the context clearly indicates otherwise. Unless otherwise defined, all terms used herein (including technical and scientific terms) have the same meaning as commonly understood by one of ordinary skill in the art to which the various embodiments of the invention pertain. The terms (such as those defined in commonly used dictionaries) are to be interpreted as having the same meaning as in the context of the relevant technical field and are not to be interpreted as having an idealized or overly formal meaning, unless clearly defined in the various embodiments of the invention.

[0054] The embodiments of the present invention provide a power supply circuit for a closed-loop APD detector that integrates dual-temperature precise monitoring and wide-range high-precision voltage regulation. It is suitable for scenarios with high requirements for APD detector gain stability, voltage regulation accuracy and operational reliability, such as optical communication, lidar, weak light detection, environmental monitoring, and biomedicine.

[0055] See Figure 1 The power supply circuit shown in the diagram comprises a temperature control module 101, a power management chip 102, a range switching network 103, and a control module 104. The connection relationships and functions of each module are as follows.

[0056] The temperature control module 101 is used to synchronously monitor the on-chip junction temperature and ambient temperature of the APD detector, and converts the monitored temperature signal into a digital signal and outputs it to the digital interface of the control module 104. Specifically, the temperature control module 101 can be implemented as two separate temperature sensors, one to collect the on-chip junction temperature of the APD detector and the other to collect the operating ambient temperature of the APD detector, and output two digital signals to the two digital interfaces of the control module 104 respectively. The acquisition range covers -40℃ to 125℃, and the measurement accuracy can reach ±0.1℃.

[0057] The power management chip 102 can be implemented as a high-voltage DC-DC converter with digital programmability. It has a digital interface (such as SPI, I2C), a feedback pin (FB), and a high-voltage output terminal (VOUT). Specifically, it can be implemented as a MAX1932 chip, ADI's LT3999, or TI's TPS6513x series. Its high-voltage output terminal (VOUT) is connected to the cathode of the APD to provide a reverse bias voltage to the avalanche diode of the APD detector. The digital interface is used to receive voltage control signals from the control module 104. The feedback pin (FB) is connected to a resistor-adjustable range switching network to realize closed-loop feedback of the output voltage based on the connected resistor network and the voltage control signal.

[0058] The range switching network 103 consists of a multi-channel analog switch U1 and a resistor network with different resistance values. Its core function is to change the basic output voltage range of the power management chip 102 by switching the feedback resistor values. Figure 2 As shown, the common terminal COM of U1 is connected to the feedback pin (FB) of the power management chip 102. The multiple channels (S1, S2, S3) of U1 are connected to feedback resistors (R1, R2, R3) with different resistance values ​​to ground, forming a resistor network. The channel selection terminals (A0, A1) of U1 receive the channel selection signal from the control module 104. The channel selection signal controls the channel switching of the multi-channel analog switch through a combination of high and low levels. The logic control circuit drives the internal MOS transistor to turn on or off, thereby realizing the access of different resistor branches.

[0059] By switching different resistor values, the basic output voltage range of the power management chip 102 can be changed, thus achieving the switching of the voltage regulation range. Below are examples of channel and resistor networks corresponding to four different ranges:

[0060] Channel 1 (A0=0, A1=0): Connect resistor R1, corresponding to a voltage range of 1.3V~25.7V;

[0061] Channel 2 (A0=1, A1=0): Connect resistor R2, corresponding to a voltage range of 24V~48.4V;

[0062] Channel 3 (A0=0, A1=1): Connect resistor R3, corresponding to voltage range 47.5V~72V;

[0063] Channel 4 (A0=1, A1=1): Connect resistor R4, corresponding to voltage range 70.7V~95.1V.

[0064] With the above configuration, the range switching network can achieve a wide voltage range coverage of 1.3V to 95V, providing an adaptation basis for APDs with different voltage requirements.

[0065] The control module 104 is the management core of this power supply circuit. It is preferably a Field-Programmable Gate Array (FPGA), such as the Xilinx Artix-7 series or Intel Cyclone IV series, or a high-performance microcontroller (MCU) such as the STM32H7 series. The advantages of FPGAs lie in their strong parallel processing capabilities and high real-time performance. Internally, they implement state machines, algorithm processors, communication controllers, and other logic using a Hardware Description Language (HDL). Taking an FPGA as an example, its I / O resource allocation is as follows:

[0066] Receiver: Receives ambient temperature data via I2C interface and on-chip junction temperature data via SPI interface;

[0067] Output: The output channel selection signal SEL is sent to the multi-channel analog switch U1, and the voltage control signal is output to the digital interface (CS, SCLK, DIN) of the power management chip 102 through the SPI interface.

[0068] If an MCU is used, it is necessary to ensure that it has sufficient ADC channels, high-speed SPI interface and PWM output function. Some complex algorithms may need to be optimized by software to improve computing efficiency, but the overall interface configuration logic is basically the same.

[0069] The core workflow of the control module 104 is as follows: it receives the temperature signal from the temperature control module 101 and calculates the target bias voltage through the built-in algorithm; it determines the appropriate range based on the target bias voltage and controls the range switching network 103 to switch channels using the output channel selection signal; it determines the voltage control signal based on the target bias voltage and sends the voltage control signal to the power management chip 102 through the digital interface, and finally adjusts the output voltage precisely to the target bias voltage.

[0070] The voltage control signal can be specifically implemented as a digital command of the SPI protocol. The principle of controlling the output voltage of the power management chip 102 is as follows: the power management chip has an 8~12 bit-to-analog converter (DAC) built in. The digital command sent by the control module can configure the output voltage of the DAC, thereby changing the internal reference voltage or voltage division ratio to achieve fine adjustment of the output voltage.

[0071] In a further implementation, such as Figure 3 As shown, the temperature control module 101 includes a first temperature acquisition submodule 1011 and a second temperature acquisition submodule 1012. The first temperature acquisition submodule 1011 obtains the on-chip junction temperature by reading the electrical parameters of the temperature-sensitive element integrated inside the APD chip, performing analog-to-digital conversion and table lookup calculation; the second temperature acquisition submodule 1012 obtains the ambient temperature through a digital temperature sensor.

[0072] The first temperature acquisition submodule reads the electrical parameters of the temperature-sensitive element (usually a temperature-sensing diode) integrated inside the APD chip, and obtains the on-chip junction temperature through digital-to-analog conversion and table lookup calculation. The specific circuit may include a precision constant current source, a high-precision ADC, and logic units (or be implemented by an FPGA). The workflow is as follows: the precision constant current source provides a constant small current to the temperature-sensing diode inside the APD; the forward voltage drop of the temperature-sensing diode changes with temperature; the ADC acquires this voltage drop signal and converts it into a digital quantity; the FPGA converts the digital quantity into a temperature value through table lookup.

[0073] The voltage drop-temperature mapping table of the temperature sensing diode is stored in the non-volatile memory of the FPGA. In practical applications, the mapping table can be consulted based on the collected voltage drop value to quickly convert it into the corresponding on-chip junction temperature.

[0074] The digital temperature sensor can be placed on the PCB near the APD to collect ambient temperature data in real time. The sensor stores the temperature data in an internal register, and the FPGA reads the temperature value from the register via the I2C bus.

[0075] The control module 104 has a built-in control function for calculating the target bias voltage. The control function takes the on-chip junction temperature and ambient temperature as inputs and the target bias voltage as output. It includes at least one feedback term based on the on-chip junction temperature and one feedforward compensation term based on the rate of change of ambient temperature. This allows the output voltage to be compensated in advance when the ambient temperature changes, avoiding compensation lag caused by temperature changes.

[0076] In one specific implementation, the control function is set as follows:

[0077]

[0078] In the formula, This is the reference bias voltage of the APD at the reference temperature; Based on on-chip junction temperature The core feedback quantity is expressed as a linear fit: , This is a reference temperature; It is the rate of change of ambient temperature, which is calculated by dividing the difference between two consecutive ambient temperature measurements by the sampling interval. This is the proportional feedback coefficient, used to compensate for the breakdown voltage shift caused by junction temperature changes. Its value ranges from 0.3 to 0.8 V / ℃ and is calibrated according to the temperature characteristics of the APD. This is the feedforward compensation coefficient, used to predict the impact of ambient temperature changes on the junction temperature in advance, avoiding compensation lag. Its value ranges from 0.2 to 0.5 V / ( ).

[0079] Specifically, the breakdown voltage variation curves of the APD at different temperatures can be established through experimental calibration, and the specific values ​​can be determined by looking up tables or calculating functions when applying them.

[0080] In a further embodiment, the control module 104 is configured to execute the following switching control strategy:

[0081] The target voltage range is determined from multiple preset voltage ranges based on the target bias voltage.

[0082] The corresponding channel selection signal is generated based on the target voltage range and sent to the channel selection terminal of the multi-channel analog switch U1 to control the channel selection terminal to select the resistor network corresponding to the target voltage range.

[0083] The control module 104 has a built-in voltage range-channel mapping table. Based on the calculated target bias voltage, it looks up the target voltage range in the mapping table, generates a channel selection signal SEL corresponding to the target voltage range, and sends it to the channel selection terminal of U1. U1 switches to the corresponding resistor network channel according to the SEL signal to complete the coarse adjustment of the output voltage.

[0084] After calculating the target bias voltage, the SEL value can be determined by comparing it with the voltage range-channel mapping table. The multi-channel analog switch U1 typically completes channel switching within tens of nanoseconds after receiving the SEL signal.

[0085] In a further embodiment, the control module 104 is configured to execute the following voltage control strategy:

[0086] Real-time monitoring of the on-chip junction temperature and ambient temperature of the APD detector;

[0087] Execute the control function with the current on-chip junction temperature and current ambient temperature as input and the target bias voltage as output to obtain the target bias voltage. ;

[0088] Based on the target bias voltage The voltage compensation amount is obtained by matching the target voltage range with the voltage compensation amount, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip 102.

[0089] Specifically, within the selected measurement range, the target bias voltage is calculated. Reference voltage at the center of the range deviation value The deviation value The commands are converted into digital commands that the power management chip 102 can recognize, such as DAC code values ​​or PWM parameters, and sent to the power management chip via the SPI interface. The power management chip 102 adjusts its internal reference or voltage divider ratio according to the commands, so that the high voltage output terminal accurately outputs the target voltage value, thus completing the fine adjustment of the output voltage.

[0090] Among them, the center reference voltage This refers to the intermediate reference voltage within each preset voltage range, calculated as the arithmetic mean of the upper and lower limits. This value is the default voltage directly output by the power management chip within that range, based on its internal reference voltage. The target bias voltage is then calculated. and The deviation value limits the fine adjustment range of the power management chip to within 1 / 2 of its range. When the target bias voltage... and When the values ​​are equal, no compensation signal is needed; the power management chip outputs a reference voltage. When the deviation value... When the value is positive, the control module sends a positive compensation DAC command, and the output voltage of the power management chip increases. When the deviation value When the value is negative, the control module sends a negative compensation DAC command, and the power management chip output voltage decreases. |

[0091] The voltage regulation process uses a range switching network to determine the basic voltage range, and digital control signals to achieve fine-tuning, ensuring a balance between wide-range regulation and high-precision output. The deviation-compensated regulation method avoids nonlinear errors during cross-range regulation, and because the control function fully considers temperature change trends and the power management chip has a fast response speed, step adjustment is unnecessary. Secondary fine-tuning is triggered only during sudden temperature changes, balancing response speed and output accuracy.

[0092] Among them, the specific parameters of the control function ( , , It can be configured via host computer software and stored in the FPGA's non-volatile memory. The deviation value is obtained by continuously sampling the ambient temperature and calculating the difference. The control module can be designed with a dedicated arithmetic unit to efficiently perform floating-point or fixed-point calculations. It is quantized into the number of bits in the power management chip DAC.

[0093] In a further embodiment, the control module 104 synchronizes the range switching control and output voltage control, and the control logic is as follows:

[0094] S101, System Initialization: Load voltage range-channel mapping table, control function parameters and temperature threshold;

[0095] S102, Temperature Acquisition: Reads the on-chip junction temperature and ambient temperature, and calculates the rate of change of ambient temperature;

[0096] S103, Target Voltage Calculation: Obtained through the control function. ;

[0097] S104, Range Judgment and Switching: Based on Determine the target range and output the SEL signal to control the multi-channel analog switch to switch channels;

[0098] S105, Voltage Fine-tuning: Calculates the deviation value, converts it into a DAC code value, and sends it to the power management chip 102;

[0099] S106, Feedback Verification: The output voltage stability is indirectly monitored through the current sampling circuit. If the deviation exceeds ±0.1V, a secondary fine-tuning is triggered.

[0100] S106, Execute cyclically: Repeat steps S102~S106 to achieve dynamic compensation.

[0101] In a further implementation, see Figure 3 The temperature control module 101 also includes a cooling drive circuit 1013. The controlled end of the cooling drive circuit 1013 is connected to the control module 104, and its driving end is connected to the thermoelectric cooler TEC. The thermoelectric cooler can be attached to the surface of the APD detector package.

[0102] The resources of the control module 104 are also allocated to output a temperature control signal (PWM or analog signal) to the cooling drive circuit 1013 to activate the TEC for active cooling.

[0103] Specifically, the cooling drive circuit 1013 can be implemented as an integrated H-bridge driver or an H-bridge circuit built with discrete MOSFETs. The PWM temperature control signal generated by the control module 104 controls the magnitude and direction of its output current, thereby precisely controlling the cooling power and cooling / heating mode of the TEC.

[0104] In a further embodiment, the control module 104 is configured to execute the following temperature control strategy: when the on-chip junction temperature exceeds a first threshold, or when the ambient temperature exceeds a second threshold, output a temperature control signal to the cooling drive circuit to activate the semiconductor cooling chip for active cooling.

[0105] The first and second thresholds can be set according to the APD model and application environment. The control module 104 has a built-in temperature threshold (first threshold). Second threshold When the junction temperature inside the chip is monitored or ambient temperature At this time, a PWM temperature control signal is output to the cooling drive circuit to start the TEC for active cooling.

[0106] The control strategy can employ hysteresis control, for example, by setting... , ,when and Stop cooling when necessary to prevent frequent start-stop cycles.

[0107] During operation, the control module 104 periodically executes the following process:

[0108] S201, Read the on-chip junction temperature and ambient temperature ;

[0109] S202, judgment or If the threshold is exceeded, the corresponding cooling power is calculated and output to the cooling drive circuit 1013 to start or adjust the TEC operation.

[0110] S203, if cooling is started, read or estimate the current cooling power. .

[0111] Among them, cooling power The output current of the cooling drive circuit 1013 can be monitored. and the voltage across the TEC terminals The calculation is as follows. If the driver chip supports power feedback, the feedback data can be read directly; otherwise, it can be estimated through the PWM duty cycle.

[0112] Specifically, the cooling power is dynamically adjusted based on the difference between the actual monitored temperature and the temperature threshold. The greater the temperature difference, the higher the cooling power.

[0113] In a further embodiment, the control module 104 is also configured to: when the thermoelectric cooler is activated for active cooling, execute the following voltage control strategy to avoid voltage mismatch caused by dynamic changes in junction temperature during the cooling process:

[0114] S301, Read the on-chip junction temperature and ambient temperature Real-time monitoring of the cooling power of the thermoelectric cooler ;

[0115] S302, based on the current on-chip junction temperature Current ambient temperature and current cooling capacity The expected on-chip junction temperature of APD detection is predicted based on a first-order inertial prediction model. ;

[0116] S303, based on the expected on-chip junction temperature and current ambient temperature The expected bias voltage is calculated using the control function. ;

[0117] S304, based on the expected bias voltage The voltage compensation amount is obtained by matching the target voltage range with the voltage compensation amount, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip 102.

[0118] Specifically, the first-order inertial prediction model can be represented as follows:

[0119]

[0120] In the formula, The thermal time constant, The thermal resistance between APD and TEC. As a prediction time window, this model can predict a preset time in the future ( The expected on-chip junction temperature is set, and the cooling power and junction temperature data are updated every 5ms to dynamically adjust the expected bias voltage.

[0121] By predicting the junction temperature change trend during the cooling process in advance, the bias voltage adjustment is synchronized with the junction temperature change, avoiding the overvoltage risk caused by the decrease in breakdown voltage due to the decrease in junction temperature, and ensuring that the APD gain is always stable within the target range.

[0122] The prediction model can be simplified, for example, by using a first-order inertial element or by looking up empirical decay curves to predict temperature trends. The FPGA adjusts the bias voltage in advance based on the temperature trend, achieving synchronous compensation with the cooling process.

[0123] In a further implementation, see Figure 4 As shown, the power supply circuit is also equipped with a current sampling circuit 106, which is used to collect the bias current flowing through the avalanche diode.

[0124] The control module 104 is connected to the output of the current sampling circuit, and its resources are also allocated to: when the bias current is detected to exceed the safety limit, control the power management chip 102 to shut down the output or reduce the output voltage.

[0125] The current sampling circuit 106 typically includes a precision sampling resistor connected in series between the high-voltage output terminal of the power management chip 102 and the cathode of the APD, and a differential amplifier or current sensing amplifier. This amplifier converts and amplifies the voltage drop generated by the bias current flowing through the sampling resistor and inputs it to the ADC pin of the control module 104. The control module 104 acquires this voltage signal through its built-in ADC and calculates the actual bias current. .

[0126] The sampling resistor is a low-temperature drift, high-precision alloy resistor. Noise suppression is achieved through subsequent amplification and filtering circuit design to improve the accuracy of small current detection.

[0127] The overcurrent threshold can be set to a multiple of the normal dark current of the APD, for example, 2 to 5 times. This can be configured in the control module 104 via host computer software. During operation, the control module 104 periodically executes the following protection strategies:

[0128] S401, Read APD bias current ;

[0129] S402, if If the safety threshold is exceeded, a shutdown signal is immediately sent via SPI command to control the power management chip 102 to shut down the output or significantly reduce the output voltage to a safe level.

[0130] Simultaneously, it can output alarm signals for early warning. After the fault is cleared, a reset command is sent via the host computer to restore normal power supply. This strategy achieves rapid overcurrent response through real-time monitoring, preventing APD damage due to overcurrent breakdown. When an overcurrent occurs during APD operation, it is reasonable to directly shut off the bias voltage, because the APD is already in an abnormal operating state under overcurrent conditions. Continuing to supply power will cause permanent damage to the chip. Shutting off the output can protect the device, and operation can be resumed after the fault is cleared.

[0131] In a further implementation, such as Figure 4 As shown, the power supply circuit also includes a level conversion buffer 107, which is connected between the digital interface of the control module 104 and the digital interface of the power management chip 102, and is used to perform level conversion and drive enhancement on the voltage control signal.

[0132] Level shifting buffers are crucial for ensuring reliable communication between devices in different voltage domains. Even if the control module uses other types of processors (such as MCUs), such buffers are still needed if their I / O levels do not match those of the power management chip. Buffers also isolate noise and improve the system's immunity to interference.

[0133] Based on the above hardware modules, embodiments of the present invention also provide a control method for a power supply circuit, such as... Figure 5As shown, it includes the following steps:

[0134] S501, Initialization: Load voltage range - channel mapping table, control function parameters, temperature threshold and overcurrent threshold;

[0135] S502, Temperature Acquisition: The junction temperature inside the APD is obtained through the first temperature acquisition submodule, and the ambient temperature is obtained through the second temperature acquisition submodule. The rate of change of ambient temperature is calculated.

[0136] S503, Active Temperature Control Detection: If the current on-chip junction temperature exceeds the first threshold, or the current ambient temperature exceeds the second threshold, the TEC is activated and the cooling power is monitored; otherwise, the output voltage is adjusted in the normal adjustment mode.

[0137] S504, Calculate the control target:

[0138] (1) In the normal adjustment mode, the target bias voltage is calculated by the control function;

[0139] (2) In cooling mode, the expected on-chip junction temperature is predicted by the first-order inertial model, and the expected on-chip junction temperature and ambient temperature are input into the control function to calculate the target bias voltage;

[0140] S505, Range switching control: Determines the range based on the target voltage, and outputs a channel selection signal to control a multi-channel analog switch switching resistor network;

[0141] S506, fine voltage adjustment: calculates the deviation between the target voltage and the reference voltage at the center of the range, converts it into a DAC code value and sends it to the power management chip to adjust the output voltage to the target value;

[0142] S507, Overcurrent monitoring and protection: Real-time acquisition of bias current. If it exceeds the overcurrent threshold, otherwise, repeat steps S502~S507 to achieve dynamic temperature compensation and safety protection; if yes, execute S508.

[0143] S508 controls the power management chip to shut down its output (or reduce the voltage).

[0144] Embodiments of the present invention also provide an APD detector, including an avalanche photodiode and a power supply circuit as described in any of the above embodiments; the high-voltage output terminal of the power supply circuit is connected to the cathode of the avalanche photodiode to provide it with a reverse bias voltage, thereby ensuring the gain stability of the APD under different temperatures and operating conditions.

[0145] This detector integrates the aforementioned power supply circuitry with the avalanche photodiode chip (typically mounted in a package with a TEC) onto the same module or PCB, forming a complete, performance-optimized detection unit. The power supply circuitry is compact, facilitating integration into various photoelectric detection systems. During operation, the power supply circuitry dynamically adjusts the bias voltage based on the temperature of the avalanche photodiode, ensuring stable avalanche gain under different ambient temperatures, significantly improving the signal-to-noise ratio and accuracy of the detection signal.

[0146] Embodiments of the present invention also provide an electronic device, which includes a processor and a memory, wherein the number of processors may be one or more. The memory, as a computer-readable storage medium, can be used to store software programs, computer-executable programs, and modules. The processor executes various functional applications and data processing of the electronic device by running the software programs, instructions, and modules stored in the memory, thereby implementing the power supply circuit control method of any of the above embodiments of the present invention.

[0147] The memory may primarily comprise a program storage area and a data storage area. The program storage area may store the operating system and at least one application program required for a given function; the data storage area may store data created based on terminal usage. Furthermore, the memory may include high-speed random access memory (RAM) and non-volatile memory, such as at least one disk storage device, flash memory, or other non-volatile solid-state storage device. In some instances, the memory may further include memory remotely located relative to the processor, which can be connected to the electronic device via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks (LANs), mobile communication networks, and combinations thereof.

[0148] Embodiments of the present invention also provide a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the control method of the power supply circuit of any embodiment of the present invention.

[0149] The computer storage medium of this invention can be any combination of one or more computer-readable media. A computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. A computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of computer-readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable computer disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage device, magnetic storage device, or any suitable combination thereof. In this invention, a computer-readable storage medium can be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, apparatus, or device.

[0150] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. Computer-readable signal media may also be any computer-readable medium other than computer-readable storage media, capable of sending, propagating, or transmitting programs for use by or in connection with an instruction execution system, apparatus, or device.

[0151] Embodiments of the present invention also provide a computer program product that, when run on a computer, causes the computer to execute the control method of the power supply circuit of any of the above embodiments of the present invention.

[0152] The above embodiments are merely preferred embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the appended claims.

Claims

1. A power supply circuit for an APD detector, characterized in that, include: The temperature control module is used to monitor the on-chip junction temperature and ambient temperature of the APD detector and output the corresponding temperature signal. The power management chip has a digital interface, a feedback pin, and a high-voltage output terminal. The high-voltage output terminal is used to provide a bias voltage to the avalanche diode of the APD detector. The range switching network includes a multi-channel analog switch and a resistor network with different resistance values ​​connected to each channel; the common terminal of the multi-channel analog switch is connected to the feedback pin of the power management chip, and the channel selection terminal is used to select the channel to be connected to, so as to switch the access resistance value. The control module is used to receive the temperature signal, calculate the target bias voltage based on the temperature signal, control the channel selection terminal to select a channel, and send a voltage control signal to the power management chip through the digital interface to adjust the output voltage of its high voltage output terminal to the target bias voltage.

2. The power supply circuit for the APD detector according to claim 1, characterized in that, The control module is configured to execute the following switching control strategy: Based on the target bias voltage, a target voltage range is determined from a plurality of preset voltage ranges; A corresponding channel selection signal is generated based on the target voltage range and sent to the channel selection terminal of the multi-channel analog switch to control the channel selection terminal to select the resistor network corresponding to the target voltage range.

3. The power supply circuit for the APD detector according to claim 2, characterized in that, The control module is configured to execute the following voltage control strategy: Real-time monitoring of the on-chip junction temperature and ambient temperature of the APD detector; The target bias voltage is obtained by executing a control function that takes the current on-chip junction temperature and current ambient temperature as input and the target bias voltage as output. The voltage compensation amount is obtained based on the correspondence between the target bias voltage and the target voltage range, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip; The control function includes at least one feedback term based on the on-chip junction temperature and one feedforward compensation term based on the rate of change of ambient temperature, so that the output voltage can be compensated in advance when the ambient temperature changes.

4. The power supply circuit for the APD detector according to claim 3, characterized in that, The temperature control module includes: The first temperature acquisition submodule is used to obtain the on-chip junction temperature by reading the electrical parameters of the temperature-sensitive element integrated inside the APD chip, and then performing analog-to-digital conversion and table lookup calculation. The second temperature acquisition submodule is used to obtain the ambient temperature through a digital temperature sensor.

5. The power supply circuit for the APD detector according to claim 3, characterized in that, The temperature control module further includes a cooling drive circuit, the controlled end of which is connected to the control module, and the driving end of which is connected to a semiconductor cooling chip; the semiconductor cooling chip is attached to the APD detector. The control module is also used to output a temperature control signal to the cooling drive circuit to activate the semiconductor cooling chip for active cooling.

6. The power supply circuit for the APD detector according to claim 5, characterized in that, The control module is configured to execute the following temperature control strategy: When the junction temperature on the chip exceeds the first threshold, or when the ambient temperature exceeds the second threshold, a temperature control signal is output to the cooling drive circuit to activate the semiconductor cooling chip for active cooling.

7. The power supply circuit for the APD detector according to claim 6, characterized in that, The control module is also configured to execute the following voltage control strategy when the thermoelectric cooler is activated for active cooling: Real-time monitoring of the cooling power of the cooling chip; Based on the current on-chip junction temperature, the current ambient temperature, and the current cooling power, predict the expected on-chip junction temperature detected by the APD; Based on the expected on-chip junction temperature and the current ambient temperature, the expected bias voltage is calculated using the control function. The voltage compensation amount is obtained based on the correspondence between the target bias voltage and the target voltage range, a voltage control signal corresponding to the voltage compensation amount is generated, and sent to the power management chip.

8. The power supply circuit for the APD detector according to claim 1, characterized in that, The power supply circuit also includes a current sampling circuit, which is used to collect the bias current flowing through the avalanche diode. The control module is connected to the current sampling circuit and is configured to control the power management chip to shut down the output or reduce the output voltage when the bias current is detected to exceed the safety limit.

9. The power supply circuit for the APD detector according to any one of claims 1-8, characterized in that, The control module is a field-programmable gate array; The power supply circuit also includes a level shifting buffer, which is connected between the digital interface of the field-programmable gate array and the digital interface of the power management chip, and is used to perform level shifting and drive enhancement on the voltage control signal output by the field-programmable gate array.

10. An APD detector, characterized in that, include: Avalanche photodiode; The power supply circuit for the APD detector as described in any one of claims 1-9; The high-voltage output terminal of the power supply circuit is connected to the cathode of the avalanche photodiode to provide a reverse bias voltage for the avalanche photodiode.

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