A method of updating a branch prediction table, a terminal device and a computer program product
By obtaining the actual execution results and timing information of branch instructions, target entries are created in the buffer structure, and the branch prediction table is updated based on the timing information. This solves the problem of prediction table pollution in out-of-order execution and improves the accuracy of branch prediction.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- GUANGDONG LEAPFIVE TECH CO LTD
- Filing Date
- 2025-12-26
- Publication Date
- 2026-05-26
AI Technical Summary
In out-of-order execution environments, traditional branch prediction table update methods lead to prediction table pollution, reducing the accuracy of branch predictions and failing to accurately reflect the program's true behavior.
By obtaining the actual execution results and timing information of the target branch instruction, a target entry is created in the buffer structure, and the branch prediction table is updated based on the timing information. The actual execution results are used to replace the historical records, thus avoiding the pollution of the prediction table by the misprediction of young branch instructions.
It improves the accuracy of the branch prediction table in out-of-order execution environments, ensures the accuracy of prediction table updates, and avoids pollution problems caused by out-of-order execution.
Smart Images
Figure CN121387918B_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of general-purpose processor technology, and in particular to a method for updating a branch prediction table, a terminal device, and a computer program product. Background Technology
[0002] With the development of high-performance general-purpose processor design technology, speculative execution techniques, represented by branch prediction and out-of-order execution, have become core means to improve instruction-level parallelism. The Branch Predictor Unit (BPU) analyzes program history behavior to dynamically predict the prediction direction and target address of branch instructions, enabling the instruction fetch unit to obtain instructions in advance, thereby achieving efficient instruction jumps and program execution. Currently, processor branch predictors typically consist of multiple prediction tables, and their prediction accuracy directly determines the overall performance of the processor.
[0003] In traditional technologies, to quickly respond to program execution, branch prediction tables typically employ a strategy of updating immediately after execution. That is, once a branch instruction completes execution in the out-of-order execution backend and its actual result is calculated, the branch predictor immediately updates the corresponding prediction table entry with that result. This approach updates the correct branch behavior to the branch instruction predictor with minimal latency, allowing it to quickly adapt to dynamic program changes. However, in processors with deep out-of-order execution, the execution order of branch instructions is not consistent with their original order in the program (program order). A younger branch instruction (appearing later in the program) may complete execution earlier than an older branch instruction (appearing earlier in the program). Using traditional techniques, the prediction result of the younger branch instruction is written to the prediction table first. However, if an older branch instruction is subsequently mispredicted, the processor pipeline needs to clear (flush) all speculative states from the older branch onwards (including all younger branches) and roll back to the correct execution path. During this process, the updates made to the prediction table by younger branches executed on incorrect paths essentially become invalid contamination of the prediction table. This contamination information not only fails to accurately reflect the program's actual behavior, but may also cover up historical information that was originally valid in the prediction table, leading to a decrease in the accuracy of branch predictions.
[0004] Therefore, how to improve the accuracy of the prediction table when updating it in an out-of-order execution environment is a technical problem that needs to be solved by those skilled in the art. Summary of the Invention
[0005] The purpose of this application is to provide a method, apparatus, terminal device, computer-readable storage medium, and computer program product for updating a branch prediction table, which aims to improve the accuracy of the prediction table when updating the prediction table in an out-of-order execution environment.
[0006] Firstly, this application provides a method for updating a branch prediction table. The method includes:
[0007] Obtain the actual execution result of the target branch instruction, and obtain the timing information of the target branch instruction in the program sequence;
[0008] Create a target entry in the buffer structure, and record the actual execution result, the identification information of the target branch instruction, and the timing information in the target entry;
[0009] Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution results.
[0010] In one embodiment, updating the branch prediction table based on the timing information of each entry in the buffer structure and using the actual execution result includes:
[0011] Check whether each entry in the buffer structure meets the update condition; the update condition is determined based on the timing information.
[0012] If any of the entries satisfies the update condition, the branch prediction table is updated using the actual execution result corresponding to the entry.
[0013] In one embodiment, determining that the entry satisfies the update condition includes:
[0014] If the entry is determined to be the oldest entry based on the procedural order of the entries, then the entry is deemed to meet the update condition.
[0015] In one embodiment, creating a target entry in the buffer structure and recording the actual execution result, the identifier information of the target branch instruction, and the timing information in the target entry includes:
[0016] If a branch misprediction is determined to have occurred, a target entry is created in the buffer structure, and the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry, and the confidence status of the target entry is set to high confidence.
[0017] Determining that the entry satisfies the update condition includes:
[0018] If the credibility status of the entry is high, and all entries older than the entry have a high credibility status, then the entry is determined to meet the update condition.
[0019] In one embodiment, updating the branch prediction table based on the timing information of each entry in the buffer structure and using the actual execution results includes:
[0020] A target entry is created in the buffer structure, and the status information of the target branch instruction, the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry.
[0021] Update the branch prediction table using the actual execution results;
[0022] If a branch misprediction is determined to have occurred, a rollback entry is determined from the buffer structure based on the timing information of the target branch instruction corresponding to the branch misprediction, wherein the timing information is greater than or equal to the timing information of the target branch instruction.
[0023] The branch prediction table is restored based on the state information before the update corresponding to each rollback entry.
[0024] In one embodiment, the step of querying the branch prediction table based on the current PC address to obtain the prediction result includes:
[0025] The prediction results are obtained by querying the branch prediction table and the buffer structure based on the current PC address.
[0026] In one embodiment, the process of determining when a branch misprediction has occurred includes:
[0027] The prediction result is obtained by querying the branch prediction table based on the current PC address;
[0028] The target branch instruction is determined from the branch instructions with operands ready, and issued and executed based on the target branch instruction to obtain the actual execution result;
[0029] If the predicted result is inconsistent with the actual execution result, then a branch misprediction is determined to have occurred.
[0030] In one embodiment, after determining that the prediction result is inconsistent with the actual execution result, the method further includes:
[0031] A global flush request is generated based on the timing information of the target branch instruction; the global flush request is used to clear all entries whose program sequence is younger than the target branch instruction.
[0032] Secondly, this application also provides an apparatus for updating a branch prediction table. The apparatus includes:
[0033] The acquisition module is used to acquire the actual execution result of the target branch instruction and acquire the timing information of the target branch instruction in the program sequence;
[0034] The recording module is used to create a target entry in the buffer structure and record the actual execution result, the identification information of the target branch instruction, and the timing information in the target entry;
[0035] An update module is used to update the branch prediction table based on the timing information of each entry in the buffer structure and the actual execution results.
[0036] Thirdly, this application also provides a terminal device. The terminal device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the steps of the method described above.
[0037] Fourthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the method described above.
[0038] Fifthly, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the steps of the method described above.
[0039] This application provides a method for updating a branch prediction table. The method obtains the actual execution result of a target branch instruction and its timing information within the program sequence. A target entry is created in a buffer structure, and the actual execution result, the target branch instruction's identifier, and the timing information are recorded in the target entry. Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution result. As can be seen, this method caches branch instructions according to their program sequence to manage each entry, including the actual execution result, the target branch instruction's identifier, and the timing information. That is, it uses the program sequence to manage the entries in the buffer structure, and updates the branch prediction table based on the timing information of each entry in the buffer structure using the actual execution result. This avoids the possibility of pollution caused by out-of-order updates to the branch prediction table. Therefore, this method can improve the accuracy of the prediction table when updating it in an out-of-order execution environment.
[0040] It is understood that the branch prediction table updating apparatus, terminal device, computer-readable storage medium and computer program product provided in the embodiments of this application have the same beneficial effects as the branch prediction table updating method described above, and will not be repeated here. Attached Figure Description
[0041] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.
[0042] Figure 1 A flowchart illustrating a method for updating a branch prediction table as provided in an embodiment of this application;
[0043] Figure 2 A schematic diagram of a branch prediction table update device provided in an embodiment of this application;
[0044] Figure 3 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. Detailed Implementation
[0045] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of this application. However, those skilled in the art will understand that this application may also be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, devices, circuits, and methods are omitted so as not to obscure the description of this application with unnecessary detail.
[0046] It should be understood that, when used in this application specification and the appended claims, the term "comprising" indicates the presence of the described features, integrals, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components and / or a collection thereof.
[0047] It should also be understood that the term “and / or” as used in this application specification and the appended claims means any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.
[0048] As used in this application specification and the appended claims, the term "if" may be interpreted, depending on the context, as "when," "once," "in response to determination," or "in response to detection." Similarly, the phrase "if determined" or "if detected [the described condition or event]" may be interpreted, depending on the context, as "once determined," "in response to determination," "once detected [the described condition or event]," or "in response to detection [the described condition or event]."
[0049] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.
[0050] References to "one embodiment" or "some embodiments" in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized. "A plurality" means "two or more."
[0051] The branch prediction table update method provided in this application embodiment can be executed by the processor of a terminal device when running a corresponding computer program.
[0052] Figure 1 The flowchart illustrates a method for updating a branch prediction table according to an embodiment of this application. For ease of explanation, only the parts relevant to this embodiment are shown. The method provided in this embodiment includes the following steps:
[0053] S100: Obtain the actual execution result of the target branch instruction and obtain the timing information of the target branch instruction in the program sequence.
[0054] The target branch instruction refers to the branch instruction with the least timing information (oldest) in the program sequence.
[0055] The actual execution result refers to the result actually calculated by the target branch instruction in the branch execution unit; the actual execution result includes the actual direction and the actual target address; the actual direction refers to the actual flow of the target branch instruction, i.e., Taken (jump) or NotTaken (no jump); the actual target address refers to the specific instruction address to which the actual direction jumps.
[0056] Timing information refers to the identifier that uniquely defines the logical order of branch instructions in the program; generally, the smaller the timing information, the older the branch instruction. In a specific example, each branch instruction is assigned a ROB ID according to the ROB allocation pointer provided by the ROB, that is, the timing information can be the ROB ID. The smaller the ROB ID, the older the program order (age).
[0057] S200: Create a target entry in the buffer structure and record the actual execution result, the identification information of the target branch instruction, and the timing information in the target entry.
[0058] Here, the buffer structure refers to the buffer used to temporarily store entries. The buffer structure can be an FBC, but this embodiment does not limit it.
[0059] The target entry refers to the data record set for the prediction table update request of the target branch instruction. The actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry. The identification information of the target branch instruction refers to the information used to uniquely identify which branch instruction it is, and can be the program counter address (PC address) of the target branch instruction.
[0060] Specifically, a target entry is created for the target branch instruction in the buffer structure, and the actual execution result, the identification information of the target branch instruction, and the timing information are filled into the corresponding fields of the created target entry.
[0061] S300: Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution results.
[0062] Specifically, the timing information of each entry in the buffer structure is checked through the buffer structure to determine whether each entry meets the update conditions. If any entry meets the update conditions, the branch prediction table is updated using the actual execution results; or the branch prediction table is updated immediately using the actual execution results, and when a misprediction is determined, the branch prediction table is rolled back using the timing information.
[0063] The branch prediction table refers to a series of lookup tables within the branch predictor unit (BPU), such as BHT, PHT, and BTB. These tables store the historical behavior patterns of each branch instruction; for example, a branch at address A will jump to address B 80% of the time. When prediction is needed, the BPU uses the current PC address to look up the branch prediction table and obtains the prediction result. The prediction result includes the prediction direction and the target address.
[0064] Specifically, updating the branch prediction table using the actual execution results means replacing the historical records in the branch prediction table with the actual execution results; this includes replacing the predicted direction with the actual direction and / or replacing the predicted target address with the actual target address.
[0065] This application provides a method for updating a branch prediction table. The method obtains the actual execution result of a target branch instruction and its timing information within the program sequence. A target entry is created in a buffer structure, and the actual execution result, the target branch instruction's identifier, and the timing information are recorded in the target entry. Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution result. This method caches branch instructions according to their program sequence to manage each entry, including the actual execution result, the target branch instruction's identifier, and the timing information. In other words, it uses the program sequence to manage the entries in the buffer structure, and updates the branch prediction table based on the timing information of each entry in the buffer structure using the actual execution result. This avoids the possibility of pollution caused by out-of-order updates to the branch prediction table. Therefore, this method can improve the accuracy of the prediction table when updating it in an out-of-order execution environment.
[0066] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, the branch prediction table is updated based on the timing information of each entry in the buffer structure and using the actual execution results, including:
[0067] Check whether each entry in the buffer structure meets the update conditions; the update conditions are determined based on timing information.
[0068] If any entry meets the update condition, the branch prediction table is updated using the actual execution result corresponding to the entry.
[0069] In this embodiment, the FBC checks each entry in the buffer structure according to a preset period and determines whether each entry meets the update conditions. The update conditions are determined based on timing information.
[0070] If the entry does not meet the update conditions, no other action is required, and the entry continues to wait in the buffer structure; if the entry meets the update conditions, the branch prediction table is updated using the actual execution results recorded in the entry.
[0071] According to the method of this embodiment, the accuracy of the branch prediction table can be improved by determining whether each entry in the buffer structure meets the update conditions based on the time sequence information and updating the branch prediction table.
[0072] In one specific embodiment, determining that an entry meets the update conditions includes:
[0073] If an entry is determined to be the oldest entry based on the order of the entries, then the entry is deemed to meet the update conditions.
[0074] In this embodiment, each entry records the timing information of the program sequence of the corresponding branch instruction, such as ROB ID, actual execution result, and branch instruction identification information. In each preset cycle, the FBC checks each entry and, based on the timing information corresponding to the entry, determines whether the entry has the smallest timing information (i.e., the oldest entry). If so, it indicates that the entry meets the update conditions, and therefore the branch prediction table is updated using the actual execution result in that entry. After the update is completed, the entry is marked as invalid so that other subsequent entries can be identified as the oldest entries.
[0075] Suppose there are three entries in the current FBC, ordered from oldest to youngest: entry A (ROB ID=5), entry B (ROB ID=8), and entry C (ROB ID=12). When the FBC checks according to a preset cycle, entry A has the smallest ROB ID, meaning entry A meets the update condition. Therefore, the actual execution result of entry A is used to update the branch prediction table, and then entry A is marked as invalid. In the next cycle, entry B has the smallest ROB ID, and the actual execution result of entry B is used to update the branch prediction table, and so on.
[0076] According to the method of this embodiment, the branch prediction table is updated in the order of the program to avoid the branch prediction table being polluted by the execution of prediction table update operations by young branch instructions of the wrong path, thus ensuring the accuracy of the branch prediction table.
[0077] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, a target entry is created in the buffer structure, and the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry, including:
[0078] If a branch misprediction is confirmed, a target entry is created in the buffer structure, and the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry. The confidence status of the target entry is set to high confidence.
[0079] The criteria for determining whether an entry meets the update conditions include:
[0080] If an entry has a high credibility status, and all entries older than this entry also have a high credibility status, then the entry is considered to meet the update conditions.
[0081] Specifically, when a branch misprediction is determined to have occurred, a prediction table update request is generated using the actual execution result corresponding to the target branch instruction. The prediction table update request specifically includes the actual execution result, the identification information of the target branch instruction, and timing information. The prediction table update request is then sent to the BPU. After receiving the prediction table update request, the BPU creates a target entry in the buffer structure and records the prediction table update request, which includes the actual execution result, the identification information of the target branch instruction, and the timing information, in the target entry.
[0082] It should be noted that in this embodiment, entries determined based on actual execution results are classified as high confidence; speculative entries are classified as low confidence. Furthermore, after determining that the path corresponding to a speculative entry is the correct path, the confidence status of that entry can be changed from low confidence to high confidence.
[0083] In this embodiment, since the target entry is determined based on the actual execution results (not speculation), the confidence status of the target entry is set to high confidence.
[0084] Correspondingly, when checking whether each entry in the buffer structure meets the update conditions, for each entry, it is determined whether the entry's own confidence status is high confidence, and whether other entries older than the entry are also high confidence. If the entry's confidence status is high confidence, and all entries older than the entry have high confidence status, then the entry is determined to meet the update conditions, indicating that the branch instruction corresponding to the entry and the branch instructions generated before the entry are accurate, that is, the path is confirmed as the correct path. Therefore, the branch prediction table is updated using the actual execution results recorded in the entry.
[0085] The method described in this embodiment updates the branch prediction table according to the program sequence and confidence status, which can further ensure the accuracy of the branch prediction table.
[0086] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, the branch prediction table is updated based on the timing information of each entry in the buffer structure and using the actual execution results, including:
[0087] Create a target entry in the buffer structure and record the status information, actual execution result, identification information, and timing information of the target branch instruction in the target entry;
[0088] Update the branch prediction table using the actual execution results;
[0089] If a branch misprediction is determined to have occurred, based on the timing information of the target branch instruction corresponding to the misprediction, a rollback entry is determined from the buffer structure whose timing information is greater than or equal to the timing information of the target branch instruction.
[0090] The branch prediction table is restored based on the pre-update state information corresponding to each rollback entry.
[0091] In this embodiment, before updating the branch prediction table, a target entry is created in the buffer structure, and the status information, actual execution result, identification information and timing information of the target branch instruction are recorded in the target entry. That is, the target entry stores the status information of the target branch instruction before updating the branch prediction table.
[0092] Once the actual execution result of the target branch instruction is determined, the branch prediction table is immediately updated with that result.
[0093] Here, rollback entries refer to entries that, when a branch misprediction occurs, are determined to require the reversal of their update operations. These are all entries whose ROB ID is greater than or equal to the ROB ID of the target branch instruction in the misprediction. If the timing information (ROB ID) corresponding to the target branch instruction in the misprediction is X, that is, entries whose ROB ID is greater than or equal to X are identified from the buffer structure. These entries are the ones that need to be rolled back; hence, rollback entries are determined.
[0094] Specifically, if a branch misprediction is determined, the timing information of the target branch instruction corresponding to the misprediction is determined. Rollback entries whose timing information is greater than or equal to that of the target branch instruction are determined from the buffer structure; that is, entries no earlier than the target branch instruction are identified as rollback entries. The branch prediction table is then restored using the pre-update state information corresponding to each rollback entry. In this embodiment, the efficiency of updating the branch prediction table is improved by immediately updating it, and the state of the branch instruction before updating the branch prediction table is backed up. Therefore, when a branch misprediction is determined, the branch prediction table can be restored, thus avoiding contamination and improving its accuracy.
[0095] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, the prediction result is obtained by querying the branch prediction table according to the current PC address, including:
[0096] The prediction results are obtained by querying the branch prediction table and the buffer structure based on the current PC address.
[0097] It is understandable that the entries stored in the buffer structure include the actual execution result determined immediately after the branch instruction has finished executing. In this embodiment, when branch prediction is required, the branch prediction table and the buffer structure are queried respectively. If there is an entry in the buffer structure that matches the current PC address, the actual execution result in the buffer structure is used as the prediction result corresponding to the current PC address; otherwise, the prediction result corresponding to the current PC address is retrieved from the branch prediction table.
[0098] In each preset cycle, FBC checks each entry and determines whether it is the entry with the smallest time sequence information (i.e., the oldest entry) based on the time sequence information corresponding to the entry. If so, the entry meets the update conditions, and the branch prediction table is updated using the actual execution result in that entry. After the update is completed, the entry is marked as invalid so that other subsequent entries can be identified as the oldest entries.
[0099] According to the method of this embodiment, the prediction result is determined based on the branch prediction table and the buffer structure. If there is an entry in the buffer structure corresponding to the current PC address, the accuracy of the prediction information can be improved and the efficiency of updating the branch prediction table can be increased.
[0100] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, the process of determining when a branch misprediction occurs includes:
[0101] The prediction result is obtained by querying the branch prediction table based on the current PC address;
[0102] The target branch instruction is determined from the branch instructions with operands ready, and the instruction is issued and executed based on the target branch instruction to obtain the actual execution result;
[0103] If the predicted result is inconsistent with the actual execution result, then a branch misprediction has occurred.
[0104] In this embodiment, the branch prediction table is first queried based on the current PC address to determine the prediction result corresponding to the current PC address. The prediction result includes the prediction direction and the prediction target address; the prediction direction indicates whether the branch instruction is to "jump" or "not jump"; the prediction target address refers to the target address corresponding to the prediction direction being "jump".
[0105] The target branch instruction refers to the branch instruction with the least timing information (oldest). The target branch instruction is determined from the operand-ready branch instructions. Based on the target branch instruction, it is issued and executed to obtain the actual result. The actual result includes the actual direction and the actual target address. The actual direction indicates whether the branch instruction actually performs a take or not take operation, and the actual target address refers to the target address corresponding to the jump operation.
[0106] In a specific example, the PU (Branch Instruction Predictor) accesses the branch prediction table based on the current PC address, obtains the prediction result, and sends the prediction result to the IFU (Instruction Cache). After obtaining the prediction result, the IFU retrieves the instruction stream from the instruction cache (high-speed memory) according to the prediction target address. The decoding module identifies the branch instructions in the instruction stream and generates the corresponding decoding packet. The branch instructions include BEQ, BNE, JAL, etc. The decoding packet includes the instruction type, which registers are required, and an identifier indicating whether it is a branch instruction. The rename module assigns ROB IDs (Reorder Buffers) to all instructions. The ROB ID defines the age order of the instructions in the program; the smaller the ID, the older the instruction. The dispatch module writes the decoding packet into the ROB entry corresponding to the instruction. The identified branch instruction, along with its operands (if ready) and ROB ID, is sent to the waiting queue of the corresponding branch execution unit. After receiving the branch instruction, the branch execution unit selects an older instruction (i.e., the one with the smallest ROB ID) from the branch instructions with ready operands and issues and executes it (i.e., out-of-order issuance) to obtain the actual result.
[0107] Then, the branch execution unit compares the predicted result with the actual result. If the predicted result matches the actual result, it means that the prediction is correct. Therefore, the branch instruction is marked as "complete" in the ROB of the branch instruction, and the path of its subsequent instructions is confirmed to be valid. If the predicted result does not match the actual result, a prediction table update request is generated based on the actual result and sent to the BPU.
[0108] The method described in this embodiment can accurately determine the prediction table update request, thereby improving the accuracy of the branch prediction table.
[0109] Based on the above embodiments, this embodiment further explains and optimizes the technical solution. Specifically, in this embodiment, after determining that the prediction result is inconsistent with the actual execution result, the method further includes:
[0110] A global flush request is generated based on the timing information of the target branch instruction; the global flush request is used to clear all entries in the program sequence that are younger than the target branch instruction.
[0111] In this embodiment, after determining that the prediction result is inconsistent with the actual execution result, that is, after determining that a branch misprediction has occurred, a global flush request is generated based on the timing information of the target branch instruction. Specifically, a global flush request is initiated to all relevant modules, such as BPU, IFU, register mapping table, etc.; the content of the global flush request is: to delete all branch instructions whose timing information is not earlier than the timing information of the target branch instruction, as well as their corresponding status information.
[0112] This embodiment further removes erroneous information of the target branch instruction corresponding to the misprediction of the branch through a global flush request, thereby ensuring the accuracy of the branch prediction table.
[0113] To enable those skilled in the art to better understand the technical solutions in this application, the technical solutions in the embodiments of this application are described in detail below with reference to practical application scenarios. In the embodiments of this application, the specific steps of a branch prediction table update method are as follows:
[0114] Step 1: The BPU (Branch Instruction Predictor) accesses the branch prediction table based on the current PC address, obtains the prediction result, and sends the prediction result to the IFU. The prediction result includes the prediction direction and the prediction target address. The prediction direction indicates whether the branch instruction is a "jump" or a "no-jump" instruction. The prediction target address refers to the target address corresponding to the prediction direction of "jump".
[0115] Step 2: After obtaining the prediction result, IFU retrieves the instruction stream from the instruction cache (high-speed memory) according to the predicted target address;
[0116] Step 3: The decoding module identifies branch instructions in the instruction stream and generates corresponding decoding packages; among them, branch instructions include BEQ, BNE, and JAL, etc.; the decoding package includes the instruction type, which registers are required, and an identifier of whether it is a branch instruction;
[0117] Step 4: The Rename module assigns ROB IDs to all instructions; the ROB ID defines the age order of the instructions in the program, with smaller IDs indicating older instructions;
[0118] Step 5: The dispatch module writes the decoded packet into the ROB entry corresponding to the instruction; it sends the identified branch instruction, along with its operands (if ready) and ROB ID, to the waiting queue of the corresponding branch execution unit.
[0119] Step 6: After receiving the branch instruction, the branch execution unit selects an older instruction (i.e., one with a smaller ROB ID) from the operand-ready branch instructions and issues and executes it (i.e., out-of-order issuance) to obtain the actual result. The actual result includes the actual direction and the actual target address. The actual direction indicates whether the branch instruction actually performs a jump (Taken) or not-Taken operation, and the actual target address refers to the target address corresponding to the jump operation. The branch execution unit compares the predicted result recorded in the ROB with the actual result to see if they are consistent.
[0120] If they match, it means the prediction is correct. Therefore, the branch instruction is marked as "complete" in the ROB of the branch instruction, and the path of its subsequent instructions is confirmed to be valid.
[0121] If there is a discrepancy, it indicates that a branch misprediction has occurred. Therefore, a misprediction notification is sent to the ROB, such as "The instruction with ROB ID X was mispredicted". When the ROB receives one or more misprediction notifications, it selects the oldest mispredicted instruction from all the mispredicted instructions that need to be processed as the target branch instruction based on the timing information (ROB ID), and determines its corresponding timing information ROBID=X.
[0122] Step 7: The ROB controller initiates a global flush request to all relevant modules of the CPU (including BPU, IFU, register mapping table, etc.). The global flush request is to clear all instructions with ROB ID greater than or equal to X and all their related status information, and reset the PC to the correct address of the mispredicted instruction. At the same time, the ROB generates a prediction table update request based on the actual execution result and sends the prediction table update request to the BPU, requesting the BPU to update the branch prediction table accordingly.
[0123] Step 8: After receiving the prediction table update request, the BPU puts the prediction table update request (including the actual execution result, the identification information of the target branch instruction, and the timing information) into the buffer structure FBC;
[0124] Step 9: FBC checks each entry in each prediction period to see if it meets the update conditions: whether the entry's confidence status is high confidence, and whether the confidence status of all entries older than the entry is high confidence.
[0125] If the update conditions are met, the branch prediction table is updated using the actual execution results in that entry;
[0126] If the update conditions are not met, no further action is taken, and the entry continues to wait in the FBC. During the waiting period, the entry may be confirmed to have made a correct prediction, in which case the entry's confidence status can be adjusted from low confidence to high confidence.
[0127] This application provides a method for updating a branch prediction table. The method obtains the actual execution result of a target branch instruction and its timing information within the program sequence. A target entry is created in a buffer structure, and the actual execution result, the target branch instruction's identifier, and the timing information are recorded in the target entry. Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution result. This method caches branch instructions according to their program sequence to manage each entry, including the actual execution result, the target branch instruction's identifier, and the timing information. In other words, it uses the program sequence to manage the entries in the buffer structure, and updates the branch prediction table based on the timing information of each entry in the buffer structure using the actual execution result. This avoids the possibility of pollution caused by out-of-order updates to the branch prediction table. Therefore, this method can improve the accuracy of the prediction table when updating it in an out-of-order execution environment.
[0128] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.
[0129] It should be noted that the information collection process (such as the facial image collection process, fingerprint information collection process, etc.) / feature extraction process involved in this application is carried out with the user's knowledge and permission. That is, the information collection process / feature extraction process complies with the requirements of laws and regulations and does not constitute an act that harms the public interest.
[0130] Figure 2 The diagram shown is a structural schematic of a branch prediction table updating device provided in an embodiment of this application. Figure 2 As shown, the branch prediction table update device in this embodiment includes:
[0131] The acquisition module 210 is used to acquire the actual execution result of the target branch instruction and the timing information of the target branch instruction in the program sequence;
[0132] The recording module 220 is used to create target entries in the buffer structure and record the actual execution results, the identification information of the target branch instructions, and the timing information in the target entries;
[0133] The update module 230 is used to update the branch prediction table based on the timing information of each entry in the buffer structure and the actual execution results.
[0134] The branch prediction table updating apparatus provided in this application embodiment has the same beneficial effects as the branch prediction table updating method described above.
[0135] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.
[0136] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.
[0137] Figure 3 This is a schematic diagram of the structure of a terminal device provided in an embodiment of this application. Figure 3 As shown, the terminal device 300 of this embodiment includes a memory 310, a processor 320, and a computer program 330 stored in the memory 310 and executable on the processor 320; when the processor 320 executes the computer program 330, it implements the steps in the above-described branch prediction table update method embodiments; or when the processor 320 executes the computer program 330, it implements the functions of each module / unit in the above-described device embodiments.
[0138] For example, computer program 330 can be divided into one or more modules / units, one or more of which are stored in memory 310 and executed by processor 320 to implement the method of the embodiments of this application. One or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of computer program 330 in terminal device 300. For example, computer program 330 can be divided into multiple modules, each with the following specific functions:
[0139] The acquisition module is used to acquire the actual execution result of the target branch instruction and acquire the timing information of the target branch instruction in the program sequence;
[0140] The recording module is used to create a target entry in the buffer structure and record the actual execution result, the identification information of the target branch instruction, and the timing information in the target entry;
[0141] An update module is used to update the branch prediction table based on the timing information of each entry in the buffer structure and the actual execution results.
[0142] In applications, terminal device 300 can be a computing device such as a desktop computer, laptop, handheld computer, or cloud server. Terminal device 300 may include, but is not limited to, memory 310 and processor 320. Those skilled in the art will understand that... Figure 3 This is merely an example of a terminal device and does not constitute a limitation on the terminal device. It may include more or fewer components than shown, or combine certain components, or different components. For example, a terminal device may also include input / output devices, network access devices, buses, etc.; among which, input / output devices may include cameras, audio acquisition / playback devices, displays, etc.; network access devices may include communication modules for wireless communication with external devices.
[0143] In applications, the processor can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.
[0144] In applications, memory can be an internal storage unit of a terminal device, such as its hard drive or RAM; it can also be an external storage device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card; or it can include both internal and external storage units. Memory is used to store operating systems, applications, boot loaders, data, and other programs, such as computer program code. Memory can also be used to temporarily store data that has been output or will be output.
[0145] This application also provides a computer-readable storage medium storing a computer program, which, when executed by a processor, can implement the steps in the above-described method embodiments.
[0146] This application implements all or part of the processes in the methods of the above embodiments, which can be accomplished by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable file, or some intermediate form. The computer-readable medium can include at least: any entity or device capable of carrying the computer program code to a terminal device, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium, such as a USB flash drive, a portable hard drive, a magnetic disk, or an optical disk.
[0147] The computer-readable storage medium provided in this application embodiment has the same beneficial effects as the branch prediction table update method described above.
[0148] This application also provides a computer program product, including a computer program that, when executed by a processor, can implement the steps in the various method embodiments described above.
[0149] The computer program product provided in this application embodiment has the same beneficial effects as the branch prediction table update method described above.
[0150] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.
[0151] Those skilled in the art will recognize that the device and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.
[0152] In the embodiments provided in this application, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interface, or the device may be indirectly coupled or communicated, and may be electrical, mechanical, or other forms.
[0153] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.
Claims
1. A method for updating a branch prediction table, characterized in that, The method includes: Obtain the actual execution result of the target branch instruction, and obtain the timing information of the target branch instruction in the program sequence; Create a target entry in the buffer structure, and record the actual execution result, the identification information of the target branch instruction, and the timing information in the target entry; Based on the timing information of each entry in the buffer structure, the branch prediction table is updated using the actual execution results. The step of updating the branch prediction table based on the timing information of each entry in the buffer structure and using the actual execution results includes: Check whether each entry in the buffer structure meets the update condition; the update condition is determined based on the timing information. If any of the entries satisfies the update condition, the branch prediction table is updated using the actual execution result corresponding to the entry. The step of determining that the entry satisfies the update condition includes: If the entry is determined to be the oldest entry based on the procedural order of the entries, then the entry is deemed to meet the update condition. The step of creating a target entry in the buffer structure and recording the actual execution result, the identifier information of the target branch instruction, and the timing information in the target entry includes: If a branch misprediction is determined to have occurred, a target entry is created in the buffer structure, and the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry, and the confidence status of the target entry is set to high confidence. Determining that the entry satisfies the update condition includes: If the credibility status of the entry is high, and all entries older than the entry have a high credibility status, then the entry is determined to meet the update condition.
2. The method according to claim 1, characterized in that, The step of updating the branch prediction table based on the timing information of each entry in the buffer structure and using the actual execution results includes: A target entry is created in the buffer structure, and the status information of the target branch instruction, the actual execution result, the identification information of the target branch instruction, and the timing information are recorded in the target entry. Update the branch prediction table using the actual execution results; If a branch misprediction is determined to have occurred, a rollback entry is determined from the buffer structure based on the timing information of the target branch instruction corresponding to the branch misprediction, wherein the timing information is greater than or equal to the timing information of the target branch instruction. The branch prediction table is restored based on the state information before the update corresponding to each rollback entry.
3. The method according to any one of claims 1 to 2, characterized in that, The process of identifying branch misprediction includes: The prediction result is obtained by querying the branch prediction table based on the current PC address; The target branch instruction is determined from the branch instructions with operands ready, and issued and executed based on the target branch instruction to obtain the actual execution result; If the predicted result is inconsistent with the actual execution result, then a branch misprediction is determined to have occurred.
4. The method according to claim 3, characterized in that, The step of querying the branch prediction table based on the current PC address to obtain the prediction result includes: The prediction results are obtained by querying the branch prediction table and the buffer structure based on the current PC address.
5. The method according to claim 4, characterized in that, After determining that the prediction result is inconsistent with the actual execution result, the method further includes: A global flush request is generated based on the timing information of the target branch instruction; the global flush request is used to clear all entries whose program sequence is younger than the target branch instruction.
6. A terminal device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the steps of the method as described in any one of claims 1 to 5.
7. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 1 to 5.