Semiconductor structure, preparation method and integrated circuit

Abstract

The invention discloses a semiconductor structure, a preparation method and an integrated circuit. The semiconductor structure comprises a substrate and a gate structure formed on the upper surface of the substrate. The gate structure comprises a first dielectric layer, a first barrier layer and a metal conductive layer which are sequentially formed on the substrate. The first barrier layer contains metal elements with an oxyphilic function, and the concentration of the metal elements contained in the part, close to the first dielectric layer, of the first barrier layer is larger than that of the metal elements contained in the part, away from the first dielectric layer, of the first barrier layer. According to the semiconductor structure, the influence of adverse oxygen on the gate threshold voltage change and the carrier mobility of the semiconductor structure can be inhibited, so that the electrical performance of the gate structure is ensured.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor, and in particular, to a semiconductor structure, a preparation method and an integrated circuit. BACKGROUND

[0002] With the manufacturing process node of integrated circuit entering smaller size, the thickness of gate dielectric layer of transistor is continuously thinned, and the gate leakage current caused by direct tunneling of electrons through the gate dielectric layer is also increased, so that the high dielectric metal gate (HKMG) can be used instead of the traditional polysilicon gate to reduce the gate leakage current of transistor.

[0003] In the process of making HKMG, there are a large number of defects and charge traps in the gate dielectric layer, although related processes can be used to improve these problems, but these processes also bring free oxygen, unbound oxygen and other adverse oxygen to the gate dielectric layer, and easily diffuse into other thin films, resulting in changes in threshold voltage and reduction in carrier mobility, which is not conducive to the electrical performance of HKMG. SUMMARY

[0004] The purpose of the present application is to provide a semiconductor structure, a preparation method and an integrated circuit, which can capture free oxygen and unbound oxygen to reduce the influence of free oxygen, unbound oxygen and other adverse oxygen on the gate threshold voltage and carrier mobility, thereby ensuring the electrical performance of the gate structure included in the semiconductor structure.

[0005] In a first aspect, the present application provides a semiconductor structure, which includes a substrate and a gate structure formed on the substrate. The gate structure includes a first dielectric layer, a first barrier layer and a metal conductive layer formed in sequence on the substrate, the first barrier layer contains a metal element with oxygen affinity function, and the metal element concentration contained in the part of the first barrier layer close to the first dielectric layer is greater than the metal element concentration contained in the part of the first barrier layer away from the first dielectric layer.

[0006] In the case of the above technical solution, the semiconductor gate structure includes a gate structure, in the process of manufacturing the first dielectric layer, the surface of the first dielectric layer may have free oxygen, unbound oxygen and other harmful oxygen, and the first barrier layer is formed between the first dielectric layer and the metal conductive layer, so that the metal element concentration of the part of the first barrier layer close to the first dielectric layer is greater than the metal element concentration of the part of the first barrier layer away from the first dielectric layer. In this case, when the free oxygen, unbound oxygen and other harmful oxygen on the surface of the first dielectric layer diffuse towards the metal conductive layer, the metal element concentration of the edge of the first barrier layer close to the first dielectric layer is relatively high compared with the metal element concentration of the edge of the first barrier layer away from the first dielectric layer, so that the edge of the first barrier layer close to the first dielectric layer has a stronger ability to capture free oxygen, unbound oxygen and other harmful oxygen. Therefore, the first barrier layer can better prevent the harmful oxygen from diffusing towards the metal conductive layer, thereby avoiding the diffusion of harmful oxygen into other film layers above the first barrier layer, and ensuring the stability of the threshold voltage of the gate structure.

[0007] It can be seen that the semiconductor structure includes a first barrier layer containing a metal element with an oxygen affinity function, and the concentration of the metal element in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the metal element in the part of the first barrier layer away from the first dielectric layer. In the case of ensuring the ability of the first barrier layer to inhibit the diffusion of harmful oxygen, the possibility of escape of free oxygen, unbound oxygen and other harmful oxygen of the first dielectric layer can be reduced when the ability of the first barrier layer to capture harmful oxygen is insufficient, thereby inhibiting the diffusion range of harmful oxygen, reducing the influence of harmful oxygen diffusion on the carrier mobility of the semiconductor structure, ensuring the stability of the gate threshold voltage, and making the electrical performance of the semiconductor structure perform well, thereby improving the stability and reliability of the device.

[0008] In a possible implementation, the material of the first dielectric layer includes a high dielectric constant material, which includes one or more of HfO2, Al2O3, ZrO2, HfSiO, La2O3, HfSiON or HfAlO2. Such high dielectric constant material has a higher dielectric constant, which can increase the physical thickness of the first dielectric layer while keeping the gate capacitance unchanged, thereby achieving the purpose of reducing gate leakage current and improving device reliability. However, since most high-k materials are metal ion oxides and do not have a fixed atomic coordination, a large number of interface defects may occur between the first dielectric layer formed of high-k material and the underlying film layer. The interface defects may combine with oxygen to produce interstitial oxygen ions, i.e. free oxygen or unbound oxygen and other harmful oxygen, which may diffuse to other film layers. In this case, the semiconductor structure combined with the technical solution of the present application can inhibit the diffusion of harmful oxygen while maintaining the performance of the gate dielectric layer (such as the first dielectric layer) made of high dielectric constant material, thereby enhancing the stability and reliability of the device.

[0009] In a possible implementation, the metal element contained in the first barrier layer can include at least one of a zirconium metal and a titanium element. The saturation oxygen absorption rate of the metal element is less than the preset oxygen absorption rate, and the change rate of the Schottky barrier of the metal element is less than the preset change rate as the oxygen absorption amount of the metal element increases. In this case, even if the metal element captures the adverse oxygen such as free oxygen, unbound oxygen, and the like by the oxygen affinity, the resistance of the gate structure is hardly affected, and therefore, the semiconductor structure of the present application can ensure the stability of the gate threshold voltage and the carrier mobility by improving the barrier layer contained in the gate structure.

[0010] In a possible implementation, the first barrier layer contains both the metal element and the nitrogen element, and the concentration of the nitrogen element contained in the part of the first barrier layer close to the first dielectric layer is less than the concentration of the nitrogen element contained in the part of the first barrier layer away from the first dielectric layer. In this case, since the edge of the first barrier layer away from the first dielectric layer contains more nitrogen element, the first barrier layer can protect the film layer below the first barrier layer from the adverse effects of the manufacturing process of the film layer above the first barrier layer when the film layer above the first barrier layer is manufactured.

[0011] In a possible implementation, the concentration of the metal element contained in the first barrier layer decreases along the direction away from the first dielectric layer, and the concentration of the nitrogen element contained in the first barrier layer increases along the direction away from the first dielectric layer; and / or, the concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the nitrogen element contained in the same part, and the concentration of the nitrogen element contained in the part of the first barrier layer away from the first dielectric layer is greater than or equal to the concentration of the metal element contained in the same part.

[0012] In view of the fact that the possibility of the diffusion of the harmful oxygen to the part of the first barrier layer close to the first dielectric layer is higher than the possibility of the diffusion of the harmful oxygen to the part of the first barrier layer away from the first dielectric layer, and the degree of the influence of the preparation process of the upper film layer on the first barrier layer gradually decreases along the direction of the first barrier layer close to the first dielectric layer when the upper film layer is prepared. In this case, the concentration of the metal element contained in the first barrier layer can be set to decrease along the direction away from the first dielectric layer, and the concentration of the nitrogen element contained in the first barrier layer can be set to increase along the direction away from the first dielectric layer, so that the diffusion inhibition ability of the first barrier layer to the harmful oxygen gradually decreases along the direction away from the first dielectric layer, and the barrier ability of the first barrier layer gradually increases along the direction close to the first dielectric layer. Therefore, the first barrier layer can control the diffusion of the harmful oxygen as much as possible to the part close to the first dielectric layer, thereby avoiding the diffusion of the harmful oxygen to the direction away from the first dielectric layer and reducing the influence on the threshold voltage of the gate, and the influence range of the preparation process of the upper film layer on the first barrier layer can be controlled as much as possible to the part away from the first dielectric layer, so as to effectively protect the lower film layer of the first barrier layer, such as the first dielectric layer, from the adverse effects of the subsequent process.

[0013] In a possible implementation, the first barrier layer includes a plurality of barrier sub-layers, the nitrogen element and the metal element in each barrier sub-layer are uniformly distributed, the concentration of the metal element in the plurality of barrier sub-layers decreases along the direction away from the first dielectric layer, and the concentration of the nitrogen element in the plurality of barrier sub-layers increases along the direction away from the first dielectric layer. For example, the concentration of the nitrogen element and the concentration of the metal element contained in each barrier sub-layer are different from the concentration of the nitrogen element and the concentration of the metal element contained in other barrier sub-layers, the concentration of the metal element contained in the plurality of barrier sub-layers changes from large to small along the direction away from the first dielectric layer, and the concentration of the nitrogen element contained in the plurality of barrier sub-layers changes from small to large along the direction away from the first dielectric layer.

[0014] In a possible implementation, the barrier sub-layer closest to the first dielectric layer among the barrier sub-layers contains the metal element and the nitrogen element in a molar ratio greater than 1 and less than or equal to 1.1, and the barrier sub-layer farthest from the first dielectric layer among the barrier sub-layers contains the metal element and the nitrogen element in a molar ratio greater than or equal to 0.9 and less than 1. In this way, a better effect of inhibiting the diffusion of the free oxygen ions can be achieved.

[0015] In a possible implementation, the multi-layer barrier sub-layer includes a first barrier sub-layer and a second barrier sub-layer stacked in sequence, the first barrier sub-layer is close to the first dielectric layer, and the second barrier sub-layer is away from the first dielectric layer. In this case, the first barrier sub-layer has a larger concentration of metal elements and a smaller concentration of nitrogen elements than the second barrier sub-layer, and can be referred to as a metal-rich layer. The second barrier sub-layer has a smaller concentration of metal elements and a larger concentration of nitrogen elements than the first barrier sub-layer, and can be referred to as a nitrogen-rich layer. Since the first barrier sub-layer is close to the first dielectric layer and has a larger concentration of metal elements, in the formed first barrier sub-layer, the proportion of metal elements in the crystal lattice formed by nitrogen elements and metal elements is relatively high, so that the first barrier sub-layer can fully play a chemical oxygen absorption activity and fully capture the harmful oxygen of the first dielectric layer. At the same time, since the second barrier sub-layer is away from the first dielectric layer and has a larger concentration of nitrogen elements, the second barrier sub-layer can avoid the influence of the film layer forming process above the first barrier layer on the film layer below the first barrier layer, and ensure the electrical performance of the semiconductor device.

[0016] In a possible implementation, the first barrier sub-layer contains metal elements and nitrogen elements in a molar ratio greater than 1 and less than or equal to 1.1, and the second barrier sub-layer contains metal elements and nitrogen elements in a molar ratio greater than 0.9 and less than 1.

[0017] In a possible implementation, the thickness of the first barrier sub-layer accounts for 1 / 3 to 1 / 2 of the thickness of the first barrier layer, and the thickness of the second barrier sub-layer accounts for 1 / 2 to 2 / 3 of the thickness of the first barrier layer.

[0018] In a possible implementation, the gate structure further includes a second dielectric layer between the substrate and the first dielectric layer, and an etching stop layer, a work function layer, and a metal conductive layer arranged in sequence between the first barrier layer and the metal conductive layer in a direction away from the substrate.

[0019] <24P01131CN>

[0020] The first barrier layer, the second barrier layer, and the metal conductive layer.

[0021] In a possible implementation, the dielectric constant of the second dielectric layer is less than the dielectric constant of the first dielectric layer, in which case, the free oxygen and unbound oxygen on the upper surface of the first dielectric layer can be combined with the high-concentration metal elements on the lower surface of the first barrier layer, thereby locking the free oxygen and unbound oxygen on the upper surface of the first dielectric layer. Since the free oxygen and unbound oxygen are mainly concentrated on the upper surface of the first dielectric layer, the first barrier layer in contact with the upper surface of the first dielectric layer can not only effectively reduce the diffusion of harmful oxygen to the metal conductive layer, but also reduce the diffusion of harmful oxygen to the lower surface of the first dielectric layer and the lower layer of the film, thereby facilitating the thinning of the lower second dielectric layer, so as to better realize the small size of the semiconductor structure. In addition, when the first barrier layer and the second barrier layer both contain metal elements, the second barrier layer can capture the harmful oxygen that is not completely blocked by the first barrier layer, thereby further stabilizing the threshold voltage change and carrier mobility, and ensuring the electrical performance of the gate structure.

[0022] In a second aspect, the present application also provides a method for preparing a semiconductor structure, comprising:

[0023] providing a substrate, the substrate having a gate formation area;

[0024] forming a first dielectric layer on the substrate in the gate formation area;

[0025] forming a first barrier layer on the upper surface of the first dielectric layer, the first barrier layer containing metal elements with oxygen affinity function, the concentration of metal elements contained in the part of the first barrier layer close to the first dielectric layer being greater than the concentration of metal elements contained in the part of the first barrier layer away from the first dielectric layer;

[0026] forming a metal conductive layer on the first barrier layer.

[0027] In a possible implementation, the step of forming the first barrier layer in the method for preparing the semiconductor structure comprises:

[0028] forming a first barrier sublayer on the first dielectric layer by a first deposition process; and forming a second barrier sublayer on the first barrier sublayer by a second deposition process, wherein the nitrogen flow rate and the power voltage of the first deposition process and the second deposition process are different.

[0029] In a possible implementation, the process condition parameters of the first deposition process include a first nitrogen flow rate and a first power voltage, and the process condition parameters of the second deposition process include a second nitrogen flow rate and a second power voltage. When the first power voltage increases at a rate less than a first preset increasing rate as the first nitrogen flow rate increases, the first barrier sub-layer contains a metal element concentration greater than a nitrogen element concentration, so that the first barrier sub-layer with a relatively high metal element concentration can be formed. When the second power voltage increases at a rate less than a second preset increasing rate as the second nitrogen flow rate increases, the second barrier sub-layer contains a metal element concentration less than or equal to a nitrogen element concentration, so that the second barrier sub-layer with a relatively high nitrogen element concentration can be formed.

[0030] In a possible implementation, the process condition parameters of the first deposition process and the second deposition process further include a power of a power source. When the power source of the first deposition process and the second deposition process is a direct current power source, the direct current power of the power source is greater than 0 W and less than or equal to 800 W. When the power source of the first process condition and the second process condition is a radio frequency power source, the radio frequency power of the power source is greater than 0 W and less than or equal to 1500 W.

[0031] <24P01131CN> the power of the power source is greater than 0 W and less than or equal to 1500 W.

[0032] In a possible implementation, the first nitrogen flow rate is less than the second nitrogen flow rate. For example, the first nitrogen flow rate is 15 sccm to 20 sccm, and the second nitrogen flow rate is 32 sccm to 40 sccm.

[0033] In a possible implementation, the process condition parameters of the first deposition process and the second deposition process further include a deposition time. The deposition time of the first deposition process is 2 s to 10 s, and the deposition time of the second deposition process is 15 s to 20 s.

[0034] In a possible implementation, the first barrier sub-layer and the second barrier sub-layer are formed in the same process chamber.

[0035] In a possible implementation, after the first barrier sub-layer is formed on the first dielectric layer by the first deposition process, the method for forming the first barrier layer further includes: changing the first deposition process to the second deposition process when a vacuum degree of the process chamber is greater than or equal to a preset vacuum degree.

[0036] The beneficial effects of the second aspect or any possible implementation method of the second aspect can refer to the first aspect or any possible implementation of the first aspect, which will not be repeated here.

[0037] In a third aspect, the present application provides an integrated circuit, which comprises a semiconductor structure having a substrate and a gate structure formed on the substrate, the gate structure comprising a first dielectric layer, a first barrier layer and a metal conductive layer formed in sequence on the substrate, the first barrier layer containing a metal element with oxygen affinity, the first barrier layer containing the metal element at a portion close to the first dielectric layer at a higher concentration than at a portion away from the first dielectric layer.

[0038] The beneficial effects of the third aspect of the present application can be referred to the first aspect or any possible implementation manner of the first aspect, which will not be repeated here. BRIEF DESCRIPTION OF DRAWINGS

[0039] The accompanying drawings, which are included to provide a further understanding of the application and are incorporated in and constitute a part of this application, illustrate embodiments of the application and together with the description serve to explain the application. In the drawings:

[0040] Figure 1 A structural schematic diagram of an electronic device of an embodiment of the present application is shown;

[0041] Figure 2 A structural schematic diagram of an integrated circuit of an embodiment of the present application is shown;

[0042] Figures 3A-3C A state schematic diagram of HKMG in three process stages is shown, taking HfO2 as an example;

[0043] Figure 3D An adverse oxygen diffusion path schematic diagram of a HfO2 dielectric layer included in HKMG is shown;

[0044] Figure 4 A basic structural schematic diagram of a semiconductor structure provided by an embodiment of the present application is shown;

[0045] Figure 5 A principle schematic diagram of a barrier layer capturing adverse oxygen of an embodiment of the present application is shown;

[0046] Figure 6A Another basic structural schematic diagram of a semiconductor structure of an embodiment of the present application is shown;

[0047] Figure 6B An interface state schematic diagram of a HfO2 dielectric layer and a TiN barrier layer of an embodiment of the present application is shown;

[0048] Figure 7 A barrier layer lattice schematic diagram formed under a process condition of a titanium-rich region of an embodiment of the present application is shown;

[0049] Figure 8This illustration shows a schematic diagram of the barrier layer lattice formed under process conditions in a nitrogen-rich region according to an embodiment of this application.

[0050] Figure 9 A schematic diagram of a specific structure of a semiconductor structure according to an embodiment of this application is shown;

[0051] Figure 10 A schematic flowchart of a semiconductor structure fabrication method according to an embodiment of this application is shown;

[0052] Figures 11A-11C The diagram shows the state of the gate structure of the present application embodiment at different process stages;

[0053] Figure 12 This paper presents a schematic diagram of the hysteresis curve using titanium nitride as an example from an embodiment of this application.

[0054] Figure 13 This illustration shows a schematic diagram of the barrier layer lattice formed under process conditions in the transition region according to an embodiment of this application; Detailed Implementation

[0055] Embodiments of the present disclosure will now be described with reference to the accompanying drawings. However, it should be understood that these descriptions are exemplary only and are not intended to limit the scope of the disclosure. Furthermore, descriptions of well-known structures and technologies are omitted in the following description to avoid unnecessarily obscuring the concepts of the present disclosure.

[0056] The accompanying drawings illustrate various structural schematics according to embodiments of the present disclosure. These drawings are not to scale, and some details have been enlarged for clarity, and some details may have been omitted. The shapes of the various regions and layers shown in the drawings, as well as their relative sizes and positional relationships, are merely exemplary and may deviate from reality due to manufacturing tolerances or technical limitations. Furthermore, those skilled in the art can design regions / layers with different shapes, sizes, and relative positions as needed.

[0057] In the context of this disclosure, when a layer / element is referred to as being "on top of" another layer / element, the layer / element may be directly on top of the other layer / element, or there may be an intermediate layer / element between them. Additionally, if a layer / element is "on top of" another layer / element in one orientation, then when the orientation is reversed, the layer / element may be "below" the other layer / element. To make the technical problems, technical solutions, and beneficial effects of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0058] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this invention, "a plurality of" means two or more, unless otherwise explicitly specified. "Several" means one or more, unless otherwise explicitly specified.

[0059] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0060] Figure 1 A schematic diagram of the structure of an electronic device according to an embodiment of this application is shown. Figure 1 As shown, the electronic device 100 may include a circuit board 101 and an integrated circuit 102 coupled to the circuit board 101. For example, the integrated circuit 102 may be disposed on the circuit board 101. The integrated circuit 102 may exist in the form of a memory, a processor, etc.

[0061] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0062] Exemplarily, the electronic device of the embodiments of the present application can include various devices with computing functions, such as a mobile phone, a pad, a television, a desktop computer, a laptop computer, a handheld computer, a notebook computer, an ultra-mobile personal computer (UMPC), a netbook, a cellular phone, a personal digital assistant (PDA), an augmented reality (AR) device, a virtual reality (VR) device, an artificial intelligence (AI) device, a smart wearable device (for example, a smart watch, a smart bracelet), an in-vehicle device, a smart home device, and / or a smart city device, and the embodiments of the present application do not specially limit the specific type of the electronic device.

[0063] Figure 2 A structural schematic diagram of an integrated circuit of the embodiments of the present application is shown. As shown in the figure, Figure 2 The integrated circuit 200 of the embodiments of the present application includes a packaging structure 201 and a semiconductor structure 202, the semiconductor structure 202 is encapsulated inside the packaging structure 201, and the number of the semiconductor structure 202 can be one or more. Among them, Figure 2 One semiconductor structure 202 in the integrated circuit 200 is shown.

[0064] It can be understood that the structure shown in the embodiments of the present application does not constitute a specific limitation on the integrated circuit. In other embodiments of the present application, the integrated circuit can include more or fewer components than shown, or combine certain components, or split certain components, or different component arrangements.

[0065] In some examples, as shown in the figure, Figure 2 The packaging structure 201 can include a substrate 2011 and a packaging shell 2012, and the packaging shell 2012 is bonded to the substrate 2011 by an insulating adhesive.

[0066] Exemplarily, as shown in the figure, Figure 2 The substrate 2011 has high heat dissipation and conductivity. The material of the substrate 2011 can include a composite material, and the structure of the substrate 2011 can be a laminated structure. Alternatively, the material of the substrate 2011 can include copper and molybdenum, and the substrate 2011 is composed of a copper layer, a molybdenum layer and a copper layer which are sequentially laminated.

[0067] Exemplarily, as shown in the figure, Figure 2As shown, the semiconductor structure 202 can be bonded on the substrate 2011 and encapsulated in the space formed by the package shell 2012 and the substrate 2011. Some electrodes (for example, source electrodes) of the semiconductor structure 202 can be in conduction with the substrate 2011, and some electrodes (for example, drain electrodes and gate electrodes) of the semiconductor structure 202 can be connected to the pins 204 through the conductive leads 203, the pins 204 being arranged on the insulating layer 205 (for example, an insulating ceramic) which is bonded to the substrate 2011 through an insulating adhesive. In addition, one end of the pin 204 is exposed from the package structure 201 to connect to other circuits.

[0068] Optionally, as Figure 2 As shown, the semiconductor structure 202 can be a field effect transistor. From the doping type of the channel, the field effect transistor can be divided into p-type transistors and n-type transistors. From the spatial dimension, the field effect transistor can include planar field effect transistors (Metal Oxide Semiconductor Field Effect Transistor, MOSFET), fin field effect transistors (Fin Field Effect Transistor, FINFET), and gate-all-around field effect transistors (Gate-All-Around Field-Effect Transistor, GAAFET).

[0069] After the process node of the integrated circuit manufacturing process enters a small size, the thickness of the gate dielectric layer in the gate structure of the semiconductor structure, such as the field effect transistor, is continuously thinned, so that electrons can directly tunnel to cause the gate leakage current to increase. Therefore, a high dielectric metal gate (HKMG) can be used instead of the traditional polysilicon gate in the gate structure, so that the semiconductor gate structure can have a lower gate leakage current at a relatively small size.

[0070] In the related art, the HKMG can include a high dielectric layer and a metal gate formed on the upper surface of the high dielectric layer. The dielectric material used in the high dielectric layer, such as ZrO2, HfO2, etc., has a relatively high dielectric constant compared to SiO2. These materials are defined as high dielectric constant materials, and their equivalent oxide thickness (EOT) is relatively small. Therefore, a high dielectric gate dielectric layer can be formed using a dielectric constant material, and a metal gate can be formed on the upper surface of the gate dielectric layer to ensure the compatibility of the gate dielectric layer and the metal gate.

[0071] Figures 3A-3C A schematic diagram of the state of the HKMG using HfO2 as an example in three process stages is shown. As Figure 3AAs shown, an HfO2 dielectric layer can be deposited on the surface of the SiO2 dielectric layer 301 using the atomic layer deposition (ALD) process. However, the HfO2 dielectric layer 302 generally has many crystal defects and charge traps. Therefore, as... Figure 3B As shown, a post-deposition anneal (PDA) process (200℃~1100℃) is often used first to reduce oxygen vacancies during the deposition of the HfO2 dielectric layer 302. Then, decoupled plasma nitridation (DPN) and post-nitridation anneal (PNA) are employed for nitrogen doping and subsequent annealing to improve the crystallinity and stability of the HfO2 dielectric layer 302. Finally, as... Figure 3C As shown, a barrier layer 303 and other structures, such as a work function layer and a metal gate, are formed on the upper surface of the HfO2 dielectric layer 302. It should be understood that only the first three important steps of the HKMG process are shown; the subsequent formation of the work function layer and metal gate is not shown, but those skilled in the art can obtain the formation process of the subsequent work function layer and metal gate based on relevant technologies.

[0072] However, as Figure 3B As shown, the high dielectric constant material itself is prone to interface defects, and various processing techniques introduce unfavorable oxygen such as free oxygen and unbonded oxygen into the surface of the HfO2 dielectric layer 302. These oxygens not only exist in the HfO2 dielectric layer, but also diffuse into other thin films, leading to changes in the gate threshold and a decrease in carrier mobility of the semiconductor structure, ultimately affecting the electrical performance of HKMG.

[0073] Figure 3D A schematic diagram of unfavorable oxygen diffusion paths on the surface of the HfO2 dielectric layer included in HKMG is shown. (See diagram for example.) Figure 3D As shown, the SiO2 dielectric layer 301, HfO2 dielectric layer 302, and barrier layer 303 are stacked. Therefore, unfavorable oxygen such as free oxygen and unbonded oxygen on the surface of HfO2 dielectric layer 302 can diffuse through two paths. One path is through the barrier layer 303 upwards to the work function layer, causing a change in the work function of the work function layer, which in turn causes a change in the gate threshold voltage of the semiconductor structure. The other path is to diffuse to the lower SiO2 dielectric layer 301. The unfavorable oxygen such as free oxygen and unbonded oxygen diffused to the lower layer has a consuming effect on Si, resulting in an increase in the EOT of the SiO2 dielectric layer, which affects the overall performance of the transistor. The unfavorable oxygen such as free oxygen and unbonded oxygen remaining in the HfO2 dielectric layer 302 can act as defects to form interface dipoles.

[0074] <24P01131CN>

[0075] Causes the carrier mobility to decrease.

[0076] As shown in Figure 3D , the diffusion of free oxygen, unbound oxygen and other adverse oxygen on the surface of the HfO2 dielectric layer 302 can be inhibited by adjusting the thickness of the barrier layer 303, natural absorption of the work function layer and various combinations of high dielectric constant media, etc. The inventors analyzed different inhibition methods and found the following problems:

[0077] First, adjusting the thickness of the barrier layer: when the material used for the barrier layer has strong blocking effect, increasing the thickness of the barrier layer can inhibit the diffusion of oxygen to a certain extent, but if the material used for the barrier layer has high work function and resistance, increasing the thickness of the barrier layer will have too great an impact on the transistor, therefore, adjusting the thickness of the barrier layer has limited inhibition effect on free oxygen, unbound oxygen and other adverse oxygen. For example: TiN has high work function (about 5 eV) and resistance, if the thickness of the TiN barrier layer is increased, it will have a serious impact on the performance of the transistor.

[0078] Second, natural absorption of the work function layer: in large size (such as 28 nm and above) process nodes, the work function layer can be deposited by physical vapor deposition (PVD) process, the work function layer (such as TiAl layer) deposited by PVD process has good affinity to oxygen, therefore, when more free oxygen, unbound oxygen and other adverse oxygen pass through the barrier layer into the work function layer, they are absorbed by the work function layer. However, in small size (such as 28 nm and below) process nodes, the work function layer is formed by atomic layer deposition (ALD) process which has good step coverage, and the work function layer formed by ALD process contains more carbon and nitrogen elements, which reduces the oxygen absorption capacity of the work function layer.

[0079] Third, combination of multiple high dielectric constant media: multiple high dielectric constant doping or combination methods can be used, for example: HfSiON, HfTaO, HfZrO, etc., or HfO2 / ZrO2, HfO2 / In2O3, etc., to reduce the inherent defects of the HfO2 dielectric layer, but this method has high process complexity and will affect the actual dielectric constant of the HfO2 dielectric layer, resulting in a decrease in EOT and thus a decrease in the electrical performance of the HKMG gate structure.

[0080] To solve the above problems, the embodiment of the present application provides a semiconductor structure, which controls the distribution of metal elements with oxygen affinity function in the barrier layer of the gate structure of the HKMG structure, so that the barrier layer not only has good barrier ability, but also can capture free oxygen, unbound oxygen and other harmful oxygen, thereby reducing the diffusion of free oxygen, unbound oxygen and other harmful oxygen into other films, so as to stabilize the gate threshold voltage and carrier mobility of the semiconductor structure, and ensure the electrical performance of the gate structure.

[0081] Figure 4 A basic structure schematic diagram of the semiconductor structure provided by the embodiment of the present application is shown. As shown in the figure, Figure 4 The semiconductor structure 400 provided by the embodiment of the present application includes a substrate 401 and a gate structure 402 formed on the substrate 401. The gate structure 402 can include a first dielectric layer 402A, a first barrier layer 402B and a metal conductive layer 402C formed on the substrate 401 in sequence.

[0082] As shown in the figure, Figure 4 The above substrate 401 can be silicon on an (Silicon-On-Insulator, SOI) insulating substrate on which the active electrode structure 403 and the drain electrode structure 404 are formed, or can be a bulk silicon substrate (Bulk Si). The number of layers of the first barrier layer 402B is one, and can also be multiple layers, and the multiple layers of the first barrier layer 402B can not be in contact, or can be in contact, which are all formed between the upper surface of the first dielectric layer 402A and the lower surface of the metal conductive layer 402C.

[0083] The first barrier layer 402B of the embodiment of the present application contains metal elements with oxygen affinity function, so as to use the oxygen affinity function of the metal elements as the basis for the first barrier layer to capture free oxygen, unbound oxygen and other harmful oxygen. The inventors found that, Figure 4As shown, although the first barrier layer 402B contains a metal element with oxygen-loving properties, when the material distribution of the first barrier layer 402B is relatively uniform, the metal element with oxygen-loving properties cannot fully utilize its oxygen-loving function to suppress the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen. In this case, the concentration distribution of the metal element contained in the first barrier layer 402B can be controlled to ensure the barrier function of the first barrier layer 402B while fully utilizing the oxygen-loving function of the metal element contained in the first barrier layer 402B to capture unfavorable oxygen such as free oxygen and unbonded oxygen. Based on this, in this embodiment, the concentration of the metal element in the part of the first barrier layer 402B near the first dielectric layer 402A is greater than the concentration of the metal element in the part of the first barrier layer 402B far from the first dielectric layer 402A. Here, the metal element concentration can be a molar concentration or a mass percentage concentration, which is not limited here. This setting can further improve the ability of the first barrier layer 402B to capture unfavorable oxygen, thereby improving the device performance. The principle will be described below.

[0084] like Figure 4 As shown, in the gate structure 402, since the concentration of metal elements in the portion of the first barrier layer 402B near the first dielectric layer 402A is greater than the concentration of metal elements in the portion of the first barrier layer 402B far from the first dielectric layer 402A, when unfavorable oxygen such as free oxygen and unbonded oxygen diffuses from the surface of the first dielectric layer 402A toward the metal conductive layer 402C, the concentration of oxygen-loving metal elements in the edge of the first barrier layer 402B near the first dielectric layer 402A is relatively higher than the concentration of metal elements far from the edge of the first dielectric layer 402A. This makes the edge of the first barrier layer 402B near the first dielectric layer 402A more effective at capturing unfavorable oxygen such as free oxygen and unbonded oxygen. Therefore, the first barrier layer can effectively block the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen toward the metal conductive layer, thereby preventing unfavorable oxygen from diffusing into other film layers above the first barrier layer and ensuring the stability of the gate structure threshold voltage.

[0085] It can be seen that, as Figure 4As shown, the semiconductor structure of this application embodiment includes a first barrier layer 402B containing a metal element with oxygen-loving function. The concentration of the metal element in the portion of the first barrier layer 402B close to the first dielectric layer 402A is greater than the concentration of the metal element in the portion of the first barrier layer 402B far from the first dielectric layer 402A. Through this concentration distribution of the metal element contained in the first barrier layer 402B, while ensuring the ability of the first barrier layer 402B to suppress the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen, the possibility of escape of unfavorable oxygen such as free oxygen and unbonded oxygen from the first dielectric layer 402A due to insufficient capture ability of the first barrier layer 402B can be reduced. This suppresses the diffusion range of unfavorable oxygen such as free oxygen and unbonded oxygen, reduces the impact of the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen on the carrier mobility of the semiconductor structure, ensures the stability of the gate threshold voltage, and makes the electrical performance of the semiconductor structure good, thereby improving the stability and reliability of the device.

[0086] Moreover, the above-mentioned method effectively suppresses the diffusion range of free oxygen, unbonded oxygen, and unfavorable oxygen, and the suppression capability is not limited by its own work function. It also does not affect the dielectric constant of the first dielectric layer 402A, thus ensuring the electrical performance of the gate structure 402. Therefore, the semiconductor structure of this application embodiment can be applied to the manufacture of HKMG transistors of 28nm and below.

[0087] Figure 5 A schematic diagram illustrating the principle of the barrier layer capturing unfavorable oxygen according to an embodiment of this application is shown. Figure 5 As shown, on the lower surface of the first barrier layer 402B, that is, the surface of the first barrier layer 402B near the first dielectric layer 402A, metal elements can form metal oxides with unfavorable oxygen such as free oxygen and unbonded oxygen through their own oxygen-loving function. Moreover, since the concentration of metal elements on the surface of the first barrier layer 402B near the first dielectric layer 402A is relatively high, the metal elements can form metal oxides with unfavorable oxygen such as free oxygen and unbonded oxygen to the maximum extent on the surface of the first barrier layer 402B near the first dielectric layer 402A, thereby effectively inhibiting the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen.

[0088] In other words, such as Figure 4 and Figure 5As shown, the high-concentration metal element a in the embodiment of the present application forms a strict adverse oxygen absorption structure on the surface of the first barrier layer 402B close to the first dielectric layer 402A, locks the adverse oxygen b such as free oxygen and unbound oxygen on the surface of the first barrier layer 402B close to the first dielectric layer 402A through the oxygenophilic function, so as to achieve the purpose of capturing the adverse oxygen b such as free oxygen and unbound oxygen. Moreover, since the adverse oxygen b such as free oxygen and unbound oxygen diffusing towards the metal conductive layer 402C is captured by the first barrier layer 402B, the concentration of free adverse oxygen above the first dielectric layer 402A is relatively low, and under this adverse oxygen concentration gradient, more adverse oxygen b such as free oxygen and unbound oxygen diffuses towards the metal conductive layer 402C, so that the first barrier layer 402B can continuously capture the adverse oxygen b such as free oxygen and unbound oxygen diffusing from the first dielectric layer 402A, thereby effectively reducing the downward diffusion of the adverse oxygen b such as free oxygen and unbound oxygen, further reducing the consumption of the lower layer Si, reducing the EOT, reducing the gate leakage current, thereby enhancing the electrical performance of the gate structure, and achieving the problem of inhibiting the increase of the overall resistance of the gate structure 402 caused by the increase of the EOT.

[0089] As shown in Figure 4 and Figure 5 When the first barrier layer 402B is in contact with the upper surface of the first dielectric layer 402A, since the concentration of the metal element contained in the part of the first barrier layer 402B close to the first dielectric layer 402A is greater than the concentration of the metal element contained in the part of the first barrier layer 402B away from the first dielectric layer 402A, the metal element a on the surface of the first barrier layer 402B close to the first dielectric layer 402A can directly bond with the adverse oxygen b such as free oxygen and unbound oxygen on the surface of the first dielectric layer 402A, thereby inhibiting the diffusion range of the adverse oxygen b such as free oxygen and unbound oxygen upwards, which not only can reduce the influence of the adverse oxygen b such as free oxygen and unbound oxygen on the upper film layer of the first barrier layer 402B, ensure the stability of the threshold voltage, but also can reduce the influence of the adverse oxygen b such as free oxygen and unbound oxygen on the first dielectric layer 402A and the lower layer material, ensure the stability of the carrier mobility of the semiconductor structure, reduce the EOT, and make the overall performance of the semiconductor structure not be affected.

[0090] Considering that the absorption of the metal element to the adverse oxygen has a certain saturation, the saturation oxygen absorption rate of the metal element contained in the first barrier layer can be set to be less than a preset oxygen absorption rate, and the change rate of the Schottky barrier of the metal element contained in the first barrier layer is less than a preset change rate as the oxygen absorption amount of the metal element increases. The preset change rate can fluctuate within a certain fluctuation range, which can be determined according to actual conditions.

[0091] In this case, even if the metal elements in the first barrier layer capture the adverse oxygen such as free oxygen, unbound oxygen and the like by the oxygen affinity, it will not have a great impact on the Schottky barrier of the metal elements in the first barrier layer, and therefore, the absorption of the adverse oxygen such as free oxygen, unbound oxygen and the like by the metal elements in the first barrier layer of the embodiments of the present application will hardly affect the resistance of the gate structure, thereby ensuring the electrical performance of the gate structure.

[0092] For example, the metal elements of the embodiments of the present application can include at least one of zirconium metal and titanium element. Taking titanium element as an example, as an oxygenophilic element, the titanium element can absorb up to 35% of its mass of oxygen, and at such an absorption amount, it has substantially no impact on the Schottky barrier of the titanium element, and therefore, when titanium is used as the oxygenophilic functional metal element, the absorption of the adverse oxygen such as free oxygen, unbound oxygen and the like by the first barrier layer has almost no impact on the resistance of the gate structure of the semiconductor structure.

[0093] It can be understood that, Figure 4 The example structure does not constitute a specific limitation on the semiconductor structure. In other embodiments of the present application, the semiconductor structure can include more or fewer components than shown, or combine certain components, or split certain components, or different component arrangements. The components shown can be implemented in hardware, software or a combination of software and hardware.

[0094] In an optional manner, as Figure 4 The material of the first dielectric layer 402A of the embodiments of the present application can include high dielectric constant material, and the high dielectric constant material includes one or more of HfO2, Al2O3, ZrO2, HfSiO, La2O3, HfSiON and HfAlO2.

[0095] The high dielectric constant material described above can increase the physical thickness of the first dielectric layer while keeping the gate capacitance unchanged, so as to achieve the purpose of reducing the gate leakage current and improving the reliability of the device. However, since the high-k material is mostly metal ion oxide and has no fixed atomic coordination, a large number of interface defects can easily occur between the first dielectric layer formed of the high-k material and the underlying film layer, and the interface defects can combine with oxygen to produce interstitial oxygen ions, i.e. adverse oxygen such as free oxygen or unbound oxygen, which can diffuse to other film layers. In this case, the semiconductor structure combined with the technical solution of the present application can inhibit the diffusion of the adverse oxygen while keeping the performance of the first dielectric layer made of high dielectric constant material, thereby enhancing the stability and reliability of the device.

[0096] Figure 6A Another basic structure schematic diagram of the semiconductor structure of the embodiments of the present application is shown. As Figure 6AAs shown, the gate structure 402 of this embodiment may further include a second dielectric layer 402D, which may be made of common dielectric materials such as alumina, silicon oxide, and silicon oxynitride. The second dielectric layer 402D is formed between the substrate 401 and the second dielectric layer 402D, and the dielectric constant of the second dielectric layer 402D is less than the dielectric constant of the first dielectric layer 402A.

[0097] For example: Figure 6A As shown, when the first dielectric layer 402A is an HfO2 dielectric layer, the second dielectric layer 402D is SiO2, and the first barrier layer 402B in contact with the first dielectric layer 402A has titanium elements with oxygen affinity, Figure 6B A schematic diagram of the interface state between the HfO2 dielectric layer and the TiN barrier layer in an embodiment of this application is shown. Figure 6B As shown, the surface of the HfO2 dielectric layer 601 contains unfavorable oxygen elements such as free oxygen and unbonded oxygen (e.g., free oxygen, unbonded oxygen, etc.). Figure 6B The white ring-shaped object shown can be locked in the form of TiOx at the HfO2 / Ti interface formed by the HfO2 dielectric layer 601 and the TiN barrier layer 602, thereby inhibiting the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen to the upper TiN barrier layer 602, reducing the impact of unfavorable oxygen such as free oxygen and unbonded oxygen on the HfO2 dielectric layer 601 and the lower SiO2 material, reducing the possibility of a decrease in carrier mobility, and at the same time, reducing EOT and reducing gate leakage current, thereby enhancing the electrical performance of the gate structure.

[0098] In addition, the first barrier layer 402B, which is in contact with the upper surface of the first dielectric layer 402A, can not only effectively reduce the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen to the metal conductive layer 402C, but also reduce the diffusion of unfavorable oxygen such as free oxygen and unbonded oxygen to the lower surface of the first dielectric layer 402A (i.e. the surface of the first dielectric layer 402A away from the metal conductive layer 402C) and the lower thin film, thereby facilitating the thinning of the lower second dielectric layer 402D and better realizing the miniaturization of the semiconductor structure.

[0099] In one alternative approach, such as Figure 4 and Figure 6A As shown, the first barrier layer 402B in this embodiment contains both metal and nitrogen elements. The concentration of nitrogen in the portion of the first barrier layer 402B near the first dielectric layer 402A is lower than the concentration of nitrogen in the portion of the first barrier layer far from the first dielectric layer.

[0100] like Figure 4 and Figure 6AAs shown, when the concentration of nitrogen element contained in the portion of the first barrier layer 402B close to the first dielectric layer 402A is less than the concentration of metal element contained in the portion of the first barrier layer 402B close to the first dielectric layer 402A, the first barrier layer 402B can sufficiently exert the oxygen affinity of the metal element at the portion close to the first dielectric layer 402A, ensuring the diffusion inhibition ability of the first barrier layer 402B to free oxygen and unbound oxygen.

[0101] As shown in FIG. 4B, the first barrier layer 402B is made of a material containing metal element and nitrogen element. The concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, and the concentration of the nitrogen element contained in the first barrier layer 402B is gradually increased along the direction away from the first dielectric layer 402A. Figure 4 Figure 6A As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate.

[0102] As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate. Figure 4 As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate.

[0103] Figure 4 As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate. Figure 6A As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate.

[0104] Figure 4 As shown, when the concentration of the metal element contained in the first barrier layer 402B is gradually reduced along the direction away from the first dielectric layer 402A, the diffusion inhibition ability of the first barrier layer 402B to the adverse oxygen is gradually increased along the direction close to the first dielectric layer 402A, so that the first barrier layer 402B can control the diffusion of the adverse oxygen as much as possible at the portion close to the first dielectric layer 402A, thereby avoiding the diffusion of the adverse oxygen in the direction away from the first dielectric layer 402A of the first barrier layer 402B, and further reducing the influence on the threshold voltage of the gate. Figure 6A ​​​As shown, when the nitrogen concentration in the first barrier layer 402B increases in the direction away from the first dielectric layer 402A, the blocking ability of the first barrier layer 402B gradually increases in the direction away from the first dielectric layer 402A. Therefore, the first barrier layer 402B can control the influence range of the fabrication process of the film layer above the first barrier layer 402B (e.g., the metal conductive layer 402C) as far away from the first dielectric layer 402A as possible, so as to effectively protect the film layer below the first barrier layer 402B (e.g., the first dielectric layer 402A) from the adverse effects of subsequent processes.

[0105] Let's take titanium nitride as an example to illustrate, such as Figure 4 and Figure 6A As shown, when the material of the first barrier layer 402B is titanium nitride, as the concentration of titanium in the titanium nitride decreases or as the concentration of nitrogen in the titanium nitride increases, the main growth orientation of the titanium nitride crystal gradually transitions from the (200) plane to the (111) plane, and the defects in the first barrier layer 402B formed by titanium nitride also change from more to less along the direction away from the first dielectric layer 402A. In this case, as... Figure 4 and Figure 6A As shown, in the portion of the first barrier layer 402B near the first dielectric layer 402A, there is a higher concentration of titanium and a lower concentration of nitrogen. In this case, the lattice structure of the first barrier layer 402B formed by nitrogen and titanium exhibits the following characteristics: Figure 7 The diagram shows a higher concentration of titanium and a lower concentration of nitrogen. Furthermore, the first barrier layer 402B has numerous defects in this area, making it easier for titanium to be exposed. Therefore, the exposed titanium in the first barrier layer 402B near the first dielectric layer 402A can fully utilize its oxygen-loving function to capture undesirable oxygen elements such as free oxygen and unbonded oxygen, thus ensuring the electrical performance of the semiconductor structure. It should be understood that... Figure 7 The 402B lattice structure of the first barrier layer shown is for illustration only; the actual lattice structure is mainly for testing purposes.

[0106] like Figure 4 and Figure 6A As shown, in the portion of the first barrier layer 402B far from the first dielectric layer 402A, there is less titanium and more nitrogen. In this case, the crystal structure of the first barrier layer 402B formed by nitrogen and titanium exhibits the following characteristics: Figure 8 In the case shown, where nitrogen is abundant and titanium is scarce, the first barrier layer 402B has fewer defects and is very dense in this area, making it less likely for titanium to be exposed. Therefore, the portion of the first barrier layer 402B furthest from the first dielectric layer 402A provides good protection for the first dielectric layer 402A, preventing subsequent film layer processes from affecting it. It should be understood that... Figure 8The lattice structure of the first barrier layer 402B shown is only for illustration, and the actual lattice structure is mainly tested.

[0107] In another alternative, as shown in Figure 4 and Figure 6A The embodiment of the present application includes that the first barrier layer 402B can include multiple barrier sub-layers, and the nitrogen element and the metal element in each barrier sub-layer are uniformly distributed, that is, the same barrier sub-layer contains a single concentration of nitrogen element and a single concentration of metal element. The single concentration here can mean that the concentration in the same barrier sub-layer is equal or close to equal. The concentration of nitrogen element and the concentration of metal element contained in each barrier sub-layer are different from the concentration of nitrogen element and the concentration of metal element contained in other barrier sub-layers.

[0108] As shown in Figure 4 and Figure 6A Considering that the distance between the different barrier sub-layers included in the first barrier layer 402B and the first dielectric layer 402A is different, and the probability of diffusion of harmful oxygen such as free oxygen and unbound oxygen into the barrier sub-layer far away from the first barrier layer 402B is relatively small, the concentration of metal element contained in the multiple barrier sub-layers included in the first barrier layer 402B can be set to decrease from large to small along the direction away from the first dielectric layer 402A, and the concentration of nitrogen element contained in the multiple barrier sub-layers included in the first barrier layer 402B can be set to increase from small to large along the direction away from the first dielectric layer 402A, so as to ensure the overall barrier ability of the first barrier layer 402B.

[0109] In some embodiments, the molar ratio of the metal element to the nitrogen element contained in the barrier sub-layer closest to the first dielectric layer in the multiple barrier sub-layers is greater than 1 and less than or equal to 1.1, and the molar ratio of the metal element to the nitrogen element contained in the barrier sub-layer farthest from the first dielectric layer in the multiple barrier sub-layers is greater than or equal to 0.9 and less than 1. By setting in this way, it is beneficial to enhance the capture ability of harmful oxygen and improve the performance of the device.

[0110] In some embodiments, as shown in Figure 4 and Figure 6AAs shown, the first barrier layer 402B includes a first barrier sub-layer 402B1 and a second barrier sub-layer 402B2, the first barrier sub-layer 402B1 is close to the first dielectric layer 402A, and the second barrier sub-layer 402B2 is away from the first dielectric layer 402A. In this case, the first barrier sub-layer 402B1 contains a larger concentration of metal elements and a smaller concentration of nitrogen elements than the second barrier sub-layer 402B2, which can be referred to as a metal-rich layer. Here, the metal-rich layer can be considered to have the highest concentration of metal elements among all the barrier sub-layers of the first barrier layer 402B, relative to other elements (relative to nitrogen elements). The second barrier sub-layer 402B2 contains a smaller concentration of metal elements and a larger concentration of nitrogen elements than the first barrier sub-layer 402B1, which can be referred to as a nitrogen-rich layer. Here, the nitrogen-rich layer can be considered to have the highest concentration of nitrogen elements among all the barrier sub-layers of the first barrier layer 402B, relative to other elements (such as metal elements).

[0111] As shown in Figure 4 and Figure 6A Since the first barrier sub-layer 402B1 is close to the first dielectric layer 402A and has a high concentration of metal elements, in the formed first barrier sub-layer 402B1, the proportion of metal elements in the crystal lattice formed by nitrogen elements and metal elements is relatively high, so that the first barrier sub-layer 402B1 can fully play the chemical oxygen absorption activity and fully capture harmful oxygen such as free oxygen and unbound oxygen. Since the second barrier sub-layer 402B2 is away from the first dielectric layer 402A and has a high concentration of nitrogen elements, the second barrier sub-layer 402B2 can avoid the influence of the film layer forming process above the first barrier layer 402B on the film layer below the first barrier layer 402B, and ensure the electrical performance of the semiconductor device.

[0112] In addition, considering that the nitrogen elements and metal elements in each barrier sub-layer are uniformly distributed, and the concentration of metal elements and the concentration of nitrogen elements contained in different barrier sub-layers are different, when preparing a certain barrier sub-layer, the process conditions are kept fixed, and when preparing the next barrier sub-layer, the process conditions are changed. For example: the first barrier sub-layer can be prepared by a first deposition process, and then the second barrier sub-layer can be prepared by a second deposition process, wherein the process conditions of the first deposition process and the second deposition process are different, and the process conditions of the first deposition process are changed to the process conditions of the second deposition process when preparing the second barrier sub-layer.

[0113] For example: as shown in Figure 4 and Figure 6AAs shown, when the molar ratio of metal elements to nitrogen elements in the first barrier sublayer 402B1 is greater than 1 and less than or equal to 1.1, the first barrier sublayer 402B1 has a relatively good ability to capture unfavorable oxygen such as free oxygen and unbonded oxygen. When the molar ratio of metal elements to nitrogen elements in the second barrier sublayer 402B2 is greater than or equal to 0.9 and less than 1, the second barrier sublayer 402B2 has a good barrier ability and can effectively protect the first dielectric layer 402A from the influence of subsequent film preparation processes.

[0114] For example: Figure 4 and Figure 6A As shown, the thickness of the first barrier sublayer 402B1 can be set to be 1 / 3 to 1 / 2 of the thickness of the first barrier layer 402B, while the thickness of the second barrier sublayer 402B2 can be 1 / 2 to 2 / 3 of the thickness of the first barrier layer 402B, thereby balancing the barrier capability of the first barrier layer 402B to the impact on subsequent processes and its ability to capture unfavorable oxygen such as free oxygen and unbonded oxygen.

[0115] Figure 9 A schematic diagram of a specific semiconductor structure according to an embodiment of this application is shown. For example... Figure 9 As shown, the semiconductor structure 900 of this application embodiment may include a substrate 901 and a gate structure 902. The gate structure 902 includes not only a first dielectric layer 902A1, a first barrier layer 902B1, and a metal conductive layer 902C, but may also include an etch stop layer 902D, a work function layer 902E, and a second barrier layer 902B2 sequentially disposed between the first barrier layer 902B1 and the metal conductive layer 902C along a direction away from the substrate 901. Here, the material of the etch stop layer 902D may include TaN, SiCN, etc., the material of the work function layer 902E may include TiAl, etc., and the material of the metal conductive layer 902C may be Cu, W, etc.

[0116] It should be noted that, as Figure 9 As shown, the substrate 901 described above has a source structure 903 and a drain structure 904, as described above. The first dielectric layer 902A1, the first barrier layer 902B1 and the second barrier layer 902B2 can also be described above. Alternatively, the first barrier layer 902B1 can be described above, while the second barrier layer 902B2 can be formed using conventional processes and materials.

[0117] For example, such as Figure 9As shown, the first barrier layer 902B1 and the second barrier layer 902B2 can both contain metal elements with oxygen affinity, or one of them contains metal elements, for example, the first barrier layer 902B1 contains metal elements with oxygen affinity, while the second barrier layer 902B2 does not contain metal elements with oxygen affinity. In this case, the metal elements contained in the surface of the first barrier layer 902B1 close to the first dielectric layer 902A1 can combine with the free oxygen, unbound oxygen and other harmful oxygen on the surface of the first dielectric layer 902A1, thereby better inhibiting the problem of free oxygen, unbound oxygen and other harmful oxygen passing through the first barrier layer 902B1 and the etching stop layer 902D into the work function layer 902E, causing the threshold voltage to change. Moreover, the first dielectric layer 902A1 itself has less free oxygen, unbound oxygen and other harmful oxygen, which can reduce the defects of the first dielectric layer 902A1, thereby ensuring normal carrier mobility and reducing the possibility of carrier mobility reduction.

[0118] As shown, Figure 9 The semiconductor structure 900 of the embodiment of the present application can also include a second dielectric layer 902A2 between the substrate 901 and the first dielectric layer 902A1, and the second dielectric layer 902A2 is located between the upper surface of the substrate 901 and the lower surface of the first dielectric layer 902A1. In this case, since the metal elements contained in the surface of the first barrier layer 902B1 close to the first dielectric layer 902A1 can combine with the free oxygen, unbound oxygen and other harmful oxygen on the surface of the first dielectric layer 902A1, the possibility of diffusion of free oxygen, unbound oxygen and other harmful oxygen from the first dielectric layer 902A1 to the second dielectric layer 902A2 can be reduced, thereby reducing the problem of Si consumption and EOT increase of the second dielectric layer 902A2, and thus the first barrier layer 902B1 of the embodiment of the present application can prevent the EOT increase of the second dielectric layer 902A2 and affect the overall performance of the semiconductor structure.

[0119] The embodiment of the present application also provides a preparation method of a semiconductor structure, which can prepare the semiconductor structure of the embodiment of the present application, and the effects of the semiconductor structure can be referred to the foregoing description.

[0120] Figure 10 The preparation method of the semiconductor structure of the embodiment of the present application is shown in the flowchart. As shown in Figure 10 The preparation method of the semiconductor structure of the embodiment of the present application can include:

[0121] Step 1001: providing a substrate, the substrate having a gate formation region. The substrate can be an SOI substrate defining a gate formation region, or a bulk silicon substrate defining a gate formation region. The gate formation region can be defined on the substrate by etching process or other process.

[0122] Step 1002: A first dielectric layer is formed on the substrate at the location of the gate formation region. The material of the first dielectric layer can be a high dielectric constant material.

[0123] Step 1003: A first barrier layer is formed on the first dielectric layer. The first barrier layer contains a metal element with oxygen affinity. The concentration of the metal element in the part of the first barrier layer near the first dielectric layer is greater than the concentration of the metal element in the part of the first barrier layer far from the first dielectric layer.

[0124] Step 1004: Form a metal conductive layer on the first barrier layer. When a gate-before-gate process is used to fabricate a semiconductor structure, the substrate has a gate formation region, but no source or drain structure is formed. In this case, after forming the gate structure, the semiconductor structure fabrication method of this embodiment can also refer to related technologies to form the source and drain structures on the substrate to obtain the desired semiconductor structure. When a gate-after-gate process is used to fabricate a semiconductor structure, the substrate has a gate formation region, and also forms source and drain structures. Therefore, after forming the gate structure, the semiconductor structure fabrication can be completed.

[0125] In one alternative approach, Figures 11A-11C The diagram illustrates the state of the gate structure at different process stages according to embodiments of this application. Forming the gate structure at the location of the gate formation region on the substrate, according to embodiments of this application, may include:

[0126] like Figure 11A As shown, a first dielectric layer 1103 is formed at the location of the gate formation region on the substrate 1101. The material of the first dielectric layer 1103 can be referred to the previous text and will not be repeated here.

[0127] like Figure 11A As shown, when a first dielectric layer 1103 is deposited on the substrate 1101 at the location of the gate formation region, the deposition method can be atomic layer deposition (ALD) or other deposition methods, such as chemical vapor deposition (CVD). It should be understood that a second dielectric layer 1102 can be formed in advance at the location of the gate formation region on the substrate 1101, and then the first dielectric layer 1103 is formed on the surface of the second dielectric layer 1102 facing away from the substrate 1101.

[0128] like Figure 11A As shown, after depositing the first dielectric layer 1103 using processes such as all-atom layer deposition, if the first dielectric layer 1103 has many defects and charge traps, it can be as follows: Figure 11B As shown, the PNA process is first used to reduce oxygen vacancies during the deposition process, and then the DPN and PNA processes are combined to improve crystallinity and enhance the stability of the first dielectric layer 1103.

[0129] As shown in FIG. 11A, a first blocking layer 1104 is formed on the first dielectric layer 1103. The first blocking layer 1104 can be one layer or multiple layers. For each layer of the first blocking layer 1104, a physical vapor deposition or atomic layer deposition process can be used for deposition. Figure 11C As shown in FIG. 11B, when the first blocking layer 1104 is one layer, the first blocking layer 1104 contains both metal elements and nitrogen elements. The concentration of the metal elements in the part of the first blocking layer 1104 close to the first dielectric layer 1103 is greater than the concentration of the metal elements in the part of the first blocking layer 1104 away from the first dielectric layer 1103.

[0130] Figure 11C As shown in FIG. 11C, when the first blocking layer 1104 is one layer, the first blocking layer 1104 contains both metal elements and nitrogen elements. The concentration of the nitrogen elements in the part of the first blocking layer 1104 close to the first dielectric layer 1103 is greater than the concentration of the nitrogen elements in the part of the first blocking layer 1104 away from the first dielectric layer 1103.

[0131] In some embodiments, as shown in FIG. 11D, the method for forming the first blocking layer 1104 of the embodiments of the present application can include: forming a first blocking sub-layer 1104a on the first dielectric layer 1103 by a first deposition process, and forming a second blocking sub-layer 1104b on the first blocking sub-layer 1104a by a second deposition process. Figure 11C As shown in FIG. 11E, the first blocking sub-layer 1104a contains a large concentration of metal elements and a small concentration of nitrogen elements. The first blocking sub-layer 1104a can be a metal-rich layer, which can be used to capture and adsorb free oxygen, unbound oxygen and other harmful oxygen, thereby inhibiting oxygen diffusion, ensuring stable gate threshold voltage, reducing the concentration of free oxygen, unbound oxygen and other harmful oxygen remaining in the first dielectric layer 1103, reducing the possibility of carrier mobility reduction, inhibiting EOT increase, and ensuring the overall performance of the semiconductor structure. The second blocking sub-layer 1104b contains a small concentration of metal elements and a large concentration of nitrogen elements. The second blocking sub-layer 1104b can be a nitrogen-rich layer, which can be used to protect the first dielectric layer 1103 from subsequent processes.

[0132] Figure 11C In actual applications, as shown in FIG. 11F, when the first blocking layer contains both metal elements and nitrogen elements, the material of the first blocking sub-layer is a metal nitride. In order to form the first blocking sub-layer 1104a as a metal-rich layer and the second blocking sub-layer 1104b as a nitrogen-rich layer, the process conditions of the first deposition process and the process conditions of the second deposition process can be determined by the hysteresis curve of the metal nitride. The process conditions of the first deposition process and the process conditions of the second deposition process include nitrogen flow rate and power voltage, and the nitrogen flow rate and power voltage of the first deposition process and the second deposition process are different.

[0133] In actual applications, as shown in FIG. 11F, when the first blocking layer contains both metal elements and nitrogen elements, the material of the first blocking sub-layer is a metal nitride. In order to form the first blocking sub-layer 1104a as a metal-rich layer and the second blocking sub-layer 1104b as a nitrogen-rich layer, the process conditions of the first deposition process and the process conditions of the second deposition process can be determined by the hysteresis curve of the metal nitride. The process conditions of the first deposition process and the process conditions of the second deposition process include nitrogen flow rate and power voltage, and the nitrogen flow rate and power voltage of the first deposition process and the second deposition process are different. Figure 11C In actual applications, as shown in FIG. 11F, when the first blocking layer contains both metal elements and nitrogen elements, the material of the first blocking sub-layer is a metal nitride. In order to form the first blocking sub-layer 1104a as a metal-rich layer and the second blocking sub-layer 1104b as a nitrogen-rich layer, the process conditions of the first deposition process and the process conditions of the second deposition process can be determined by the hysteresis curve of the metal nitride. The process conditions of the first deposition process and the process conditions of the second deposition process include nitrogen flow rate and power voltage, and the nitrogen flow rate and power voltage of the first deposition process and the second deposition process are different.

[0134] ​​The process conditions for the first deposition process may include a first nitrogen flow rate and a first power supply voltage. When the increase rate of the first power supply voltage is less than a preset increase rate as the first nitrogen flow rate increases, the concentration of metal elements in the first barrier sublayer is greater than the concentration of nitrogen elements. Here, the preset increase rate can be controlled within a certain range.

[0135] The process conditions for the second deposition process may include a second nitrogen flow rate and a second power supply voltage. When the increase rate of the second power supply voltage is less than a preset increase rate as the second nitrogen flow rate increases, the metal element concentration in the second barrier layer is less than or equal to the nitrogen element concentration. Here, the preset increase rate can be controlled within a certain range.

[0136] In practical applications, the first and second process conditions can be determined by analyzing the slope of the hysteresis curve of the metal nitride obtained from the deposition process at different locations. The following description uses titanium nitride as a barrier layer material to illustrate the process of determining the first and second process conditions.

[0137] Figure 12 A schematic diagram of the hysteresis curve using titanium nitride as an example from an embodiment of this application is shown. Figure 12 As shown, with the increase of nitrogen flow rate ( Figure 12 (In the direction of the X arrow), the voltage of the power supply increases accordingly. Figure 12 (In the direction of the Y arrow in the middle) The concentration of titanium in titanium nitride prepared by the deposition process gradually decreases, and the rate of decrease is slow. When the voltage of the power supply and the flow rate of nitrogen gas increase to a certain extent, the concentration of titanium in titanium nitride prepared by the deposition process decreases rapidly, and the concentration of nitrogen gas also increases rapidly. When the voltage of the power supply and the flow rate of nitrogen gas further increase to a certain extent, the rate of decrease of the concentration of titanium in titanium nitride prepared by the deposition process slows down again until the concentration of titanium and nitrogen in titanium nitride basically no longer changes.

[0138] In practical applications, the slope of the hysteresis curve of titanium nitride can be calculated at various positions, and then the regions with slopes less than a preset slope can be selected. This preset frequency can be determined according to the actual situation, for example: Figure 12As shown, the hysteresis curve of titanium nitride is divided into three sections, i.e. a Rich-Ti section, a Ti / N section and a Rich-N section according to the slope, wherein the process parameters in the Rich-Ti section are suitable for preparing a titanium-rich titanium nitride layer, and the process parameters in the Rich-N section are suitable for preparing a nitrogen-rich titanium nitride layer. Therefore, when the process window of the process conditions of the first deposition process is in the Rich-Ti section and the process window of the process conditions of the second deposition process is in the Rich-N section, the first barrier sublayer with a relatively high titanium concentration and the second barrier sublayer with a relatively high nitrogen concentration can be formed. The lattice of the first barrier sublayer can refer to Figure 7 The lattice of the second barrier sublayer can refer to Figure 8 When the process window of the process conditions of the deposition process is in the transition section (Ti / N) between the Rich-Ti section and the Rich-N section, as shown in Figure 13 As shown, the titanium element in the prepared titanium nitride layer is bound in the titanium nitride lattice and cannot effectively absorb oxygen, and the film formed thereby has poor compactness. Therefore, the transition process window corresponding to the transition section (Ti / N) is not used as the process conditions of the first deposition process and the process conditions of the second deposition process.

[0139] For example, when the power supply of the process conditions of the first deposition process and the process conditions of the second deposition process is a direct current power supply, the direct current power of the direct current power supply is greater than 0 W and less than or equal to 800 W; when the power supply of the process conditions of the first deposition process and the process conditions of the second deposition process is a radio frequency power supply, the power of the radio frequency power supply is greater than 0 W and less than or equal to 1500 W. At the same time, the first nitrogen flow rate included in the process conditions of the first deposition process is less than the second nitrogen flow rate included in the process conditions of the second deposition process.

[0140] For example, the first nitrogen flow rate included in the process conditions of the first deposition process has a value range of 15 sccm to 20 sccm, and the nitrogen flow rate included in the process conditions of the second deposition process has a value range of 32 sccm to 40 sccm. In this case, the first barrier sublayer has a formation time range of 2 s to 10 s, and the second barrier sublayer has a formation time range of 15 s to 20 s. For another example, when the physical vapor deposition process is used to form the first barrier sublayer and the second barrier sublayer, argon gas can be used to generate plasma gas, and the flow rate of the argon gas has a value range of 12 sccm to 15 sccm, for example, 12 sccm, 13 sccm or 15 sccm.

[0141] To reduce the process complexity, the first barrier sub-layer and the second barrier sub-layer are formed in the same process chamber, and after the first barrier sub-layer is formed above the first dielectric layer under the process conditions of the first deposition process, the method of the present application embodiment can further include: changing the process conditions to change the first deposition process to the second deposition process when the vacuum degree of the process chamber is greater than or equal to the preset vacuum degree. The preset vacuum degree here can refer to the vacuum degree used by the process chamber under the process conditions of the first deposition process, or a vacuum degree slightly different from the vacuum degree used by the process conditions of the first deposition process. For example: when the first barrier layer with TiN as the material is deposited by adopting the sub-station step-by-step deposition, not only the process time is increased, but also there is a broken vacuum in the middle, which causes the first barrier sub-layer to absorb oxygen in advance, thereby reducing the oxygen absorption capacity of the prepared first barrier layer; when the process conditions are changed to change the first deposition process to the second deposition process when the vacuum degree of the process chamber is greater than or equal to the preset vacuum degree, it is beneficial to maintain the quality of the prepared first barrier layer, so as to better achieve the above beneficial effects of the present application embodiment.

[0142] It should be noted that when the semiconductor structure of the present application embodiment includes the first barrier layer and the second barrier layer, the semiconductor structure further includes an etching stop layer and a work function layer. It should be understood that the preparation method of the first barrier layer and the second barrier layer can be prepared according to the related method described above, or the first barrier layer can be prepared according to the related description above, and the second barrier layer can be prepared on the first barrier layer according to the related description above. Figure 12 The transition window (Ti / N) shown in the transition process window is prepared. In this case, after the first barrier layer is formed on the first dielectric layer, before the metal conductive layer is formed above the first barrier layer, the preparation method of the semiconductor structure of the present application embodiment can further include: forming an etching stop layer on the first barrier layer, then forming a work function layer on the etching stop layer, and then forming a second barrier layer on the work function layer.

[0143] <24P01131CN>

[0144] The present application embodiment also provides an integrated circuit, which can include a semiconductor structure having a substrate and a gate structure formed on the substrate, the gate structure including a first dielectric layer, a first barrier layer and a metal conductive layer formed in sequence on the substrate, the first barrier layer containing a metal element with oxygen affinity function, the concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer being greater than the concentration of the metal element contained in the part of the first barrier layer away from the first dielectric layer.

[0145] In the above description, the technical details of the patterning, etching, etc. of each layer are not described in detail. However, it should be understood by those skilled in the art that the layers, regions, etc. of the desired shape can be formed by various technical means. In addition, those skilled in the art can also design methods that are not exactly the same as the methods described above in order to form the same structure. In addition, although each embodiment is described separately above, this does not mean that the measures in each embodiment cannot be used advantageously in combination.

[0146] The embodiments of the present disclosure are described above. However, these embodiments are only for illustrative purposes, and are not intended to limit the scope of the present disclosure. The scope of the present disclosure is defined by the appended claims and their equivalents. Without departing from the scope of the present disclosure, those skilled in the art can make various substitutions and modifications, which should all fall within the scope of the present disclosure.

Claims

1. A semiconductor structure, characterized by, The semiconductor structure comprises a substrate and a gate structure formed on the substrate, the gate structure comprises a first dielectric layer, a first barrier layer and a metal conductive layer formed on the substrate in sequence; The first barrier layer contains a metal element with oxygen affinity function, the concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the metal element contained in the part of the first barrier layer far from the first dielectric layer.

2. The semiconductor structure of claim 1, wherein, The first barrier layer contains the metal element and nitrogen element at the same time, the concentration of the nitrogen element contained in the part of the first barrier layer close to the first dielectric layer is less than the concentration of the nitrogen element contained in the part of the first barrier layer far from the first dielectric layer.

3. The semiconductor structure of claim 2, wherein, The concentration of the metal element contained in the first barrier layer decreases along the direction away from the first dielectric layer, and the concentration of the nitrogen element contained in the first barrier layer increases along the direction away from the first dielectric layer; and / or The concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the nitrogen element contained in the same part, and the concentration of the nitrogen element contained in the part of the first barrier layer far from the first dielectric layer is greater than or equal to the concentration of the metal element contained in the same part.

4. The semiconductor structure of claim 2, wherein, The first barrier layer comprises a plurality of barrier sublayers, the metal element and the nitrogen element in each of the barrier sublayers are uniformly distributed, the concentration of the metal element of the plurality of barrier sublayers decreases along the direction away from the first dielectric layer, and the concentration of the nitrogen element of the plurality of barrier sublayers increases along the direction away from the first dielectric layer.

5. The semiconductor structure of claim 4, wherein, The barrier sublayer closest to the first dielectric layer among the plurality of barrier sublayers contains the metal element and the nitrogen element in a molar ratio greater than 1 and less than or equal to 1.1, and the barrier sublayer farthest from the first dielectric layer among the plurality of barrier sublayers contains the metal element and the nitrogen element in a molar ratio greater than or equal to 0.9 and less than 1.

6. The semiconductor structure of claim 1, wherein, The material of the first dielectric layer comprises a high dielectric constant material, and the high dielectric constant material comprises one or more of HfO2, Al2O3, ZrO2, HfSiO, La2O3, HfSiON and HfAlO2.

7. The semiconductor structure of claim 1, wherein, The metal element comprises at least one of zirconium and titanium.

8. The semiconductor structure according to any one of claims 1 to 7, characterized in that The gate structure further comprises a second dielectric layer between the substrate and the first dielectric layer, and an etching stop layer, a work function layer and a second barrier layer arranged between the first barrier layer and the metal conductive layer in sequence along the direction away from the substrate.

9. A method of fabricating a semiconductor structure, characterized by, Comprise: A substrate is provided, the substrate has a gate forming area; A first dielectric layer is formed on the part of the substrate located in the gate forming area; A first barrier layer is formed on the first dielectric layer, the first barrier layer contains a metal element with oxygen affinity function, the concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the metal element contained in the part of the first barrier layer far from the first dielectric layer; A metal conductive layer is formed on the first barrier layer.

10. The method of claim 9, wherein the semiconductor structure is prepared by a method comprising: The step of forming the first barrier layer comprises: forming a first barrier sub-layer on the first dielectric layer by a first deposition process; forming a second barrier sub-layer on the first barrier sub-layer by a second deposition process; wherein the nitrogen flow rate and the power voltage of the first deposition process and the second deposition process are different.

11. The method of claim 10, wherein the semiconductor structure is prepared by a method comprising: The first barrier sub-layer and the second barrier sub-layer are formed in the same process cavity.

12. An integrated circuit, characterized by A semiconductor structure includes a substrate and a gate structure formed on the substrate, the gate structure includes a first dielectric layer, a first barrier layer and a metal conductive layer formed on the substrate in sequence, the first barrier layer contains a metal element with oxygen affinity function, and the concentration of the metal element contained in the part of the first barrier layer close to the first dielectric layer is greater than the concentration of the metal element contained in the part of the first barrier layer away from the first dielectric layer.

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