Multi-channel EIS charging and discharging in-situ test system and method

Abstract

The invention relates to the technical field of charge and discharge detection, and discloses a multichannel EIS charge and discharge in-situ test system and method, and the system comprises a DC charge and discharge module which is used for carrying out the constant-current, constant-voltage or cyclic charge and discharge test of a battery; the alternating current impedance test module is connected in parallel with the direct current charging and discharging module and is used for applying an alternating current disturbance signal to the battery and collecting impedance response in the charging and discharging process; and the unified clock module is used for providing a synchronous triggering reference signal for the direct current charging and discharging module and the alternating current impedance test module. The direct current charging and discharging module and the alternating current impedance test module are designed to be of a parallel connection normally-connected structure, no relay switching is needed, continuous and uninterrupted online EIS test in the charging and discharging process is achieved, contact resistance drift and transient errors caused by physical circuit switching in a traditional scheme are effectively avoided, and the reliability of the EIS test is improved. And the stability and repeatability of the test are obviously improved.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of charge and discharge detection, and in particular to a multi-channel EIS charge and discharge in-situ test system and method. BACKGROUND

[0002] Currently, the electrochemical impedance spectroscopy test in the battery charge and discharge process usually adopts a time-sharing switching mode of direct current charge and discharge and alternating current impedance measurement, that is, a relay or a physical switch is used to switch between the charge and discharge circuit and the EIS test circuit.

[0003] This mode is prone to introduce contact resistance drift, transient error and test interruption during switching, resulting in poor stability and low repeatability of impedance measurement, and it is difficult to realize continuous and online impedance monitoring during dynamic charge and discharge, which limits the accuracy and efficiency of real-time battery state evaluation and performance research.

[0004] The existing patent discloses a dynamic EIS test method based on a charge and discharge device and related equipment (CN120314816A). In this prior art, there are problems of test interruption, contact resistance drift and transient error caused by using a relay to charge and discharge and time-sharing switching with the EIS test circuit. SUMMARY

[0005] The present application provides a multi-channel EIS charge and discharge in-situ test system and method to solve the existing technical problems, which solves the problem that high-frequency signals are easily affected by channel-to-channel crosstalk and ground loop noise.

[0006] To solve the above technical problems, according to one aspect of the present application, more specifically, a multi-channel EIS charge and discharge in-situ test system, comprising: A direct current charge and discharge module for performing constant current, constant voltage or cyclic charge and discharge test on a battery; An alternating current impedance test module connected in parallel with the direct current charge and discharge module, for applying an alternating current disturbance signal to the battery and collecting impedance response during charge and discharge; The direct current charge and discharge module and the alternating current impedance test module adopt a parallel constant connection structure, without any relay or physical switch switching, and by controlling the charge and discharge module in a high output impedance state, the EIS module directly superimposes an alternating current signal to the test circuit. Avoiding the contact resistance drift, transient error and test interruption caused by relay switching, continuous and online EIS test during charge and discharge is realized, and the stability and repeatability of the test are improved.

[0007] A unified clock module for providing a synchronous trigger reference signal for the direct current charge and discharge module and the alternating current impedance test module; A data acquisition module is configured to synchronously acquire current and voltage data of the charging and discharging process and impedance spectrum data of the AC impedance test module; A host computer software control module is in communication connection with the DC charging and discharging module, the AC impedance test module, the unified clock module and the data acquisition module, and is configured to perform task scheduling, EIS test triggering, data processing and visual display. The DC charging and discharging module and the AC impedance test module are connected in parallel and are always connected, thereby forming a test circuit without relay switching. An electrostatic shielding structure includes a multi-layer metal shielding shell arranged on the periphery of the AC impedance test module and a partitioned grounding network.

[0008] Further, the AC impedance test module is configured to apply the AC disturbance signal in a frequency range of 10 mHz to 1 MHz.

[0009] Further, the DC charging and discharging module is configured to perform soft switching between constant current mode and constant voltage mode, and in the constant voltage steady state stage, the EIS test module is triggered to perform EIS test under the condition that the state of charge of the battery changes by

[0010] Further, the unified clock module ensures that the sampling and triggering time deviation of the DC charging and discharging module and the AC impedance test module is , and has a time deviation overrun automatic calibration function.

[0011] Further, the host computer software control module includes a task queue management unit, a batch triggering control unit, a timing calibration unit and a data alignment unit; the batch triggering control unit supports parallel or staggered triggering of not less than 8 test channels.

[0012] Further, the data acquisition module stores the acquired voltage, current and impedance spectrum data with a unified time stamp, and performs correlation analysis and graphical display with the capacity, coulombic efficiency and internal resistance parameters of the battery.

[0013] Further, the multi-channel EIS charging and discharging in-situ test system supports parallel operation of not less than 8 test channels and supports modular expansion.

[0014] A multi-channel EIS charging and discharging in-situ test method includes the following steps: S1, starting the multi-channel charging and discharging test step by the host computer software control module; S2, when the charging and discharging process enters the preset steady state stage, the host computer software control module sends an EIS triggering instruction to the unified clock module according to a preset task table.​ S3, the unified clock module broadcasts a synchronization signal, the alternating current impedance test module synchronously applies an alternating current disturbance signal to the battery, and the data acquisition module synchronously acquires current, voltage and impedance response data of each channel; S4, monitoring the time deviation of each channel data acquisition, if the deviation is more than 1 ms, then the synchronization correction process is executed; S5, the collected EIS data, voltage data and current data are time stamped, aligned, stored and output visual results.

[0015] Further, the preset steady state stage is a voltage maintaining stage after the constant current charging mode is switched to the constant voltage charging mode, in which the state of charge of the battery is locked and EIS measurement is automatically triggered.

[0016] The multi-channel EIS charging and discharging in-situ test system and method provided by the application have the following effects compared with the prior art: 1、The direct current charging and discharging module and the alternating current impedance test module are designed as a parallel constant connection structure without any relay switching, realizing continuous and uninterrupted online EIS test during charging and discharging, effectively avoiding the contact resistance drift and transient error caused by physical route switching in the traditional scheme, and significantly improving the stability and repeatability of the test.

[0017] 2、The unified clock module provides a synchronous trigger reference for all test channels, and the FPGA phase-locked loop and error calibration mechanism are used to ensure that the time deviation of multi-channel sampling and triggering is not more than 1 ms, thereby ensuring the high accuracy of impedance phase measurement and providing reliable time base support for multi-channel parallel test and data alignment.

[0018] 3、The application controls the state of charge variation of the battery to be at a very low level in the constant voltage steady state stage through soft switching control from constant current to constant voltage, and automatically triggers EIS measurement in the window, realizes impedance spectrum acquisition under the condition of quasi-constant SOC, and improves the accuracy of electrochemical state monitoring and the comparability of frequency spectrum data.

[0019] 4、The application realizes multi-channel task scheduling, batch triggering and data alignment through the host computer software control module, supports parallel or staggered peak testing of not less than 8 channels, has task queue management, timing calibration and visual analysis functions, significantly improves the test throughput and automation level, and is suitable for batch performance evaluation in research and production line scenes.

[0020] 5、The present application adopts a multi-layer metal shielding shell and a partitioned grounding network to construct an electrostatic shielding structure, combines background noise scanning and vector correction technology, effectively suppresses the coupling interference of high-frequency signals between multiple channels and ground loop noise, suppresses the crosstalk between channels to below-100dB, and guarantees the accuracy and reliability of high-frequency impedance measurement.

[0021] 6、The present application stores voltage, current and impedance spectrum data with a unified timestamp by the data acquisition module, and correlates and analyzes and graphically displays parameters such as battery capacity, coulomb efficiency and internal resistance, realizes multi-parameter coaxial visualization and trend analysis, and provides comprehensive data support for battery performance research, fault diagnosis and life prediction.

[0022] 7、The present application realizes full-automatic test process through software and hardware cooperation, and does not need manual intervention from task scheduling of host computer, EIS triggering, synchronous acquisition to result output, greatly reduces operation complexity and human error, improves test consistency and repeatability, and is suitable for large-scale battery test and dynamic electrochemical performance evaluation. BRIEF DESCRIPTION OF DRAWINGS

[0023] Figure 1 is a flowchart of the present application; Figure 2 is an impedance test schematic diagram in the present application; Figure 3 is an EIS Nyquist diagram of the present application at different SOC levels. DETAILED DESCRIPTION

[0024] In order to make the technical scheme of the present application clearer, the present application will be further described in detail below in combination with the drawings and specific embodiments.

[0025] As shown in the drawings, Figure 1 The system hardware architecture and module implementation in the present embodiment are shown. The system adopts modular design, and each module works cooperatively to constitute a complete test platform.

[0026] 1、Main control module A high-performance FPGA (Field Programmable Gate Array) is used as the core controller, supplemented by an ARM Cortex-M series MCU for logic management. The FPGA has a built-in synchronous clock unit that generates a high-precision clock signal, which is distributed to the entire system through a PLL (Phase-Locked Loop) circuit. The main control issues real-time charge and discharge current instructions and EIS measurement instructions through the system bus (such as SPI or parallel bus), and uses a unified clock to ensure that all channels are triggered synchronously within nanoseconds.

[0027] A high-stability, temperature-controlled crystal oscillator is used as the master clock source. Clock distribution and phase-locking are performed via FPGA, and a synchronization trigger signal is broadcast to all channels. Time deviations are detected and corrected in real time. This ensures that the multi-channel sampling and trigger synchronization error is ≤1ms, guaranteeing the accuracy of impedance phase measurement, supporting large-scale channel parallel testing, and improving data alignment and batch analysis efficiency.

[0028] 2) Charge / discharge module The constant current source unit uses a precision operational amplifier and a MOSFET to form a closed-loop feedback control circuit. It monitors the current in real time through a high-precision sampling resistor and compares it with the set value to dynamically adjust the output to maintain a constant current.

[0029] When the battery voltage approaches the set value, the constant voltage control unit switches to constant voltage mode and maintains voltage stability through a PID control algorithm.

[0030] The measurement feedback unit integrates a 16-bit or higher ADC to acquire battery terminal voltage and current signals in real time and feed them back to the main control module.

[0031] The protection mechanism achieves hard protection through built-in overcurrent, overvoltage, and short-circuit protection circuits, using fast-response relays or electronic switches.

[0032] 3) EIS test module like Figure 2 , 3 As shown, the signal excitation unit uses a direct digital frequency synthesizer (DDS) to generate perturbation signals such as sine waves and square waves from 10mHz to 1MHz.

[0033] The signal superposition unit superimposes a small AC signal (typically 5–10mV) onto the DC circuit during charging and discharging through a coupling circuit (such as a transformer or capacitor coupling).

[0034] The sampling unit synchronously acquires the transient response of current and voltage using a high-speed ADC (≥18 bits, sampling rate ≥1MSPS) with synchronous sampling.

[0035] The impedance calculation unit directly calculates the magnitude and phase angle of the complex impedance by performing FFT (Fast Fourier Transform) algorithm on the sampled signal in the built-in DSP or FPGA.

[0036] 4) Switching matrix module A multi-channel switching network is constructed using a solid-state analog switch array (such as a MOSFET switch), with each channel equipped with a drive circuit and a feedback detection circuit.

[0037] The operation involves the main control module controlling the switching on and off via the drive circuit according to the test sequence. A feedback detection circuit confirms the channel connection status in real time, ensuring reliable switching and preventing short circuits or signal crosstalk between channels.

[0038] 5)Data Acquisition and Signal Processing Module ADC array is composed of multiple high-speed ADCs, and FPGA is used as timing control and data processing core. After data acquisition, it is temporarily stored in cache (such as DDR memory), and noise reduction processing is performed through digital filter (such as FIR filter).

[0039] The synchronization mechanism is provided by the master FPGA through a unified sampling clock, ensuring that all channel ADCs are synchronized and have consistent phases.

[0040] 6)Communication Interface Module It provides two main interfaces, Gigabit Ethernet (LAN) and USB3.0, for communication with the host computer. The interface circuit includes a physical layer chip (PHY) and a protocol conversion chip.

[0041] Data transmission uses TCP / IP protocol or custom high-speed data protocol to upload test data and issue control instructions.

[0042] 7)Electrostatic Shielding and Grounding Module The system case is made of conductive aluminum alloy with multiple shielding shells, and the internal key signal lines use double-shielded twisted pair. Star single-point grounding or partition grounding network is used to isolate digital ground, analog ground, and power ground, and is connected at a single point through a magnetic bead or 0Ω resistor, effectively suppressing ground loop interference.

[0043] 8)Power Supply and Protection Module Linear voltage regulator (LDO) is used to power analog circuits, and switching power supply (DCDC) is used to power digital circuits. Electrical isolation is achieved through optocoupler or isolation transformer. Overcurrent, overvoltage, and overtemperature protection circuits are configured, and core protection is realized by hardware comparator for fast shutdown, supporting fault recording and automatic recovery.

[0044] As shown in Figure 1 , the system software and control method in the present embodiment are implemented as 1)Host Computer Software Architecture The task queue management unit uses a database (such as SQLite) to store test plans (step sequence, EIS trigger conditions, etc.), realizing test task creation, editing, queuing, and priority management.

[0045] In the batch trigger control unit, the software sends trigger instructions to all channels synchronously or staggered through a precision timer based on the task queue, supporting ≥8 channels of parallel testing.

[0046] In the timing calibration unit, the software monitors the timestamps of each channel data packet in real time, and if a channel-to-channel deviation is detected If not, correction is made by retransmitting the synchronization signal or time interpolation in the data layer.

[0047] The data alignment unit is used to align the collected EIS spectrum, voltage, current, etc. data with the unified timestamp as the reference, and associate the capacity, coulomb efficiency, DC internal resistance, etc. parameters of the battery, and store them in the same database table.

[0048] 2) Automatic test process Step S1, system initialization and channel identification After power-on, the main control module automatically identifies and marks the valid test channels by scanning the voltage values of each channel (for example, the channel connected to the battery will have an open circuit voltage, and the voltage of the empty channel is close to 0).

[0049] Step S2, charge and discharge mode setting and parameter loading The user sets the constant current (CC) current value, constant voltage (CV) voltage value, cycle number, cutoff condition, etc. parameters in the host computer software interface. The software compiles these parameters into an instruction package and sends it to the corresponding channel charge and discharge module for execution through the communication interface.

[0050] Step S3, EIS measurement triggering and signal injection When the software detects that the battery reaches the preset SOC point (calculated by ampere-hour integration method) or enters the CV stage, it immediately sends a trigger signal to the EIS module through the unified clock module. The DDS generator of the EIS module generates an AC signal of specified frequency and amplitude (such as 5mV and 1kHz), which is injected into the battery through the coupling circuit.

[0051] Step S4, data acquisition and impedance calculation As shown in Figure 2 , SOC represents the state of charge; ReZ (unit: Ohm) represents the resistive component of the system; -ImZ (unit: Ohm) represents the reactive component (capacitive reactance or inductive reactance) of the system.

[0052] The high-speed ADC synchronously collects at least one complete cycle of voltage and current response waveforms under the unified clock. The data is sent to the FPGA / DSP, and the amplitude and phase difference of the voltage and current at the fundamental frequency are calculated through the FFT algorithm, and then the complex impedance Z at this frequency point is obtained, and the calculation formula is: ; In the above formula, represents the voltage at the fundamental frequency; represents the current at the fundamental frequency.

[0053] Step S5, multi-channel automatic switching and synchronous control For multi-channel systems sharing EIS resources, the host computer scheduler controls the switching matrix, cycling through the sequence "channel 1 measurement -> channel 2 measurement ->...". After each switch, the system performs a brief stabilization wait (e.g. 10 ms), and then re-synchronizes all acquisition actions with a unified clock signal, ensuring phase consistency.

[0054] As shown in Figure 3 the smooth transition to constant voltage mode at the end of constant current charging, the use of the initial constant voltage stage to achieve SOC quasi-constant (ΔSOC≤0.05%), and the automatic triggering of EIS measurement in this steady state window. Achieve SOC lock without changing the electrical connection, ensure impedance testing in a stable electrochemical state, and improve the reliability and comparability of frequency spectrum data.

[0055] And the host computer scheduling module maintains a unified task queue, which controls the multi-channel parallel or staggered testing through timing arrangement and batch triggering. Each channel is coordinated by a unified clock. Supports ≥8 channels full-automatic linkage testing, significantly improves test throughput, suitable for R&D and production line scenarios, and realizes efficient and consistent batch performance evaluation.

[0056] Step S6, data storage and output All channels of raw data and processing results (impedance spectrum, charge and discharge curve) are attached with high-precision time stamp, and after batch compression, they are uploaded to the host computer through LAN. The software supports storing data as CSV format file or directly writing into SQL database, and provides Nyquist graph, Bode graph, trend curve and other visualization charts.

[0057] The data acquisition module stores all voltage, current and EIS data with a unified time stamp. The host computer software associates impedance spectrum with parameters such as capacity and coulomb efficiency, and performs graphical display and trend analysis. Realize multi-parameter coaxial analysis and visual output, support real-time monitoring and historical data tracing, provide comprehensive data support for battery performance research and fault diagnosis.

[0058] Step S7, electrostatic shielding correction and anti-interference control The system performs background noise scanning regularly (e.g. first boot every day) or on user instruction: in the state of all channels unloaded, perform a full-band EIS scan to record the noise spectrum. In subsequent formal testing, the background noise is deducted from the measurement results by vector subtraction, and combined with hardware shielding, the inter-channel crosstalk is suppressed below -100dB.

[0059] The multi-layer metal shielding shell, double-layer shielding twisted pair and star-shaped grounding network are adopted to isolate the high-frequency EIS signal from the DC loop, and the crosstalk is further suppressed through background noise scanning and vector correction. The inter-channel coupling noise and ground loop interference are effectively reduced, and the signal-to-noise ratio is improved to below-100dB, thereby ensuring the accuracy and reliability of high-frequency impedance measurement.

[0060] As shown in Figure 1 , the specific implementation of the core innovation point in the embodiment is: In the hardware wiring, the output end of the charge-discharge module and the output end of the EIS module are directly and permanently connected in parallel on the same pair of test leads. By controlling the charge-discharge module to work in a high-output impedance state (approximately open circuit), while the EIS module outputs an AC signal, EIS testing is realized without changing the physical connection.

[0061] At the end of constant current charging, when the voltage reaches the set value, the control algorithm smoothly switches the working mode to constant voltage. At the beginning of constant voltage, due to the sharp decrease of current, the SOC of the battery changes very slowly (0.5-5 seconds). The system utilizes this steady state window to trigger EIS measurement, thereby obtaining the impedance spectrum at quasi-constant SOC.

[0062] Furthermore, the multi-channel EIS charge-discharge in-situ testing system adopts a high-stable oven controlled crystal oscillator (OCXO) as the main clock source. The clock signal is divided, multiplied and distributed through the clock management unit (such as Xilinx MMCM) inside the FPGA, to generate synchronous trigger signals sent to each ADC and DDS, ensuring that the synchronization error of sampling and excitation of the whole system is ≤1ms.

[0063] The above-described embodiments only express several implementation manners of the present application, and the description is relatively specific and detailed, but it should not be understood as a limitation on the scope of the present application. It should be noted that, for those skilled in the art, without departing from the concept of the present application, a number of modifications and improvements can be made, which are all within the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A multi-channel EIS charge-discharge in-situ test system, characterized in that, include: DC charge / discharge module, used to perform constant current, constant voltage or cyclic charge / discharge tests on batteries; An AC impedance testing module is connected in parallel with the DC charge / discharge module and is used to apply an AC disturbance signal to the battery and collect the impedance response during the charge / discharge process. A unified clock module is used to provide a synchronous trigger reference signal for the DC charging / discharging module and the AC impedance testing module; The data acquisition module is used to simultaneously acquire current and voltage data during the charging and discharging process, as well as impedance spectrum data from the AC impedance testing module. The host computer software control module is communicatively connected to the DC charging and discharging module, AC impedance testing module, unified clock module and data acquisition module, and is used for task scheduling, EIS test triggering, data processing and visualization. The DC charging and discharging module and the AC impedance testing module are connected in parallel and are always connected to form a test circuit without relay switching. An electrostatic shielding structure, comprising a multi-layered metal shielding shell disposed around the AC impedance testing module and a zoned grounding network.

2. The multi-channel EIS charge and discharge in-situ test system and method of claim 1, wherein: The AC impedance test module is configured to apply the AC disturbance signal in a frequency range of 10 mHz to 1 MHz.

3. The multi-channel EIS charge and discharge in-situ test system and method of claim 1, wherein: The direct current charging and discharging module is configured to soft-switch between a constant current mode and a constant voltage mode, and trigger the alternating current impedance test module to perform an EIS test under the condition that a state of charge variation amount of the battery is less than a preset threshold in a constant voltage steady state stage. The direct current charging and discharging module is configured to soft-switch between a constant current mode and a constant voltage mode, and trigger the alternating current impedance test module to perform an EIS test under the condition that a state of charge variation amount of the battery is less than a preset threshold in a constant voltage steady state stage 4. The multi-channel EIS charge and discharge in-situ test system and method of claim 1, wherein: The unified clock module ensures the sampling and triggering time deviation of the direct current charging and discharging module and the alternating current impedance test module , and has a time deviation overrun automatic calibration function.

5. The multi-channel EIS charge and discharge in-situ test system and method according to claim 1, characterized in that: The host computer software control module includes a task queue management unit, a batch trigger control unit, a timing calibration unit, and a data alignment unit; the batch trigger control unit supports parallel or staggered triggering of no less than 8 test channels.

6. The multi-channel EIS charge and discharge in-situ test system and method according to claim 1, characterized in that: The data acquisition module stores the collected voltage, current, and impedance spectrum data with a unified timestamp, and performs correlation analysis and graphical display with the battery's capacity, coulombic efficiency, and internal resistance parameters.

7. The multi-channel EIS charge and discharge in-situ test system and method according to claim 1, characterized in that: The multi-channel EIS charge-discharge in-situ testing system supports the parallel operation of no less than 8 test channels and supports modular expansion.

8. A multi-channel EIS charge-discharge in-situ testing method, characterized in that, The multi-channel EIS charge-discharge in-situ testing system according to any one of claims 1-7, wherein the multi-channel EIS charge-discharge in-situ testing method comprises the following steps: S1. Start the multi-channel charge and discharge test step through the host computer software control module; S2. When the charging and discharging process enters the preset steady-state stage, the host computer software control module sends an EIS trigger command to the unified clock module according to the preset task list. S3. The unified clock module broadcasts a synchronization signal, the AC impedance test module synchronously applies an AC disturbance signal to the battery, and the data acquisition module synchronously acquires the current, voltage, and impedance response data of each channel. S4, monitoring the time deviation of each channel data collection, if the deviation exceeds 1 ms, then performing a synchronization correction process; S5. The collected EIS data, voltage data, and current data are timestamped, stored, and the visualization results are output.

9. The multi-channel EIS charge-discharge in-situ test method according to claim 8, characterized in that: The preset steady-state stage is the voltage holding stage after switching from constant current charging mode to constant voltage charging mode. During this stage, the battery's state of charge is locked and EIS measurement is automatically triggered.

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