Universal single-chip microcomputer development system based on AI technology

Abstract

The invention relates to a universal single-chip microcomputer development system based on an AI technology, and the system comprises a user input module which is used for importing a chip manual and inputting a user function demand in a natural language; the AI chip manual identification module is used for extracting multi-modal hardware information based on a chip manual, performing cross verification on the multi-modal hardware information and outputting a structured hardware information model; the demand conversion module is used for decomposing a user function demand into a plurality of sub-tasks, calling a structured hardware information model to plan hardware adaptation steps of each sub-task, and generating a task scheme; the code generation module is used for converting a task scheme required by a user function into a machine language code adaptive to the target single chip microcomputer according to the instruction set architecture of the chip; and the code burning module is used for burning machine language codes to the single-chip microcomputer so as to realize rapid development of the universal single-chip microcomputer. Compared with the prior art, the method has the advantages that the development efficiency, flexibility and universality of the single-chip microcomputer are improved, and the like.

Description

Technical Field

[0001] This invention relates to the fields of artificial intelligence and microcontroller development technology, and in particular to a general-purpose microcontroller development system based on AI technology. Background Technology

[0002] In the fields of electronics, electrical engineering, and automation, microcontrollers, as highly integrated and powerful microcomputers, are widely used in numerous scenarios. From automated production lines in industrial control to the precise measurement and control of various parameters by intelligent instruments, to the data processing and transmission in communication equipment, and the intelligent control of home appliances such as smart refrigerators and air conditioners, microcontrollers play a core role.

[0003] Currently, the development process for microcontrollers typically involves developers first thoroughly studying the datasheet of the microcontroller chip they are using to fully understand its hardware characteristics, including pin functions, register configurations, and internal resource distribution. Based on this, they design the hardware circuit according to project requirements, carefully selecting appropriate electronic components and rationally planning the circuit layout to ensure the stable operation of the microcontroller system. Simultaneously, developers must be proficient in specific programming languages, such as C or assembly language, to write software code based on the hardware circuit and project functional requirements. After the code is written, it is necessary to use specialized development software for debugging, repeatedly checking and correcting logical errors and hardware interface problems until the microcontroller system can achieve the expected functions. Existing microcontroller development technologies have the following problems: (1) High technical threshold for developers: Microcontroller development requires developers to have multifaceted professional knowledge. In terms of hardware, they must be proficient in the characteristics, parameters, and circuit design principles of various electronic components, and be able to accurately design key parts such as power supply circuits, reset circuits, and clock circuits. For example, power supply circuit design needs to consider factors such as the microcontroller's power supply voltage range, current requirements, and power supply stability; any oversight in details may lead to system failure. In terms of software, developers must not only be proficient in the syntax rules of programming languages, but also have a deep understanding of the underlying architecture of microcontrollers. Taking interrupt service routine writing as an example, developers need to accurately grasp concepts such as interrupt mechanisms and interrupt priorities; otherwise, system errors are likely to occur. For novices, learning and integrating this knowledge is extremely difficult, often requiring a significant investment of time and energy in learning and practice, which undoubtedly restricts talent cultivation and technology popularization in the field of microcontroller development.

[0004] (2) Complex and inconvenient development software: Microcontrollers from different manufacturers are usually equipped with their own proprietary development software, which varies significantly in terms of user interface, function settings, and code editing rules. For example, a well-known brand of microcontroller development software has strict requirements on file format and naming rules during code compilation, and even a slight error by the developer can lead to compilation failure. Moreover, due to the poor integration of these development software programs, developers often need to switch frequently between multiple software programs to complete different development tasks, such as using one software to write code and then using another software for debugging. This increases the learning cost for developers and reduces development efficiency. In addition, some development software is updated frequently, and the compatibility between new and old versions is poor, which brings many troubles to developers in the process of project maintenance and upgrades.

[0005] (3) Long development cycle and low flexibility: The development of microcontrollers is a complex and cumbersome process, from requirements analysis, hardware circuit design, software code writing to system debugging and testing. In the hardware circuit design stage, developers need to repeatedly simulate and optimize the circuit to ensure the stability and reliability of the circuit performance. In the software code writing process, given the limited resources of the microcontroller, developers must spend a lot of time optimizing the code to improve the program's running efficiency and make reasonable use of storage space. It has poor versatility and limited adaptability to different scenarios. Once the project requirements change, it is difficult to modify the hardware circuit and software code. Developers need to have a deep and thorough understanding of the entire system, otherwise it is easy to cause new problems. For example, in an industrial automation control system, if a new sensor access function needs to be added midway, it may not only be necessary to redesign the hardware circuit, but also to make significant modifications to the software code. This further extends the development cycle, making it difficult to respond quickly to market demands and limiting the application of microcontrollers in some scenarios with high requirements for development cycle and flexibility, such as the rapid iteration of consumer electronics product development.

[0006] A search revealed Chinese invention patent application publication number CN119322615A, which discloses a method for automatically generating drivers based on machine learning. This method extracts interface protocol types and register mapping tables from hardware description documents, constructs a protocol difference matrix to record interface timing parameters and data format differences between different chip platforms, trains a hardware feature recognizer using a deep learning model, extracts control timing features based on an attention mechanism, and generates a driver model by learning hardware control patterns through a multilayer perceptron. This existing patent application suffers from low development efficiency and high technical requirements for developers.

[0007] How to achieve rapid development of general-purpose microcontrollers has become a technical problem that needs to be solved. Summary of the Invention

[0008] The purpose of this invention is to overcome the shortcomings of the existing technology and provide a general-purpose microcontroller development system based on AI technology.

[0009] The objective of this invention can be achieved through the following technical solutions: According to one aspect of the present invention, a general-purpose microcontroller development system based on AI technology is provided, the system comprising: The user input module is used by developers to import chip manuals and input user function requirements in natural language. The AI ​​chip manual recognition module extracts multimodal hardware information based on the chip manual, performs cross-validation on the multimodal hardware information to ensure it conforms to the chip hardware logic rules, and outputs a structured hardware information model. The requirement transformation module performs intent recognition and entity extraction on user functional requirements. Based on the extracted intent categories and key entities, it decomposes user functional requirements into multiple sub-tasks and calls the structured hardware information model to plan the hardware adaptation steps of each sub-task, generating a task plan. The task plan includes a list of sub-tasks, priority order, code writing specifications, and hardware adaptation steps for each sub-task. The code generation module converts the user's functional requirements into machine language code that is compatible with the target microcontroller, based on the chip's instruction set architecture. The code burning module burns machine language code into the microcontroller, enabling the development of general-purpose microcontrollers.

[0010] Preferably, the extraction of multimodal hardware information based on the chip datasheet includes: Natural language processing technology is used to extract text information from chip manuals; Using OCR and computer vision technologies to extract chart information from chip datasheets; Formula recognition technology is used to extract formula information from chip manuals.

[0011] More preferably, the process of extracting text information from the chip manual includes: using a Transformer-based pre-trained language model to perform word segmentation, named entity recognition, and relation extraction on the text in the chip manual, generating structured text information.

[0012] More preferably, the process of extracting chart information from the chip manual includes: recognizing the text content of the charts in the chip manual using OCR technology, and locating the functional areas of the charts using computer vision image segmentation technology to achieve chart information extraction.

[0013] More preferably, the process of extracting formula information from the chip manual includes: using a formula recognition algorithm to parse the calculation formulas of electrical parameters in the chip manual, associating the variables in the formulas with the chip hardware parameters, and generating a computable parameter model.

[0014] Preferably, the structured hardware information model includes a pin mapping table, a peripheral configuration table, and an electrical parameter model.

[0015] Preferably, the intent recognition is used to determine the category to which the user's functional needs belong, wherein the categories include data collection, communication interaction, process control, and algorithm logic; The entity recognition is used to extract key entities and attributes involved in user functional requirements.

[0016] Preferably, the requirement conversion module decomposes the user's functional requirements by sorting each subtask according to the task priority rules of the scenario to which the user's functional requirements belong.

[0017] Preferably, the code generation module constructs a mapping library between chip instruction sets and functional requirements, thereby mapping the user's functional requirements task scheme to machine language code adapted to the target microcontroller, and automatically optimizing the machine language code logic based on the scenario information in the task scheme.

[0018] Preferably, the demand conversion module continuously learns the latest microcontroller development technologies and cases to update its intent recognition and entity extraction capabilities.

[0019] Compared with the prior art, the present invention has the following beneficial effects: 1) This invention integrates AI technology into the microcontroller development process, including extracting multimodal hardware information based on chip manuals using AI technology, and cross-validating the multimodal hardware information to ensure its accuracy; performing semantic understanding for intent recognition and entity recognition based on AI technology, and classifying tasks into multiple sub-tasks; and automatically generating machine language code for multiple sub-tasks for programming based on the coding capabilities of AI technology, thereby achieving accurate and efficient development of general-purpose microcontrollers, reducing development difficulty, significantly shortening the development cycle, and expanding the application scope.

[0020] 2) This invention uses natural language processing and image recognition technology to analyze chip manuals and uses the obtained multimodal hardware information to construct a structured hardware information model, which greatly improves the efficiency of hardware design and debugging.

[0021] 3) This invention transforms user functional requirements in natural language into executable software task schemes through semantic parsing of requirements based on intent recognition and entity recognition, scenario-based task decomposition, and hardware adaptation step planning, thereby enabling intelligent writing and debugging of software code and improving the efficiency of software code development and debugging. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the general-purpose microcontroller development system in this invention; Figure 2 A schematic diagram of the principle of the AI ​​chip manual recognition module; Figure 3 This is a schematic diagram illustrating the principle of the demand conversion module. Detailed Implementation

[0023] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0024] This invention innovates the traditional microcontroller development process and methods by introducing AI technology. It aims to solve the technical problems of high technical requirements for microcontroller developers, numerous and complex development software, long development cycles and low flexibility in microcontroller development, making microcontroller development more efficient and convenient, and expanding its application scope to multiple fields including but not limited to industrial automation, smart home appliances, communication equipment, Internet of Things and so on.

[0025] This embodiment relates to a general-purpose microcontroller development system based on AI technology, such as... Figure 1 The system includes: (1) User Input Module: This module serves as the entry point for interaction between the system and developers. Developers import the chip manual through this module and input their functional requirements in natural language. The chip manual can be in various electronic document formats, including all hardware information such as the chip's hardware architecture, pin definitions, electrical characteristics, and register descriptions. Simultaneously, developers must clearly articulate the user requirements they wish to implement, such as specific functions like motor speed control, data acquisition, and wireless transmission. This module must have a user-friendly interface to facilitate accurate and convenient input of relevant information by developers.

[0026] (2) AI Chip Manual Recognition Module: This module achieves accurate extraction and model construction of multimodal hardware information from the chip through multimodal fusion and rule verification, such as... Figure 2 This includes the following: 21) Input the chip manual It supports multiple chip manual formats such as PDF, Word, and images, covering various types of information including chip text descriptions, pin definitions, pin diagrams, register descriptions, register tables, electrical characteristics, and electrical parameter formulas.

[0027] 22) Processing logic: Multimodal information extraction and verification Text information extraction (Natural Language Processing (NLP) technology): Using a Transformer-based pre-trained language model (such as BERT), the text in the chip manual is segmented, named entity recognition (NER), and relation extraction is performed. For example, the text in "PA0 pin is a GPIO function, maximum input voltage 5V" is identified by recognizing "PA0" (entity), "GPIO" (function), and "5V" (electrical parameter) and their relationship, generating structured text information.

[0028] Chart Information Extraction (OCR + Computer Vision Technology): OCR is used to recognize text content in pin diagrams and register tables, combined with image segmentation techniques from computer vision to locate functional areas within the diagrams. For example, pin diagrams are segmented to identify the pin number and shape label, which is then correlated with text information extracted by NLP to form a complete mapping of "pin number - function - electrical parameter".

[0029] Formula information extraction (formula recognition technology): Using the LaTeX formula recognition algorithm, the calculation formulas of electrical parameters in the chip manual (such as: power consumption = operating current × operating voltage) are parsed, and the variables in the formula are associated with the chip hardware parameters (such as "typical operating current 10mA" and "operating voltage 3.3V") to generate a calculable parameter model.

[0030] Hardware information verification (rule-based): A built-in chip hardware logic rule base contains over 200 rules, including "peripheral clock ≤ chip maximum clock" and "GPIO mode and function matching." The extracted multimodal information undergoes cross-validation. For example, if "UART1 clock configured to 80MHz" is detected, the system automatically compares it with the rule in the rule base that "this series of chips' UART peripherals support a maximum clock of 50MHz," marking the information as abnormal and prompting: "This may be a formatting error in the manual; it is recommended to check Chapter X of the chip datasheet."

[0031] 23) Output: Standardized hardware information model Generate a structured hardware information model containing a pin mapping table (pin number, function, electrical characteristics), a peripheral configuration table (register addresses, enable conditions, parameter ranges of peripherals such as UART and ADC), and an electrical parameter model (calculation formulas and typical values ​​for power consumption, voltage, and temperature range), stored in JSON format, and supported for subsequent module calls and retrieval.

[0032] Artificial intelligence technology plays a key role in this module. The development system uses natural language processing (NLP) and image recognition technology to parse the chip manual, accurately extract the hardware information in the chip manual, and build a comprehensive and accurate hardware information model, which is the foundation for subsequent development. Its accuracy and efficiency are of paramount importance.

[0033] For chip manuals in electronic document format, natural language processing technology extracts hardware information from the textual descriptions, such as pin functions and register configurations. For diagrams in the manual, image recognition technology identifies key information such as circuit schematics and pinout diagrams, converting them into computer-understandable data formats. After processing, the system constructs a standardized hardware information model of the chip, recording in detail the functions and parameters of each part of the chip, providing basic data support for subsequent development. For example, for a microcontroller chip manual with complex peripherals, this module can accurately identify the specific configuration information of communication interfaces such as SPI and I2C, as well as the multiplexing functions of various general-purpose input / output pins (GPIO).

[0034] (3) Demand Transformation Module: Based on a three-layer logic of semantic parsing, scenario-driven approach, and hardware adaptation, user functional requirements in natural language are transformed into executable software task solutions, such as... Figure 3 The details are as follows: 31) Input: Natural Language Function Requirements Developers can input user function requirements in natural language, such as "real-time acquisition of ambient temperature (10-second interval) and transmission to the mobile APP via Bluetooth (BLE 5.0), with low power consumption (sleep current < 20μA)".

[0035] 32) Processing Logic: Semantic Parsing and Task Planning Semantic parsing of requirements: A dual-model architecture of intent recognition and entity recognition is adopted to perform intent recognition and entity extraction on the input user functional requirements. The intent recognition model is used to determine the intent category of the user functional requirements, including categories such as data acquisition, communication interaction, flow control, and algorithm logic; the entity recognition model is used to extract key entities and attributes involved in the requirements, such as "temperature acquisition", "10-second interval", "BLE 5.0", and "low power consumption". Specifically, the user's description of the functional requirements, along with the intent category and key entities extracted by the same image recognition model and entity recognition model, are input into the Large Language Model (LLM). Each functional requirement is output in a specified JSON format, and each sub-requirement contains "priority", "functional category / key entity", and "specific content".

[0036] Scenario-based task decomposition: Built-in task priority rules for typical scenarios such as "industrial control, smart home, and consumer electronics". For example, for the above-mentioned "low-power Bluetooth data acquisition" requirement (belonging to the smart home scenario), the system prioritizes the decomposition of the subtasks "BLE 5.0 communication initialization", "temperature acquisition (10s interval)" and "sleep mode configuration", and sorts them according to the task priority of "communication > acquisition > low power".

[0037] Hardware compatibility planning: Utilizing the hardware information model of the AI ​​chip's intelligent identification module from the datasheet, and combining it with the sub-task category, hardware adaptation steps (i.e., specific implementation steps) are planned for each sub-task. Taking the "temperature acquisition task" as an example: Step 1: Match the available channels of "ADC peripherals" in the hardware model (e.g., ADC1 channel 3 supports analog input); Step 2: Calculate the ADC reference voltage based on the "Temperature Sensor Range (-20~80℃)" (e.g., select a 3.3V reference voltage to ensure range coverage). Step 3: Set the sampling frequency (10-second interval corresponds to triggering an ADC conversion once every 10 seconds); Step 4: Associate with "low power requirements" and plan the execution logic of "entering sleep mode immediately after data acquisition is completed and being woken up by a timer for the next data acquisition".

[0038] Demand conflict detection: If no conflict is detected between "10s interval acquisition" and "sleep current < 20μA" (which meets hardware capabilities), a task plan will be generated; if a conflict exists (such as the user requesting "1ms interval acquisition"), the message "High-frequency acquisition requires keeping the CPU awake. It is recommended to adjust the interval to 100ms to meet low power consumption requirements" will be displayed.

[0039] 33) Output: Structured software task plan Generate a JSON-formatted task plan that includes a list of subtasks, priority order, hardware adaptation steps for each subtask, and coding conventions (such as variable naming and comment requirements), which will serve as the input for the code generation module.

[0040] Based on the study and analysis of numerous microcontroller development cases, the AI-based intent recognition and entity recognition models can transform the requirements input by developers into specific task solutions. The development system first performs semantic understanding of the requirements, breaking them down into multiple feasible sub-tasks. For example, for the requirement of "real-time acquisition of ambient temperature and transmission to a mobile app via Bluetooth," the system breaks it down into temperature acquisition, data processing, Bluetooth communication, and communication protocol adaptation with the mobile app. Then, based on the chip's hardware information model and the learned algorithms and implementation methods, the system plans specific and feasible implementation steps for each sub-task, ensuring that the final developed system meets user needs. For the temperature acquisition task, the system determines which ADC channel to use for temperature sensor data acquisition, as well as the acquisition frequency and accuracy settings, based on the ADC (Analog-to-Digital Converter) information in the chip's datasheet. For the Bluetooth communication task, the system plans how to initialize the Bluetooth module, establish a connection, and implement data transmission based on the Bluetooth protocol stack supported by the chip.

[0041] (4) Code generation module: The technical path involves designing hardware instruction mapping, scenario-based optimization, and traceable annotation to automatically generate executable machine language code, as detailed below: 41) Input: Structured software task plan Receive the task plan in JSON format output by the requirement conversion module, which includes information such as the sub-task list, hardware adaptation steps, and code writing specifications. 42) Processing logic: Instruction generation and optimization, including the following: Hardware instruction mapping: Constructing a mapping library between chip instruction sets and functional requirements. For example, the "GPIO output high level" function of the STC89C52 microcontroller (8-bit architecture) is mapped to the "SETB P1.0" instruction; the same function of the STM32F103 microcontroller (32-bit architecture) is mapped to the "GPIO_SetBits (GPIOA, GPIO_Pin_0)" function call, to adapt to the library function architecture of the microcontroller. Scenario-based code optimization: Automatically adjust machine language code logic based on scenario information in the task plan. Taking the "8-bit microcontroller (such as STC89C52)" scenario as an example: Storage optimization adopts the strategy of global variable reuse and function inlining, inlining repetitive initialization code (such as serial port initialization) into the main function to reduce the stack space occupied by function calls; Instruction simplification adopts "bit operation instructions" to replace "byte operation instructions", for example, optimizing P1 = 0xFF (byte operation, occupying 2 instruction cycles) to SETB P1.0; SETB P1.1; … (bit operation, each pin operation only takes 1 instruction cycle), improving execution efficiency. Code traceability annotation: Add association annotations between requirements, hardware, and code in the generated code. For example: / / Subtask: Temperature Acquisition (Requirement ID: R001) / / Hardware dependency: ADC1 channel 3 (Chapter 5.2 of the chip manual) void ADC_TempCollect(void) { ADC_ChannelSelect(ADC_CHANNEL_3); / / Select the ADC channel (corresponding to hardware step 1) ADC_SetSampleRate(10000); / / Sample at 10-second intervals (corresponding to the requirement of "10-second interval") / / ... } The code generation module leverages the powerful coding capabilities of artificial intelligence to write machine language code suitable for the target microcontroller based on the JSON-formatted task plan generated by the requirements conversion module. The system generates machine language code adapted to the target microcontroller according to the chip's instruction set architecture and optimizes the code to ensure efficient execution on the microcontroller while making reasonable use of its limited resources. For example, for an 8-bit microcontroller, considering its limited storage space and computing power, the code generation module uses a streamlined instruction sequence and allocates register resources rationally to improve code execution efficiency. Simultaneously, the code generation module automatically adds necessary initialization code, such as clock initialization and port initialization, ensuring that all hardware modules are in the correct initial state before the microcontroller runs the code. The generated code conforms to the target microcontroller's programming specifications and syntax requirements and can be directly used for programming.

[0042] (5) Code Burning Module: This module is responsible for burning the written machine language code into the microcontroller via hardware connection. The system supports various common burning methods, such as JTAG, SWD, UART, and other mainstream burning methods. Developers only need to connect the microcontroller to the computer through the corresponding burning interface. The system automatically detects and identifies the microcontroller model, and then burns the code into the microcontroller's program memory according to the preset burning process. During the burning process, the system monitors the burning status in real time. If burning failure or connection abnormality occurs, it will promptly provide error messages and troubleshooting suggestions to facilitate developers in troubleshooting and improve debugging efficiency.

[0043] System Integration and Optimization: The various functional modules mentioned above collaborate to form a general-purpose microcontroller rapid development system based on AI. This development system integrates modules such as chip datasheet recognition, requirement conversion, code generation, and program burning, and provides a unified user interface. Developers can complete the entire development process from requirement input to program burning without switching software, significantly reducing the development threshold.

[0044] In actual development, the development system also optimizes the generated task plans and machine language code. For example, through static analysis of the machine language code, redundant code is removed, algorithm complexity is optimized, and the execution efficiency and resource utilization of the code are further improved.

[0045] Meanwhile, the development system continuously optimizes the intent recognition and entity extraction models in the requirement conversion module through incremental learning and case library expansion mechanisms. It absorbs the latest microcontroller development technologies and cases to continuously improve its development capabilities and adaptability, ensuring it can handle the microcontroller development needs of various complex application scenarios and new chip architectures. This continuously improves chip recognition accuracy, requirement conversion rationality, and code generation quality. The development system is compatible with multiple microcontroller architectures, including 8-bit, 16-bit, and 32-bit, supports chips from mainstream manufacturers, and possesses good versatility and scalability, making it suitable for various application scenarios such as industrial control, smart homes, IoT, and education and training.

[0046] This invention's universal microcontroller development system significantly reduces the technical skill requirements for microcontroller development and lowers the overall development difficulty. Previously, newcomers needed extensive learning of hardware circuits, programming languages, and chip knowledge before they could begin development. Now, only the chip manual and requirements are needed, and the system can complete complex development tasks. This not only saves developers significant learning costs and shortens the time from novice to independent development ability, but also attracts more people with creative ideas but without a professional background to the field of microcontroller development, injecting new vitality into the industry. For example, in the education field, students can use this system to implement microcontroller functions in their creative projects without needing in-depth learning of complex electronics, cultivating innovative practical abilities.

[0047] In traditional development models, developers spend a significant amount of time switching between different development software, manually writing code, and debugging. However, the universal microcontroller development system of this invention automates the entire process from requirement input to code generation and programming, significantly shortening the development cycle. For example, developing a simple intelligent lighting control system might traditionally take several days to complete hardware design, code writing, and debugging, while this system could achieve the same results in just a few hours, or even less. This allows companies to respond to market demands more quickly, launch new products, and gain an advantage in a highly competitive market. Furthermore, increased development efficiency means companies can undertake more projects within the same timeframe, improving economic benefits.

[0048] Enhanced Development Flexibility: Traditional microcontroller development often requires large-scale modifications to both hardware and software to address changing requirements, which is time-consuming and labor-intensive. Our invented universal microcontroller development system uses artificial intelligence to quickly replan implementation schemes and generate code, easily responding to changing needs. For example, during the product prototype development phase, if a customer requests new features, developers simply need to re-enter the requirements into the system, and new programmable code can be obtained in a short time, enabling the feature update. This high degree of flexibility allows microcontrollers to be better applied to rapidly iterating product development scenarios, meeting the market's demands for continuous product updates and upgrades.

[0049] The invented general-purpose microcontroller development system reduces development difficulty and improves development efficiency and flexibility, enabling microcontrollers to be applied to more fields and scenarios, thus expanding their application scope. Industries that previously avoided microcontroller applications due to high development difficulty and long cycles, such as the design of small creative products and the development of simple monitoring equipment for agricultural IoT, can now easily achieve microcontroller control. This helps promote the intelligent and automated development of various industries, improves the overall level of technological application in society, and enhances people's quality of life. For example, in the smart home field, more personalized, low-cost smart devices can be quickly developed and launched to the market with the help of this system, providing users with a more convenient and intelligent living experience.

[0050] Driving Industrial Development: The application of this system accelerates the product update and iteration speed of related industries. Enterprises can develop new products more quickly, prompting the entire upstream and downstream of the industry chain to actively follow suit with innovation. For example, microcontroller chip manufacturers may increase their R&D investment due to reduced development difficulty and expanded application scenarios, launching more high-performance, low-cost chip products. This virtuous cycle promotes the overall development of the electronics, electrical, and automation industries, enhancing their competitiveness.

[0051] This embodiment also relates to a general microcontroller development method based on AI technology, the method comprising: Input the chip manual and input user function requirements in natural language; The process of extracting and verifying multimodal hardware information based on chip manuals: Multimodal hardware information is extracted based on chip manuals, cross-validated to conform to chip hardware logic rules, and a structured hardware information model is output. Multimodal hardware information includes: extracting text information from chip manuals using natural language processing technology; extracting graphic information from chip manuals using OCR and computer vision technology; and extracting formula information from chip manuals using formula recognition technology.

[0052] Demand transformation process: Through intent recognition and entity extraction, user functional requirements are decomposed into multiple sub-tasks, and the structured hardware information model is called to plan the hardware adaptation steps of each sub-task and generate a task plan. The task plan includes a list of sub-tasks, priority order, code writing specifications and hardware adaptation steps for each sub-task. Code generation process: Based on the chip's instruction set architecture, the user's functional requirements and task schemes are converted into machine language code that is compatible with the target microcontroller; The code burning process involves burning machine language code into the microcontroller to enable the development of a general-purpose microcontroller.

[0053] The electronic device of this invention includes a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in read-only memory (ROM) or loaded from a storage unit into random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.

[0054] Multiple components in the device are connected to the I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0055] The processing unit performs the various methods and processes described above. For example, in some embodiments, the methods may be implemented as computer software programs tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or a communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the methods described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute the methods by any other suitable means (e.g., by means of firmware).

[0056] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.

[0057] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.

[0058] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory, optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.

[0059] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An AI technology-based universal single-chip microcomputer development system, characterized by comprising: The system comprises: a user input module for a developer to import a chip manual and input a user function requirement in natural language; an AI chip manual identification module for extracting multi-modal hardware information based on the chip manual, cross-checking the multi-modal hardware information to meet chip hardware logic rules, and outputting a structured hardware information model; a requirement conversion module for performing intent recognition and entity extraction on the user function requirement, decomposing the user function requirement into multiple sub-tasks based on the extracted intent categories and key entities, calling the structured hardware information model to plan hardware adaptation steps for each sub-task, and generating a task scheme, wherein the task scheme comprises a sub-task list, priority ranking, code writing specifications, and hardware adaptation steps for each sub-task; a code generation module for converting the task scheme of the user function requirement into machine language code suitable for the target single-chip microcomputer according to the instruction set architecture of the chip; a code burning module for burning the machine language code into the single-chip microcomputer to realize the development of a general single-chip microcomputer.

2. The universal single-chip microcomputer development system based on AI technology according to claim 1, characterized in that, The extraction of multi-modal hardware information based on the chip manual comprises: text information extraction from the chip manual using natural language processing technology; diagram information extraction from the chip manual using OCR and computer vision technology; formula information extraction from the chip manual using formula recognition technology. 3.The universal single-chip microcomputer development system based on AI technology of claim 2, wherein, The process of text information extraction from the chip manual comprises: using a Transformer-based pre-trained language model to perform word segmentation, named entity recognition, and relationship extraction on the text in the chip manual to generate structured text information.

4. The universal single-chip microcomputer development system based on AI technology according to claim 2, characterized in that, The process of diagram information extraction from the chip manual comprises: identifying the text content of the diagrams in the chip manual using OCR technology, and positioning the functional areas of the diagrams using computer vision image segmentation technology to achieve diagram information extraction.

5. The universal single-chip microcomputer development system based on AI technology according to claim 2, characterized in that, The process of formula information extraction from the chip manual comprises: using a formula recognition algorithm to analyze the calculation formulas of electrical parameters in the chip manual, associating the variables in the formulas with chip hardware parameters, and generating a calculable parameter model.

6. The universal single-chip microcomputer development system based on AI technology according to claim 1, characterized in that, The structured hardware information model comprises a pin mapping table, a peripheral configuration table, and an electrical parameter model.

7. The universal single-chip microcomputer development system based on AI technology of claim 1, wherein, The intent recognition is used to determine the category to which the user function requirement belongs, wherein the category includes data acquisition, communication interaction, process control, and algorithm logic. The entity recognition is used to extract key entities and attributes involved in the user function requirement. 8.The universal single-chip microcomputer development system based on AI technology of claim 1, wherein, The requirement conversion module decomposes the user function requirement according to the task priority rules of the user function requirement's scenario to sort the sub-tasks according to the task priority. 9.The universal single-chip microcomputer development system based on AI technology of claim 1, wherein, The code generation module maps the user function requirement's task scheme to the machine language code of the target single-chip microcomputer by building a mapping library of chip instruction sets and function requirements, and automatically optimizes the machine language code logic according to the scenario information in the task scheme.

10. The universal single-chip microcomputer development system based on AI technology of claim 1, wherein, The requirement conversion module continuously learns the latest single-chip microcomputer development techniques and cases to update the capabilities of intent recognition and entity extraction.

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