Memory allocation method and apparatus for mobile terminal system

Abstract

The application relates to the field of memory management, and provides a memory allocation method and device of a mobile terminal system. The method comprises the following steps: dividing a DDR memory in the mobile terminal into a plurality of physical blocks through a memory management unit; numbering the plurality of physical blocks uniquely, and establishing a mapping relationship between a virtual address used by the mobile terminal system and a physical number corresponding to each of the plurality of physical blocks through the memory management unit; after receiving a memory allocation request, judging whether a target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory; if the target physical block does not belong to the single channel of 16-bit memory, remapping the physical number in the memory allocation request into an equivalent physical number within the single channel range, and guiding to-be-allocated data into corresponding 16-bit memory space based on the mapping relationship and a virtual address corresponding to the equivalent physical number through the memory management unit. The optimized allocation of 16-bit memory is realized, and the memory allocation efficiency is improved.

Description

Technical Field

[0001] This application relates to the field of memory management, and more specifically, to a memory allocation method and apparatus for a mobile terminal system. Background Technology

[0002] Android's memory management is based on the Linux kernel and is deeply optimized for the resource limitations of mobile devices. Android's memory management mechanism primarily relies on paging and memory mapping to achieve efficient memory scheduling.

[0003] Currently, the DDR memory widely used in Android systems mainly includes two types: 16-bit DDR memory and 32-bit DDR memory. These two types differ significantly in hardware structure and connection methods. A single 16-bit DDR memory chip has a 16-bit data width, directly connecting to the memory controller via 16 data lines to achieve data transmission and interaction. In contrast, 32-bit DDR memory is not directly implemented using native 32-bit chips. It is typically constructed using two 16-bit DDR memory chips connected in parallel. The address and control lines (such as chip select signals and bank addresses) of these two chips are connected in parallel to receive unified control signals. The data lines are connected to different pins of the memory controller, with one chip handling the lower 16 bits and the other handling the higher 16 bits. From the memory controller's perspective, these two parallel chips are recognized as a single, unified memory unit for management.

[0004] In related technologies, the memory allocation method of randomly assigning physical numbers in the Android system is mainly based on the design of 32-bit DDR memory, which cannot be directly adapted to 16-bit DDR memory. This can easily lead to some allocated physical numbers having no corresponding usable physical blocks, causing Android system failures. Therefore, there is an urgent need to design a memory allocation scheme to adapt to the management requirements of 16-bit DDR memory. Summary of the Invention

[0005] In this context, embodiments of this application aim to provide a memory allocation method and apparatus for a mobile terminal system, thereby implementing an optimized allocation method for 16-bit memory, adapting to the management requirements of 16-bit DDR memory, and improving memory allocation efficiency.

[0006] In a first aspect of this application, a memory allocation method for a mobile terminal system is provided, the method being applied to an optimized allocation scenario for 16-bit memory, the method comprising:

[0007] The memory space of the DDR memory in the mobile terminal is divided into multiple physical blocks by the memory management unit, and each physical block has a unique physical address.

[0008] Multiple physical blocks are uniquely numbered to obtain the physical numbers corresponding to each physical block. The numbering rule is a structured format combining the channel identifier bit and the block sequence bit. The physical number range of a single channel of 16-bit memory completely overlaps with the physical number range of the first channel of 32-bit memory.

[0009] The memory management unit establishes a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to multiple physical blocks. The mapping relationship includes the collaborative operation of the physical block index layer and the address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers.

[0010] After receiving a memory allocation request sent by the mobile terminal system, determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory;

[0011] If the target physical block belongs to a single channel of 16-bit memory, then in response to the memory allocation request, the physical number of the target physical block is returned to the memory management unit; if the target physical block does not belong to a single channel of 16-bit memory, then the physical number in the memory allocation request is remapped to an equivalent physical number within the single channel range and returned to the memory management unit.

[0012] The memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

[0013] In a second aspect of the embodiments of this application, a memory allocation apparatus for a mobile terminal system is provided. The apparatus is applied to an optimized allocation scenario for 16-bit memory, and the apparatus includes the following modules:

[0014] The mapping module is used to divide the memory space of the DDR memory in the mobile terminal into multiple physical blocks through the memory management unit. Each physical block has a unique physical address. Multiple physical blocks are uniquely numbered to obtain their respective physical numbers. The numbering rule is a structured format combining channel identifier bits and block sequence bits. The physical number range of a single 16-bit memory channel completely overlaps with the physical number range of the first 32-bit memory channel. The memory management unit establishes a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to the multiple physical blocks. This mapping relationship includes the collaborative operation of a physical block index layer and an address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers.

[0015] The judgment module is used to determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory after receiving the memory allocation request sent by the mobile terminal system.

[0016] The import module is used to respond to the memory allocation request and return the physical number of the target physical block to the memory management unit if the target physical block belongs to a single channel of 16-bit memory; if the target physical block does not belong to a single channel of 16-bit memory, the physical number in the memory allocation request is remapped to an equivalent physical number within the range of the single channel and returned to the memory management unit; the memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

[0017] This application discloses a memory allocation method and apparatus for a mobile terminal system. The embodiments of this application combine a hierarchical mapping structure, intelligent channel attribution judgment, and a cross-channel physical block remapping mechanism to achieve efficient and compatible optimization of 16-bit memory allocation. This improves the management and adaptation capabilities of 16-bit DDR memory in mobile terminals, ensuring the accuracy of virtual address and physical address mapping and the continuity of memory access. It also resolves the allocation conflict between 32-bit dual-channel memory and 16-bit single-channel memory, reduces memory fragmentation and address translation latency, adapts to the specific management requirements of 16-bit DDR memory, and further optimizes the operational stability and resource utilization efficiency of the mobile terminal system. Attached Figure Description

[0018] Figure 1 This is a flowchart illustrating a memory allocation method for a mobile terminal system as shown in this application.

[0019] Figure 2 This is a schematic diagram of the structure of a memory allocation device for a mobile terminal system shown in this application. Detailed Implementation

[0020] The following is for reference. Figure 1 , Figure 1 This is a flowchart illustrating a memory allocation method for a mobile terminal system according to an embodiment of this application.

[0021] To address at least one of the aforementioned technical problems, embodiments of this application provide a memory allocation method and apparatus for a mobile terminal system. Specifically, in the memory allocation method of this application for a mobile terminal system, the memory management unit (MMU) divides the memory space into fixed-size physical blocks according to the characteristics and access efficiency requirements of DDR memory, assigns a unique physical address, and forms a locatable memory unit. This step achieves fine-grained memory management, lays the foundation for subsequent operations, and ensures access independence and data security, while improving management efficiency. Next, a unique number is assigned to each physical block, using a channel identifier bit and block sequence bit format to ensure that the 16-bit single-channel and 32-bit first channel number ranges overlap. The MMU constructs a hierarchical mapping between virtual addresses and physical numbers, with the physical block index layer recording channel ownership and the address translation layer maintaining a dynamic mapping table. This step simplifies the association logic, reduces storage and query overhead, ensures physical memory security, and supports subsequent operations. Upon receiving an allocation request, the target block number is double-checked based on the channel identifier and number range rules to quickly identify whether it is a request spanning the 32-bit second channel, ensuring accurate judgment and timely response. If the target physical block is a 16-bit single-channel block, the physical number is returned directly, and the MMU imports the data according to the mapping relationship, simplifying the process, improving efficiency, and reducing fragmentation. If the target physical block is a 32-bit second-channel block, cross-channel processing is performed. Within the 16-bit single-channel, physical blocks of matching size and with consecutive low loads are selected as replacement resources. Non-single-channel numbers are remapped to equivalent numbers and returned to the MMU. This step resolves memory architecture conflicts, achieves compatibility and adaptation, ensures access efficiency based on low load and continuity principles, improves method compatibility through transparent address translation, and optimizes system resource utilization.

[0022] Figure 1 The illustrated embodiment of this application provides a flow chart of a memory allocation method for a mobile terminal system. This method can be applied to optimized allocation scenarios for 16-bit memory. Furthermore, this method is applied to an Android system that includes a memory management unit. The method includes the following steps:

[0023] Step S101: The memory space of the DDR memory in the mobile terminal is divided into multiple physical blocks by the memory management unit, and each physical block has a unique physical address.

[0024] Step S102: Uniquely number multiple physical blocks to obtain the physical number corresponding to each physical block. The numbering rule is a structured format combining channel identifier and block sequence. The physical number range of a single channel of 16-bit memory completely overlaps with the physical number range of the first channel of 32-bit memory.

[0025] Step S103: The memory management unit establishes a mapping relationship between the virtual address used by the mobile terminal system and the physical number corresponding to each of the multiple physical blocks. The mapping relationship includes the collaborative operation of the physical block index layer and the address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual address to physical number.

[0026] Step S104: After receiving the memory allocation request sent by the mobile terminal system, determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory.

[0027] Step S105: If the target physical block belongs to a single channel of 16-bit memory, then respond to the memory allocation request and return the physical number of the target physical block to the memory management unit; if the target physical block does not belong to a single channel of 16-bit memory, then remap the physical number in the memory allocation request to an equivalent physical number within the single channel range and return it to the memory management unit.

[0028] Step S106: The memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

[0029] In this embodiment, the Memory Management Unit (MMU) is a core hardware component located between the Central Processing Unit (CPU) and physical memory in a computer system. It is primarily responsible for the translation between virtual and physical addresses, memory access permission control, and memory resource scheduling and management. Its core working principle is to maintain a dynamically updated virtual address-physical address mapping table, converting the virtual memory addresses (i.e., logical addresses used in program code) issued by applications or the operating system into actual physical addresses in physical memory, enabling the CPU to accurately access the corresponding memory units. In mobile terminal systems, the key functions of the MMU include: first, supporting virtual memory mechanisms, allowing applications to use a contiguous virtual address space far exceeding the actual physical memory capacity, while the actual physical memory can be shared and allocated by multiple programs, significantly improving memory utilization; and second, implementing memory protection by allocating independent virtual address spaces and access permissions to different programs or processes, preventing unauthorized programs from accessing or tampering with the memory data of other programs, thus ensuring system stability and data security. Third, it works with memory allocation algorithms to achieve dynamic scheduling of physical memory. For example, in 16-bit memory optimization allocation scenarios, the MMU can quickly complete the remapping and address update of cross-channel physical blocks based on the hierarchical mapping structure (physical block index layer, address translation layer), ensuring transparent conversion from virtual address to 16-bit single-channel physical address and reducing address translation latency.

[0030] In this embodiment, DDR memory (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SDRAM) is the main memory widely used in mobile terminals, computers, and other electronic devices. It is an upgraded type of synchronous dynamic random access memory, and its core feature is double data rate transmission. That is, it can complete two data read and write operations per clock cycle (one on the rising edge and one on the falling edge of the clock), which significantly improves data transmission bandwidth and access speed compared to traditional SDRAM. As a core storage component of mobile terminals, the physical structure of DDR memory consists of multiple memory chips, control circuits, and interfaces. Its memory space is divided into several fixed-size physical blocks (such as memory pages), each with a unique physical address, used to store the running operating system, application code, and real-time data. DDR memory supports multi-channel designs (such as single-channel and dual-channel), further improving bandwidth through parallel data transmission. 32-bit memory systems typically use a dual-channel architecture (first channel and second channel), while 16-bit memory systems mostly use a single-channel architecture, which is one of the core reasons for memory allocation conflicts between the two. In 16-bit memory optimization allocation scenarios, DDR memory serves as the physical memory carrier. The numbering of its physical blocks, channel ownership identifiers, and idle status are collaboratively managed by the memory management unit and the channel status monitoring layer. By selecting contiguous, low-load physical blocks within a single channel as equivalent replacement resources, cross-channel allocation conflicts can be effectively resolved, memory fragmentation rates reduced, and data storage and access efficiency ensured. It is important to note that DDR memory is volatile and requires continuous power to maintain data storage; data is immediately lost upon power failure. Therefore, it is typically used in conjunction with non-volatile memory (such as flash memory) to support the storage needs of mobile terminals.

[0031] Further optionally, the 32-bit memory includes a first channel and a second channel, and the range of a single channel in the 16-bit memory completely matches the range of the first channel in the 32-bit memory; the physical number range corresponding to a single channel in the 16-bit memory overlaps with the physical number range of the first channel in the 32-bit memory, and the overlap rules include: the channel identifier bit of the physical number is assigned the same value, and the block sequence bit value range is the same.

[0032] It is understandable that the first and second channels of 32-bit memory originate from its hardware architecture. They are not composed of native 32-bit memory chips, but rather implemented by connecting two 16-bit DDR memory chips in parallel. The address lines (such as bank address, row address, and column address) and control lines (such as chip select signal and clock signal) of the two chips are completely parallel to receive the same control instructions sent by the memory controller; only the data lines are independently connected. The 16 data lines (DQ[0:15]) of one chip correspond to the lower 16 data lines of the memory controller, forming the first channel of the 32-bit memory. The 16 data lines (DQ[16:31]) of the other chip correspond to the higher 16 data lines of the memory controller, forming the second channel of the 32-bit memory. The storage capacity of the two chips is completely equal, so that the first and second channels each correspond to a continuous and non-overlapping storage range, jointly covering the entire 32-bit memory space. In contrast, 16-bit memory consists of only a single 16-bit DDR memory chip and has only a single channel. The hardware characteristics of this single channel are completely matched to the first channel of the 32-bit memory. On the one hand, the 16-bit memory single channel also has 16 data lines (DQ[0:15]), which is consistent with the number of data lines and the connection logic with the memory controller of the first channel of the 32-bit memory, resulting in complete compatibility of memory access speed, addressing latency and data transmission protocol between the two. On the other hand, the total storage capacity of the 16-bit memory is exactly equal to the storage capacity of a single channel of the 32-bit memory. For example, if the first channel and the second channel of the 32-bit memory each correspond to a storage range of 1GB (total capacity of 2GB), then a single channel of the 16-bit memory also corresponds to a storage range of 1GB, ensuring that the storage range of the 16-bit memory completely corresponds to the storage range of the first channel of the 32-bit memory. Based on this, when the Memory Management Unit (MMU) numbers physical blocks, it allocates a separate physical numbering range for the first channel of 32-bit memory, and another set of non-overlapping physical numbering ranges for the second channel. The physical numbering of a single 16-bit memory channel directly follows the numbering rules of the first 32-bit memory channel. Not only do the numerical ranges of the physical numbers completely overlap (e.g., the physical numbering of the first 32-bit memory channel is 000001-262144, and the physical numbering of a single 16-bit memory channel is also 000001-262144), but the mapping relationship between the physical number and the physical address is also completely consistent (e.g., ...). The number 000001 corresponds to physical addresses 0x00000000-0x00000FFF, which means that when the MMU processes 16-bit memory allocation requests, it does not need to rebuild the numbering logic. It only needs to check whether the physical number is within the range that overlaps with the 32-bit first channel to quickly determine whether it is a legitimate request. If the physical number of the 32-bit second channel is involved, it only needs to be replaced with an unoccupied number within the overlapping range to complete the remapping. This avoids system failures caused by 16-bit memory accessing non-existent physical blocks, simplifies memory management logic, and ensures compatibility between 16-bit and 32-bit memory.

[0033] Step S101: The memory space of the DDR memory in the mobile terminal is divided into multiple physical blocks by the memory management unit, and each physical block has a unique physical address.

[0034] In this context, the memory space of DDR memory is the physical storage area used to store the mobile terminal's operating system, application code, and real-time data. Its structure is closely related to the bit width specification of DDR memory. The memory space of 16-bit DDR memory consists of a single 16-bit data width memory chip, corresponding to a single channel (the first channel) of storage area. The memory space of 32-bit DDR memory is formed by two 16-bit memory chips connected in parallel, corresponding to two parallel storage areas, the first and second channels. The address lines and control lines of the two chips are connected in parallel, and the data lines correspond to different pins of the memory controller. The entire memory is considered a unified storage unit. In this embodiment, the memory space is essentially a physical carrier composed of a large number of contiguous storage units, forming the basis for subsequent physical block partitioning, address mapping, and memory allocation. Its channel partitioning characteristics directly determine the ownership of physical blocks and the logical rules of memory allocation.

[0035] A physical block is the smallest independent storage unit formed by dividing DDR memory space according to a uniform specification by the memory management unit. It is the basic unit of memory allocation and management. Optionally, the size of a physical block can be preset to a fixed value based on memory access efficiency and allocation requirements. Each physical block corresponds to a contiguous storage region in the DDR memory space and has a clear channel identification (physical blocks of 16-bit memory are all marked with the first channel identifier, while physical blocks of 32-bit memory are marked with either the first channel identifier or the second channel identifier). It is also assigned a unique physical number as a simplified index to facilitate fast identification, scheduling, and mapping by the memory management unit.

[0036] A physical address is an address information used to uniquely identify the actual storage location of each physical block in DDR memory. Its generation follows the physical addressing rules of DDR memory and corresponds one-to-one with physical blocks. The physical address directly points to a specific storage unit in the DDR memory space and is the core basis for the memory management unit to bind virtual addresses to physical storage areas. Through this address, the mobile terminal's memory controller can accurately locate and access data in the target physical block, ensuring the accuracy of data storage and retrieval. It also provides underlying support for avoiding memory access conflicts and achieving fine-grained management of memory resources.

[0037] For example, in step S101, firstly, the Memory Management Unit (MMU) identifies the bit width specification (16-bit or 32-bit) of the DDR memory and the corresponding channel configuration, clarifying the total capacity of the memory space and the channel allocation range. Then, based on the storage characteristics of the DDR memory chips (such as the read / write efficiency of the memory cells and the addressing rules of the chips) and the memory access requirements of the mobile terminal, a unified physical block specification (such as a fixed-size memory page) is determined to ensure that the physical block allocation adapts to the operating logic of the memory chips while also satisfying the flexibility of memory allocation. Next, the DDR memory space is divided continuously and without overlap according to this specification, breaking down the entire memory space into several independent storage units (i.e., physical blocks). During the division process, the channel allocation rules must be strictly followed. That is, all physical blocks of 16-bit DDR memory belong to the first channel, while physical blocks of 32-bit DDR memory belong to the first and second channels respectively. Finally, a unique physical address is assigned to each partitioned physical block. This address is generated based on the physical addressing rules of memory space and can accurately locate the actual storage location of each physical block in DDR memory, ensuring that the target storage area can be found directly through this address during subsequent memory access.

[0038] Step S102 involves assigning unique numbers to multiple physical blocks, resulting in individual physical numbers for each block. The numbering rule uses a structured format combining channel identifier bits and block sequence bits, with the physical number range of a single 16-bit memory channel completely overlapping with the physical number range of the first 32-bit memory channel. Specifically, the numbering design adheres to the core principles of explicit channel ownership and ordered physical location, closely integrating with the channel partitioning characteristics of DDR memory (32-bit memory includes first and second channels, while 16-bit memory only includes a single channel matching the first 32-bit channel). Structured encoding directly links the physical number to the channel ownership, ensuring both uniqueness and efficient subsequent memory management.

[0039] The physical number is a globally unique numerical identifier assigned to each independent physical block by the memory management unit after the DDR memory space of the mobile terminal is divided into physical blocks. Its core value lies in establishing the association between physical blocks and memory management logic (such as virtual address mapping, channel ownership determination, and memory allocation scheduling). It is worth noting that the physical number is not a randomly generated number, but is constructed closely around two principles: explicit channel ownership and ordered physical location. On the one hand, the physical number implicitly contains the channel ownership information of the physical block through structured encoding. For example, it incorporates components related to the channel identifier into the encoding, so that the physical number alone can quickly identify whether the physical block belongs to the first channel, the second channel of 32-bit memory, or a single channel of 16-bit memory (and the physical number of a single channel of 16-bit memory is completely consistent with that of the first channel of 32-bit memory at the channel identifier level). On the other hand, the sequence number is assigned according to the physical address order of the physical block within the corresponding channel, ensuring that the physical number reflects the actual storage location order of the physical block. For example, the smaller the physical address of the physical block within the channel, the smaller the value of the sequence-reflecting part of its corresponding physical number. This physical number, which combines uniqueness, channel association, and positional order, is not only the key basis for establishing the binding relationship between virtual addresses and physical blocks in the subsequent step S103, but also eliminates the need to query the channel ownership identifier when determining whether a memory allocation request crosses channels or when performing cross-channel physical block remapping. It can directly identify and process the request quickly through the number, effectively avoiding memory allocation conflicts caused by identifier confusion, and providing basic support for the efficiency and accuracy of the entire memory management process.

[0040] In an optional embodiment of step S102, the structured composition rules of the physical number are first determined, using a fixed encoding format combining channel identifier bits and block sequence bits. The channel identifier bit is used to identify the memory channel to which the physical block belongs, and the block sequence bit is used to identify the unique order of the physical block within the corresponding channel. The combination of these two bits forms a globally unique physical number. For example, if the physical number is designed as a 10-bit binary code, the first 2 bits are the channel identifier bit, and the last 8 bits are the block sequence bit. This can cover 256 physical blocks, and the actual number of bits can be flexibly adjusted according to the total capacity of the DDR memory and the specifications of the physical blocks. If decimal encoding is used, it can be set to a combination of 1 channel identifier bit and N block sequence bits, such as channel identifiers 1 and 2, and a block sequence bit of 5 bits, which can cover 100,000 physical blocks in each channel, meeting the needs of DDR memory of different capacities. Secondly, dedicated channel identifier bit values ​​are assigned to different channels, strictly following the rule that the attributes of a single 16-bit memory channel and the first channel of a 32-bit memory are consistent. For 32-bit DDR memory, the channel identifier bit corresponding to the first channel is assigned a value of 01 (binary) or 1 (decimal), and the channel identifier bit corresponding to the second channel is assigned a value of 10 (binary) or 2 (decimal). For 16-bit DDR memory, the channel identifier bit of its unique channel is exactly the same as that of the first channel of the 32-bit memory, that is, it is also assigned a value of 01 (binary) or 1 (decimal), ensuring consistency between the two at the channel identifier level, laying the foundation for the subsequent overlap of the physical numbering range of the 16-bit memory with the first channel of the 32-bit memory. Subsequently, the block sequence bit values ​​are allocated according to the physical address order of the physical blocks within the channel. After the Memory Management Unit (MMU) completes the physical block partitioning of the DDR memory space, for each physical block within the channel, consecutive block sequence bit values ​​are assigned to it in ascending order of physical address, starting with a value of 0 or 1 (e.g., incrementing from 0). For example, within the first 32-bit memory channel, the physical block with the smallest physical address has a block sequence bit of 00000000 (8 bits), the next adjacent physical block has a block sequence bit of 00000001 (8 bits), and so on, until all physical blocks within the first channel are covered. Physical blocks within the second 32-bit memory channel start from the same block sequence bit and increment sequentially, distinguished by different channel identifier bits. Physical blocks within a single 16-bit memory channel are also assigned block sequence bits according to the same rules as the first 32-bit channel, and the range of block sequence bit values ​​completely overlaps with that of the first 32-bit channel (e.g., if the block sequence bit for the first 32-bit channel is 0-255, the block sequence bit for the 16-bit channel is also 0-255). Finally, a unique physical number is generated for each physical block by combining the channel identifier bit and the block sequence bit, and stored in the index entry of the physical block index layer, associated with the physical block's channel ownership identifier and physical address. For example, in the first channel of 32-bit memory, the physical block with block sequence number 00000010 (binary) has a complete physical number of 0100000010 (binary).In the second 32-bit memory channel, the physical block with block sequence 00000010 (binary) has a complete physical number of 1000000010 (binary). In the single 16-bit memory channel, the physical block with block sequence 00000010 (binary) has the same complete physical number as the corresponding physical block in the first 32-bit channel, which is 0100000010 (binary). This numbering method not only allows for quick identification of the channel affiliation of physical blocks through the channel identifier without additional channel affiliation lookup, but also ensures that the physical numbering ranges of the 16-bit memory and the first 32-bit channel completely overlap. This provides a clear numbering basis for subsequent steps S103, such as establishing virtual address mapping, determining cross-channel requests, and remapping, effectively avoiding memory allocation conflicts caused by numbering confusion and improving memory management efficiency.

[0041] Step S103: A mapping relationship is established between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to multiple physical blocks through the memory management unit. This mapping relationship characterizes the binding relationship between the physical numbers of multiple physical blocks in the memory space and their virtual addresses. Further, the mapping relationship includes the collaborative operation of a physical block index layer and an address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers.

[0042] As an optional embodiment, in step S103, a unique index identifier is assigned to each physical block through the physical block index layer, and a channel ownership identifier is marked in the index entry. The channel ownership identifier includes a first channel identifier and a second channel identifier. Physical blocks belonging to the first 32-bit memory channel and a single 16-bit memory channel are marked with the first channel identifier, and physical blocks belonging to the second 32-bit memory channel are marked with the second channel identifier. Further optionally, the channel ownership identifier is used to match the physical number range of a single 16-bit memory channel. For example, a unique index identifier is assigned to each physical block through the physical block index layer, and the index identifier is associated one-to-one with the physical number of the physical block. The channel ownership identifier corresponding to each physical block is marked in the index entry.

[0043] Furthermore, in the optional embodiment of step S103, the address translation layer maintains a dynamic mapping table from virtual addresses to physical block numbers based on the index entries, and updates the binding relationship between virtual addresses and physical block numbers in the dynamic mapping table in real time when physical block numbers are remapped. For example, the address translation layer maintains a dynamic mapping table from virtual addresses to physical block numbers based on the index entries of the physical block index layer, updates the binding relationship between virtual addresses and physical block numbers in real time through the dynamic mapping table, and synchronously updates the associated entries of the corresponding virtual addresses in the dynamic mapping table when physical block numbers are remapped.

[0044] Specifically, in the above steps, the mapping relationship between the virtual address of the mobile terminal system and the physical block physical number is established through the coordinated operation of the physical block index layer and the address translation layer. The physical block index layer first performs a basic identifier configuration operation for each physical block, assigning a unique index identifier to each physical block. This index identifier forms a strict one-to-one association with the existing physical number of the physical block, ensuring that the corresponding physical number can be directly located through the index identifier. Simultaneously, the physical block index layer marks a channel ownership identifier within the index entry of each physical block. This channel ownership identifier is divided into two categories: first channel identifier and second channel identifier. Physical blocks belonging to the first channel of 32-bit memory and physical blocks belonging to a single channel of 16-bit memory are uniformly marked with the first channel identifier, while physical blocks belonging to the second channel of 32-bit memory are marked with the second channel identifier. The core function of this channel ownership identifier is to assist in quickly matching the range of physical numbers corresponding to a single channel of 16-bit memory, providing an intuitive basis for subsequent judgment of whether the memory allocation request meets the requirements of the 16-bit memory channel. After the physical block index layer completes the basic index and identifier configuration, the address translation layer maintains the mapping table based on the index entries generated by the physical block index layer. Specifically, it builds and maintains a dynamic mapping table from virtual addresses to physical block numbers. This dynamic mapping table records and updates the binding relationship between virtual addresses and physical block numbers in real time. When a physical block number is remapped during subsequent memory allocation, the address translation layer immediately updates the virtual address entries associated with that physical block number in the dynamic mapping table. This ensures that the virtual address always accurately points to the remapped physical block number, avoiding memory access errors caused by outdated mapping relationships. This provides stable support for the accurate association between virtual addresses and physical storage areas throughout the entire memory allocation process.

[0045] In this embodiment, the physical block index layer is the core functional layer responsible for centralized management and index adaptation of key physical block information during the process of establishing the mapping relationship between virtual addresses and physical numbers in the memory management unit. Its core role is to construct standardized information entries for each physical block and build a bridge between the underlying attributes of the physical block and the upper-level address translation logic. In actual operation, the physical block index layer first assigns a unique index identifier to each numbered physical block. This index identifier forms a strict one-to-one correspondence with the physical number of the physical block. That is, the corresponding physical number can be directly located through any index identifier, and conversely, the associated index identifier can be quickly queried through the physical number. This association design avoids the risk of the physical number being directly exposed in the address translation process and improves the efficiency of subsequent information retrieval.

[0046] Meanwhile, the physical block index layer explicitly marks the channel affiliation identifier of each physical block within its corresponding index entry. This identifier is designated as either the first channel identifier or the second channel identifier, depending on the actual memory channel to which the physical block belongs (32-bit memory channel 1, 32-bit memory channel 2, or 16-bit memory channel 1). Physical blocks belonging to the first 32-bit memory channel and the 16-bit memory channel 1 are uniformly marked with the first channel identifier, while those belonging to the second 32-bit memory channel are marked with the second channel identifier. This channel affiliation identifier directly reflects the channel attribute of the physical block, providing a direct basis for quickly matching the physical number range of the 16-bit memory channel and determining whether a memory allocation request crosses channels.

[0047] In addition, the physical block index layer will synchronize the status information of physical blocks in real time (such as idle or occupied) and store the complete index entries (including index identifier, physical number association, channel ownership identifier, and physical block status) in a dedicated index database for the address translation layer to call. This ensures that the address translation layer can accurately obtain the core attributes of physical blocks when maintaining the dynamic mapping table, avoids mapping errors caused by missing information, and provides basic support for the stability and accuracy of the entire mapping relationship.

[0048] In this embodiment, the address translation layer is the core functional layer in the memory management unit responsible for connecting the virtual address of the mobile terminal system with the physical block physical number. Its core responsibility is to build and maintain a precise binding relationship between virtual addresses and physical numbers, ensuring that virtual memory access requests issued by the system can be accurately mapped to the corresponding physical storage area. It does not directly participate in the partitioning of physical blocks or the monitoring of channel status, but rather relies on index entries (including physical number, channel ownership identifier, etc.) provided by the physical block index layer to establish a mapping bridge from virtual address to physical number. During operation, the address translation layer generates a dynamic mapping table. This table records the association between each virtual address segment and the corresponding physical block number in real time and is dynamically updated according to changes in memory allocation status. For example, when a physical block number changes due to cross-channel remapping, the address translation layer immediately locates the virtual address entry corresponding to that physical block and synchronously updates the physical number information in the mapping table to avoid mismatch between the virtual address and the old physical number. Meanwhile, the address translation layer also handles the indirect translation of virtual addresses to physical addresses. The system only needs to access the virtual address, and the address translation layer can find the corresponding physical address by querying the dynamic mapping table and then locating the actual physical address using information from the physical block index layer. This eliminates the need for the system to directly manipulate the physical address, ensuring the security of physical memory while meeting the virtual memory management needs of mobile terminals. In 16-bit memory optimization allocation scenarios, the dynamic update capability of the address translation layer is particularly crucial. When a cross-channel request is remapped to a 16-bit single-channel physical address, it can quickly update the mapping relationship, ensuring that system access to virtual addresses always points to the correct 16-bit physical memory block. This avoids system failures caused by address translation errors and provides underlying support for the smoothness and stability of the entire memory allocation process.

[0049] Optionally, after establishing the mapping relationship between the virtual address used by the mobile terminal system and the physical number corresponding to each of the multiple physical blocks through the memory management unit in step S103, the channel status monitoring layer can also collect and statistically analyze the memory occupancy rate, number of free physical blocks and memory fragmentation rate of each of the 16-bit memory single channel, the first 32-bit memory channel and the second 32-bit memory channel in real time; feed the statistical data back to the memory management unit, and dynamically select free physical blocks with fragmentation rates lower than the set fragmentation rate threshold and contiguous addresses as candidate equivalent physical numbers during the remapping process.

[0050] The channel status monitoring layer is the core functional layer in the memory management unit responsible for real-time monitoring and statistics of the operating status of each memory channel. Its core value lies in providing accurate and real-time channel resource data support for memory allocation decisions, avoiding allocation conflicts or resource waste caused by untimely understanding of channel status. It does not directly participate in core operations such as physical block partitioning and address mapping. Instead, it relies on the channel ownership identifiers pre-marked by the physical block index layer to establish a connection with each memory channel, ensuring accurate identification and differentiation of physical block sets for 16-bit memory single channels, 32-bit memory first channels, and second channels. During operation, the channel status monitoring layer dynamically tracks the resource status of each channel at fixed intervals or in a triggered manner. It calculates the ratio of occupied physical block capacity to the total channel capacity by scanning the usage markers of physical blocks within each channel to obtain the memory utilization rate. It counts the number of unallocated physical blocks to calculate the total number of free physical blocks. By analyzing the address continuity of free physical blocks, it calculates the proportion of scattered free physical blocks to the total number of free physical blocks to obtain the memory fragmentation rate. These statistical data are compiled into standardized status reports and continuously fed back to the memory management unit. This provides data support for the memory management unit to determine the channel ownership of target physical blocks, filter free physical blocks for remapping, and update the dynamic mapping table. It also helps to promptly identify resource bottlenecks in each channel (such as excessively high fragmentation rates in a particular channel), providing a reference for subsequent optimization of memory allocation strategies and ensuring the efficiency and stability of the entire memory management system. For example, during the remapping process, free physical blocks with fragmentation rates below a set fragmentation threshold and contiguous addresses are dynamically selected as candidate equivalent physical blocks.

[0051] Specifically, in the above steps, after the memory management unit completes the mapping relationship between the mobile terminal system's virtual address and the physical block physical number, the channel status monitoring layer will initiate a real-time monitoring process. Based on the channel ownership identifier marked on each physical block in the physical block index layer, it distinguishes the physical block ranges of the 16-bit memory single channel, the 32-bit memory first channel, and the 32-bit memory second channel, and then performs data collection and statistics for each of the three channels. Optionally, it further tracks the capacity percentage of allocated physical blocks in each channel in real time to calculate memory occupancy, counts the total number of currently unused free physical blocks in each channel, and analyzes the distribution of scattered free physical blocks in each channel to calculate memory fragmentation rate. After the data statistics are completed, the channel status monitoring layer will feed back these statistical data reflecting the resource status of each channel to the memory management unit in real time. After receiving data, the memory management unit (MMU) determines, based on the status information, whether the channel affiliation of the target physical block in subsequent memory allocation requests meets the requirements of a single 16-bit memory channel. Furthermore, when physical block remapping is required, it selects contiguous, low-load free physical blocks as equivalent replacement resources based on the number of free physical blocks and fragmentation rate for each channel. Here, "low load" must be below a set load threshold, which can be set according to actual conditions. Simultaneously, based on changes in the physical block status, the dynamic mapping table maintained by the address translation layer is updated synchronously to ensure that the binding relationship between virtual addresses and physical numbers remains consistent with the current channel resource status, avoiding memory access errors caused by mapping lag.

[0052] In another optional embodiment, in step S103, the memory management unit establishes a mapping relationship between the virtual address used by the mobile terminal system and the physical number corresponding to each of the multiple physical blocks. The address translation layer of the memory management unit can also perform virtual address space folding processing to map the virtual address spaces corresponding to the first and second channels of the 32-bit memory to the virtual address space corresponding to a single physical channel of the 16-bit memory. A channel offset dynamic adjustment table is established, recording the offset mapping relationship between the virtual addresses corresponding to the first and second channels of the 32-bit memory and the virtual address of the single physical channel of the 16-bit memory. When the memory management unit receives a memory allocation request, it identifies the cross-channel access characteristics in the memory allocation request based on the dynamic adjustment table and performs a transparent conversion from the virtual address to the physical address of the single physical channel of the 16-bit memory.

[0053] In the above optional embodiments, when establishing the mapping relationship between virtual addresses and physical numbers through the memory management unit, the core relies on the address translation layer of the memory management unit to perform virtual address space folding processing. Its core logic is to integrate and map the virtual address spaces corresponding to the first and second channels in 32-bit memory to the virtual address space range of a single physical channel in 16-bit memory, according to preset rules. Since the total virtual address space of the dual-channel 32-bit memory is related to the total virtual address space of the single-channel 16-bit memory (typically, the dual-channel 32-bit address space is twice that of the single-channel 16-bit memory), the address translation layer will use a specific algorithm to fold the virtual address range of the second 32-bit channel to the address range of the single 16-bit channel. This ensures that the virtual addresses originally belonging to the two 32-bit channels can ultimately correspond to the virtual address range of a single 16-bit physical channel, avoiding address overflow problems caused by 16-bit memory only supporting a single channel.

[0054] To ensure the accuracy and stability of virtual address space folding processing, a dynamic channel offset adjustment table must be established simultaneously. This table records in detail the offset mapping relationship between the virtual address of the first 32-bit memory channel, the virtual address of the second 32-bit memory channel, and the virtual address of a single 16-bit memory physical channel. For example, for a virtual address of the first 32-bit channel, a fixed offset value is recorded between it and the corresponding virtual address of the 16-bit single channel. For the virtual address of the second 32-bit channel, another set of offset values ​​is recorded to ensure that each virtual address of the 32-bit channel can be matched with the virtual address of the 16-bit single channel through the corresponding offset calculation.

[0055] When the memory management unit receives a memory allocation request from the mobile terminal system, it first analyzes the virtual address carried in the request based on the channel offset dynamic adjustment table. By querying the adjustment table, it determines whether the virtual address originally belonged to the first or second channel of 32-bit memory, thus quickly identifying whether there are cross-channel access characteristics. That is, the virtual address in the request corresponds to the second channel of 32-bit memory, while 16-bit memory only supports a single channel and requires special handling. Subsequently, the memory management unit automatically converts the virtual address in the request into the physical address corresponding to the single physical channel of 16-bit memory according to the offset mapping relationship recorded in the adjustment table. The entire conversion process does not require additional intervention at the system level, realizing a transparent conversion from virtual address to 16-bit single physical channel physical address. This ensures the accuracy of address translation during 16-bit memory allocation and does not require modification of the original memory access logic of the system, further improving compatibility and ease of use.

[0056] Step S104: After receiving the memory allocation request sent by the mobile terminal system, determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory.

[0057] As an optional embodiment, in step S104, the physical number of the target physical block is parsed from the memory allocation request; the physical block index layer is called to verify whether the physical number of the target physical block is within the physical number range of a single 16-bit memory channel, and to verify whether the channel ownership identifier of the target physical block is the first channel identifier. Further, if the physical number exceeds the physical number range of a single 16-bit memory channel or the channel ownership identifier is the second channel identifier, it is determined that the target physical block does not belong to a single 16-bit memory channel, triggering the remapping process.

[0058] For example, after parsing the physical number of the target physical block from the memory allocation request, the index entries in the physical block index layer that are associated one-to-one with the physical number are called, and the channel ownership identifier marked in the index entries is read. Based on the rule that the physical number range corresponding to a single 16-bit memory channel completely overlaps with the physical number range of the first 32-bit memory channel, it is verified whether the physical number belongs to the physical number range corresponding to a single 16-bit memory channel, and it is determined whether the read channel ownership identifier is the first channel identifier. If the physical number belongs to the physical number range corresponding to a single 16-bit memory channel, and the channel ownership identifier is the first channel identifier, then the target physical block is determined to belong to a single 16-bit memory channel. If the physical number does not belong to the physical number range corresponding to a single 16-bit memory channel, or the channel ownership identifier is the second channel identifier, then the target physical block is determined not to belong to a single 16-bit memory channel.

[0059] In the above embodiment, firstly, the physical number corresponding to the target physical block indicated by the memory allocation request sent by the mobile terminal system is extracted. This physical number is the core basis for subsequent judgment, directly associated with the storage location and channel attribute of the target physical block. Next, the memory management unit calls the index entries in the physical block index layer that are one-to-one associated with the physical number. Because each index entry in the physical block index layer is pre-marked with the channel ownership identifier of the corresponding physical block, the channel ownership identifier (i.e., the first channel identifier or the second channel identifier) ​​of the target physical block can be directly read through the index entry. Subsequently, based on the established rule that the physical number range corresponding to a single 16-bit memory channel completely overlaps with the physical number range of the first 32-bit memory channel, two verification operations are performed simultaneously: first, verifying whether the extracted physical number is within the physical number range corresponding to a single 16-bit memory channel to confirm whether its storage location meets the channel range requirements of 16-bit memory; second, determining whether the channel ownership identifier read from the index entry is the first channel identifier to further confirm whether the channel attribute of the target physical block is consistent with the attribute of a single 16-bit memory channel. Finally, a judgment conclusion is drawn based on the results of the two verifications. If the physical number falls within the range corresponding to a single 16-bit memory channel, and the channel identifier is the first channel identifier, it indicates that the storage location and channel attributes of the target physical block both meet the requirements of a single 16-bit memory channel. Therefore, the target physical block is determined to belong to a single 16-bit memory channel. If the physical number does not fall within the above range, or the channel identifier is the second channel identifier, it indicates that the target physical block either has a storage location outside the 16-bit memory range, or its channel attribute belongs to the second channel of 32-bit memory. Neither of these meets the requirements of a single 16-bit memory channel. Therefore, the target physical block is determined not to belong to a single 16-bit memory channel.

[0060] Step S105: If the target physical block belongs to a single channel of 16-bit memory, then in response to the memory allocation request, the physical number of the target physical block is returned to the memory management unit.

[0061] Step S106: The memory management unit updates the mapping relationship based on the returned physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

[0062] For example, suppose an instant messaging application in an Android system on a mobile terminal needs to store temporary chat data and sends a 16KB memory allocation request to the system. After receiving the request, the system determines in step S104 that the target physical block number indicated by the request is 000120. This number falls within the physical number range corresponding to a single 16-bit memory channel (preset to 000001-002000, consistent with the first channel range of 32-bit memory). Furthermore, the channel ownership identifier of this physical block is found to be the first channel through the physical block index layer. Therefore, it is determined that the target physical block belongs to a single 16-bit memory channel. After proceeding to step S105, the memory management unit responds to the allocation request and returns the physical number 000120 of the target physical block to itself for subsequent processing. Subsequently, the memory management unit queries the pre-established dynamic mapping table between virtual addresses and physical numbers, finds the virtual address 0x8000120 corresponding to physical number 000120, and then, based on this mapping relationship, imports the temporary chat data that the application needs to store into the 16-bit memory space corresponding to number 000120 through the memory controller via virtual address 0x80001200. The above process does not require additional physical block remapping operations and quickly completes memory allocation and data storage.

[0063] Step S105: If the target physical block does not belong to a single channel of 16-bit memory, the physical number in the memory allocation request is remapped to an equivalent physical number within the single channel range, and the equivalent physical number is returned to the memory management unit.

[0064] Step S106: The memory management unit updates the mapping relationship based on the returned effective physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

[0065] For example, suppose in the Android system of a mobile terminal, an image processing application needs to load a high-resolution image and sends a 32KB memory allocation request to the system. The system determines in step S104 that the target physical block number indicated by the request is between 002200 and 002207 (each physical block is 4KB, and there are a total of 8 physical blocks). The preset range for the physical block number corresponding to a single 16-bit memory channel is 000001 to 002000. 002200 to 002207 are outside this range, and the physical block index layer shows that the channel affiliation identifier for these physical blocks is the second channel. Therefore, the system determines that the target physical block does not belong to a single 16-bit memory channel and proceeds to step S106 for further processing. The memory management unit first retrieves data from the channel status monitoring layer to obtain information on free physical blocks within a single 16-bit memory channel. It finds eight physical blocks numbered 001500 to 001507 that are currently free, with consecutive physical addresses meeting the 32KB capacity requirement. This group of physical blocks is then identified as equivalent physical blocks, and their corresponding physical numbers 001500 to 001507 are the equivalent physical numbers. Subsequently, the equivalent physical numbers 001500 to 001507 are returned to the memory management unit. Next, the dynamic mapping table between virtual addresses and physical numbers is consulted, finding that the virtual addresses corresponding to this group of equivalent physical numbers are 0x80003C00 to 0x800043FF. Finally, based on this mapping relationship, the high-definition image data required by the image processing application is imported into the corresponding 16-bit memory space, completing memory allocation and data storage.

[0066] As an optional embodiment, step S105, remapping the physical number in the memory allocation request to an equivalent physical number within a single channel, includes: obtaining all free physical blocks within a single 16-bit memory channel and sorting all free physical blocks from high to low memory access frequency; parsing the number of physical blocks corresponding to the memory to be allocated and the distribution characteristics of consecutive physical blocks from the memory allocation request; based on the rule of preserving the continuity characteristics of adjacent physical blocks, selecting a set of candidate physical blocks from the sorted free physical blocks that match the size of the memory to be allocated and meet the continuity requirement; retrieving a preset maximum replacement block number threshold and verifying whether the number of physical blocks in the candidate physical block set does not exceed the maximum replacement block number threshold; if it does not exceed the threshold, determining the physical number corresponding to the candidate physical block set as the equivalent physical number; if it exceeds the threshold, terminating the remapping process and returning a memory allocation failure message to the mobile terminal system; synchronizing the equivalent physical number to the address translation layer, updating the binding relationship between the physical number and the virtual address in the dynamic mapping table, replacing it with the binding relationship between the equivalent physical number and the virtual address, and completing the remapping of the physical number.

[0067] For example, in an optional embodiment of step S105, the implementation of physical number remapping relies on the resource data of the channel status monitoring layer and the preset rules of the memory management unit to proceed step by step. First, the memory management unit calls the 16-bit memory single channel free physical block data statistically collected in real time by the channel status monitoring layer to obtain information on all currently unallocated free physical blocks. At the same time, it combines the historical data recorded in the memory access log to calculate the access heat of each free physical block. Based on the access frequency and cache hit count in the recent preset time period, the free physical blocks are sorted from high to low access heat to ensure that physical blocks that are easier to access quickly are selected in the future. Next, the memory management unit parses the memory allocation request, extracts the total capacity of the memory to be allocated, and calculates the required number of physical blocks in combination with the fixed specifications of a single physical block (such as 4KB / block). At the same time, it analyzes the continuous physical block distribution characteristics implied in the request (such as whether the physical block addresses are required to be continuous to adapt to large data read and write). Subsequently, based on the rule of preserving the continuity of adjacent physical blocks, the sorted list of free physical blocks is filtered, prioritizing the search for free physical blocks in high-frequency areas that match the number of available blocks and have consecutive physical addresses, forming a candidate physical block set. For example, when allocating 24KB of memory (requiring six 4KB physical blocks), six consecutive physical blocks will be selected as candidates from the high-frequency free blocks. Then, the memory management unit retrieves the system's preset maximum replacement block threshold (this threshold is typically set based on the total number of physical blocks in a single 16-bit memory channel and daily memory allocation needs, such as 10), and compares the actual number of blocks in the candidate physical block set with the threshold. If the number of candidate blocks does not exceed the threshold, it indicates that the current resource usage is within a reasonable range, and the physical number corresponding to the candidate physical block set is determined as the equivalent physical number. If the number of candidate blocks exceeds the threshold, it indicates that a single remapping may excessively occupy free resources, affecting subsequent allocation requests. In this case, the remapping process is terminated, and a memory allocation failure message is returned to the mobile terminal system. Finally, the memory management unit synchronizes the determined equivalent physical number to the address translation layer. The address translation layer locates the binding entry between the original physical number and the virtual address in the dynamic mapping table, replaces the original physical number with the equivalent physical number, and updates the binding relationship to ensure that subsequent virtual address accesses can accurately point to the remapped physical block, thereby completing the entire physical number remapping process.

[0068] The key principles behind the above implementation process revolve around the locality of memory, resource balancing, and address consistency. Sorting free physical blocks by memory access frequency is based on the principle of locality of memory in computer systems. This means that during program execution, memory accesses tend to concentrate on recently used areas. High-frequency free physical blocks are more likely to still be in the memory controller's cache, eliminating the need to load them from less efficient storage areas during subsequent allocations, significantly reducing data access latency—a crucial factor in improving memory read / write efficiency. The rule of preserving the contiguous nature of adjacent physical blocks stems from the memory controller's addressing mechanism. Consecutive physical blocks reduce address jumps during read / write operations, lowering addressing overhead and preventing the accumulation of small free areas due to discrete allocations. This effectively alleviates memory fragmentation and ensures the long-term availability of a single 16-bit memory channel. Setting a maximum replacement block threshold is essentially to achieve balanced memory resource allocation, preventing a single remapping request from consuming too many free physical blocks, which could cause subsequent higher-priority or more urgent memory allocation requests to fail due to insufficient resources, thus maintaining a stable overall supply of system memory resources. The synchronous update of the dynamic mapping table is based on the consistency principle of the binding relationship between virtual addresses and physical addresses. The core requirement of virtual memory management is the real-time accuracy of address mapping. If the binding relationship is not updated after remapping, the virtual address will point to the invalid original physical block, causing memory access errors. Therefore, updating the mapping table is a necessary step to ensure normal memory access after remapping.

[0069] Therefore, the above embodiments, in multiple dimensions such as memory performance, resource management, and system compatibility, prioritize and filter physical blocks based on access frequency, ensuring that subsequent data reads and writes use high-frequency blocks first. This significantly shortens memory access waiting time and improves the efficiency of Android system accessing 16-bit memory. This is particularly beneficial for applications with high-frequency read / write operations (such as instant messaging and video playback), resulting in a noticeable improvement in operational smoothness. The filtering method that preserves the continuity of physical blocks effectively reduces the generation of memory fragmentation in a single 16-bit memory channel, lowering the probability of large memory allocation failures due to excessive fragmentation. Simultaneously, the read / write operations of contiguous blocks reduce the workload of the memory controller, further optimizing application performance. The maximum replacement block threshold verification mechanism avoids excessive consumption of idle resources by a single remapping request, ensuring a balanced allocation of system memory resources, reducing the risk of system lag or failure due to local resource exhaustion, and improving the overall stability of the mobile terminal. The synchronous update of the dynamic mapping table enables transparent processing of physical number remapping. The entire process does not require modification of the upper-layer memory access logic of the mobile terminal system. It is compatible with the original virtual memory management architecture of the Android system and effectively solves the problem of 16-bit memory cross-channel allocation. It takes into account the practicality and compatibility of the technical solution and ensures that the remapping operation does not affect the normal operation of the original system functions.

[0070] Further optionally, the total amount of memory to be allocated corresponding to the memory allocation request is a first preset amount, which is composed of a second preset amount and a third preset amount, wherein the physical block corresponding to the second preset amount belongs to the first channel of 32-bit memory or a single channel of 16-bit memory, and the physical block corresponding to the third preset amount belongs to the second channel of 32-bit memory. Based on the above assumptions, in step S105, the number of physical blocks corresponding to the memory to be allocated and the distribution characteristics of consecutive physical blocks are parsed from the memory allocation request. Based on the rule of preserving the continuity characteristics of adjacent physical blocks, a set of candidate physical blocks that match the size of the memory to be allocated and meet the continuity requirement are selected from the sorted free physical blocks. This includes: separating the first channel physical number subset corresponding to the second preset amount and the second channel physical number subset corresponding to the third preset amount from the memory allocation request; based on the rule of preserving the continuity characteristics of adjacent physical blocks, selecting consecutive physical blocks that match the size of the third preset amount and are not subsequently occupied in the 16-bit memory single channel free physical blocks as candidate subsets from the sorted 16-bit memory single channel free physical blocks; merging the first channel physical number subset corresponding to the second preset amount with the physical numbers of the candidate subsets to form a set of candidate physical blocks that match the size of the first preset amount and all belong to the 16-bit memory single channel.

[0071] The core assumption of the above embodiments is that the total amount of memory to be allocated in the memory allocation request (the first preset amount) consists of two parts. One part (the second preset amount) of physical blocks belongs to either the first channel of 32-bit memory or a single channel of 16-bit memory (i.e., it meets the requirements for 16-bit memory use). The other part (the third preset amount) of physical blocks belongs to the second channel of 32-bit memory (belonging to the cross-channel part). It is necessary to integrate the two parts into a set of physical blocks belonging to a single channel of 16-bit memory through splitting and targeted filtering. For example, if a document editing application on a mobile terminal initiates a 40KB memory allocation request (the first preset amount is 40KB), calculated based on a 4KB specification for a single physical block, a total of 10 physical blocks are required. Among them, 24KB (6 physical blocks, the second preset amount) corresponds to physical numbers 000500-000505, which are verified as first channel identifiers after channel attribution identification and are within the compliance range. The remaining 16KB (4 physical blocks, third preset quantity) corresponds to physical numbers 002100-002103, and the channel ownership identifier is the second channel identifier, which belongs to the cross-channel part. Therefore, it is necessary to complete the remapping through the special processing in step S106.

[0072] Continuing based on the above assumptions, in the above embodiment, firstly, the memory management unit performs fine-grained parsing of the memory allocation request. Combining the channel ownership identifier information of the physical block index layer, it splits the physical number corresponding to the request into two subsets: one is the subset of physical numbers corresponding to the first channel of the second preset quantity, namely the six physical blocks 000500-000505, which already meet the requirements of a 16-bit single-channel memory and require no additional processing; the other is the subset of physical numbers corresponding to the second channel of the third preset quantity, namely the four physical blocks 002100-002103, which need to be replaced with physical blocks of a 16-bit single-channel memory through remapping. Next, the memory management unit filters among the free physical blocks of the 16-bit single-channel memory, which are already sorted by access frequency, according to the rule of preserving the continuity of adjacent physical blocks. During the filtering, it prioritizes finding physical blocks in the high-frequency free area that match the size of the third preset quantity (16KB) (i.e., four consecutive physical blocks) and are located in the subsequent unoccupied area of ​​the 16-bit single-channel memory, avoiding the disruption of the original continuous space due to insertion into the intermediate area. For example, in the sorted list of free blocks, four physical blocks (000506-000509) are found to have consecutive addresses, are currently free, and belong to a high-intensity region. These are then identified as a candidate subset matching the third preset value. Finally, the memory management unit merges the first channel physical number subset (000500-000505) corresponding to the second preset value with the selected candidate subset (000506-000509), forming 10 consecutive physical blocks (000500-000509). The total capacity of this set is exactly 40KB (matching the first preset value), and all physical blocks belong to a single 16-bit memory channel. This set is ultimately used as a candidate physical block set for subsequent determination of equivalent physical numbers.

[0073] The core advantage of this approach lies in the fact that it avoids remapping all physical blocks, replacing only the third preset portion across channels. This reduces the operational cost of remapping while preserving memory access continuity by merging adjacent physical blocks. The merged physical blocks have contiguous addresses, which can meet the read / write needs of document editing applications for large blocks of contiguous memory, reducing the addressing overhead of the memory controller. Simultaneously, it prioritizes highly active free blocks as a candidate subset, ensuring that the replaced physical blocks still have high access efficiency, thus balancing the economics of remapping with the performance requirements of memory usage.

[0074] For example, assuming the mobile terminal system is an Android system, the first preset amount is 230M, the second preset amount is 200M, and the third preset amount is 30M. The selected candidate subset is 30M consecutive physical blocks that are not occupied by a single 16-bit memory channel. The physical block number of the second channel corresponding to the original 30M is not returned. Instead, the physical block number of the first channel corresponding to 200M is merged with the physical block number of the 30M candidate subset as the equivalent physical block number.

[0075] As an optional embodiment, in step S105, before retrieving the preset maximum replacement block number threshold and verifying whether the number of physical blocks in the candidate physical block set does not exceed the maximum replacement block number threshold, physical block access frequency and memory fragmentation rate data for a single 16-bit memory channel, the first 32-bit memory channel, and the second 32-bit memory channel can be collected to establish a channel load balancing matrix and calculate the access frequency weight and fragmentation rate weight of each channel in real time. When a physical block of the second 32-bit memory channel is detected in the memory allocation request, based on the channel load balancing matrix, physical blocks with a load rate lower than a set load rate threshold and contiguous addresses within the single 16-bit memory channel are preferentially selected as candidate physical blocks and merged into the candidate physical block set. Finally, an association evaluation model is used to analyze the access association strength between physical blocks within the single 16-bit memory channel, and the global continuity of the candidate physical block set is optimized based on the evaluation results.

[0076] In the above embodiments, firstly, the access frequency of physical blocks in each channel is collected with a minimum statistical period of 10ms. Simultaneously, the instantaneous access frequency in the most recent 10ms and the sliding access frequency in the most recent 1s are distinguished to avoid single burst accesses interfering with load judgment. The memory fragmentation rate of each channel is also calculated, further refined into the proportion of small fragments less than 4KB and the proportion of large fragments from 4KB to 64KB, thus accurately capturing the impact of different fragment sizes on memory allocation. After collection, the data can be cleaned to remove outliers such as a sudden increase of more than 10 times in the instantaneous access frequency of a certain channel, and replaced with the average value of the previous 5 periods for that channel. Then, the access frequency and fragmentation rate of different channels are uniformly mapped to the 0-1 range to eliminate evaluation bias caused by different numerical magnitudes.

[0077] Next, the weights of the load dimensions are dynamically determined. For example, initially, the base weight for access frequency is set to 0.6 and the base weight for fragmentation rate is set to 0.4. If the fragmentation rate of a channel exceeds 80%, the fragmentation rate weight is increased to 0.5 and the access frequency weight is decreased to 0.5 to prioritize resolving allocation failures caused by fragmentation. If the access frequency of a channel exceeds 90%, the access frequency weight is increased to 0.7 and the fragmentation rate weight is decreased to 0.3 to prioritize ensuring access performance. Subsequently, a 3-row × 3-column matrix structure is constructed. The rows correspond to the three types of channels to be evaluated: 16-bit single channel, 32-bit first channel, and 32-bit second channel. The columns correspond to the three load dimensions: access frequency load, fragmentation rate load, and overall load. First, the product of the standardized access frequency and the corresponding weight for each channel is calculated, and the result is filled into the access frequency load column. Then, the product of the standardized fragmentation rate and the corresponding weight for each channel is calculated and filled into the fragmentation rate load column. Finally, the access frequency load value and the fragmentation rate load value for each channel are added together to obtain the overall load value reflecting the overall load level of the channel, and this value is filled into the corresponding column. The matrix will re-collect data, calculate weights and update values ​​every 50ms. When a memory allocation request is detected, the matrix will be updated immediately to ensure the timeliness of the data.

[0078] Next, candidate physical blocks are selected based on the channel load balancing matrix. When a memory allocation request includes a 32-bit second-channel physical block, low-load and address-contiguous physical blocks from the 16-bit single-channel are prioritized to supplement the candidate physical block set. First, the metadata of the memory allocation request is parsed to confirm whether the request includes an allocation requirement for a 32-bit second-channel physical block. For example, whether the requested address range covers the 32-bit second channel, or whether the request specifies that channel. If it does, the latest channel load balancing matrix is ​​retrieved; otherwise, candidate physical blocks are selected according to the original logic, without executing subsequent special selection steps. Then, the comprehensive load value of the 16-bit single-channel in the matrix is ​​extracted and compared with a preset load rate threshold (e.g., comprehensive load value ≤ 0.4). If the comprehensive load value of the 16-bit channel does not exceed the threshold, it is determined to be a low-load channel and enters the physical block selection stage; if it exceeds the threshold, selection from that channel is abandoned, and only the 32-bit second-channel physical blocks are processed according to the original logic. The physical block address table of the 16-bit channel is then retrieved. This table records the starting address, block size, and consecutive status of adjacent blocks for all available physical blocks. Starting from the beginning of the address table, the table is scanned in ascending order to mark consecutive physical block sequences where the end address of adjacent physical blocks is completely connected to the starting address of the next block and both are in a usable state. The starting address, total length (number of consecutive blocks × single block size), and number of blocks in each consecutive block sequence are also recorded. The number and single block size of the 32-bit second channel physical blocks in the memory allocation request are then extracted. From the marked consecutive block sequences, sequences with a total length not less than the total size of the requested block and a single block size consistent with the requested block are selected. If multiple consecutive sequences meet the criteria, the sub-region with a lower local access frequency, fragmentation rate, and overall load value will be prioritized. Then, the selected 16-bit channel continuous physical block sequence is added to the candidate physical block set according to the principle of address continuity priority. During the fusion process, the original 32-bit second channel candidate physical blocks are retained, and only the 16-bit channel physical blocks are used as supplements. The number of supplements does not exceed 50% of the maximum replacement block threshold to avoid excessive replacement leading to channel load imbalance.

[0079] After fusion, a correlation evaluation model is used to analyze the access correlation strength between physical blocks within a single 16-bit memory channel to optimize the global continuity of the candidate set. First, historical access logs of the 16-bit channel candidate physical blocks are extracted, including the access time, accessing process / thread, and access type (read / write) for each block. Then, the correlation strength is evaluated based on the common access frequency (i.e., the number of times two blocks are accessed consecutively by the same process / thread) and the access time difference (the time interval between consecutive accesses). The higher the common access frequency and the smaller the access time difference, the stronger the correlation. Subsequently, the candidate physical blocks are sorted from high to low correlation strength, prioritizing the retention of consecutive block sequences with high correlation strength and removing isolated blocks with low correlation strength and non-contiguous addresses. This ensures that the physical blocks within the candidate set are not only locally contiguous in address but also have strong global access behavior correlation, reducing address jumps during memory scheduling. Finally, it is verified whether the total number of the fused and optimized candidate physical block set does not exceed the maximum replacement block threshold. If it does not exceed the threshold, the subsequent threshold verification stage is initiated. If it does exceed the threshold, some 16-bit channel physical blocks are removed from low to high correlation strength until the number of candidate blocks meets the threshold requirement.

[0080] Furthermore, a specific implementation of the association evaluation model in the above embodiments is a statistical model based on access history. The MMU internally maintains an association strength matrix, where the matrix element S... ij This represents the association strength between physical block i and physical block j, calculated by statistically analyzing the frequency with which physical blocks i and j are accessed consecutively within a specific time window. When selecting a remapping target for physical block X, the association evaluation model can filter out several physical blocks with high association strength with physical block X and prioritize mapping contiguous free memory regions near these physical blocks. This effectively improves the locality of data access and reduces latency for subsequent accesses.

[0081] The core structure of the correlation assessment model is based on the correlation strength matrix running within the MMU, and includes a time window configuration module, a statistical calculation module, and a filtering and mapping module. Each row and column of the correlation strength matrix corresponds to a unique identifier for all physical blocks within a single 16-bit memory channel. Each element in the matrix corresponds to a pair of physical block correlation strength values. The time window configuration module sets the time range for statistical correlation strength calculation, the statistical calculation module processes access log data and calculates correlation strength values, and the filtering and mapping module is used for subsequent physical block remapping targets and matching of contiguous address regions. In the step of optimizing the global continuity of the candidate physical block set, the correlation assessment model first retrieves the physical block access logs of a preset duration through the time window configuration module. The statistical calculation module then iterates through the log data, counts the frequency of consecutive accesses of any two physical blocks within the time window, and assigns the calculated frequency values ​​to the corresponding elements in the correlation strength matrix. When selecting a remapping target for physical block X, the correlation evaluation model extracts all elements from the row corresponding to physical block X in the correlation strength matrix through the filtering mapping module, selecting several physical blocks with higher values. Then, it connects to the physical block address mapping table to find contiguous free memory regions near these high-correlation-strength physical blocks, prioritizing the inclusion of physical blocks in these regions into the candidate physical block set. During overall optimization of the candidate set, the correlation evaluation model traverses the correlation strength matrix data corresponding to all physical blocks in the set, using the correlation strength between physical blocks as the core criterion. It retains sequences of physical blocks with high correlation strength and contiguous addresses, while eliminating isolated physical blocks with low correlation strength. This improves the global access continuity of the candidate set, enhances the locality of data access, and reduces access latency.

[0082] In another optional embodiment, before verifying whether the number of physical blocks in the candidate physical block set does not exceed the maximum replacement block threshold in step S105, a dynamic weight allocation model based on memory access frequency can be constructed. This involves collecting physical block access frequency and memory fragmentation rate data for a single 16-bit memory channel, the first 32-bit memory channel, and the second 32-bit memory channel, establishing a channel load balancing matrix, and calculating the access frequency weight and fragmentation rate weight for each channel in real time. When a physical block from the second 32-bit memory channel is detected in the memory allocation request, a greedy algorithm is used, based on the channel load balancing matrix, to prioritize physical blocks within the 16-bit memory channel whose load rate is lower than a set load rate threshold and whose addresses are contiguous, as candidate physical blocks, and these are then merged into the candidate physical block set. A quantum entanglement entropy model is used to evaluate the correlation between physical blocks within the 16-bit memory channel, and a topology channel mapping matrix is ​​constructed based on the correlation evaluation results. A quantum annealing algorithm is used to optimize the topology channel mapping matrix, dynamically adjusting the channel selection strategy of the candidate physical block set to obtain the globally optimal candidate physical block set.

[0083] The core of the above optional embodiments is to achieve intelligent screening and strategy optimization of the candidate physical block set by integrating dynamic load awareness and quantum optimization algorithms. This satisfies the allocation requirements of a single 16-bit memory channel while also considering load balancing, access efficiency, and optimal global resource utilization of the memory system. In one optional example, the memory management unit first constructs a dynamic weight allocation model based on memory access frequency. This model continuously collects key operational data from the single 16-bit memory channel, the first 32-bit memory channel, and the second 32-bit memory channel, including the real-time access frequency of physical blocks within each channel (i.e., the number of reads and writes per unit time) and the current memory fragmentation rate (i.e., the proportion of scattered free physical blocks to the total free blocks). This data is then integrated into a channel load balancing matrix. In the channel load balancing matrix, each channel corresponds to two core indicator dimensions. The memory management unit converts the access frequency and fragmentation rate into specific weight values ​​according to preset weight calculation rules. For example, a channel with a higher access frequency indicates a heavier current load, and the corresponding access frequency weight is lower (to avoid further exacerbating overload in subsequent allocations). The higher the fragmentation rate of a channel, the more scattered the available resources, and the lower the corresponding fragmentation rate weight (channels with more regular resources are preferred). Finally, the comprehensive load weight of each channel is obtained by weighted summation, which provides a quantitative basis for subsequent screening.

[0084] When the memory management unit detects that a memory allocation request includes a physical block of the second 32-bit memory channel (i.e., there is a cross-channel allocation requirement), it uses a greedy algorithm based on the channel load balancing matrix constructed above to perform preliminary screening of candidate physical blocks. The core logic of the greedy algorithm is to prioritize the selection of local optima. In this scenario, it prioritizes selecting blocks with high overall load weight (i.e., low load and low fragmentation rate) and contiguous physical addresses from the free physical blocks of a single 16-bit memory channel as candidate sub-blocks. Selecting contiguous blocks avoids adding new memory fragmentation, while low load ensures that the memory access pressure in the region where the selected block is located is low, reducing the latency of subsequent read and write operations. The fast decision-making characteristic of the greedy algorithm also ensures that the screening process does not consume too many system resources, balancing efficiency and preliminary optimization effects.

[0085] Optionally, when prioritizing candidate sub-blocks with high overall load weight and contiguous physical addresses, a real-time data acquisition link must first be constructed based on the channel status monitoring layer to continuously capture the core indicators of all free physical blocks within a single 16-bit memory channel: physical address information is used to determine continuity, real-time access frequency (the number of times the memory controller calls the block per unit time) is used to assess the load level, and fragmentation correlation (the address adjacency of the current physical block with surrounding free blocks) is used to indirectly reflect the region's fragmentation rate. The more concentrated the surrounding free blocks are, the higher the fragmentation correlation, indicating a lower fragmentation rate in the region. This data is synchronized to the channel load balancing matrix in real time, providing dynamic input for weight calculation. Next, the overall load weight is quantitatively calculated based on a preset dynamic weight allocation model. The model sets dynamic coefficients for access frequency and fragmentation correlation (the coefficient values ​​are adjusted in real time according to the overall system load; for example, when the system is under high load, the weight of low access frequency will increase), converting the two indicators into standardized scores from 0 to 1: the lower the access frequency (low load), the higher the corresponding score; the higher the fragmentation correlation (low fragmentation rate), the higher the corresponding score. Subsequently, a weighted summation is performed to obtain the comprehensive load weight value for each free physical block. A higher weight value indicates a better load status and resource regularity for that physical block and its surrounding area, thus granting it a higher screening priority. In the continuity screening stage, the memory management unit first sorts all free physical blocks in descending order according to their comprehensive load weight values. Then, starting with the physical block with the highest weight, it initiates the address continuity detection logic. This logic uses the address of the current physical block as a starting point and sequentially queries the status of adjacent physical blocks according to their block size (e.g., 4KB per block). If N consecutive physical blocks (N being the number of physical blocks required for memory allocation) are all free and their comprehensive load weight values ​​are all within a preset high-weight range, this group of consecutive physical blocks is marked as a candidate sub-block set. If the current high-weight physical blocks cannot form a continuous block group, the search continues downwards according to weight sorting, while setting a search termination threshold (e.g., if no matching continuous block group is found after searching the first 20% of high-weight blocks, the search range is expanded) to balance screening efficiency and optimal results.

[0086] Optionally, to ensure the reliability of the screening results, a dual verification mechanism should be added. First, the channel ownership identifier of the candidate sub-block set is verified through the physical block index layer to confirm that all blocks belong to a single 16-bit memory channel and are in an idle state, avoiding the inclusion of invalid blocks. Second, the memory access log is used to verify whether there are recent access conflict records in the candidate sub-block set, eliminating potential hardware or logical vulnerabilities. If the verification passes, the candidate sub-block set becomes the final screening result. If the verification fails, the process returns to the continuity screening stage to re-search until a block group meeting the criteria is found or it is confirmed that no usable resources are available. The entire process ensures low load, low fragmentation rate, and continuity characteristics of the candidate sub-blocks, while dynamic weights and real-time verification ensure the accuracy and adaptability of the screening.

[0087] To further enhance the access coordination of the candidate physical block set, the memory management unit introduces a quantum entanglement entropy model to evaluate the correlation between physical blocks within a single 16-bit memory channel. Originally used to describe the correlation of particles in a quantum system, the quantum entanglement entropy model is applied here to evaluate the access correlation between physical blocks. For example, physical blocks accessed consecutively by the same application or within the same time period, or those with adjacent addresses and similar read / write patterns, will have their correlation quantified as a higher entanglement entropy value. The memory management unit transforms this correlation evaluation result into a topology channel mapping matrix. Each element in the matrix represents the correlation strength between a pair of physical blocks; the stronger the correlation, the higher the corresponding element value in the matrix. The construction of this matrix intuitively reflects the cooperative access characteristics between physical blocks, providing a basis for subsequently selecting candidate blocks that can work efficiently together.

[0088] Because greedy algorithms may fall into local optima traps (i.e., while initially selected candidate blocks may meet low load and contiguous requirements locally, they may not be optimal from a global memory system perspective, potentially leading to resource strain on other channels), the memory management unit employs quantum annealing to optimize the topology channel mapping matrix. Quantum annealing excels at handling complex combinatorial optimization problems, simulating the annealing process of a quantum system to gradually converge to the global optimum while avoiding local optima. Specifically, the algorithm dynamically adjusts the channel selection strategy for the candidate physical block set based on the correlation strength of physical blocks in the topology matrix and the real-time load weights of each channel. For example, if initially selected candidate blocks belong to a 16-bit channel but could lead to significant fragmentation in a certain area of ​​that channel or cause uneven load distribution due to excessive concentration with other high-frequency access blocks, the algorithm will readjust the selection range of candidate blocks, prioritizing blocks with high correlation strength that can balance the global channel load, ultimately obtaining the globally optimal candidate physical block set. This optimization process ensures that candidate blocks meet the allocation requirements of a single 16-bit memory channel, while also taking into account the long-term stable operation of the entire memory system, reducing resource waste or performance bottlenecks caused by improper local decisions.

[0089] As an optional embodiment, during the physical number remapping process in step S105, if the number of physical blocks in the candidate physical block set exceeds the maximum replacement block threshold, the remapping process is terminated and a memory allocation failure message is returned to the mobile terminal system. Furthermore, a three-level rollback mechanism is used to repair mapping errors in the dynamic mapping table, wherein the repair methods include soft rollback, hard reset, and emergency degradation.

[0090] To build a full-link anomaly handling system, timely detection and repair of potential address mapping errors and physical block conflicts during remapping are crucial to ensuring the reliability of memory allocation and the stability of system operation. In the above embodiment, the memory management unit first initiates an allocation result verification module. The core responsibility of this module is to check the integrity and data consistency of the address mapping. Specifically, this module synchronously retrieves the dynamic mapping table of the address translation layer, the index entries of the physical block index layer, and the physical block status data of a single 16-bit memory channel to perform multi-dimensional verification: First, it compares the updated binding relationship between the equivalent physical number and the virtual address in the dynamic mapping table to ensure it completely matches the channel ownership identifier and physical address of the equivalent physical number in the physical block index layer, avoiding misalignment between the mapping entry and the actual physical block attributes; second, it writes test data to the remapped candidate physical block set through the memory controller and then reads the data to verify its integrity, checking for hardware-level read / write failures in the physical blocks; third, it verifies the actual idle state of the candidate physical block set to prevent duplicate physical block occupation due to concurrent allocation, ensuring that the mapping relationship is not only logically correct but also corresponds to real, usable physical resources.

[0091] When the allocation result verification module detects an anomaly (such as incomplete mapping entries, data read / write failures, physical block state conflicts, etc.), it immediately triggers a preset three-level rollback mechanism. This mechanism performs repair operations according to the severity of the anomaly, balancing problem-solving efficiency with the scope of system impact. The first level is a soft rollback, suitable for minor logical anomalies, such as incomplete updates to the dynamic mapping table or incorrect status annotations of individual blocks in the candidate physical block set. In this case, the memory management unit calls the temporary backup data from the address translation layer to restore the dynamic mapping table to its state before remapping, and simultaneously corrects erroneous status annotations in the physical block index layer. This does not require interrupting the current memory allocation process; only the abnormal data entries are locally corrected. The second level is a hard reset, suitable for anomalies that cannot be repaired by soft rollback, such as hardware read / write failures in the candidate physical block set or data distortion in the channel load balancing matrix. In this case, the memory management unit terminates the current memory allocation request, releases the occupied candidate physical block resources, resets the 16-bit memory single-channel status monitoring counter, reinitializes the channel load balancing matrix, clears the impact of abnormal data on subsequent allocations, and ensures that the system memory state returns to a stable baseline. The third level is emergency degradation, applicable to severe systemic anomalies, such as excessively high overall load on a single 16-bit memory channel or the failure of quantum optimization algorithms due to disordered correlation of a large number of physical blocks. In this case, the system will automatically switch to basic memory allocation mode, temporarily disabling access-based filtering and quantum optimization strategies, and only using fixed physical block number range matching rules for allocation. Priority is given to ensuring the memory needs of core mobile terminal applications (such as system processes and call functions) to prevent the anomaly from spreading and causing system crashes.

[0092] During anomaly handling, the anomaly logging and self-learning optimization modules are activated simultaneously to achieve full retention of anomaly data and intelligent optimization of subsequent strategies. The logging module collects detailed key information when an anomaly occurs, including the anomaly type (mapping error, physical block conflict, etc.), triggering node (verification phase, rollback phase, etc.), real-time access frequency and fragmentation rate data of each channel, specific numbers of candidate physical block sets, and parameter configurations of optimization algorithms, ensuring that every anomaly has complete data traceability. The self-learning optimization module periodically performs batch analysis of the anomaly logs, combining machine learning algorithms to uncover the underlying causes of anomalies: for example, if anomalies frequently occur due to the number of candidate physical blocks exceeding the maximum replacement block threshold, the threshold setting rules will be automatically adjusted, and the threshold range will be dynamically optimized based on historical allocation data; if the quantum annealing algorithm repeatedly gets stuck in local optima, the annealing rate and iteration count of the algorithm will be adjusted based on the topology channel mapping matrix data in the logs; if a specific channel's fragmentation rate is consistently too high, causing anomalies, the calculation coefficient of the fragmentation rate weight in the dynamic weight allocation model will be optimized to guide subsequent allocations to prioritize low-fragmentation regions. This mechanism can continuously improve the adaptability to complex memory scenarios, gradually reduce the probability of anomalies, and achieve the continuous evolution of memory management strategies.

[0093] This application embodiment achieves efficient and compatible optimization of 16-bit memory allocation by organically combining a hierarchical mapping structure, intelligent channel attribution judgment, and cross-channel physical block remapping mechanism. It improves the management and adaptation capabilities of 16-bit DDR memory in mobile terminals. While ensuring the accuracy of virtual address and physical address mapping and the continuity of memory access, it solves the allocation conflict problem between 32-bit dual-channel memory and 16-bit single-channel memory, reduces memory fragmentation rate and address translation latency, adapts to the exclusive management requirements of 16-bit DDR memory, and further optimizes the operational stability and resource utilization efficiency of mobile terminal systems.

[0094] After introducing the methods of exemplary embodiments of this application, the following references are made. Figure 2 This application describes a memory allocation apparatus for a mobile terminal system according to an exemplary embodiment. Specifically, Figure 2The illustrated memory allocation device for a mobile terminal system is applied to an optimized allocation scenario for 16-bit memory. The device includes the following modules: a mapping module, used to divide the memory space of the DDR memory in the mobile terminal into multiple physical blocks via a memory management unit, each physical block having a unique physical address; uniquely numbering the multiple physical blocks to obtain their respective physical numbers, wherein the numbering rule is a structured format combining channel identifier bits and block sequence bits, and the physical number range of a single channel of 16-bit memory completely overlaps with the physical number range of the first channel of 32-bit memory; and establishing a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to the multiple physical blocks via the memory management unit, wherein the mapping relationship includes the collaborative operation of a physical block index layer and an address translation layer, the physical block index layer recording each physical block... The address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers. A judgment module, after receiving a memory allocation request from the mobile terminal system, determines whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory. An import module, if the target physical block belongs to a single channel of 16-bit memory, responds to the memory allocation request and returns the physical number of the target physical block to the memory management unit; if the target physical block does not belong to a single channel of 16-bit memory, it remaps the physical number in the memory allocation request to an equivalent physical number within the single channel range and returns it to the memory management unit. The memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship. The above apparatus can implement the steps described in the above method embodiments, and the specific implementation methods of each step will not be repeated here. After introducing the method and apparatus of the exemplary embodiments of this application, a terminal device of the exemplary embodiments of this application will be described next. This terminal device can implement the steps described in the above method embodiments, and the specific implementation methods of each step will not be repeated here.

[0095] It should be noted that the above-described embodiments are merely specific implementations of this application, used to illustrate the technical solutions of this application, and not to limit them. The protection scope of this application is not limited thereto. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that any person skilled in the art can still modify or easily conceive of changes to the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features, within the scope of the technology disclosed in this application. Therefore, the protection scope of this application should be determined by the scope of the claims.

Claims

1. A memory allocation method for a mobile terminal system, characterized in that, The method is applied to optimized allocation scenarios for 16-bit memory, and the method includes: The memory space of the DDR memory in the mobile terminal is divided into multiple physical blocks by the memory management unit, and each physical block has a unique physical address. Multiple physical blocks are uniquely numbered to obtain the physical numbers corresponding to each physical block. The numbering rule is a structured format combining the channel identifier bit and the block sequence bit. The physical number range of a single channel of 16-bit memory completely overlaps with the physical number range of the first channel of 32-bit memory. The memory management unit establishes a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to multiple physical blocks. The mapping relationship includes the collaborative operation of the physical block index layer and the address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers. After receiving a memory allocation request sent by the mobile terminal system, determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory; If the target physical block belongs to a single channel of 16-bit memory, then in response to the memory allocation request, the physical number of the target physical block is returned to the memory management unit; if the target physical block does not belong to a single channel of 16-bit memory, then the physical number in the memory allocation request is remapped to an equivalent physical number within the single channel range and returned to the memory management unit. The memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

2. The memory allocation method for a mobile terminal system according to claim 1, characterized in that, 32-bit memory includes a first channel and a second channel, and the range of a single channel in 16-bit memory perfectly matches the range of the first channel in 32-bit memory; The physical number range corresponding to a single channel of 16-bit memory overlaps with the physical number range of the first channel of 32-bit memory, and the overlap rules include: the channel identifier bit of the physical number is assigned the same value, and the block sequence bit value range is the same.

3. The memory allocation method for a mobile terminal system according to claim 1, characterized in that, The process of establishing a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to multiple physical blocks through the memory management unit includes: Through the physical block index layer, a unique index identifier is assigned to each physical block, and a channel ownership identifier is marked in the index entry. The channel ownership identifier includes a first channel identifier and a second channel identifier. The physical blocks belonging to the first channel of 32-bit memory and the single channel of 16-bit memory are marked with the first channel identifier, and the physical blocks belonging to the second channel of 32-bit memory are marked with the second channel identifier. The address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers based on the index entries, and updates the binding relationship between virtual addresses and physical numbers in the dynamic mapping table in real time when physical numbers are remapped.

4. The memory allocation method for a mobile terminal system according to claim 3, characterized in that, After establishing the mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to each of the multiple physical blocks through the memory management unit, the process further includes: Through the channel status monitoring layer, the memory usage rate, number of free physical blocks, and memory fragmentation rate of each 16-bit memory single channel, 32-bit memory first channel, and 32-bit memory second channel are collected and statistically analyzed in real time. The statistical data is fed back to the memory management unit, and during the remapping process, free physical blocks with fragmentation rates lower than the set fragmentation rate threshold and contiguous addresses are dynamically selected as candidate equivalent physical numbers.

5. The memory allocation method for a mobile terminal system according to claim 1, characterized in that, The step of determining whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory includes: The physical number of the target physical block is parsed from the memory allocation request; Call the physical block index layer to verify whether the physical number of the target physical block is within the physical number range of a single 16-bit memory channel, and verify whether the channel ownership identifier of the target physical block is the first channel identifier; The method further includes: if the physical number exceeds the physical number range of a single 16-bit memory channel or the channel ownership identifier is the second channel identifier, then it is determined that the target physical block does not belong to a single 16-bit memory channel, and the remapping process is triggered.

6. The memory allocation method for a mobile terminal system according to claim 1, characterized in that, The step of remapping the physical number in the memory allocation request to an equivalent physical number within a single channel range includes: Retrieve all free physical blocks within a single 16-bit memory channel and sort them from highest to lowest memory access frequency. The number of physical blocks corresponding to the memory to be allocated and the distribution characteristics of consecutive physical blocks are parsed from the memory allocation request. Based on the rule of preserving the continuity characteristics of adjacent physical blocks, a set of candidate physical blocks that match the size of the memory to be allocated and meet the continuity requirements are selected from the sorted free physical blocks. The preset maximum replacement block number threshold is retrieved, and the number of physical blocks in the candidate physical block set is checked to see if it does not exceed the maximum replacement block number threshold; if it does not exceed the threshold, the physical number corresponding to the candidate physical block set is determined as the equivalent physical number. The equivalent physical number is synchronized to the address translation layer, and the binding relationship between the physical number and the virtual address in the dynamic mapping table is updated and replaced with the binding relationship between the equivalent physical number and the virtual address, thus completing the remapping of the physical number.

7. The memory allocation method for a mobile terminal system according to claim 6, characterized in that, If the number of physical blocks in the candidate physical block set exceeds the maximum number of replacement blocks threshold, the remapping process is terminated and a memory allocation failure message is returned to the mobile terminal system. The mapping errors in the dynamic mapping table are repaired through a three-level rollback mechanism, which includes soft rollback, hard reset, and emergency downgrade.

8. The memory allocation method for a mobile terminal system according to claim 6, characterized in that, The total amount of memory to be allocated corresponding to the memory allocation request is a first preset amount. The first preset amount consists of a second preset amount and a third preset amount. The physical block corresponding to the second preset amount belongs to the first channel of 32-bit memory or a single channel of 16-bit memory. The physical block corresponding to the third preset amount belongs to the second channel of 32-bit memory. The step of parsing the number of physical blocks corresponding to the memory to be allocated and the distribution characteristics of consecutive physical blocks from the memory allocation request, and based on the rule of preserving the continuity characteristics of adjacent physical blocks, selecting a set of candidate physical blocks from the sorted free physical blocks that match the size of the memory to be allocated and meet the continuity requirement, includes: Separate the first channel physical number subset corresponding to the second preset amount and the second channel physical number subset corresponding to the third preset amount from the memory allocation request; Based on the rule of preserving the continuity of adjacent physical blocks, among the sorted 16-bit memory single channel free physical blocks, consecutive physical blocks that match the size of the third preset quantity and are subsequently unoccupied in the 16-bit memory single channel are selected as candidate subsets. The physical number subset of the first channel corresponding to the second preset quantity is merged with the physical number of the candidate subset to form a candidate physical block set that matches the size of the first preset quantity and belongs entirely to a single 16-bit memory channel.

9. The memory allocation method for a mobile terminal system according to claim 6, characterized in that, Before retrieving the preset maximum replacement block count threshold and verifying whether the number of physical blocks in the candidate physical block set does not exceed the maximum replacement block count threshold, the method further includes: Collect physical block access frequency and memory fragmentation rate data for a single 16-bit memory channel and the first and second 32-bit memory channels, establish a channel load balancing matrix, and calculate the access frequency weight and fragmentation rate weight of each channel in real time. When the memory allocation request is detected to contain a 32-bit memory second channel physical block, based on the channel load balancing matrix, physical blocks with load rates lower than a set load rate threshold and consecutive addresses within a single 16-bit memory channel are preferentially selected as candidate physical blocks and merged into the candidate physical block set. An association evaluation model is used to analyze the access association strength between physical blocks within a single 16-bit memory channel, and the global continuity of the candidate physical block set is optimized based on the evaluation results.

10. A memory allocation device for a mobile terminal system, characterized in that, The device is used in scenarios involving optimized allocation of 16-bit memory, and the device includes the following modules: The mapping module is used to divide the memory space of the DDR memory in the mobile terminal into multiple physical blocks through the memory management unit. Each physical block has a unique physical address. Multiple physical blocks are uniquely numbered to obtain their respective physical numbers. The numbering rule is a structured format combining channel identifier bits and block sequence bits. The physical number range of a single 16-bit memory channel completely overlaps with the physical number range of the first 32-bit memory channel. The memory management unit establishes a mapping relationship between the virtual addresses used by the mobile terminal system and the physical numbers corresponding to the multiple physical blocks. This mapping relationship includes the collaborative operation of a physical block index layer and an address translation layer. The physical block index layer records the channel ownership identifier of each physical block, and the address translation layer maintains a dynamic mapping table from virtual addresses to physical numbers. The judgment module is used to determine whether the target physical block indicated in the memory allocation request belongs to a single channel of 16-bit memory after receiving the memory allocation request sent by the mobile terminal system. The import module is used to respond to the memory allocation request and return the physical number of the target physical block to the memory management unit if the target physical block belongs to a single channel of 16-bit memory; if the target physical block does not belong to a single channel of 16-bit memory, the physical number in the memory allocation request is remapped to an equivalent physical number within the range of the single channel and returned to the memory management unit; the memory management unit updates the mapping relationship based on the returned physical number or equivalent physical number, and imports the data to be allocated into the corresponding 16-bit memory space according to the mapping relationship.

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