Microfluidic chip and microfluidic device

Abstract

A microfluidic chip comprises: a first substrate (10); a plurality of first electrodes (20) on the first substrate (10); and a cavity defining layer (50) located on the first substrate (10), the cavity defining layer (50) at least defines a plurality of cavities (30) respectively corresponding to the plurality of first electrodes (20), and the orthographic projection of each cavity (30) in the plurality of cavities (30) on the first substrate (10) covers the orthographic projection of the corresponding first electrode (20) in the plurality of first electrodes (20) on the first substrate (10).

Description

Microfluidic chip and microfluidic device TECHNICAL FIELD

[0001] The present application relates to the technical field of biomedical detection, and more particularly, to a microfluidic chip and a microfluidic device comprising the same. BACKGROUND

[0002] Microfluidics refers to the science and technology involved in the use of microchannels to handle or manipulate small fluid. Microfluidic chips have the characteristics of miniaturization and integration, and are also known as chip laboratories and micro total analysis systems. One of the important features of microfluidics is the unique fluid properties in the microscale environment, such as laminar flow and droplets. With the help of these unique fluid phenomena, microfluidics can achieve a series of microprocessing and microoperations that are difficult to complete by conventional methods. Microfluidic chips have many application scenarios, for example, they can be applied to DNA synthesis. DNA synthesis technology is the basis of biological synthesis, and in nature, DNA is generally amplified by semi-conservative replication. However, in the fields of molecular diagnosis, gene drug treatment, and DNA storage, it is often difficult to find natural template DNA in nature, at which time DNA synthesis technology becomes particularly important.

[0003] Thanks to the similarity in scale between DNA synthesis technology and semiconductor display process, large-scale DNA synthesis schemes based on semiconductor technology and microfluidic technology have developed rapidly in recent years, especially the electrochemical DNA synthesis technology has successfully opened up the domestic and foreign markets with its low voltage, simple device structure, convenient control method, and fast synthesis speed. In the electrochemical DNA synthesis scheme, generally, a cleaning agent is first introduced into the microfluidic chip to flush the organic or inorganic matter on the surface of the chip, then an acid is introduced, and the corresponding electrode is connected to generate hydrogen ions, and the dimethoxytrityl protecting group on the surface of the electrode is removed in the acidic environment, then a reaction raw material containing a single base (one of ATCG) is introduced to complete the growth of the base. Then repeat the above step until the target DNA fragment is obtained. In order to improve the synthesis efficiency of DNA, the electrode density of the DNA chip shows a clear upward trend, however, with the increase of the electrode density, the hydrogen ions generated by the acid are more and more likely to affect the adjacent electrodes through scattering, diffusion, and other reasons, causing crosstalk between electrodes, resulting in a decrease in the accuracy of DNA synthesis.

[0004] SUMMARY

[0005] The embodiment of the present application provides a microfluidic chip, comprising: a first substrate; a plurality of first electrodes located on the first substrate; and a cavity defining layer located on the first substrate, the cavity defining layer at least defining a plurality of cavities corresponding to the plurality of first electrodes respectively, and a projection of each of the plurality of cavities on the first substrate covering a projection of a corresponding first electrode of the plurality of first electrodes on the first substrate.

[0006] In some embodiments, each of the plurality of cavities comprises a first partition wall located on the first substrate, a projection of the first partition wall on the first substrate surrounding a projection of a corresponding first electrode of the plurality of first electrodes on the first substrate, and the first partition wall comprising a first partition wall body extending from the first substrate towards a direction away from the first substrate and a first conductive layer located on the first partition wall body.

[0007] In some embodiments, the first conductive layer covers at least a portion of a side surface of the first partition wall body located in the cavity.

[0008] In some embodiments, the first partition wall body comprises a first insulating layer located on the first substrate, a second insulating layer located on the first insulating layer, and a second conductive layer located between the first insulating layer and the second insulating layer, wherein the first conductive layer and the second conductive layer are electrically connected to each other.

[0009] In some embodiments, the first conductive layer further extends to an upper surface of the second insulating layer away from the first insulating layer, the second insulating layer comprises a via, and the first conductive layer is in contact with the second conductive layer via the via.

[0010] In some embodiments, the microfluidic chip further comprises: a second substrate opposite to the first substrate; and a second electrode located on a side of the second substrate facing the first substrate, wherein the cavity defining layer is located between the first substrate and the second electrode.

[0011] In some embodiments, the microfluidic chip further comprises: a second substrate opposite to the first substrate; and a second electrode located on a side of the second substrate facing the first substrate, and each of the plurality of cavities comprises a second partition wall located on a side of the second substrate facing the first substrate, the second partition wall comprising a second partition wall body extending from the side of the second substrate facing the first substrate towards the first substrate, wherein a projection of the second partition wall body on the first substrate surrounds a projection of a corresponding first electrode of the plurality of first electrodes on the first substrate.

[0012] In some embodiments, the microfluidic chip further comprises a first conductive layer on the first substrate and surrounding the first electrode, and a positive projection of the first substrate of the second partition wall body at least partially overlaps a positive projection of the first substrate of the first conductive layer.

[0013] In some embodiments, the microfluidic chip further comprises a second conductive layer between the first substrate and the first conductive layer, the second conductive layer surrounding the first electrode, and the second conductive layer and the first conductive layer are electrically connected to each other.

[0014] In some embodiments, the microfluidic chip further comprises: a second substrate opposite to the first substrate; and

[0015] a second electrode on a side of the second substrate facing the first substrate, each of the plurality of cavities further comprises a second partition wall on a side of the second substrate facing the first substrate, the second partition wall comprises a second partition wall body extending from the side of the second substrate facing the first substrate toward the first substrate, wherein a positive projection of the second partition wall body on the first substrate at least partially overlaps a positive projection of a corresponding first partition wall in the plurality of first partition walls on the first substrate.

[0016] In some embodiments, the first partition wall comprises a first notch and a second notch opposite to each other, each of the first notch and the second notch extends from an upper surface of the first partition wall facing the second substrate toward the first substrate, such that the first notch and the second notch communicate with each other via the cavity.

[0017] In some embodiments, each of the first notch and the second notch extends from the first partition wall body to the upper surface of the second substrate, such that the first partition wall body is divided into a first partition part and a second partition part isolated from each other.

[0018] In some embodiments, at least one of the first partition wall body and the second partition wall body comprises a first part and a second part separated from each other, such that the cavity comprises a first inlet and a first outlet opposite to each other.

[0019] In some embodiments, at least one of the first partition wall body and the second partition wall body further comprises a third portion and a fourth portion separated from each other, and the third portion and the fourth portion are separated from the first portion and the second portion respectively, the orthographic projections of the first portion, the second portion, the third portion and the fourth portion on the first substrate enclose the orthographic projection of a corresponding first electrode of the plurality of first electrodes on the first substrate, wherein the cavity comprises a second inlet and a second outlet opposite to each other, the first inlet comprises a gap between the first portion and the third portion, the second inlet comprises a gap between the second portion and the third portion, the first outlet comprises a gap between the first portion and the fourth portion, and the second outlet comprises a gap between the second portion and the fourth portion.

[0020] In some embodiments, the orthographic projection of the first portion on the first substrate comprises a line segment section and a first arc section connected to each other, the orthographic projection of the third portion on the first substrate comprises a second arc section, the orthographic projection of the fourth portion on the first substrate comprises a third arc section, wherein the bending direction of the second arc section is consistent with the bending direction of the third arc section, the bending direction of the first arc section is different from the bending direction of the second arc section, and the first arc section is located between the third arc section and the second arc section, and the orthographic projection of the second portion on the first substrate and the orthographic projection of the first portion on the first substrate are symmetric about the line connecting the center of the second arc section and the center of the third arc section.

[0021] In some embodiments, the microfluidic chip further comprises a first conductive layer on the first substrate and surrounding the first electrode, wherein the line segment section of the orthographic projection of the first portion on the first substrate partially overlaps the orthographic projection of the first conductive layer on the first substrate, and the line segment section of the orthographic projection of the first portion on the first substrate away from one end of the first arc section is tangent to the orthographic projection of the first conductive layer on the first substrate.

[0022] In some embodiments, the second arc section partially overlaps the orthographic projection of the first conductive layer on the first substrate, and the third arc section is tangent to the orthographic projection of the first conductive layer on the first substrate.

[0023] In some embodiments, the cavity defining layer further comprises a hydrophobic layer on the upper surface of the first conductive layer away from the first substrate.

[0024] In some embodiments, the second electrode covers at least a portion of both the side surface of the second partition wall body located inside the cavity and the lower surface of the second partition wall body facing the first substrate.

[0025] Another embodiment of the present application provides a microfluidic device comprising the microfluidic chip according to any one of the preceding embodiments.

[0026] These and other advantages of the present application will become apparent from the following description, taken in conjunction with the accompanying drawings, illustrating the principles of the application. BRIEF DESCRIPTION OF DRAWINGS

[0027] Embodiments of the present application will now be described in more detail, by way of example, and with reference to the drawings, in which:

[0028] Fig. 1 illustrates a partial cross-sectional view of a microfluidic chip according to one embodiment of the present application;

[0029] Fig. 2 illustrates a partial top view of a microfluidic chip according to one embodiment of the present application;

[0030] Fig. 3 illustrates a partial cross-sectional view of the microfluidic chip taken along the dashed line A'B' in Fig. 2;

[0031] Fig. 4 illustrates a top view schematic of a lower substrate structure of a microfluidic chip according to one embodiment of the present application;

[0032] Fig. 5 illustrates a top view schematic of an upper substrate structure of a microfluidic chip according to one embodiment of the present application;

[0033] Fig. 6 illustrates a top view schematic of the upper substrate structure and the lower substrate structure of a microfluidic chip according to one embodiment of the present application when combined together;

[0034] Fig. 7 illustrates a simulation model of a microfluidic chip based on the embodiment shown in Figs. 2 and 3;

[0035] Fig. 8 is a schematic diagram of the distribution of hydrogen ions at steady state when a simulation experiment is performed on the simulation model of the microfluidic chip shown in Fig. 7;

[0036] Fig. 9 illustrates a comparative microfluidic chip simulation model;

[0037] Fig. 10 illustrates a schematic diagram of the distribution of hydrogen ions at steady state when a simulation experiment is performed on the comparative microfluidic chip simulation model shown in Fig. 9;

[0038] Fig. 11 illustrates a partial top view of a microfluidic chip according to another embodiment of the present application and a partial top view of a second partition wall body in the chip;

[0039] Fig. 12 illustrates a partial cross-sectional view of the microfluidic chip along the dashed line A'B' in the left drawing of Fig. 11;

[0040] Fig. 13 illustrates a simulation model based on the microfluidic chip shown in Fig. 12;

[0041] Fig. 14 illustrates a distribution of hydrogen ions in a steady state when a simulation experiment is performed on the simulation model of the microfluidic chip shown in Fig. 13;

[0042] Fig. 15 illustrates a partial cross-sectional view of a microfluidic chip according to another embodiment of the present application;

[0043] Fig. 16 schematically illustrates an example of an orthographic projection of a single first partition wall body on a first substrate according to another embodiment of the present application;

[0044] Fig. 17 illustrates a simulation result of liquid flow velocity based on the microfluidic chip shown in Fig. 12;

[0045] Fig. 18 illustrates a simulation result of liquid flow velocity based on the microfluidic chip described in Figs. 15 and 16;

[0046] Fig. 19 illustrates a structural schematic diagram of a second partition wall body in a microfluidic chip according to yet another embodiment of the present application;

[0047] Fig. 20 illustrates a distribution of hydrogen ions in a steady state when a simulation experiment is performed on the simulation model of the microfluidic chip shown in Fig. 19;

[0048] Fig. 21 illustrates a simulation result of liquid flow velocity in a chip according to the simulation model of the microfluidic chip shown in Fig. 19. DETAILED DESCRIPTION

[0049] The following description provides specific details of various embodiments of the present application in order to provide a thorough description of the various embodiments of the present application. In some instances, well-known structures and functions have not been described in detail in order to avoid obscuring the description of the various embodiments of the present application. The technical solutions of the present application can be embodied in many different forms and for many different purposes, and should not be limited to the embodiments set forth herein. The embodiments are provided so that the technical solutions of the present application are clear and complete, but the embodiments do not limit the protection scope of the present patent application.

[0050] In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present application. However, it will be apparent to one skilled in the art that the present application can be practiced without one or more of these specific details. In other instances, well-known structures and features have not been described in detail so as not to unnecessarily obscure the present application. The terminology used in the description presented herein is intended to be interpreted in its broadest reasonable manner, even though it is being used in conjunction with a particular embodiment.

[0051] As used herein, the term "surrounding" includes both a fully enclosed surrounding and a non-enclosed surrounding. Thus, the statement that element A surrounds element B means that element A can form a fully enclosed structure around element B, i.e., element A can be a seamless, continuous structure that surrounds element B. Alternatively, the statement that element A surrounds element B means that element A can form a discontinuous, non-enclosed structure around element B, i.e., element A can include at least two portions that are separated from each other and that surround element B.

[0052] The embodiments of the present application provide a microfluidic chip, which comprises a first substrate, a plurality of first electrodes on the first substrate, and a cavity defining layer on the first substrate, the cavity defining layer defining at least a plurality of cavities corresponding to the plurality of first electrodes respectively, and a projection of each of the plurality of cavities on the first substrate covers a projection of a corresponding first electrode of the plurality of first electrodes on the first substrate. Here, the term "covers" includes a complete overlap and even an overhang, so that the projection of each of the plurality of cavities on the first substrate covers the projection of the corresponding first electrode of the plurality of first electrodes on the first substrate means that the projection of the cavity on the first substrate is greater than or equal to the projection of the corresponding first electrode of the plurality of first electrodes on the first substrate, and the projection of the corresponding first electrode of the plurality of first electrodes on the first substrate falls within the projection of the cavity on the first substrate.

[0053] Figure 1 schematically shows a partial cross-sectional view of a microfluidic chip according to an embodiment of the present application, in which two adjacent cavities 30 are shown. As shown in Figure 1, the microfluidic chip includes a first substrate 10, a plurality of first electrodes 20 on the first substrate 10, and a cavity defining layer 50 on the first substrate 10, the cavity defining layer 50 defining at least a plurality of cavities 30 corresponding to the plurality of first electrodes 20 respectively, each of the cavities 30 covering a corresponding one of the first electrodes 20 in a plan view of the first substrate 10. In actual applications, the first electrodes 20 can receive a certain voltage, so as to perform micro-processing or micro-operation on liquid reagents passing through the cavities. For example, the space region where the first electrodes 20 are located can be a reaction unit for DNA synthesis, i.e., each of the first electrodes 20 can correspond to a reaction unit. In the process of DNA synthesis, the concentration of hydrogen ions generated by electrochemical acid reaction can become higher and higher as the first electrodes 20 are continuously powered. However, in the microfluidic chip according to the embodiment of the present application, the cavities cover the corresponding first electrodes in the plan view of the first substrate 10, and thus actually surround the first electrodes, so as to at least reduce or alleviate the problem that hydrogen ions on the first electrodes move to adjacent first electrodes, thereby facilitating improvement of the accuracy of DNA synthesis. Similarly, when the microfluidic chip is applied to other situations, the ion crosstalk or interference between different reaction units can be reduced.

[0054] In the following, embodiments of the microfluidic chip are described in more detail with more specific examples. As shown in FIG. 1, in some embodiments, each of the plurality of cavities 30 includes a first partition wall on the first substrate 10, a projection of the first partition wall on the first substrate 10 encircles a projection of a corresponding one of the plurality of first electrodes 20 on the first substrate 10, the first partition wall includes a first partition wall body 50 extending from the first substrate 10 in a direction away from the first substrate, and a first conductive layer 60 on the first partition wall body 50. The first partition wall body 50 and the first conductive layer 60 can encircle the first electrode 20. When the microfluidic chip is in operation, the first conductive layer 60 and the first electrode 20 can receive different voltages, for example, the first electrode 20 can receive a positive voltage, while the first conductive layer 60 receives a constant reference voltage (e.g., a ground voltage or a negative voltage), thereby an electric field can be formed between the first electrode 20 and the first conductive layer 60, and the electric field is directed from the first electrode 20 at the bottom of the cavity 30 to the first conductive layer 60 on the first partition wall body 50, so that hydrogen ions or other ions that can move from the first electrode 20 to other first electrodes 20 can be adsorbed on the first partition wall of the cavity 30, thereby hindering the movement of hydrogen ions or other ions between different reaction units, reducing or avoiding unintended chemical reactions in the reaction units, and improving the accuracy of the microfluidic chip in processing or operating reagents (e.g., improving the accuracy of DNA synthesis).

[0055] In some embodiments, the first conductive layer covers at least a portion of a side surface of the first partition wall body within the cavity, which can be further illustrated with FIG. 1. As shown in FIG. 1, the first conductive layer 60 covers at least a portion of a side surface of the first partition wall body 50 within the cavity 30. In this way, hydrogen ions or other ions generated by the reaction unit in which the first electrode 20 is located can be more easily adsorbed to the inner wall of the cavity, further reducing or reducing ion crosstalk that can occur between different reaction units.

[0056] As shown in the foregoing, the first partition wall surrounds the orthographic projection of the corresponding first electrode on the first substrate, and the first partition wall includes a first partition wall body extending from the first substrate toward a direction away from the first substrate and a first conductive layer on the first partition wall body. Therefore, it can be understood that the first partition wall body is actually a longitudinally extending structure above the first substrate and surrounding the periphery of the first electrode. As shown in FIG. 1, in some embodiments, the first partition wall body 50 includes a first insulating layer 510 on the first substrate 10, a second insulating layer 520 on the first insulating layer, and a second conductive layer 530 between the first insulating layer 510 and the second insulating layer 520, and the first conductive layer 60 and the second conductive layer 530 are electrically connected to each other. In the example of FIG. 1, the first conductive layer 60 also extends to an upper surface of the second insulating layer 520 away from the first insulating layer 510, and the second insulating layer 520 includes a via hole through which the first conductive layer 60 contacts the second conductive layer 530.

[0057] According to another embodiment of the present application, the microfluidic chip further includes a third insulating layer 40 on the first substrate 10, and the first partition wall body 50 can further include a fourth insulating layer 540 on the second insulating layer 520, and the fourth insulating layer 540 can cover the outer surfaces of the first insulating layer 510 and the second insulating layer 520, and the via hole described above also passes through the fourth insulating layer 540, so that the first conductive layer 60 contacts the second conductive layer 530 via the via hole. In some embodiments, as shown in FIG. 1, the cavity defining layer further includes a hydrophobic layer 70 on the upper surface of the first conductive layer 60 away from the first substrate 70. The hydrophobic layer 70 can be distributed in other areas except the first electrode 20. The first electrode lead 210 can be formed on the first substrate 10, and a via hole is formed in the third insulating layer 40, so that the first electrode 20 can be electrically connected to the first electrode lead 210 in the third insulating layer 40, and the first electrode lead 210 can receive the required voltage signal from the external circuit.

[0058] In some embodiments, the material of each first electrode 20 includes gold or silver. The materials of the first insulating layer 510 and the second insulating layer 520 can include resin, and the materials of the third insulating layer 40 and the fourth insulating layer 540 can include silicon nitride. The first conductive layer can include gold or silver, and the second conductive layer can include indium tin oxide. The above is an exemplary description of the materials of each layer of the microfluidic chip, and in other embodiments, other materials different from the above materials can be used to form the corresponding layer structure.

[0059] According to another embodiment of the present application, the microfluidic chip further comprises: a second substrate opposite to the first substrate; and a second electrode on the side of the second substrate facing the first substrate, and the cavity-defining layer is located between the first substrate and the second electrode. FIG. 2 illustrates a partial top view of a microfluidic chip according to this embodiment of the present application, and FIG. 3 illustrates a partial cross-sectional view of the microfluidic chip taken along the dashed line A'B' in FIG. 2. The microfluidic chip shown in FIG. 3 comprises a second substrate 80 opposite to the first substrate 10, and a second electrode 90 on the side of the second substrate 80 facing the first substrate 10, and the cavity-defining layer is located between the first substrate 10 and the second electrode 90. For the sake of clarity, in the cross-sectional view shown in FIG. 3, a large distance is illustrated in the vertical direction between the second electrode 90 and the cavity-defining layer, in actual applications, the first substrate and the second substrate can be combined together by a connecting structure (e.g., a frame sealant), thus, the distance between the second electrode 90 and the cavity-defining layer can be small or even the two can be in direct contact. The structure of each first partition wall of the cavity-defining layer on the first substrate 10 shown in FIG. 3 is similar to that shown in FIG. 1, and will not be described here again. The second electrode 90 can receive the same voltage signal (e.g., a reference voltage or ground) as the first conductive layer 60 in the first partition wall, thus, an electric field can be formed from each first electrode 20 pointing to the second electrode 90, and the hydrogen ions or other ions generated by the reaction unit where the first electrode 20 is located can be adsorbed to the second electrode. In this embodiment, even if a part of the hydrogen ions on the second electrode 90 leave the second electrode, due to the presence of the electric field pointing from the first electrode to the first conductive layer, this part of the hydrogen ions is easily adsorbed to the inner wall of the cavity. Therefore, based on this embodiment, the ion crosstalk that can occur between different reaction units can be further reduced or lowered.

[0060] As shown in FIG. 2, in this example, each first electrode 20 is illustrated as a circle, and the diameter of the circular first electrode is, for example, 40 microns, and the orthographic projection of the first partition wall of each cavity on the first substrate substantially presents a ring shape surrounding the periphery of the first electrode 20, and the width of the ring shape is, for example, 15 microns. However, in other embodiments, the first electrode 20 can be implemented to present other shapes, including but not limited to square, triangular, and polygonal or irregular shapes, etc., and accordingly, the orthographic projection of the first partition wall of each cavity on the first substrate can also present another different shape. FIG. 2 also illustrates a connecting lead 610 electrically connected to the first conductive layer.

[0061] The second substrate 80 and the second electrode 90 shown in FIG. 3 can be collectively referred to as an upper substrate structure, and the first substrate 10 shown in FIG. 3 as well as the cavity defining layer and other optional layer structures above the first substrate 10 can be collectively referred to as a lower substrate structure. In some embodiments, the upper substrate structure and the lower substrate structure can be bonded together by an adhesive (e.g., a sealant) or other connecting structure. FIG. 4 illustrates a top view of a lower substrate structure of a microfluidic chip according to an embodiment of the present application, FIG. 5 illustrates a top view of an upper substrate structure of a microfluidic chip according to an embodiment of the present application, and FIG. 6 illustrates a top view of the upper substrate structure and the lower substrate structure of a microfluidic chip according to an embodiment of the present application when they are bonded together. In the embodiments shown in FIGS. 4-6, the microfluidic chip is provided as a DNA synthesis chip. In this case, the surface of the first electrode 20 can be formed with a modification layer, e.g., a dimethoxytrityl protecting group. As shown in FIG. 4, the lower substrate structure includes a reaction region A, an electrode connection region B, and a binding region C. Each of the aforementioned first electrodes and the first conductive layer is disposed in the reaction region A, which can include a plurality of reaction units, and the number of the first electrodes in the reaction region A can be determined according to actual needs. The electrode connection region B is used to electrically connect the first conductive layer and / or the second conductive layer in the lower substrate structure with the second electrode in the upper substrate structure, and the electrode connection region B can have a size of, e.g., 1 mm*1 mm, and can be filled with a conductive material, e.g., conductive foam, to electrically connect the first conductive layer and / or the second conductive layer in the lower substrate structure with the second electrode in the upper substrate structure. The binding region C is used to electrically connect an external circuit (e.g., a flexible printed circuit board) to provide necessary electrical signals to the microfluidic chip through the external circuit. As shown in FIG. 5, the upper substrate structure mainly includes a liquid reagent inlet region D, a reaction region E, and a liquid reagent outlet region F, the liquid reagent inlet region D includes one or more liquid inlet holes, the reaction region E of the upper substrate structure corresponds to the reaction region A of the lower substrate structure, and the liquid reagent outlet region F includes one or more liquid outlet holes. In some embodiments, the thickness of the DNA synthesis chip (the distance from the upper surface of the second substrate facing the first electrode 20 to the lower surface of the first substrate facing the second electrode 90) is about 18 microns.

[0062] In some embodiments, the first electrode 20 is a circular electrode with a diameter of 40 microns, and the first partition wall of the cavity has a footprint on the first substrate that is substantially in the shape of a ring surrounding the first electrode 20 with a width of 15 microns, and the first partition wall body also has a footprint on the first substrate that is substantially in the shape of a ring surrounding the first electrode 20. The first electrode lead 210 can be made of molybdenum, and can have a thickness of about 220 nm and a width of about 5 microns. One end of the first electrode lead 210 is electrically connected to the first electrode 20 through a via in the third insulating layer 40, and the other end is electrically connected to a terminal or a contact in the bonding area C of the lower substrate structure. The third insulating layer 40 can have a thickness of about 400 nm, the first insulating layer (e.g., a resin layer) 510 can have a thickness of about 4 microns, the second conductive layer 530 can have a thickness of about 52 nm, the second insulating layer (e.g., a resin layer) 520 can have a thickness of about 4 microns, and the fourth insulating layer (e.g., a silicon nitride layer) 540 can have a thickness of about 400 nm. The fourth insulating layer 540 covers the surface of the second insulating layer 520 to prevent ions in the reagent from being released from the second conductive layer 530. The first conductive layer 60 and the first electrode 20 can be made of a metal such as gold or silver. A hydrophobic layer 70 on the upper surface of the first conductive layer 60 facing away from the first substrate 70 can be made of Teflon, and covers the surface of the first conductive layer 60 to prevent DNA from growing on the surface of the first conductive layer. The second electrode 90 can be a full-area electrode attached to the second substrate, and can be made of silver or other materials.

[0063] As mentioned above, the second conductive layer 530 can be made of indium tin oxide, and in some embodiments, the bonding area C of the lower substrate structure is also formed with an indium tin oxide layer. The second conductive layer 530 and the indium tin oxide layer in the bonding area C can be formed based on the same manufacturing process, and the second conductive layer 530 in each first partition wall body is electrically connected to each other and to a reference voltage (e.g., ground). The indium tin oxide layer in the bonding area C can also be electrically connected to the second conductive layer 530, thereby reducing the use or exposure area of precious metals such as gold and silver, reducing the occurrence of static electricity, and the indium tin oxide layer in the bonding area C can also serve to protect other structures in the bonding area.

[0064] FIG. 6 is a top view of the microfluidic chip when the upper substrate structure and the lower substrate structure are combined together, in which the reaction areas A, E, the electrode connection area B, the bonding area C, the liquid reagent inlet area D, and the liquid reagent outlet area F are also identified.

[0065] To verify the effect of the microfluidic chip provided in the above embodiments in preventing ion crosstalk between different reaction units, FIGS. 7-10 show the effects of different simulation experiments. In an exemplary experiment, a direct current voltage of 2 volts is applied to each first electrode, the first conductive layer and the second electrode are electrically connected to a ground voltage, FIG. 7 shows a simulation model of the microfluidic chip based on the embodiments shown in FIGS. 2 and 3, the height of the first partition wall of the cavity is approximately 8 microns, FIG. 8 shows the distribution of hydrogen ions in a steady state, the first electrodes of the middle three reaction units (DNA synthesis units) in FIG. 8 are applied with a direct current voltage of 2 volts, and the filling material in the microfluidic chip is water. FIGS. 9 and 10 show comparative simulation experiment structures, FIG. 9 shows a comparative microfluidic chip simulation model, the comparative microfluidic chip simulation model does not include the first partition wall in the aforementioned microfluidic chip, i.e., there is no cavity defining layer as described in the aforementioned embodiments, the comparative microfluidic chip simulation model can include a first electrode for receiving a direct current voltage of 2 volts, and a second electrode and a first conductive layer for grounding. The ion crosstalk phenomenon of the comparative microfluidic chip simulation model can be analyzed. Due to the redox reaction, a large number of hydrogen ions will be generated at the DNA synthesis unit (reaction unit), and the hydrogen ions will be accelerated to move to the first conductive layer and the second electrode grounded under the action of the electric field. Most of the hydrogen ions will be captured at the first conductive layer, but a small amount of hydrogen ions will move to the adjacent DNA synthesis unit under the action of diffusion and scattering, thereby causing hydrogen ion crosstalk. FIG. 10 shows the simulation results of the aforementioned ion crosstalk phenomenon, the simulation conditions are the same as those shown in FIG. 8, i.e., a direct current voltage of 2 volts is applied to the first electrodes of the middle three DNA synthesis units, and the filling material in the microfluidic chip is water. FIG. 10 shows the distribution of hydrogen ions in a steady state, and the hydrogen ions inevitably distribute to the DNA synthesis units that are not applied with a direct current voltage. During the DNA synthesis process, the hydrogen ions that move above the first electrode in the DNA synthesis unit that is not applied with a direct current voltage will undoubtedly break the modification layer (e.g., a dimethoxytrityl protecting group) on the surface of the first electrode, thereby causing unintended base growth.

[0066] By comparing the simulation results shown in FIG. 8 and the simulation results shown in FIG. 10, it can be known that the microfluidic chip provided based on the embodiments of the present application can effectively reduce the ion crosstalk phenomenon between different reaction units.

[0067] According to another embodiment of the present application, a microfluidic chip comprises: a first substrate, a plurality of first electrodes on the first substrate, a cavity defining layer on the first substrate, a second substrate opposite to the first substrate, and a plurality of second electrodes on a side of the second substrate facing the first substrate, the cavity defining layer defines at least a plurality of cavities corresponding to the plurality of first electrodes respectively, each of the plurality of cavities has a footprint on the first substrate covering a footprint of a corresponding first electrode of the plurality of first electrodes on the first substrate, each of the plurality of cavities comprises a second partition wall on the side of the second substrate facing the first substrate, the second partition wall comprises a second partition wall body extending from the side of the second substrate facing the first substrate towards the first substrate, a footprint of the second partition wall body on the first substrate surrounds a footprint of the corresponding first electrode of the plurality of first electrodes on the first substrate. This embodiment can be further explained with reference to FIG. 11 and FIG. 12. The left drawing in FIG. 11 illustrates a partial top view of a microfluidic chip according to this embodiment of the present application, FIG. 12 illustrates a partial cross-sectional view of the microfluidic chip taken along the dashed line A'B' in the left drawing in FIG. 11, and the right drawing in FIG. 11 illustrates a top view of a part of the second partition wall body in the microfluidic chip alone. As shown in FIG. 11 and FIG. 12, the microfluidic chip comprises a first substrate 10, a plurality of first electrodes 20 on the first substrate 10, a cavity defining layer on the first substrate 10, a second substrate 80 opposite to the first substrate, and a plurality of second electrodes 90 on a side of the second substrate 80 facing the first substrate 10, the cavity defining layer defines at least a plurality of cavities 30 corresponding to the plurality of first electrodes 20 respectively, each of the cavities 30 has a footprint on the first substrate 10 covering a footprint of a corresponding first electrode 20 of the plurality of first electrodes on the first substrate 10, each of the cavities 30 comprises a second partition wall on the side of the second substrate 80 facing the first substrate 10, the second partition wall comprises a second partition wall body 100 extending from the side of the second substrate 80 facing the first substrate 10 towards the first substrate 10, a footprint of the second partition wall body 100 on the first substrate 10 surrounds a footprint of the corresponding first electrode 20 of the plurality of first electrodes on the first substrate 10. As shown in FIG. 11, a footprint of each of the second partition wall bodies 100 on the first substrate 10 generally presents a circular ring shape and surrounds a footprint of a corresponding first electrode 20 on the first substrate 10, which generally presents a circular shape.

[0068] The microfluidic chip shown in FIG. 12 includes some elements similar to the embodiment described with reference to FIG. 3, and these similar elements are denoted by the same reference numerals. As shown in FIG. 12, the microfluidic chip further includes a first conductive layer 60 located on the first substrate 10 and surrounding the first electrode 20, and the orthographic projection of the second partition wall body 100 on the first substrate 10 at least partially overlaps the orthographic projection of the first conductive layer 60 on the first substrate 10. In some embodiments, the orthographic projection on the first substrate 10 can cover the orthographic projection of the first conductive layer 60 on the first substrate 10. The microfluidic chip further includes a second conductive layer 530 located between the first substrate 10 and the first conductive layer 60, the second conductive layer 530 surrounds the first electrode 20, and the second conductive layer 530 and the first conductive layer 60 are electrically connected to each other. In some embodiments, the microfluidic chip further includes an insulating layer 40, 110, a hydrophobic layer 70 located on the first substrate 10. The second conductive layer 530 and the first conductive layer 60 are electrically connected to each other via a via in the insulating layer 40, and the first electrode 20 and the first electrode lead 210 are electrically connected to each other via a via in the insulating layer 40. In some embodiments, the first electrode 20 is a circular electrode with a diameter of about 40 microns, the first conductive layer 60 is a circular ring electrode with a width of about 15 microns, the orthographic projection of the second partition wall body 100 on the first substrate is a circular ring with a width of about 15 microns, and the center of the circular ring of the orthographic projection of the second partition wall body 100 on the first substrate can coincide with the center of the circular ring of the first conductive layer 60. The second partition wall body 100 can include an insulating material (e.g., resin), which can have a thickness of about 8 microns, and the second electrode can include a metal such as silver, which can have a thickness of about 200 nm, and the second electrode 90 can cover the entire surface of the second partition wall body 100 and the surface of each cavity 30 not occupied by the second partition wall body 100. In some embodiments, the second electrode can cover at least part of both the side surface of the second partition wall body 100 located in the cavity 30 and the lower surface of the second partition wall body 100 facing the first substrate. The first electrode lead 210 can include molybdenum, one end of the first electrode lead 210 is electrically connected to the first electrode 20 through a via in the insulating layer 40, and the other end is electrically connected to a contact or terminal in the bonding area of the microfluidic chip. The insulating layer 40 includes silicon nitride with a thickness of about 400 nm, the second conductive layer 530 includes indium tin oxide with a thickness of about 52 nm, the second conductive layer 530 and the first conductive layer 60 can have the same shape, and the second conductive layer 530 and the first conductive layer 60 are electrically connected to each other through a via in the insulating layer 110. The insulating layer 110 covers the second conductive layer 530, and the first electrode 60 is formed on the insulating layer 110. The first electrode 20 and the first conductive layer 60 can include gold, silver, etc., and the hydrophobic layer 70 covers the first conductive layer 60. Compared with the embodiment shown in FIG. 3, the microfluidic chip shown in FIG. 12 includes a relatively small total number of film layers, which can reduce the manufacturing cost of the microfluidic chip.

[0069] Figs. 13 and 14 show simulation results of preventing ion cross-talk between different reaction units based on the embodiment of the microfluidic chip shown in Fig. 12. Fig. 13 is a simulation model of the microfluidic chip, and Fig. 14 is a distribution diagram of hydrogen ions in a steady state, with the simulation conditions being the same as those discussed previously for Figs. 7 and 8. As can be seen from Fig. 14, the microfluidic chip using this embodiment can further reduce the number of hydrogen ions at the DNA synthesis unit (reaction unit) to which no direct current voltage is applied, thereby further reducing ion cross-talk between different reaction units. For the embodiment shown in Fig. 12, hydrogen ions on the first electrode first gather towards the second electrode in the cavity 30 during movement, and then move to other positions. Since the second partition wall body extends from the side of the second substrate facing the first substrate towards the first substrate, the high-concentration hydrogen ions in the microfluidic chip are closer to the second electrode on the surface of the second partition wall body, and are more likely to be captured by the second electrode in the cavity.

[0070] According to another embodiment of the present application, a microfluidic chip comprises: a first substrate, a plurality of first electrodes on the first substrate, and a cavity-defining layer on the first substrate, the cavity-defining layer defining at least a plurality of cavities corresponding to the plurality of first electrodes respectively, each of the cavities having a footprint on the first substrate covering a footprint of a corresponding one of the plurality of first electrodes on the first substrate. Each of the cavities comprises a first partition wall on the first substrate, the first partition wall having a footprint on the first substrate surrounding a footprint of the corresponding one of the plurality of first electrodes on the first substrate, the first partition wall comprising a first partition wall body extending from the first substrate in a direction away from the first substrate and a first conductive layer on the first partition wall body. The microfluidic chip further comprises: a second substrate opposite to the first substrate; and a plurality of second electrodes on a side of the second substrate facing the first substrate. Each of the cavities further comprises a second partition wall on the side of the second substrate facing the first substrate, the second partition wall comprising a second partition wall body extending from the side of the second substrate facing the first substrate towards the first substrate, the second partition wall body having a footprint on the first substrate at least partially overlapping a footprint of the corresponding one of the plurality of first partition walls on the first substrate. FIG. 15 illustrates a partial cross-sectional view of a microfluidic chip according to this embodiment of the present application. The microfluidic chip comprises: a first substrate 10, a plurality of first electrodes 20 on the first substrate 10, and a cavity-defining layer on the first substrate, the cavity-defining layer defining at least a plurality of cavities corresponding to the plurality of first electrodes 20 respectively. The microfluidic chip further comprises: a second substrate 80 opposite to the first substrate 10; and a plurality of second electrodes 90 on a side of the second substrate 80 facing the first substrate. Each of the cavities comprises a first partition wall on the first substrate, the first partition wall having a footprint on the first substrate surrounding a footprint of a corresponding one of the plurality of first electrodes 20 on the first substrate, the first partition wall comprising a first partition wall body 50 extending from the first substrate 10 in a direction away from the first substrate and a first conductive layer 60 on the first partition wall body. Each of the cavities further comprises a second partition wall on the side of the second substrate 80 facing the first substrate 10, the second partition wall comprising a second partition wall body 100 extending from the side of the second substrate 80 facing the first substrate towards the first substrate, the second partition wall body 100 having a footprint on the first substrate at least partially overlapping a footprint of the corresponding one of the plurality of first partition walls 50 on the first substrate. That is, in this embodiment, each of the cavities comprises a first partition wall on the first substrate and a second partition wall on the side of the second substrate 80 facing the first substrate 10, the first partition wall on the first substrate can define a first sub-cavity 30a, and the second partition wall can define a second sub-cavity 30b, each of the cavities actually consisting of the first sub-cavity 30a and the second sub-cavity 30b.

[0071] The first substrate 10 and the layer structures formed on the first substrate 10 can be collectively referred to as a lower substrate structure, and the second substrate 80 and the layer structures formed on the second substrate 80 can be collectively referred to as an upper substrate structure. In the embodiment shown in FIG. 15, the lower substrate structure and the upper substrate structure are substantially the same as the lower substrate structure in FIG. 3 and the upper substrate structure in FIG. 12, respectively, and other film layer structures in the lower substrate structure and the upper substrate structure will not be described herein. When the upper substrate structure and the lower substrate structure are combined to form a microfluidic chip, a cavity with a higher height can be formed around the first electrode, so that the movement of hydrogen ions on the first electrode to other reaction units can be better limited, further reducing the ion crosstalk between different reaction units, and when the microfluidic chip is used for DNA synthesis, the accuracy of DNA synthesis can be improved.

[0072] In some embodiments, the first partition wall includes a first notch and a second notch opposite to each other, each of the first notch and the second notch extending from the first partition wall facing the upper surface of the second substrate towards the first substrate, such that the first notch and the second notch communicate with each other via the cavity. In some embodiments, the first notch and the second notch can have a width of substantially 20 microns, and the first notch and the second notch in the first partition wall can increase the flow rate of the liquid in each reaction unit (e.g., a DNA synthesis unit), improving the operation or processing efficiency of the microfluidic chip on the liquid reagent. For example, the first notch and the second notch described above can be formed in the first partition wall on the first substrate in the embodiment shown in FIG. 15, so that the ion crosstalk between different reaction units can be reduced without reducing the flow rate of the liquid.

[0073] Further, in some embodiments, each of the first notch and the second notch extends from the first partition wall body facing the upper surface of the second substrate to the first substrate, such that the first partition wall body is divided into a first partition portion and a second partition portion isolated from each other. FIG. 16 schematically shows an example of the orthographic projection of a single first partition wall body on the first substrate. The first partition wall includes a first notch C1 and a second notch C2 opposite to each other, the first notch C1 and the second notch C2 extending from the first partition wall body facing the upper surface of the second substrate to the first substrate, such that the first partition wall body 50 is divided into a first partition portion 50a and a second partition portion 50b isolated from each other. In this way, the flow rate of the liquid reagent in the microfluidic chip can be further promoted, and the operation or processing efficiency of the microfluidic chip on the liquid reagent can be improved.

[0074] FIG. 17 illustrates liquid flow velocity simulation results based on the microfluidic chip shown in FIG. 12, in an example simulation experiment, the liquid entering the microfluidic chip via the liquid inlet of the microfluidic chip is water, FIG. 17(a) is a simulation diagram of the microfluidic chip model, the liquid flow rate is approximately 1 mm / s. FIG. 17(b) is a simulation diagram of the liquid flow velocity at a height of about 14 um in the microfluidic chip box, the liquid flow rate in the cavity is approximately 0.4 mm / s.

[0075] FIG. 18 illustrates liquid flow velocity simulation results of the microfluidic chip described in FIGS. 15 and 16, FIG. 18(a) is a simulation diagram of the microfluidic chip model, wherein the first partition wall includes a first notch and a second notch opposite each other, FIG. 18(b) is a simulation diagram of the liquid flow velocity at a height of about 14 um in the microfluidic chip box, the liquid flow rate in the cavity is approximately 0.8 mm / s. It can be seen that the embodiment of the microfluidic chip based on the description of FIGS. 15 and 16 can facilitate the flow of liquid inside the chip, thereby not reducing (even improving) the operation or processing efficiency of the microfluidic chip on the liquid reagent while limiting the ion crosstalk between different reaction units.

[0076] According to some embodiments of the present application, at least one of the first partition wall body and the second partition wall body described above can include a first portion and a second portion separated from each other, so that the cavity includes a first inlet and a first outlet opposite each other. In this way, the liquid reagent can enter the cavity from the first inlet and exit the cavity from the first outlet, thereby facilitating the flow of liquid reagent in the microfluidic chip.

[0077] In some embodiments, at least one of the first partition wall body and the second partition wall body can further include a third portion and a fourth portion separated from each other, and the third portion and the fourth portion are separated from the first portion and the second portion, respectively, the first portion, the second portion, the third portion and the fourth portion on the first substrate The orthographic projection of the corresponding first electrode in the first substrate, the cavity includes a second inlet and a second outlet opposite each other, the first inlet includes a gap between the first portion and the third portion, the second inlet includes a gap between the second portion and the third portion, the first outlet includes a gap between the first portion and the fourth portion, and the second outlet includes a gap between the second portion and the fourth portion. Thus, each cavity can be formed with a first inlet, a first outlet, a second outlet, and a second outlet, and the liquid reagent can enter the cavity from the first inlet and the second inlet, and exit the cavity from the first outlet and the second outlet, thereby facilitating the flow of liquid reagent in the microfluidic chip.

[0078] The following describes an example of a microfluidic chip in which the cavity includes a first inlet, a first outlet, a second outlet, and a second outlet, based on the variant embodiment of the microfluidic chip shown in FIG. 12. In the following example, the lower substrate structure of the microfluidic chip is the same as that of the microfluidic chip shown in FIG. 12, and the upper substrate structure is similar to that of the microfluidic chip shown in FIG. 12, but the second partition wall body 100 is not a continuous circular shape, but is divided into four discontinuous parts. FIG. 19 illustrates a structural schematic of the second partition wall body, and the upper diagram in FIG. 19 can be understood as a schematic of the orthographic projection of a plurality of second partition wall bodies on the first substrate. As shown in FIG. 19, the second partition wall body includes a first part 100a, a second part 100b, a third part 100c, and a fourth part 100d that are separated from one another, such that the cavity includes a first inlet n1 and a first outlet e1 that are opposite one another, and a second inlet n2 and a second outlet e2 that are opposite one another. The orthographic projection of the first part 100a, the second part 100b, the third part 100c, and the fourth part 100d on the first substrate surrounds the orthographic projection of a corresponding first electrode of the plurality of first electrodes on the first substrate. The first inlet n1 includes a gap between the first part 100a and the third part 100c, the second inlet n2 includes a gap between the second part 100b and the third part 100c, the first outlet e1 includes a gap between the first part 100a and the fourth part 100d, and the second outlet e2 includes a gap between the second part 100b and the fourth part 100d. In this way, the flow of liquid reagents within the microfluidic chip can be further facilitated.

[0079] With continued reference to FIG. 19 or with reference to FIG. 20, in some embodiments, the orthographic projection of the first part 100a on the first substrate includes a linear segment L1 and a first arc segment h1 that are connected to one another, the orthographic projection of the third part 100c on the first substrate includes a second arc segment h2, the orthographic projection of the fourth part 100d on the first substrate includes a third arc segment h3, the curvature direction of the second arc segment h2 is the same as the curvature direction of the third arc segment h3, the curvature direction of the first arc segment h1 is different from the curvature direction of the second arc segment h2, and the first arc segment h1 is located between the third arc segment h3 and the second arc segment h2, and the orthographic projection of the second part 100b on the first substrate and the orthographic projection of the first part 100a on the first substrate are symmetric about the line connecting the center of the second arc segment h2 and the center of the third arc segment h3. As shown in FIG. 19, in some embodiments, the orthographic projection of the first part 100a on the first substrate and the orthographic projection of the second part 100b on the first substrate each assume a shape that is approximately the letter J, the orthographic projection of the third part 100c on the first substrate assumes a shape that is approximately a semicircle, and the orthographic projection of the fourth part 100d on the first substrate assumes a shape that is approximately the letter D.

[0080] In some embodiments, the microfluidic chip further comprises a first conductive layer on the first substrate and surrounding the first electrode, for example, the first conductive layer 60 shown in FIGS. 11 and 12, the line segment section LI of the orthographic projection of the first portion 100a on the first substrate overlaps with the orthographic projection of the first conductive layer 60 on the first substrate (for example, the line segment section LI overlaps with the outer edge of the annular orthographic projection of the first conductive layer 60 on the first substrate), and the line connecting the line segment section LI of the orthographic projection of the first portion 100a on the first substrate away from one end of the first arc-shaped section h1 and the line segment section of the orthographic projection of the second portion 100b on the first substrate away from one end of the second arc-shaped section h2 is tangent to the orthographic projection of the first conductive layer 60 on the first substrate. In some embodiments, the second arc-shaped section h2 overlaps with the orthographic projection of the first conductive layer 60 on the first substrate (for example, the second arc-shaped section h2 overlaps with the inner edge of the annular orthographic projection of the first conductive layer 60 on the first substrate), and the third arc-shaped section h3 is tangent to the orthographic projection of the first conductive layer on the first substrate.

[0081] As shown in FIGS. 19 and 20, in some embodiments, the first arc-shaped section h1 has an inner diameter of about 16 microns and an arc of about 135°, the line segment section LI has a length of about 33 microns, the second arc-shaped section h2 is a half ring with an inner diameter of about 50 microns, and the inner edge of the second arc-shaped section h2 coincides with the inner edge of the orthographic projection of the first conductive layer on the first substrate on the first substrate. The orthographic projection of the second portion 100b on the first substrate and the orthographic projection of the first portion 100a on the first substrate are symmetric about the line connecting the center of the second arc-shaped section h2 and the center of the third arc-shaped section h3. The third arc-shaped section h3 has an outer diameter of about 60 microns and an arc of about 100°. The second separation wall body comprises the orthographic projections of the first portion 100a, the second portion 100b, the third portion 100c, and the fourth portion 100d on the first substrate, which are separated from each other and surround the orthographic projection of the first electrode 20 on the first substrate, and meanwhile, each cavity can be formed with a first inlet, a first outlet, a second outlet, and a second outlet, which can achieve the improvement of the liquid flow rate in the cavity while limiting the ion crosstalk between different reaction units. In the following, the effect of the microfluidic chip based on this embodiment in limiting the ion crosstalk between different reaction units and improving the liquid flow rate in the cavity is verified through simulation experiments.

[0082] The lower graph in FIG. 19 illustrates the simulation model of the microfluidic chip, the lower substrate structure of the microfluidic chip is the same as that shown in FIG. 12, the orthographic projection of the second partition wall body in the upper substrate structure on the first substrate is shown in the upper graph in FIG. 19, and the simulation conditions are the same as those shown in FIG. 8. FIG. 20 illustrates the distribution of hydrogen ions in the steady state. As can be seen from FIG. 20, compared with the embodiment shown in FIG. 12, the ion crosstalk phenomenon between different reaction units is further inhibited, and the amount of hydrogen ions entering the reaction unit to which no voltage is applied is further reduced. This is because, compared with the embodiment shown in FIG. 12, the surface area of the cavity is actually increased, thereby enhancing the capture ability of hydrogen ions. FIG. 21 illustrates the simulation results of the flow rate of the liquid in the chip. Under the same conditions, at the same height in the box, the flow rate in the cavity reaches 1.3 mm / s, which is even greater than the flow rate at the inlet hole of the chip (1 mm / s), which indicates that the cavity structure in the microfluidic chip based on this embodiment not only does not inhibit the flow of the liquid, but even plays a role in accelerating the flow of the liquid.

[0083] The above examples take the second partition wall body in the upper substrate structure as an example, which includes the first part, the second part, the third part and the fourth part separated from each other, to illustrate the second partition wall body. It can be understood that, in other embodiments, the first partition wall body in the lower substrate structure can also include a similar structure to the second partition wall body, that is, the first partition wall body can also be formed to include a plurality of parts separated from each other, instead of forming a continuous annular structure. At this time, the ion crosstalk between different reaction units can be further limited, and at the same time, the flow rate of the liquid in the cavity will not be affected too much.

[0084] Another embodiment of the present application provides a microfluidic device including the microfluidic chip as described in any one of the above embodiments. Examples of the microfluidic device include, but are not limited to, a DNA synthesis device, a biological detection device, etc.

[0085] It will be understood that, although the terms first, second, third, etc. can be used herein to describe various devices, elements, components or parts, these devices, elements, components or parts should not be limited by these terms, which are only used to distinguish one device, element, component or part from another. In addition, "electrically connected" mentioned herein includes "directly connected" or "indirectly connected". Although the technical solutions of the present application have been described in combination with some embodiments, the protection scope of the present application is not limited to the specific forms set forth herein, and the scope of the present application is defined by the appended claims.

Claims

1. A microfluidic chip comprising: a first substrate; a plurality of first electrodes on the first substrate; and a cavity-defining layer on the first substrate, wherein the cavity-defining layer defines a plurality of cavities corresponding to the plurality of first electrodes respectively, each of the plurality of cavities has a footprint on the first substrate that covers a footprint on the first substrate of a corresponding first electrode of the plurality of first electrodes. 2.The microfluidic chip of claim 1, wherein each of the plurality of cavities comprises a first partition wall on the first substrate, the first partition wall has a footprint on the first substrate that surrounds a footprint on the first substrate of a corresponding first electrode of the plurality of first electrodes, the first partition wall comprises a first partition wall body extending from the first substrate in a direction away from the first substrate and a first conductive layer on the first partition wall body. 3.The microfluidic chip of claim 2, wherein the first conductive layer covers at least a portion of a side surface of the first partition wall body within the cavity. 4.The microfluidic chip of claim 3, wherein the first partition wall body comprises a first insulating layer on the first substrate, a second insulating layer on the first insulating layer, and a second conductive layer between the first insulating layer and the second insulating layer, wherein the first conductive layer and the second conductive layer are electrically connected to each other. 5.The microfluidic chip of claim 4, wherein the first conductive layer further extends to an upper surface of the second insulating layer away from the first insulating layer, the second insulating layer comprises a via, and the first conductive layer contacts the second conductive layer via the via. 6.The microfluidic chip of claim 1, further comprising: a second substrate opposite to the first substrate; and a second electrode on a side of the second substrate facing the first substrate, wherein the cavity-defining layer is between the first substrate and the second electrode. 7.The microfluidic chip of claim 1, further comprising: a second substrate opposite to the first substrate; and a second electrode on a side of the second substrate facing the first substrate, wherein each of the plurality of cavities comprises a second partition wall on the side of the second substrate facing the first substrate, the second partition wall comprises a second partition wall body extending from the side of the second substrate facing the first substrate towards the first substrate, wherein a footprint on the first substrate of the second partition wall body surrounds a footprint on the first substrate of a corresponding first electrode of the plurality of first electrodes. 8.The microfluidic chip of claim 6, further comprising a first conductive layer on the first substrate and surrounding the first electrode, wherein a footprint on the first substrate of the second partition wall body at least partially overlaps a footprint on the first substrate of the first conductive layer. ​ ​ ​ 9. The microfluidic chip of claim 7, wherein the microfluidic chip further comprises a second conductive layer between the first substrate and the first conductive layer, the second conductive layer encircles the first electrode, and the second conductive layer and the first conductive layer are electrically connected to each other.

10. The microfluidic chip of claim 2, wherein the microfluidic chip further comprises: a second substrate opposite to the first substrate; and a second electrode on a side of the second substrate facing the first substrate, each of the plurality of cavities further comprises a second partition wall on the side of the second substrate facing the first substrate, the second partition wall comprises a second partition wall body extending from the side of the second substrate facing the first substrate toward the first substrate, wherein a footprint of the second partition wall body on the first substrate at least partially overlaps with a footprint of a corresponding first partition wall of the plurality of first partition walls on the first substrate.

11. The microfluidic chip of claim 9, wherein the first partition wall comprises a first notch and a second notch opposite to each other, each of the first notch and the second notch extends from an upper surface of the first partition wall facing the second substrate toward the first substrate, such that the first notch and the second notch communicate with each other via the cavity.

12. The microfluidic chip of claim 10, wherein each of the first notch and the second notch extends from the first partition wall body toward the first substrate such that the first partition wall body is divided into a first partition portion and a second partition portion isolated from each other.

13. The microfluidic chip of claim 2 or 7, wherein at least one of the first partition wall body or the second partition wall body comprises a first portion and a second portion separated from each other, such that the cavity comprises a first inlet and a first outlet opposite to each other.

14. The microfluidic chip of claim 13, wherein at least one of the first partition wall body and the second partition wall body further comprises a third portion and a fourth portion separated from each other, and the third portion and the fourth portion are respectively separated from the first portion and the second portion from each other, footprints of the first portion, the second portion, the third portion, and the fourth portion on the first substrate encircle a footprint of a corresponding first electrode of the plurality of first electrodes on the first substrate, wherein the cavity comprises a second inlet and a second outlet opposite to each other, wherein the first inlet comprises a gap between the first portion and the third portion, the second inlet comprises a gap between the second portion and the third portion, the first outlet comprises a gap between the first portion and the fourth portion, and the second outlet comprises a gap between the second portion and the fourth portion. ​ ​ ​ ​ ​ 15. The microfluidic chip of claim 14, wherein the first portion has a footprint on the first substrate comprising a linear segment and a first arc segment connected to each other, the third portion has a footprint on the first substrate comprising a second arc segment, and the fourth portion has a footprint on the first substrate comprising a third arc segment, wherein a curvature direction of the second arc segment is consistent with a curvature direction of the third arc segment, a curvature direction of the first arc segment is different from the curvature direction of the second arc segment, and the first arc segment is located between the third arc segment and the second arc segment. wherein the footprint of the second portion on the first substrate and the footprint of the first portion on the first substrate are symmetric about a line connecting a center of the second arc segment and a center of the third arc segment.

16. The microfluidic chip of claim 15, further comprising a first conductive layer on the first substrate and surrounding the first electrode, wherein the linear segment of the footprint of the first portion on the first substrate partially overlaps the footprint of the first conductive layer on the first substrate, and a line connecting an end of the linear segment of the footprint of the first portion on the first substrate away from the first arc segment and an end of the linear segment of the footprint of the second portion on the first substrate away from the first arc segment is tangent to the footprint of the first conductive layer on the first substrate.

17. The microfluidic chip of claim 16, wherein the second arc segment partially overlaps the footprint of the first conductive layer on the first substrate, and the third arc segment is tangent to the footprint of the first conductive layer on the first substrate.

18. The microfluidic chip of any one of claims 2, 8, or 10, wherein the cavity defining layer further comprises a hydrophobic layer on an upper surface of the first conductive layer facing away from the first substrate.

19. The microfluidic chip of claim 7 or 10, wherein the second electrode covers at least a portion of a side surface of the second partition wall body located within the cavity and a lower surface of the second partition wall body facing the first substrate.

20. A microfluidic device comprising the microfluidic chip of any one of claims 1-19.

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