Semiconductor structure and forming method thereof
By combining dry stripping technology with a pinhole tensile stress dielectric layer, the problem of bubble-like defects caused by hydrogen free radicals during photoresist layer stripping was solved, improving the yield and performance of semiconductor structures.
Patent Information
- Application Number
- CN202511404896.4
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-09-28
- Publication Date
- 2026-02-03
AI Technical Summary
During the heavy doping of boron in a P-type MOS transistor, hydrogen free radicals generated during photoresist layer stripping cause delamination between the substrate and the oxide film, forming bubble-like defects that affect semiconductor structure performance and yield.
The photoresist layer is removed using a dry stripping process, employing active particles that do not contain hydrogen radicals, such as oxygen plasma. Subsequently, a tensile stress dielectric layer with pinholes is formed on the substrate surface to expel gases and gaseous products, preventing their aggregation and escape.
This effectively avoids the formation of bubble-like defects, improves the manufacturing yield of semiconductor structures, and enhances performance.
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Figure CN121463479A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a semiconductor structure and a forming method thereof. BACKGROUND
[0002] Doping is an important process step in semiconductor manufacturing, for example, the heavy doping of source and drain is one of the key steps in the manufacturing process of MOS devices. Source and drain are two polarities in a transistor, which are used to control the flow of current, i.e., the source is used to provide current, and the drain is used to receive current. In an N-type MOS device, doping P (phosphorus) element makes it negatively charged, and the drain made of material doped with P can effectively control the flow of current in the N-type MOS device; in a P-type MOS device, doping B (boron) element makes it positively charged, and the drain made of material doped with B can effectively control the flow of current in the P-type MOS device.
[0003] However, at present, when doping B element in a P-type MOS device, the precursor used to provide B element is BF2, i.e., by transmitting high-dose BF2 into a reaction chamber to generate a doped region in a substrate. In the doping process, when BF2 molecules with sufficient energy collide with atoms (such as Si atoms) in the substrate, the B-F bond will break, and both B and F atoms will enter the substrate. Since F is an interstitial element in the Si lattice, the higher the dose or energy of BF2 injection, the more F atoms injected into the substrate. During ion implantation, a photoresist layer needs to be formed on the surface of the substrate in advance to define the position of the implanted element in the substrate. After the implantation process is completed, the photoresist layer needs to be stripped. However, in the process of stripping the photoresist layer, the photoresist layer is often bombarded by plasma and chemically reacted with the photoresist layer, so that the photoresist layer is decomposed into small molecules and removed. The plasma bombarding the photoresist layer often contains hydrogen radicals, and the hydrogen radicals can penetrate the surface of the substrate into the interior of the substrate, and chemically react with the F atoms implanted into the interior of the substrate to generate gaseous HF. During subsequent annealing, HF will escape, causing the substrate and the oxide film on the surface of the substrate to delaminate, forming bubble-like defects, thereby affecting the performance of the finally formed semiconductor structure and reducing the yield of semiconductor manufacturing.
[0004] Therefore, how to reduce the problem of easy occurrence of bubble-like defects after ion implantation process, thereby improving the performance of the semiconductor structure and improving the yield of semiconductor structure manufacturing, is a technical problem to be solved at present. SUMMARY
[0005] The present application provides a semiconductor structure and a forming method thereof, which can reduce the bubble-like defects after ion implantation process, improve the performance of the semiconductor structure and increase the yield of the semiconductor structure.
[0006] According to some embodiments, the present application provides a forming method of a semiconductor structure, comprising the following steps: forming a substrate, the substrate comprising a substrate and a doped region in the substrate, the doped region comprising a doped element; forming a tensile stress dielectric layer on the surface of the substrate, the tensile stress dielectric layer having a plurality of pinholes for discharging gas in the substrate.
[0007] In some embodiments, the step of forming the substrate comprises: providing a substrate; forming a photoresist layer on the surface of the substrate, the photoresist layer having an opening exposing the substrate; transferring doped source particles into the substrate through the opening, at least one doped element generated by the decomposition of the doped source particles being implanted into the substrate to form the doped region.
[0008] In some embodiments, the step of transferring doped source particles into the substrate through the opening, at least one doped element generated by the decomposition of the doped source particles being implanted into the substrate to form the doped region comprises: implanting BF2 into the substrate through the opening, both B element and F element generated by the decomposition of the BF2 being implanted into the substrate to form the doped region.
[0009] In some embodiments, before the step of forming the tensile stress dielectric layer on the surface of the substrate, the method further comprises the following step: stripping the photoresist layer by a dry stripping process, the active particles used in the dry stripping process not chemically reacting with the doped element.
[0010] In some embodiments, the step of stripping the photoresist layer by a dry stripping process, the active particles used in the dry stripping process not chemically reacting with the doped element comprises: stripping the photoresist layer by a dry stripping process, the active particles used in the dry stripping process not containing hydrogen radicals.
[0011] In some embodiments, the step of stripping the photoresist layer by a dry stripping process, the active particles used in the dry stripping process not chemically reacting with the doped element comprises: stripping the photoresist layer by a dry stripping process, the active particles used in the dry stripping process only comprising oxygen plasma.
[0012] In some embodiments, the step of forming the tensile stress dielectric layer on the surface of the substrate comprises: forming the tensile stress dielectric layer on the surface of the substrate by a sub-atmospheric pressure chemical vapor deposition process.
[0013] In some embodiments, the step of forming the tensile stress dielectric layer on the surface of the substrate by a sub-atmospheric pressure chemical vapor deposition process comprises: forming the tensile stress silicon dioxide layer on the surface of the substrate by a sub-atmospheric pressure chemical vapor deposition process using tetraethoxysilane as a reaction source, and using the tensile stress silicon dioxide layer as the tensile stress dielectric layer.
[0014] In some embodiments, the tensile stress silicon dioxide layer has a water vapor permeability of 18 gm / [m2·day]~20 gm / [m2·day].
[0015] According to another aspect, the present application also provides a semiconductor structure formed by the method for forming a semiconductor structure as described above; the semiconductor structure comprises: a substrate comprising a substrate and a doped region in the substrate, the doped region comprising a doped element; a tensile stress dielectric layer covering the surface of the substrate, the tensile stress dielectric layer having a plurality of pinholes for discharging gas in the substrate.
[0016] The semiconductor structure and the method for forming a semiconductor structure provided by the present application form the doped region comprising the doped element in the substrate, and then form the tensile stress dielectric layer on the surface of the substrate, the tensile stress dielectric layer having a plurality of pinholes, so that even if the doped element in the doped region reacts with the plasma generated during the photoresist removal process to generate gas, or the doped element reacts with the reaction source in the tensile stress dielectric layer to generate gaseous products, the gas or the gaseous products can be discharged through the pinholes in the tensile stress dielectric layer, avoiding the accumulation of the gas or the gaseous products in the substrate or on the surface of the substrate, thereby avoiding the problem of forming bubble-like defects between the substrate and the dielectric layer due to the escape of the gas or the gaseous products from the substrate, thereby improving the performance of the semiconductor structure and increasing the yield of the semiconductor structure. BRIEF DESCRIPTION OF DRAWINGS
[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings needed in the following embodiment description will be briefly introduced. Obviously, the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can also be obtained from these drawings without any creative effort.
[0018] Figure 1 This is a flowchart of a method for forming a semiconductor structure according to a specific embodiment of the present invention; Figure 2 This is a schematic diagram of the substrate structure in a specific embodiment of the present invention; Figure 3 This is a schematic diagram of the structure after a photoresist layer is formed on the substrate in a specific embodiment of the present invention; Figure 4 This is a schematic diagram of the structure after a tensile stress dielectric layer is formed on the substrate in a specific embodiment of the present invention; Figure 5 This is a comparison diagram of bubble-like defects in a semiconductor structure formed in a specific embodiment of the present invention and bubble-like defects in a semiconductor structure formed in the prior art.
[0019] Explanation of reference numerals in the attached figures 20 substrate 30 photoresist layers 31 openings 40 doped region 41 Tensile Stress Medium Layer Detailed Implementation The specific embodiments of the semiconductor structure and its formation method provided by the present invention will be described in detail below with reference to the accompanying drawings.
[0020] This specific embodiment provides a method for forming a semiconductor structure. Figure 1 This is a flowchart illustrating a method for forming a semiconductor structure according to a specific embodiment of the present invention. (For example...) Figure 1 As shown, the method for forming the semiconductor structure includes the following steps: Step S11: Forming a substrate, the substrate including a substrate and a doped region located within the substrate, the doped region including a doping element; Step S12: A tensile stress medium layer is formed on the surface of the substrate. The tensile stress medium layer has a plurality of pinholes for venting gas from the substrate.
[0021] Figure 2 This is a schematic diagram of the substrate structure in a specific embodiment of the present invention. Figure 3 This is a schematic diagram of the structure after a photoresist layer is formed on the substrate in a specific embodiment of the present invention. Figure 4 This is a schematic diagram of the structure after a tensile stress dielectric layer is formed on a substrate in a specific embodiment of the present invention. In some embodiments, the specific steps for forming the substrate include: Provide substrate 20, such as Figure 2 As shown; A photoresist layer 30 is formed on the surface of the substrate 20, and the photoresist layer 30 has an opening 31 that exposes the substrate, such as...Figure 3 as shown. Transferring dopant source particles into the substrate 20 along the openings 31, at least one dopant element produced by decomposition of the dopant source particles is implanted into the substrate 20 to form the doped region 40, as shown. Figure 4 as shown.
[0022] In some embodiments, the specific steps of transferring dopant source particles into the substrate 20 along the openings 31, at least one dopant element produced by decomposition of the dopant source particles is implanted into the substrate 20 to form the doped region 40 include: Implanting BF2 into the substrate 20 along the openings 31, both B element and F element produced by decomposition of the BF2 are implanted into the substrate 20 to form the doped region 40.
[0023] For example, the substrate 20 can be a Si substrate, a SiP substrate, a SiC substrate or a SiGe substrate, and the present specific embodiment is described by taking the substrate 20 as a Si substrate as an example. The substrate 20 includes opposite front surface and back surface. During the process of forming the doped region 40 in the substrate 20, the cleaned substrate 20 is placed in a reaction chamber, and a photoresist layer 30, such as an organic photoresist layer, is coated on the front surface of the substrate 20 to cover the front surface of the substrate 20. Then, the photoresist layer 30 is subjected to a patterning process to form the openings 31 penetrating the photoresist layer 30 in the vertical direction and exposing the front surface of the substrate 20, as shown. Figure 3 Then, dopant source particles, such as BF2, are transferred into the reaction chamber. When the BF2 molecules with sufficient energy collide with atoms (e.g. Si atoms) in the substrate 20, the B-F bond will break, and both B atoms and F atoms will enter the substrate 20, so that the dopant elements in the formed doped region 40 include B element and F element. Moreover, the concentration of the F element in the doped region 40 increases with the increase of the B element doping concentration. In an example, the doped region 40 can be a source region or a drain region of a P-type MOS transistor, and the dopant dose of the BF2 is 3.0×1015 / cm2~5.0×1015 / cm2. 15 2 ~5.0×10 15 2 .
[0024] In some embodiments, before forming the tensile stress medium layer 41 on the surface of the substrate 20, the following steps are further included: The photoresist layer 30 is stripped by a dry stripping process, and the active particles used in the dry stripping process do not chemically react with the dopant elements.
[0025] Specifically, after forming the doped region 40, the photoresist layer 30 is stripped by using the dry stripping process to expose the front surface of the substrate 20. In the process of stripping the photoresist layer 30 by using the dry stripping process, the active particles are transmitted to the photoresist layer 30 from a plasma source, the plasma source generates the active particles (such as active radicals) under the action of a radio frequency electric field, the active particles chemically react with the photoresist layer 30 to generate volatile gas, thereby achieving the stripping of the photoresist layer 30. By making all the active particles used in the dry stripping process not to chemically react with all the doped elements in the doped region 40, the active particles adsorbed or diffused to the surface of the doped region 40 are prevented from reacting with the doped elements to generate volatile gas (for example, the hydrogen radicals in the active particles in the prior art react with the F elements in the doped region 40 to generate HF gas) in the subsequent thermal process (such as an annealing process), thereby avoiding the generation of bubble-like defects between the substrate 20 and the subsequently generated tensile stress medium layer 41 from the source, further improving the performance of the semiconductor structure, and improving the manufacturing yield of the semiconductor structure. The types of the active particles can be selected according to the material of the photoresist layer 30 and the types of all the doped elements in the doped region 40.
[0026] In some embodiments, the photoresist layer 30 is stripped by using a dry stripping process, and the specific steps of the active particles used in the dry stripping process not chemically reacting with the doped elements include: The photoresist layer 30 is stripped by using a dry stripping process, and the active particles used in the dry stripping process do not contain hydrogen radicals.
[0027] In some embodiments, the photoresist layer 30 is stripped by using a dry stripping process, and the specific steps of the active particles used in the dry stripping process not chemically reacting with the doped elements include: The photoresist layer 30 is stripped by using a dry stripping process, and the active particles used in the dry stripping process only include oxygen plasma.
[0028] For example, in the process of stripping the photoresist layer 30 by using the dry stripping process, only oxygen gas is transmitted to the photoresist layer 30 as the plasma source (that is, the plasma source is pure oxygen gas), and the pure oxygen gas plasma source only generates oxygen radicals under the action of a radio frequency electric field, thereby being able to react with the photoresist layer 30 to achieve the stripping of the photoresist layer 30, and being able to avoid reacting with the doped elements in the doped region 40 to generate volatile gas and avoid the generation of bubble-like defects.
[0029] After the dry stripping process is used to strip the photoresist layer 30, a wet stripping process can also be used to remove the residual photoresist layer 30, thereby avoiding the influence of the residual photoresist layer 30 on subsequent processes.
[0030] In some embodiments, the specific step of forming the tensile stress medium layer 41 on the surface of the substrate 20 includes: The tensile stress medium layer 41 covering the surface of the substrate 20 is formed by using a sub-atmospheric pressure chemical vapor deposition process.
[0031] Specifically, a reaction source is transported to the surface of the substrate 20, and a tensile stress medium layer 41 covering the surface of the substrate 20 is formed by using a sub-atmospheric pressure chemical vapor deposition process (SACVD). The tensile stress medium layer 41 is generated in an environment lower than 1 atmosphere by the sub-atmospheric pressure chemical vapor deposition process, so that the density is relatively low and there are a plurality of pinholes, thereby making the stress existing in the tensile stress medium layer 41 a tensile stress. In this way, the manufacturing process of the tensile stress medium layer 41 is simplified, and the gas (i.e., bubbles) in the substrate 20 and between the substrate 20 and the tensile stress medium layer 41 can be discharged through the loose porous (i.e., having a plurality of pinholes) tensile stress medium layer 41, so that the gas can be discharged from the pinholes in the tensile stress medium layer 41 in a thermal process such as a high-temperature annealing process, reducing or even avoiding the problem of bubble-like defects caused by the accumulation of volatile gas at the interface between the substrate 20 and the tensile stress medium layer 41, which is generated by the chemical reaction between the doped elements in the doped region 40 and the elements (e.g., hydrogen elements) in the current process (e.g., the process of generating the tensile stress medium layer 41) or the previous process (e.g., the process of removing the photoresist layer 30 by a dry stripping process), avoiding the delamination of the substrate 20 and the tensile stress medium layer 41, and achieving the improvement and promotion of the performance of the semiconductor structure. In an example, the stress in the tensile stress medium layer 41 is 20 MPa to 120 MPa (e.g., 60 MPa).
[0032] In some embodiments, the specific step of forming the tensile stress medium layer covering the surface of the substrate 20 by using a sub-atmospheric pressure chemical vapor deposition process includes: The tensile stress medium layer 41 is formed by using tetraethoxysilane as a reaction source and a sub-atmospheric pressure chemical vapor deposition process to form a tensile stress silicon dioxide layer covering the surface of the substrate 20, and the tensile stress silicon dioxide layer is used as the tensile stress medium layer 41.
[0033] Specifically, using tetraethoxysilane as the reaction source and using a sub-atmospheric pressure chemical vapor deposition process to form a tensile stress silicon dioxide layer covering the surface of the substrate 20 can not only ensure that the produced silicon dioxide layer is a tensile stress silicon dioxide layer, but also avoid using a high hydrogen content reaction source in the process of generating the tensile stress silicon dioxide layer, thereby reducing or even avoiding the absorption or diffusion of hydrogen radicals (i.e., the high hydrogen content reaction source contains hydrogen radicals) in the reaction source onto the surface of the substrate 20 in the process of generating the tensile stress silicon dioxide layer, thereby reducing the amount of gas (e.g., HF) generated by the chemical reaction between hydrogen radicals and the doping elements, i.e., reducing the amount of gas escaping between the substrate 20 and the tensile stress dielectric layer 41 in the subsequent thermal process, thereby helping to further reduce the bubble-like defects in the semiconductor structure and further improve the manufacturing yield of the semiconductor structure.
[0034] In some embodiments, the water vapor transmission rate of the tensile stress silicon dioxide layer is 18 gm / [m²·day]~20 gm / [m²·day], so as to not only enable the gas escaping from the inside of the substrate 20 to be discharged from the pinholes in the tensile stress silicon dioxide layer during the thermal process (e.g., high-temperature annealing process), but also ensure the stability of the overall structure of the tensile stress silicon dioxide layer and the covering and isolation of the front surface of the substrate 20.
[0035] Figure 5 is a comparison effect diagram of the bubble-like defects in the semiconductor structure formed in the specific embodiment of the present application and the bubble-like defects in the semiconductor structure formed in the prior art. Among them, Figure 5 (a) in is a schematic diagram of bubble-like defects in a semiconductor structure when the silicon dioxide layer formed on the surface of the substrate using a mixed gas of O2 and N2H4 as the plasma source in the dry etching process is a compressive stress silicon dioxide layer, Figure 5 (b) in is a schematic diagram of bubble-like defects in a semiconductor structure when the silicon dioxide layer formed on the surface of the substrate using pure O2 as the plasma source in the dry etching process is a tensile stress silicon dioxide layer. From Figure 5 it can be seen that when the silicon dioxide layer formed on the surface of the substrate using pure O2 as the plasma source in the dry etching process is a tensile stress silicon dioxide layer, the bubble-like defects in the semiconductor structure are greatly reduced, thereby greatly improving the yield of the product.
[0036] The specific embodiment also provides a semiconductor structure formed by using the method for forming a semiconductor structure as described above, referring to Figures 1-5 . As Figure 5 shown, the semiconductor structure comprises: a substrate comprising a substrate 20 and a doped region 40 located in the substrate 20, the doped region 40 comprising a doping element; A tensile stress dielectric layer 41 is formed on the surface of the substrate 20, and has a plurality of pinholes for discharging gas from the substrate 20.
[0037] The semiconductor structure and the forming method thereof provided by the embodiment can form a tensile stress dielectric layer on the surface of the substrate after forming the doped region containing the doped element in the substrate, and the tensile stress dielectric layer has a plurality of pinholes, so that even if the doped element in the doped region reacts with plasma generated in the photoresist removal process to generate gas or the doped element reacts with a reaction source in the tensile stress dielectric layer to generate gaseous products, the gas or the gaseous products can be discharged through the pinholes in the tensile stress dielectric layer, avoiding the accumulation of the gas or the gaseous products in the substrate or on the surface of the substrate, thereby avoiding the problem of forming bubble-like defects between the substrate and the dielectric layer due to the escape of the gas or the gaseous products from the substrate, improving the performance of the semiconductor structure, and improving the manufacturing yield of the semiconductor structure.
[0038] It should be noted that the terms "comprising" and "having" and their conjugates in the documents of the present application are intended to cover non-exclusive inclusion. The terms "first", "second", and the like are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence, unless the context clearly indicates otherwise, and it should be understood that the data thus used can be interchanged under appropriate circumstances. The term "one or more" can be used to describe a feature, structure, or characteristic in the singular sense, or can be used to describe a combination of features, structures, or characteristics in the plural sense, depending at least in part on the context. The term "based on" can be understood as not necessarily expressing a set of exclusive factors, but can instead, depending at least in part on the context, allow the presence of other factors not necessarily explicitly described. In addition, the embodiments in the present application and the features in the embodiments can be combined with each other without conflict. Furthermore, in the above description, the description of well-known components and technologies has been omitted to avoid unnecessary confusion of the concepts of the present application. In each of the above embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to each other.
[0039] The above description is only the preferred embodiments of the present application, and it should be noted that those skilled in the art can make several improvements and refinements without departing from the principles of the present application, and these improvements and refinements should be considered as the protection scope of the present application.
Claims
1. A method for forming a semiconductor structure, characterized in that, Includes the following steps: A substrate is formed, the substrate comprising a substrate and a doped region located within the substrate, the doped region comprising a doping element; A tensile stress medium layer is formed on the surface of the substrate, and the tensile stress medium layer has a plurality of pinholes for venting gas from the substrate.
2. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for forming the substrate include: Provide substrate; A photoresist layer is formed on the surface of the substrate, and the photoresist layer has an opening that exposes the substrate; Doped source particles are transported along the opening into the substrate, and at least one doping element generated by the decomposition of the doped source particles is injected into the substrate to form the doped region.
3. The method for forming a semiconductor structure according to claim 2, characterized in that, The specific steps for transporting doped source particles along the opening into the substrate, and injecting at least one doping element generated from the decomposition of the doped source particles into the substrate to form the doped region include: BF2 is injected into the substrate through the opening, and the B and F elements generated by the decomposition of BF2 are injected into the substrate to form the doped region.
4. The method for forming a semiconductor structure according to claim 3, characterized in that, Before forming a tensile stress dielectric layer on the surface of the substrate, the following steps are also included: The photoresist layer is removed using a dry stripping process, wherein the active particles used in the dry stripping process do not chemically react with the doping elements.
5. The method for forming a semiconductor structure according to claim 4, characterized in that, The photoresist layer is removed using a dry stripping process, wherein the active particles used in the dry stripping process do not chemically react with the dopant elements. Specific steps include: The photoresist layer is removed using a dry stripping process, wherein the active particles used in the dry stripping process do not contain hydrogen free radicals.
6. The method for forming a semiconductor structure according to claim 4, characterized in that, The photoresist layer is removed using a dry stripping process, wherein the active particles used in the dry stripping process do not chemically react with the dopant elements. Specific steps include: The photoresist layer is removed using a dry stripping process, wherein the active particles used in the dry stripping process consist only of oxygen plasma.
7. The method for forming a semiconductor structure according to claim 1, characterized in that, The specific steps for forming a tensile stress dielectric layer on the surface of the substrate include: A tensile stress dielectric layer covering the surface of the substrate is formed using a sub-atmospheric pressure chemical vapor deposition process.
8. The method for forming a semiconductor structure according to claim 7, characterized in that, The specific steps for forming a tensile stress dielectric layer covering the surface of the substrate using a sub-atmospheric pressure chemical vapor deposition process include: A tensile stress silicon dioxide layer is formed covering the surface of the substrate using tetraethoxysilane as the reaction source and a sub-atmospheric pressure chemical vapor deposition process, and the tensile stress silicon dioxide layer is used as the tensile stress medium layer.
9. The method for forming a semiconductor structure according to claim 8, characterized in that, The water vapor permeability of the tensile stress silica layer is 18 gm / [m²·day] to 20 gm / [m²·day].
10. A semiconductor structure, characterized in that, The semiconductor structure is formed using the method for forming a semiconductor structure as described in claim 1; the semiconductor structure comprises: The substrate includes a substrate and a doped region located within the substrate, the doped region including a doping element; A tensile stress medium layer is applied to the surface of the substrate, and the tensile stress medium layer has a plurality of pinholes for venting gas from the substrate.