Diagnostic method and device for multi-branch interlocking circuit and medium

Abstract

The invention discloses a diagnosis method and device for a multi-branch interlocking circuit and a medium, and the method comprises the steps: generating a plurality of paths of proportional currents through a preset plurality of paths of proportional current source circuits, transmitting the plurality of paths of proportional currents to corresponding shunt circuits, enabling the shunt circuits to achieve the voltage distribution through corresponding resistors, voltage values at the two ends of the resistor are determined; determining a preset first voltage value and a preset second voltage value, and comparing the voltage values at the two ends with the first voltage value and the second voltage value respectively; if the voltage values at the two ends are equal to the first voltage value, it is judged that interlocking of the high-voltage connector corresponding to the shunt circuit is normal; if the voltage values at the two ends are equal to the second voltage value, it is judged that interlocking of the high-voltage connectors corresponding to the shunt circuit fails. According to the application, multiple paths of current can be accurately generated to realize voltage distribution, the interlocking state is quickly judged by comparing voltage values, and diagnosis is not influenced by branches.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of vehicle safety, in particular to a diagnosis method and device of a multi-branch interlocking circuit and a medium. BACKGROUND

[0002] The interlocking safety of high-voltage components connectors of an automobile has always been an important research topic in the field of high-voltage safety. In particular, the all-in-one controller, high-voltage battery pack, power distribution unit, etc. all belong to the controller of the type of multiple inputs and multiple outputs, and the number of high-voltage connector branches involved is large, so the safety problem is particularly important. The common method at present is to use a multi-branch high-voltage interlocking signal in series with a resistor, and to judge whether the interlocking is successful by collecting the voltage value of the resistor, and to stop checking if a fault occurs; a related circuit is designed to allow a single-chip microcomputer to directly collect the interlocking voltage signals of multiple branches.

[0003] However, the above common method usually cannot determine which branch of high-voltage interlocking fails, nor can it determine the case of simultaneous failure of multiple high-voltage interlocking. After a fault occurs, only manual positioning and troubleshooting of the problem connector can be relied on, and there is a problem of multiple circuit signals, which will occupy more pin resources of the single-chip microcomputer, the configuration process is complicated, and the cost is high. SUMMARY

[0004] In order to solve the above problems, the present application provides a diagnosis method of a multi-branch interlocking circuit, which comprises: generating a plurality of proportional currents by a pre-set multi-way proportional current source circuit, delivering the plurality of proportional currents to corresponding shunt circuits respectively, so that the shunt circuits realize voltage distribution through corresponding resistors, and determine the voltage value at both ends of the resistors; determining a first voltage value and a second voltage value, and comparing the voltage value at both ends with the first voltage value and the second voltage value respectively; if the voltage value at both ends is equal to the first voltage value, it is determined that the high-voltage connector interlocking corresponding to the shunt circuit is normal; if the voltage value at both ends is equal to the second voltage value, it is determined that the high-voltage connector interlocking corresponding to the shunt circuit fails.

[0005] In one example, the method further comprises: the multi-way proportional current source circuit comprises a reference resistor Rer, a plurality of NPN triodes Tn, and a plurality of emitter resistors Ren, wherein the reference current IRer flowing through the reference resistor Rer is equal to the current Ie0 flowing through the emitter resistor Re0.

[0006] In one example, the method further comprises: the shunt circuit comprises a resistor Rn1, a resistor Rn2, and an output resistor Rn3, wherein the resistor Rn1 is connected in series with the resistor Rn2, the resistor Rn2 and the output resistor Rn3 are used to realize shunt, Rn1 is used for pull-up and short-circuit protection, the high-voltage connector interlock signal is connected in series with the output resistor Rn3 and then connected in parallel with the resistor Rn2, and the interlock state of the high-voltage connector is determined by detecting the voltage value across the resistor Rn2.

[0007] In one example, the first voltage value and the second voltage value are determined, specifically comprising: the expression of the first voltage value is:

[0008] wherein Re0 is the first emitter resistance, is the supply voltage, Rn2 is the resistor of the voltage to be measured, Ren is the emitter resistance corresponding to Rn2, Rer is the reference resistance, and Rn3 is the output resistance corresponding to Rn2; The expression of the second voltage value is:

[0009] wherein Re0 is the first emitter resistance, is the supply voltage, Rn2 is the resistor of the voltage to be measured, Ren is the emitter resistance corresponding to Rn2, and Rer is the reference resistance.

[0010] In one example, the voltage value across the resistor is determined, specifically comprising: the voltage values VRn2 across the plurality of resistors Rn2 are collected by a plurality of collection circuits.

[0011] In one example, the method further comprises: the collection circuit comprises a decoupling capacitor Cn1, a matching resistor Rn4, a matching resistor Rn5, a matching resistor Rn6, a matching resistor Rn7, and an operational amplifier Un1; a differential amplification circuit is composed of the matching resistor Rn4, the matching resistor Rn5, the matching resistor Rn6, the matching resistor Rn7, and the operational amplifier Un1, the differential amplification circuit is used to collect the voltage values VRn2 across the resistors Rn2 in the plurality of shunt circuits, and input the collected voltage values VRn2 to a multiplexer U1.

[0012] In one example, the method further comprises: a plurality of pins INn of the multiplexer U1 receive a plurality of voltage values from the collection circuit, and a corresponding voltage value is gated according to a digital selection signal SELm from an MCU, so as to output the corresponding voltage value to an ADC1 pin of the MCU, so that the MCU performs diagnosis on the multi-branch interlock state.

[0013] In one example, after determining that the high-voltage connector corresponding to the shunt circuit has failed to interlock, the method further includes: determining the voltage value across the resistor in the corresponding shunt circuit, and locating the high-voltage connector where the interlocking fault occurred based on the voltage value.

[0014] On the other hand, this application also proposes a diagnostic device for a multi-branch interlock circuit, comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, the instructions being executed by the at least one processor to enable the diagnostic device for the multi-branch interlock circuit to perform: the method described in any of the examples above.

[0015] On the other hand, this application also proposes a non-volatile computer storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to be the method described in any of the examples above.

[0016] This application generates a stable proportional current through a multi-channel proportional current source circuit, combined with a shunt circuit to achieve precise voltage distribution. It can independently and accurately diagnose the interlocking status of each high-voltage connector, avoiding mutual interference between branches. If a high-voltage connector interlocking failure is detected, the specific location of the fault can be quickly pinpointed by detecting the voltage across the resistor in the corresponding shunt circuit, improving maintenance efficiency and system reliability. A multiplexer is used to receive voltage values ​​from multiple acquisition circuits, and selection is performed via a digital selection signal from the MCU, effectively reducing the use of MCU pin resources and lowering system complexity and cost. The expressions for the first and second voltage values ​​provide a design basis, which can be flexibly adjusted according to actual supply voltage, resistance values, and other parameters, enhancing the adaptability and versatility of the circuit design. Decoupling capacitors and differential amplifier circuits are used in the acquisition circuit to effectively suppress noise interference, improving the accuracy and stability of voltage acquisition. Attached Figure Description

[0017] The accompanying drawings, which are included to provide a further understanding of this application and form part of this application, illustrate exemplary embodiments and are used to explain this application, but do not constitute an undue limitation of this application. In the drawings: Figure 1 This is a flowchart illustrating a diagnostic method for a multi-branch interlocking circuit according to an embodiment of this application. Figure 2 This is a schematic diagram of a multi-branch interlocking circuit in an embodiment of this application; Figure 3 This is a detailed schematic diagram of a multi-branch interlocking circuit according to an embodiment of this application; Figure 4This is a schematic diagram of a multi-channel proportional current source circuit in an embodiment of this application; Figure 5 This is a schematic diagram of the shunt circuit in an embodiment of this application; Figure 6 This is a schematic diagram of the acquisition circuit in an embodiment of this application; Figure 7 This is a schematic diagram of a diagnostic device for a multi-branch interlocking circuit according to an embodiment of this application. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in conjunction with specific embodiments and corresponding drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0019] The technical solutions provided by the various embodiments of this application are described in detail below with reference to the accompanying drawings.

[0020] like Figure 1 As shown, in order to solve the above problems, this application provides a diagnostic method for a multi-branch interlocking circuit, which is applied to a multi-branch interlocking circuit, such as... Figure 2 As shown, the circuit includes a current shunt circuit, a multi-channel proportional current source circuit, a data acquisition circuit, a multiplexer, and an MCU. Figure 3 As shown, multiple input signals are connected to their respective channels through resistors R12, R22, R33, etc. After being processed by RC filter networks R14 / C11, R24 / C21, etc., they are connected to the non-inverting input terminals of operational amplifiers U11, U21, etc., to form a buffer amplification. The inverting input of the operational amplifier is configured as a voltage follower through feedback resistor R15, and the output signal is connected to the analog input channels IN1~INn of multiplexer U3. The multiplexer is controlled by the MCU through address selection pins IO1, IO2, etc., and the selected channel signal is sent from OUT. The pin outputs are connected to ADC1 for analog-to-digital conversion; the transistor arrays T0~Tn are connected to VCC through base bias resistors Rer, with the emitters grounded and the collectors potentially used for channel switching control or current regulation; the non-inverting input of each operational amplifier is grounded through a resistor, such as R16~Rn6, forming a clamping protection circuit to prevent overvoltage at the multiplexer output; all component power supply pins are connected to VCC, and the ground lines are uniformly connected to a common ground, forming a complete signal conditioning and acquisition system, with the MCU ultimately performing channel selection, data conversion, and processing.

[0021] In one embodiment, such as Figure 4As shown, in the multi-channel proportional current source circuit, VCC is the power supply, Rer is the reference resistor, the current flowing through it is IRer, T0, T1, T2…Tn are NPN transistors, and Re0, Re1, Re2…Ren are emitter resistors, with currents flowing through them being Ie0, Ie1, Ie2…Ien, respectively. Where IRer = Ie0, Ie0*Re0 = Ie1*Re1 = Ie2*Re2 = Ien*Ren.

[0022] The current Ie1 flowing through Re1 is:

[0023] The current Ien flowing through Ren is:

[0024] The specific circuit function is to output currents Ie1, Ie2...Ien from the multi-branch proportional current source to the shunt circuit.

[0025] In one embodiment, the shunt circuit includes multiple branches, including resistors R11…Rn1, resistors R12…Rn2, and output resistors R13…Rn3. For example... Figure 5 As shown, taking the first branch as an example, R11 and R12 are connected in series, R13 is the output resistor, which is connected in series with the high-voltage connector interlock signal and then in parallel with R12. The lower end of R12 is connected to the collector of the multi-channel proportional current source circuit T1. R12 and R13 perform current shunting, while R11 serves as a pull-up resistor and provides short-circuit protection.

[0026] When the high-voltage connector 1 interlock is normal, the voltage value VR12 across R12 is:

[0027] When the high-voltage connector 1 interlock fails, the voltage value VR12 across R12 is

[0028] Similarly, when the high-voltage connector n interlock is normal, the voltage value VRn2 across Rn2 is...

[0029] When the high-voltage connector n interlock fails, the voltage value VRn2 across Rn2 is:

[0030] The shunt circuit distributes voltage through corresponding resistors and determines the voltage values ​​VR12…VRn2 across resistors R12…Rn2, thereby determining whether the high-voltage connectors corresponding to the shunt circuit are properly interlocked.

[0031] In one embodiment, the acquisition circuit includes multiple branches, including decoupling capacitors C11…Cn1, matching resistors R14…Rn4, matching resistors R15…Rn5, matching resistors R16…Rn6, matching resistors R17…Rn7, and operational amplifiers U11…Un1. Figure 6 As shown, taking the first branch as an example, C11 is a decoupling capacitor, R14=R15, R16=R17, forming a differential amplifier circuit with operational amplifier U11. The amplification factor is the ratio of R16 to R14, where R14=R15=R16=R17, so the amplification factor is 1. For different MCUs, the amplification factor can be reasonably designed according to the MCU pin voltage values.

[0032] The acquisition circuit is used to acquire the voltage values ​​VR12, VR22, ..., VRn2 across R12, R22, ..., Rn2 respectively, and input them to the IN1, IN2, ..., INn pins of the multiplexer U1.

[0033] In one embodiment, MCU pins IO1, IO2…IOm output digital signals SEL1, SEL2…SELm to a multiplexer, which then selects IN1, IN2…INn and outputs OUT to the MCU's ADC1 pin, thereby reducing the number of microcontroller pins. Specifically, the input-output relationship is shown in Table 1 below.

[0034] Table 1 Input-output relationship

[0035] Among them, IN1, IN2...Inn correspond to VR12, VR22...VRn2 respectively.

[0036] The methods include: S101. A multi-channel proportional current is generated by a pre-set multi-channel proportional current source circuit, and the multi-channel proportional current is respectively sent to the corresponding current shunt circuit so that the current shunt circuit realizes voltage distribution through the corresponding resistor and determines the voltage value across the resistor.

[0037] A pre-designed and configured multi-channel proportional current source circuit accurately generates multiple proportional currents using a combination of a reference resistor Rer, an NPN transistor Tn, and an emitter resistor Ren. These currents are then fed into corresponding shunt circuits. Within the shunt circuits, current flows through resistors Rn1 and Rn2 connected in series. Rn2, together with the output resistor Rn3, performs the current shunt function, while Rn1 acts as a pull-up resistor and provides short-circuit protection. This process generates a specific voltage drop across resistor Rn2. Subsequently, a data acquisition circuit accurately measures and determines the voltage value across resistor Rn2, providing crucial data for subsequent high-voltage connector interlock status diagnosis.

[0038] S102. Determine a preset first voltage value and a second voltage value, and compare the voltage values ​​at both ends with the first voltage value and the second voltage value respectively.

[0039] S103. If the voltage values ​​at both ends are equal to the first voltage value, then it is determined that the high-voltage connector interlocking corresponding to the shunt circuit is normal.

[0040] S104. If the voltage values ​​at both ends are equal to the second voltage value, then it is determined that the high-voltage connector interlocking corresponding to the shunt circuit has failed.

[0041] The shunt circuit comprises multiple branches, including resistors R11…Rn1, resistors R12…Rn2, and output resistors R13…Rn3. Taking the first branch as an example, R11 and R12 are connected in series, R13 is the output resistor, which is connected in series with the high-voltage connector interlock signal and then in parallel with R12. The lower end of R12 is connected to the collector of the multi-channel proportional current source circuit T1. R12 and R13 perform the shunt function, while R11 serves as a pull-up resistor and provides short-circuit protection.

[0042] When the high-voltage connector 1 interlock is normal, the voltage value VR12 across R12 is:

[0043] When the high-voltage connector 1 interlock fails, the voltage value VR12 across R12 is:

[0044] Similarly, when the high-voltage connector n interlock is normal, the voltage value VRn2 across Rn2 (referred to here as the first voltage value) is:

[0045] When the high-voltage connector n interlock fails, the voltage value VRn2 across Rn2 (referred to here as the second voltage value) is:

[0046] The shunt circuit distributes voltage through corresponding resistors and determines the voltage values ​​VR12…VRn2 across resistors R12…Rn2, thereby determining whether the high-voltage connectors corresponding to the shunt circuit are properly interlocked.

[0047] In one embodiment, after determining that the high-voltage connector corresponding to the shunt circuit has failed to interlock, the actual voltage value across resistor Rn2 in the corresponding shunt circuit is immediately collected and analyzed. This voltage value is compared with a preset fault threshold voltage, i.e., a second voltage value, to confirm the fault state. Based on the unique correspondence between resistors and high-voltage connectors in the circuit design, the specific location of the high-voltage connector where the interlocking fault occurred is precisely pinpointed, enabling rapid repair and system recovery. Since the current in each branch is different, the resistance value to the microcontroller is also different; these different values ​​allow direct identification of a specific branch.

[0048] like Figure 7 As shown in the illustration, this application also provides a diagnostic device for multi-branch interlocking circuits, including: At least one processor; and, A memory that is communicatively connected to at least one processor; wherein, The memory stores instructions that can be executed by at least one processor to enable a diagnostic device for a multi-branch interlock circuit to perform the method as described in any of the embodiments described above.

[0049] This application also provides a non-volatile computer storage medium storing computer-executable instructions, which are configured as described in any of the above embodiments.

[0050] In the 1990s, improvements to a technology could be clearly distinguished as either hardware improvements (e.g., improvements to the circuit structure of diodes, transistors, switches, etc.) or software improvements (improvements to the methodology). However, with technological advancements, many methodological improvements today can be considered direct improvements to the hardware circuit structure. Designers almost always obtain the corresponding hardware circuit structure by programming the improved methodology into the hardware circuit. Therefore, it cannot be said that a methodological improvement cannot be implemented using hardware physical modules. For example, a Programmable Logic Device (PLD) (such as a Field Programmable Gate Array (FPGA)) is such an integrated circuit whose logic function is determined by the user programming the device. Designers can program and "integrate" a digital system onto a PLD themselves, without needing chip manufacturers to design and manufacture dedicated integrated circuit chips. Furthermore, nowadays, instead of manually manufacturing integrated circuit chips, this programming is mostly implemented using "logic compiler" software. Similar to the software compiler used in program development, the original code before compilation must also be written in a specific programming language, called a Hardware Description Language (HDL). There are many HDLs, such as ABEL (Advanced Boolean Expression Language), AHDL (Altera Hardware Description Language), Confluence, CUPL (Cornell University Programming Language), HDCal, JHDL (Java Hardware Description Language), Lava, Lola, MyHDL, PALASM, and RHDL (Ruby Hardware Description Language). Currently, the most commonly used are VHDL (Very-High-Speed ​​Integrated Circuit Hardware Description Language) and Verilog. Those skilled in the art should also understand that by simply performing some logic programming on the method flow using one of these hardware description languages ​​and programming it into an integrated circuit, the hardware circuit implementing the logical method flow can be easily obtained.

[0051] The controller can be implemented in any suitable manner. For example, it can take the form of a microprocessor or processor and a computer-readable medium storing computer-readable program code (e.g., software or firmware) executable by the (micro)processor, logic gates, switches, application-specific integrated circuits (ASICs), programmable logic controllers, and embedded microcontrollers. Examples of controllers include, but are not limited to, the following microcontrollers: ARC 625D, Atmel AT91SAM, Microchip PIC18F26K20, and Silicon Labs C8051F320. A memory controller can also be implemented as part of the control logic of the memory. Those skilled in the art will also recognize that, in addition to implementing the controller in purely computer-readable program code form, the same functionality can be achieved by logically programming the method steps to make the controller take the form of logic gates, switches, application-specific integrated circuits, programmable logic controllers, and embedded microcontrollers. Therefore, such a controller can be considered a hardware component, and the means included therein for implementing various functions can also be considered as structures within the hardware component. Alternatively, the means for implementing various functions can be considered as both software modules implementing the method and structures within the hardware component.

[0052] The systems, devices, modules, or units described in the above embodiments can be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer. Specifically, a computer can be, for example, a personal computer, laptop computer, cellular phone, camera phone, smartphone, personal digital assistant, media player, navigation device, email device, game console, tablet computer, wearable device, or any combination of these devices.

[0053] For ease of description, the above devices are described in terms of function, divided into various units. Of course, in implementing this specification, the functions of each unit can be implemented in one or more software and / or hardware components.

[0054] The various embodiments in this application are described in a progressive manner. Similar or identical parts between embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, the device and medium embodiments are basically similar to the method embodiments, so the description is relatively simple; relevant parts can be referred to the description of the method embodiments.

[0055] The devices and media provided in this application are one-to-one with the methods. Therefore, the devices and media also have similar beneficial technical effects as their corresponding methods. Since the beneficial technical effects of the methods have been described in detail above, the beneficial technical effects of the devices and media will not be repeated here.

[0056] Those skilled in the art will understand that embodiments of this application can be provided as methods, systems, or computer program products. Therefore, this application can take the form of a completely hardware embodiment, a completely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, this application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. This application is described with reference to flowchart illustrations and / or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of this application. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, generate instructions for implementing the flowchart... Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0057] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to function in a particular manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0058] These computer program instructions may also be loaded onto a computer or other programmable data processing equipment to cause a series of operational steps to be performed on the computer or other programmable equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1 The steps of the function specified in one or more boxes.

[0059] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory.

[0060] Memory may include non-persistent storage in computer-readable media, such as random access memory (RAM) and / or non-volatile memory, such as read-only memory (ROM) or flash RAM. Memory is an example of computer-readable media.

[0061] Computer-readable media includes both permanent and non-permanent, removable and non-removable media that can store information using any method or technology. Information can be computer-readable instructions, data structures, modules of programs, or other data. Examples of computer storage media include, but are not limited to, phase-change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technologies, CD-ROM, digital versatile optical disc (DVD) or other optical storage, magnetic tape, magnetic magnetic disk storage or other magnetic storage devices, or any other non-transferable medium that can be used to store information accessible by a computing device. As defined herein, computer-readable media does not include transient computer-readable media, such as modulated data signals and carrier waves.

[0062] It should also be noted that the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article, or apparatus. Unless otherwise specified, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element.

[0063] The above are merely embodiments of this application and are not intended to limit the scope of this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the scope of the claims of this application.

Claims

1. A diagnostic method for a multi-branch interlocking circuit, characterized in that, include: Multiple proportional currents are generated by a pre-set multi-channel proportional current source circuit, and the multiple proportional currents are respectively sent to the corresponding current shunt circuits so that the current shunt circuits can achieve voltage distribution through the corresponding resistors and determine the voltage value across the resistors. Determine a preset first voltage value and a second voltage value, and compare the voltage values ​​at both ends with the first voltage value and the second voltage value respectively; If the voltage values ​​at both ends are equal to the first voltage value, then the high-voltage connector interlocking corresponding to the shunt circuit is determined to be normal. If the voltage values ​​at both ends are equal to the second voltage value, then the high-voltage connector interlocking corresponding to the shunt circuit is determined to have failed.

2. The method according to claim 1, characterized in that, The method further includes: The multi-channel proportional current source circuit includes a reference resistor Rer, multiple NPN transistors Tn, and multiple emitter resistors Ren, wherein the reference current IRer flowing through the reference resistor Rer is equal to the current Ie0 flowing through the emitter resistor Re0.

3. The method according to claim 2, characterized in that, The method further includes: The shunt circuit includes resistors Rn1, Rn2, and output resistor Rn3. Resistor Rn1 is connected in series with resistor Rn2. Resistor Rn2 and output resistor Rn3 are used to shunt current. Rn1 is used for pull-up and short-circuit protection. The high-voltage connector interlock signal is connected in parallel with resistor Rn2 after being connected in series with output resistor Rn3. The interlock status of the high-voltage connector is determined by detecting the voltage value across resistor Rn2.

4. The method according to claim 3, characterized in that, Determining the preset first and second voltage values ​​specifically includes: The expression for the first voltage value is: Where Re0 is the first emitter resistance. Rn2 is the resistance of the voltage to be measured, Ren is the emitter resistor corresponding to Rn2, Rer is the reference resistor, and Rn3 is the output resistor corresponding to Rn2. The expression for the second voltage value is: Where Re0 is the first emitter resistance. Rn2 is the supply voltage, Rn2 is the resistance of the voltage to be measured, Ren is the emitter resistor corresponding to Rn2, and Rer is the reference resistor.

5. The method according to claim 1, characterized in that, Determining the voltage across the resistor specifically includes: The voltage values ​​VRn2 across multiple resistors Rn2 are collected by multiple pre-set acquisition circuits.

6. The method according to claim 5, characterized in that, The method further includes: The acquisition circuit includes a decoupling capacitor Cn1, matching resistors Rn4, Rn5, Rn6, and Rn7, and an operational amplifier Un1. The matching resistors Rn4, Rn5, Rn6, and Rn7, along with the operational amplifier Un1, form a differential amplifier circuit. This differential amplifier circuit is used to acquire the voltage value VRn2 across resistor Rn2 in multiple shunt circuits and input the acquired voltage value VRn2 to the multiplexer U1.

7. The method according to claim 6, characterized in that, The method further includes: The multiplexer U1 receives multiple voltage values ​​from the acquisition circuit through multiple pins INn, and selects the corresponding voltage value according to the digital selection signal SELm from the MCU, so as to output the corresponding voltage value to the ADC1 pin of the MCU, so that the MCU can perform multi-branch interlocking state diagnosis.

8. The method according to claim 1, characterized in that, After determining that the high-voltage connector interlocking corresponding to the shunt circuit has failed, the method further includes: Determine the voltage value across the resistor in the corresponding shunt circuit, and locate the high-voltage connector where the interlocking fault occurred based on the voltage value.

9. A diagnostic device for a multi-branch interlocking circuit, characterized in that, include: At least one processor; as well as, A memory communicatively connected to the at least one processor; wherein, The memory stores instructions executable by the at least one processor, which, when executed by the at least one processor, enable the diagnostic device for a multi-branch interlock circuit to perform the method as described in any one of claims 1-8.

10. A non-volatile computer storage medium storing computer-executable instructions, characterized in that, The computer-executable instructions are configured to be the method as described in any one of claims 1-8.

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