GPU (Graphics Processing Unit) information acquisition method, system and equipment and computer storage medium

Abstract

The invention discloses a GPU information acquisition method, system and device and a computer storage medium, relates to the technical field of servers, and is applied to a baseboard management controller to acquire PCIe slot information of a to-be-identified GPU; based on the PCIe slot information, determining information of a bus where the to-be-identified GPU is located; acquiring a slave address of the GPU to be identified; obtaining an external library of the GPU to be identified according to the bus information and the slave address; and calling the external library to obtain the target information of the to-be-identified GPU. According to the method and the device, the external library for acquiring the information of the GPU is arranged in the baseboard management controller to endow the baseboard management controller with the capability of acquiring the GPU information, so that the GPU information can be read through the baseboard management controller after the GPU is inserted into the server, the GPU can be adapted while being inserted, and compared with the existing'compiling-verifying-deploying 'process, the method and the device have the advantages that the efficiency is improved, and the cost is reduced. And the GPU information can be flexibly and quickly acquired.

Description

Technical Field

[0001] This application relates to the field of server technology, and more specifically, to a method, system, device, and computer storage medium for acquiring GPU information. Background Technology

[0002] With the application and development of servers, GPU (Graphics Processing Unit) products have also diversified. As a core computing component of servers, GPUs need to be integrated into the BMC (Baseboard Management Controller) monitoring system. In this process, when system manufacturers need to support new GPUs, the BMC development team first deeply analyzes the manufacturer's proprietary out-of-band protocol documents, then hardcodes more than 5,000 lines of drivers at complex source code levels (such as the OpenBMC architecture). Finally, after cross-building with compilers to generate firmware images, customers have to interrupt their business to perform the high-risk firmware flashing operation.

[0003] However, this process involves not only fundamental challenges such as rewriting register mapping algorithms and redesigning sensor interfaces, requiring 3-4 complete testing cycles and consuming a lot of time, but also the traditional "compile-verify-deploy" three-step adaptation model, which not only increases the cost of each adaptation but also causes new GPU support to lag behind the market. This static and fixed model has become a structural bottleneck restricting the server's agile response to the market.

[0004] In conclusion, how to flexibly and quickly obtain GPU information is a problem that urgently needs to be solved by those skilled in the art. Summary of the Invention

[0005] The purpose of this application is to provide a method for acquiring GPU information, which can, to some extent, solve the technical problem of how to flexibly and quickly acquire GPU information. This application also provides a GPU information acquisition system, an electronic device, and a computer-readable storage medium.

[0006] To achieve the above objectives, this application provides the following technical solution:

[0007] A GPU information acquisition method, applied to a baseboard management controller, includes:

[0008] Obtain the PCIe slot information of the GPU to be identified;

[0009] Based on the PCIe slot information, the bus information of the GPU to be identified is determined;

[0010] Obtain the slave address of the GPU to be identified;

[0011] Based on the bus information and the slave address, obtain the external library of the GPU to be identified;

[0012] The external library is invoked to obtain the target information of the GPU to be identified.

[0013] In an exemplary embodiment, obtaining the PCIe slot information of the GPU to be identified includes:

[0014] Receive the first IPMI command transmitted by the BIOS;

[0015] The first IPMI command is parsed to obtain the PCIe slot information of the GPU to be identified;

[0016] The PCIe slot information of the GPU to be identified includes the slot information of the GPU to be identified obtained by the BIOS after scanning the PCIe device during the POST phase.

[0017] In an exemplary embodiment, determining the bus information of the GPU to be identified based on the PCIe slot information includes:

[0018] Obtain the mapping table between slot information and the I2C bus;

[0019] Based on the mapping table, the target I2C bus corresponding to the PCIe slot information is determined;

[0020] The target I2C bus is used as the bus information of the CPU to be identified.

[0021] In an exemplary embodiment, obtaining the slave address of the GPU to be identified includes:

[0022] Obtain the second IMPI command transmitted through the human-computer interaction interface;

[0023] The second IPMI command is parsed to obtain the slave address of the GPU to be identified;

[0024] The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

[0025] In an exemplary embodiment, obtaining the slave address of the GPU to be identified includes:

[0026] Receive address information transmitted from the web interface;

[0027] The address information is parsed to obtain the slave address of the GPU to be identified;

[0028] The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

[0029] In an exemplary embodiment, obtaining the external libraries of the GPU to be identified based on the bus information and the slave address includes:

[0030] Based on the bus information and the slave address, the external library for obtaining the GPU to be identified is invoked out of band.

[0031] In an exemplary embodiment, before calling the external library to obtain the target information of the GPU to be identified, the method further includes:

[0032] The GPU information structure is determined, which includes GPU identity information, GPU runtime state, and GPU health information;

[0033] Based on the GPU information structure, define the library files;

[0034] The method for obtaining information that generates the library file;

[0035] The external library is generated based on the library file and the information acquisition method.

[0036] The GPU identity information includes manufacturer name, device model, serial number, and firmware version; the GPU runtime status includes temperature, power consumption, and Power Brake ratio; and the GPU health information includes ECC switch status, reset flag, number of ECC errors, and number of PCIe bus errors.

[0037] A GPU information acquisition system, applied to a baseboard management controller, includes:

[0038] The PCIe slot information acquisition module is used to acquire the PCIe slot information of the GPU to be identified.

[0039] The bus information acquisition module is used to determine the bus information of the GPU to be identified based on the PCIe slot information.

[0040] The slave address acquisition module is used to acquire the slave address of the GPU to be identified;

[0041] An external library acquisition module is used to acquire the external libraries of the GPU to be identified based on the bus information and the slave address.

[0042] The GPU information acquisition module is used to call the external library to obtain the target information of the GPU to be identified.

[0043] An electronic device, comprising:

[0044] Memory, used to store computer programs;

[0045] A processor, used to implement the steps of any of the above-described GPU information acquisition methods when executing the computer program.

[0046] A computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of any of the GPU information acquisition methods described above.

[0047] This application provides a GPU information acquisition method applied to a baseboard management controller. The method acquires the PCIe slot information of the GPU to be identified; determines the bus information of the GPU based on the PCIe slot information; acquires the slave address of the GPU; acquires the external libraries of the GPU based on the bus information and slave address; and calls the external libraries to obtain the target information of the GPU. In this application, the baseboard management controller can determine the bus information of the GPU based on its PCIe slot information and obtain the slave address of the GPU. Therefore, it can accurately acquire the external libraries set for the GPU based on the bus information and slave address. Finally, it obtains the target information of the GPU by calling the external libraries. This method enables the baseboard management controller to acquire GPU information by setting up external libraries for GPU information acquisition within the baseboard management controller. Thus, after the GPU is inserted into the server, the baseboard management controller can read the GPU information, achieving plug-and-play GPU adaptation. Compared with the existing "compile-verify-deploy" process, this method allows for flexible and rapid acquisition of GPU information. This application also provides a GPU information acquisition system, electronic device, and computer-readable storage medium, which solves the corresponding technical problems. Attached Figure Description

[0048] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0049] Figure 1 A flowchart illustrating a GPU information acquisition method provided in this application embodiment;

[0050] Figure 2 Interactive diagram for BMC to obtain GPU information;

[0051] Figure 3 This is a schematic diagram of the structure of a GPU information acquisition system provided in an embodiment of this application;

[0052] Figure 4This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application;

[0053] Figure 5 This is another structural schematic diagram of an electronic device provided in an embodiment of this application. Detailed Implementation

[0054] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0055] With the application and development of servers, GPU (Graphics Processing Unit) products have also diversified. As a core computing component of servers, GPUs need to be integrated into the BMC (Baseboard Management Controller) monitoring system. In this process, when system manufacturers need to support new GPUs, the BMC development team first deeply analyzes the manufacturer's proprietary out-of-band protocol documents, then hardcodes more than 5,000 lines of drivers at complex source code levels (such as the OpenBMC architecture). Finally, after cross-building with compilers to generate firmware images, customers have to interrupt their business to perform the high-risk firmware flashing operation.

[0056] However, this process involves not only fundamental challenges such as rewriting register mapping algorithms and redesigning sensor interfaces, requiring 3-4 complete testing cycles and being time-consuming, but also the traditional "compile-verify-deploy" three-step adaptation model, which increases the cost of each adaptation and causes new GPU support to lag behind the market. This static and fixed model has become a structural bottleneck restricting the server's agile response to the market. The GPU information acquisition solution provided in this application can flexibly and quickly acquire GPU information.

[0057] Please see Figure 1 , Figure 1 This is a flowchart of a GPU information acquisition method provided in an embodiment of this application.

[0058] This application provides a GPU information acquisition method, applied to a baseboard management controller, which may include the following steps:

[0059] Step S101: Obtain the PCIe slot information of the GPU to be identified.

[0060] In practical applications, once the GPU is inserted into the server, the PCIe (Peripheral Component Interconnect Express) slot in which the GPU is located on the server is determined. Accordingly, the PCIe slot information of the GPU to be identified can be obtained, so as to determine the location of the GPU to be identified and thus obtain GPU information.

[0061] In an exemplary embodiment, considering that the BIOS (Basic Input / Output System) can scan PCIe devices to obtain PCIe slot information, the BIOS can be used to obtain the PCIe slot information of the GPU to be identified. Specifically, during the process of obtaining the PCIe slot information of the GPU to be identified, the baseboard management controller can receive a first IPMI (Intelligent Platform Management Interface) command transmitted by the BIOS; parse the first IPMI command to obtain the PCIe slot information of the GPU to be identified; wherein, the PCIe slot information of the GPU to be identified includes the slot information of the GPU to be identified obtained by the BIOS after scanning the PCIe devices during the POST phase. Of course, the BIOS can also transmit the scanned slot information of the GPU to be identified to the baseboard management controller through other interfaces.

[0062] To make it easier to understand, assume a server has two PCIe slots, each housing a CPU from a different manufacturer. After the server powers on, the BIOS detects devices in both PCIe slots during the POST phase: Slot 1: Bus 85, Device 0, Function 0 (GPU1); Slot 2: Bus 86, Device 0, Function 0 (GPU2). The BIOS then sends the physical locations of these two slots, such as Slot1 and Slot2, along with their PCIe information, to the baseboard management controller via IPMI commands.

[0063] Step S102: Determine the bus information of the GPU to be identified based on the PCIe slot information.

[0064] In practical applications, the interaction between the baseboard management controller and the GPU requires the use of a bus. Therefore, it is also necessary to determine the bus information of the GPU to be identified based on the PCIe slot information so that the GPU information can be read subsequently based on the bus information.

[0065] In an exemplary embodiment, in the server design, different PCIe slots may be connected to different I2C buses of the BMC. To facilitate the determination of the bus information of the GPU to be identified, this application can standardize the hardware I2C (Inter-Integrated Circuit, two-wire serial communication bus) bus design, laying out the I2C bus according to the BMC PCIe mapping table. Correspondingly, in the process of determining the bus information of the GPU to be identified based on the PCIe slot information, the baseboard management controller can obtain the mapping table between the slot information and the I2C bus; based on the mapping table, determine the target I2C bus corresponding to the PCIe slot information; and use the target I2C bus as the bus information of the CPU to be identified. In this way, even if the GPU is inserted into a PCIe slot corresponding to a different I2C bus in the server, the baseboard management controller can determine the target I2C bus corresponding to the PCIe slot information according to the set mapping table, realizing unified management of the I2C bus, thereby accelerating the efficiency of reading GPU information.

[0066] Step S103: Obtain the slave address of the GPU to be identified.

[0067] Step S104: Obtain the external libraries of the GPU to be identified based on the bus information and slave address.

[0068] Step S105: Call the external library to obtain the target information of the GPU to be identified.

[0069] In practical applications, to facilitate the baseboard management controller's reading of GPU information, an external library for reading GPU information can be set in the baseboard management controller. Accordingly, after determining the bus information of the GPU to be identified, the slave address of the GPU to be identified needs to be obtained. The slave address can be obtained from the GPU manufacturer's management manual. Then, based on the bus information and the slave address, the external library of the GPU to be identified is obtained. Finally, the external library is called to obtain the target information of the GPU to be identified.

[0070] In an exemplary embodiment, the slave address can be determined by the out-of-band management manual of the GPU to be identified. For ease of implementation, the slave address of the GPU to be identified can be obtained by the user querying the out-of-band management manual of the GPU to be identified. The user then transmits the slave address of the GPU to be identified to the baseboard management controller. For example, the user can transmit the slave address of the GPU to be identified to the baseboard management controller through the IMPI command or a web interface. That is, in the process of obtaining the slave address of the GPU to be identified, the baseboard management controller can obtain the second IMPI command transmitted through the human-machine interface, parse the second IMPI command to obtain the slave address of the GPU to be identified; or it can receive address information transmitted through the web interface, parse the address information to obtain the slave address of the GPU to be identified. The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified. Of course, the baseboard management controller can also parse the out-of-band management manual of the GPU to be identified to obtain the slave address of the GPU to be identified, or the server's CPU can parse the out-of-band management manual of the GPU to be identified to obtain the slave address of the GPU to be identified and then transmit it to the baseboard management controller, etc.

[0071] In an exemplary embodiment, during the process of obtaining the external library of the GPU to be identified based on bus information and slave address, the baseboard management controller can call the out-of-band external library to obtain the external library of the GPU to be identified, based on the bus information and slave address. It should be noted that the external library (libgpu_smbus.so) is used to access the GPU to be identified to collect the required information. Specifically, the external library can write the obtained information of the GPU to be identified into a structured file, which can be in JSON format or other formats, and name this file gpu-info. Correspondingly, the baseboard management controller reads the gpu-info file to obtain the target information of the GPU to be identified, and then can parse the content and display it to the user. Of course, there can also be other ways to process the target information, such as automatically warning of abnormal indicators, such as temperature exceeding limits, sudden increases in ECC errors, etc.

[0072] In an exemplary embodiment, considering the differences between GPUs from different manufacturers, which can lead to technical barriers in GPU information acquisition, to overcome these barriers and ensure that the baseboard management controller can identify GPUs from different manufacturers, communication can be established between GPU manufacturers to standardize out-of-band management protocols according to a defined information structure. Correspondingly, external libraries accessing GPUs need to be configured accordingly. That is, before calling the external library to obtain the target information of the GPU to be identified, the baseboard management controller can also determine the GPU information structure. The GPU information structure includes GPU identity information, GPU runtime status, and GPU health information. This is achieved by defining a standardized interface protocol so that the external library can automatically adapt to GPUs from different manufacturers. Based on the GPU information structure, library files are defined. Information acquisition methods for the library files are generated to obtain various information corresponding to the GPU information structure from the GPU to be identified. Information acquisition methods may include library file implementation functions, etc. Based on the library files and information acquisition methods, an external library is generated. The GPU identity information may include manufacturer name, device model, serial number, and firmware version. The GPU runtime status may include temperature, power consumption, and Power Brake ratio. The GPU health information may include ECC switch status, reset flag, ECC error count, and PCIe bus error count.

[0073] As can be seen from the implementation process, this application sets up a unified GPU information structure for the GPU, which includes GPU identity information, GPU runtime status, and GPU health information. The GPU identity information may include manufacturer name, device model, serial number, and firmware version. The GPU runtime status may include temperature, power consumption, and Power Brake ratio. The GPU health information may include ECC switch status, reset flag, number of ECC errors, and number of PCIe bus errors. This unified GPU information structure enables the management of GPU information from different manufacturers, eliminating technical barriers between GPUs from different manufacturers and facilitating unified management of GPUs from all manufacturers, thus improving the applicability of the solution. Furthermore, based on the GPU information structure, library files are defined, information acquisition methods for the library files are generated, and external libraries are generated based on the library files and information acquisition methods. This enables external libraries to read the required information from the GPU according to the GPU information structure, allowing the baseboard management controller to obtain information about CPUs from different manufacturers through the external library. This enables support for updating monitoring plugins during GPU runtime without downtime or reflashing the BMC firmware, further improving the applicability of the solution.

[0074] In an exemplary embodiment, the external library can also be modularized to obtain a modular external library, which can then be ported to the target server. This allows the external library to be modularly ported to any full-system server for use, achieving resource reuse and improving the scalability of the GPU information acquisition method of this application.

[0075] This application provides a GPU information acquisition method applied to a baseboard management controller, which acquires the PCIe slot information of the GPU to be identified; determines the bus information of the GPU to be identified based on the PCIe slot information; acquires the slave address of the GPU to be identified; acquires the external library of the GPU to be identified based on the bus information and the slave address; and calls the external library to acquire the target information of the GPU to be identified. In this application, the baseboard management controller can determine the bus information of the GPU to be identified based on the PCIe slot information of the GPU to be identified, and can obtain the slave address of the GPU to be identified. Thus, based on the bus information and slave address, it can accurately obtain the external library set for the GPU to be identified. Finally, by calling the external library, it obtains the target information of the GPU to be identified. This realizes the ability of the baseboard management controller to obtain GPU information by setting the external library for obtaining GPU information in the baseboard management controller. Thus, after the GPU is inserted into the server, the GPU information can be read through the baseboard management controller, realizing the GPU plug-and-play adaptation. Compared with the existing "compile-verify-deploy" process, after the GPU is inserted into the server, the BMC can automatically identify and establish a complete monitoring capability, flexibly and quickly obtain GPU information, truly realize the ultimate ideal of "hardware as a service", and meet the stringent requirements of the AI ​​era for the real-time and flexible supply of computing power.

[0076] To facilitate understanding of the GPU information acquisition scheme provided in this application, an AI server is used as an example. Please refer to [link / reference]. Figure 2 With the assistance of the BIOS and the user, the process of obtaining GPU information can be as follows:

[0077] When the AI ​​server is powered on, the BIOS scans PCIe devices during the POST phase. When the GPU is detected, the BIOS sends the GPU's PCIe slot information to the baseboard management controller via IPMI commands or other interfaces.

[0078] After receiving the PCIe slot information, the baseboard management controller determines the I2C bus (i2c-bus) where the GPU is located according to the predefined mapping table.

[0079] Users obtain a predefined slave address (i2c-slave) from the GPU manufacturer's out-of-band management manual based on their selected GPU, and pass it to the baseboard management controller via IPMI commands or a web interface;

[0080] The baseboard management controller uses the acquired i2c-bus and i2c-slave to access the GPU by calling the out-of-band library (libgpu_smbus.so) to obtain GPU information.

[0081] The external library (libgpu_smbus.so) writes the obtained GPU information into a structured file (gpu-info file).

[0082] The baseboard management controller reads the gpu-info file, parses its contents, and displays them to the user. For example, the output results are as follows: GPU1 information: Manufacturer, NVIDIA; Model, Tesla T4; Serial number, SN0001X001; Temperature, 56.8°C; Power consumption, 135.5W; ECC status, enabled; PCIe fault count, 0, etc.

[0083] Please see Figure 3 , Figure 3 This is a schematic diagram of the structure of a GPU information acquisition system provided in an embodiment of this application.

[0084] This application provides a GPU information acquisition system, applied to a baseboard management controller, which may include:

[0085] PCIe slot information acquisition module 101 is used to acquire PCIe slot information of the GPU to be identified;

[0086] The bus information acquisition module 102 is used to determine the bus information of the GPU to be identified based on the PCIe slot information.

[0087] Slave address acquisition module 103 is used to acquire the slave address of the GPU to be identified;

[0088] External library acquisition module 104 is used to acquire the external libraries of the GPU to be identified based on bus information and slave address;

[0089] The GPU information acquisition module 105 is used to call external libraries to obtain target information of the GPU to be identified.

[0090] This application provides a GPU information acquisition system applied to a baseboard management controller. The PCIe slot information acquisition module may include:

[0091] The first receiving unit is used to receive the first IPMI command transmitted by the BIOS.

[0092] The first parsing unit is used to parse the first IPMI command to obtain the PCIe slot information of the GPU to be identified;

[0093] The PCIe slot information of the GPU to be identified includes the slot information of the GPU to be identified obtained by the BIOS after scanning the PCIe devices during the POST phase.

[0094] This application provides a GPU information acquisition system applied to a baseboard management controller. The bus information acquisition module may include:

[0095] The mapping table acquisition unit is used to acquire the mapping table between slot information and the I2C bus.

[0096] The target I2C bus determination unit is used to determine the target I2C bus corresponding to the PCIe slot information based on the mapping table.

[0097] The bus information determination unit is used to identify the target I2C bus as the bus information of the CPU to be identified.

[0098] This application provides a GPU information acquisition system applied to a baseboard management controller. The slave address acquisition module may include:

[0099] The second receiving unit is used to acquire the second IMPI command transmitted through the human-computer interaction interface;

[0100] The second parsing unit is used to parse the second IPMI command to obtain the slave address of the GPU to be identified;

[0101] The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

[0102] This application provides a GPU information acquisition system applied to a baseboard management controller. The slave address acquisition module may include:

[0103] The third receiving unit is used to receive address information transmitted from the web interface;

[0104] The third parsing unit is used to parse the address information to obtain the slave address of the GPU to be identified;

[0105] The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

[0106] This application provides a GPU information acquisition system, applied to a baseboard management controller, wherein the external library acquisition module may include:

[0107] The external library acquisition unit is used to call the out-of-band acquisition of the external library of the GPU to be identified based on the bus information and slave address.

[0108] This application provides a GPU information acquisition system, applied to a baseboard management controller, which may further include:

[0109] The structure determination module is used to determine the GPU information structure before the GPU information acquisition module calls the external library to obtain the target information of the GPU to be identified. The GPU information structure includes GPU identity information, GPU runtime status and GPU health information.

[0110] The library file definition module is used to define library files based on the GPU information structure.

[0111] The acquisition method determination module is used to generate information about the acquisition method for library files.

[0112] The external library generation module is used to generate external libraries based on library files and information acquisition methods.

[0113] The GPU identity information includes the manufacturer name, device model, serial number, and firmware version; the GPU runtime status includes temperature, power consumption, and Power Brake ratio; and the GPU health information includes ECC switch status, reset flag, number of ECC errors, and number of PCIe bus errors.

[0114] This application also provides an electronic device and a computer-readable storage medium, both of which have the corresponding effects of the GPU information acquisition method provided in the embodiments of this application. Please refer to... Figure 4 , Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application.

[0115] An electronic device provided in this application includes a memory 201 and a processor 202. The memory 201 stores a computer program, and when the processor 202 executes the computer program, it implements the steps of the GPU information acquisition method described in any of the above embodiments.

[0116] Please see Figure 5Another electronic device provided in this application embodiment may further include: an input port 203 connected to the processor 202 for transmitting commands input from the outside to the processor 202; a display unit 204 connected to the processor 202 for displaying the processing results of the processor 202 to the outside; and a communication module 205 connected to the processor 202 for enabling communication between the electronic device and the outside. The display unit 204 may be a display panel, a laser scanner, or the like; the communication method used by the communication module 205 includes, but is not limited to, Mobile High-Definition Link (MHL), Universal Serial Bus (USB), High-Definition Multimedia Interface (HDMI), wireless connectivity: Wireless Fidelity (WiFi), Bluetooth communication technology, Bluetooth Low Energy communication technology, and communication technology based on IEEE 802.11s.

[0117] This application provides a computer-readable storage medium storing a computer program. When the computer program is executed by a processor, it implements the steps of the GPU information acquisition method described in any of the above embodiments.

[0118] In an exemplary embodiment, the mapping table between slot information and the I2C bus can be defined as follows:

[0119] / / BMC PCIe Mapping Table (Predefined Hardware Design)

[0120] static const struct slot_i2c_mapping {

[0121] uint8_t slot;

[0122] uint8_t i2c_bus;

[0123] } slot_map[] = {

[0124] {1, I2C_BUS_4}, / / Slot1 -> I2C bus 4

[0125] {2, I2C_BUS_5} / / Slot2 -> I2C bus 5

[0126] }

[0127] In an exemplary embodiment, library file variables can be defined as:

[0128] #ifndef GPU_SMBUS_H

[0129] #define GPU_SMBUS_H

[0130] #include<stdint.h>

[0131] / / GPU device information structure

[0132] typedef struct

[0133] {

[0134] int index; / / Sequence number

[0135] char vendor

[16] ; / / Vendor

[0136] char model

[32] ; / / Model number

[0137] char serial_number

[24] ; / / Serial number

[0138] char firmware_version

[16] ; / / Firmware version

[0139] float temperature; / / Temperature (°C)

[0140] float power_usage; / / Power consumption (W)

[0141] float power_brake; / / Power Brake ratio

[0142] int ecc_status; / / ECC status (0 = disabled, 1 = enabled)

[0143] int reset_indicator; / / Reset flag (1 indicates a reset is needed)

[0144] uint64_t ecc_error_count; / / Number of ECC errors

[0145] uint64_t pcie_error_count; / / Number of PCIe bus errors

[0146] GPUSystemInfo;

[0147] / / Supported GPU vendor IDs

[0148] #define NVIDIA_PCI_ID 0x10DE

[0149] #define AMD_PCI_ID 0x1002

[0150] #define INTEL_PCI_ID 0x8086

[0151] ...

[0152] / / SMBus error code

[0153] enum smbus_error {

[0154] SMBUS_SUCCESS = 0,

[0155] SMBUS_DEVICE_NOT_FOUND,

[0156] SMBUS_INVALID_REGISTER,

[0157] SMBUS_READ_ERROR,

[0158] SMBUS_WRITE_ERROR,

[0159] SMBUS_DEVICE_TIMEOUT,

[0160] SMBUS_UNSUPPORTED_FEATURE

[0161] };

[0162] / **

[0163] * @brief Initialize SMBus library

[0164] *

[0165] * @param bus SMBus bus number

[0166] * @return int error code

[0167] /

[0168] int gpu_smbus_init(int bus);

[0169] / **

[0170] * @brief Enumerate all GPU devices on the PCIe bus

[0171] *

[0172] * @param max_count Maximum number of detections

[0173] * @param count [out] The number of GPUs detected

[0174] * @param indices [out] List of GPU indices

[0175] * @return int error code

[0176] /

[0177] int enumerate_gpus_from_pcie(int max_count, int *count, int *indices);

[0178] / **

[0179] * @brief Retrieves complete system information for the specified GPU.

[0180] *

[0181] * @param slot_index The physical slot / bus location of the GPU

[0182] * @param info [out] GPU information structure

[0183] * @return int error code

[0184] /

[0185] int get_gpu_info_by_slot(int slot_index, GPUSystemInfo *info);

[0186] / **

[0187] * @brief Release SMBus library resources

[0188] /

[0189] void gpu_smbus_release(void);

[0190] #endif / / GPU_SMBUS_H.

[0191] In an exemplary embodiment, the library file implementation function can be defined as:

[0192] #include "gpu_smbus.h"

[0193] #include<linux / i2c-dev.h>

[0194] #include<linux / i2c.h>

[0195] #include<fcntl.h>

[0196] #include<unistd.h>

[0197] #include<string.h>

[0198] #include<stdio.h>

[0199] #include<stdlib.h>

[0200] static int smbus_path[MAX_GPU_SLOTS] = {-1};

[0201] / / GPU vendor ID mapping table

[0202] typedef struct

[0203] {

[0204] uint16_t pci_vendor_id;

[0205] const char *vendor_name;

[0206] VendorMap;

[0207] static const VendorMap VENDOR_MAP[] = {

[0208] {NVIDIA_PCI_ID, "NVIDIA"},

[0209] {AMD_PCI_ID, "AMD"},

[0210] {INTEL_PCI_ID, "Intel"},

[0211] {0, "Unknown"}

[0212] };

[0213] / / Read GPU ROM information via memory mapping

[0214] static int read_gpu_rom(int slot, void *buffer, size_t size)

[0215] {

[0216] / / In actual systems, information is obtained by accessing the PCI configuration space.

[0217] / / Simplified implementation only returns sample data

[0218] char *buf = (char *)buffer;

[0219] / / Vendor ID example (NVIDIA)

[0220] buf[0] = 0x14;

[0221] buf[1] = 0xE0;

[0222] / / Model ID Example

[0223] buf[2] = 0x18;

[0224] buf[3] = 0xB2;

[0225] / / Serial number example

[0226] snprintf(buf+4, 16, "SN%08dX001", slot);

[0227] / / Firmware version example

[0228] snprintf(buf+20, 8, "92.0%02d", slot);

[0229] return SMBUS_SUCCESS;

[0230] }

[0231] int gpu_smbus_init(int bus)

[0232] {

[0233] char path

[32] ;

[0234] snprintf(path, sizeof(path), " / dev / smbus%i", bus);

[0235] int fd = open(path, O_RDWR);

[0236] if (fd < 0) {

[0237] snprintf(path, sizeof(path), " / dev / i2c-%i", bus);

[0238] fd = open(path, O_RDWR);

[0239] }

[0240] if (fd < 0)

[0241] return SMBUS_DEVICE_NOT_FOUND;

[0242] / / Assuming a maximum of 8 GPUs are supported

[0243] if(slot < 0 || slot >= MAX_GPU_SLOTS)

[0244] return SMBUS_INVALID_REGISTER;

[0245] smbus_path[slot] = fd;

[0246] return SMBUS_SUCCESS;

[0247] }

[0248] int get_gpu_info_by_slot(int slot, GPUSystemInfo *info)

[0249] {

[0250] if (smbus_path[slot] < 0)

[0251] return SMBUS_DEVICE_NOT_FOUND;

[0252] / / Reset information structure

[0253] memset(info, 0, sizeof(GPUSystemInfo));

[0254] info->index = slot;

[0255] / / 1. Read basic GPU device information

[0256] uint8_t rom_buffer

[128] ;

[0257] read_gpu_rom(slot, rom_buffer, sizeof(rom_buffer));

[0258] / / 2. Parsing Vendor Information (Little-endian)

[0259] unsigned short vendor_id = (rom_buffer[1] << 8) | rom_buffer[0];

[0260] / / Match manufacturer name

[0261] uint i;

[0262] for (i = 0; VENDOR_MAP[i].pci_vendor_id != 0; i++) {

[0263] if (VENDOR_MAP[i].pci_vendor_id == vendor_id) {

[0264] strcpy(info->vendor, VENDOR_MAP[i].vendor_name);

[0265] break

[0266] }

[0267] }

[0268] / / 3. Parse the PCI device ID to determine the model

[0269] unsigned short device_id = (rom_buffer[3] << 8) | rom_buffer[2];

[0270] / / Simplified model identification (actual implementation needs to consider all device IDs)

[0271] if (vendor_id == NVIDIA_PCI_ID) {

[0272] if (device_id == 0x1DB6)

[0273] strcpy(info->model, "Tesla T4");

[0274] else

[0275] strcpy(info->model, "RTX A6000");

[0276] } else if (vendor_id == AMD_PCI_ID) {

[0277] if (device_id == 0x73A1)

[0278] strcpy(info->model, "Radeon Pro W6800");

[0279] else

[0280] strcpy(info->model, "Instinct MI100");

[0281] }

[0282] / / 4. Obtain unique identifiers such as serial numbers

[0283] memcpy(info->serial_number, rom_buffer + 4, 20);

[0284] memcpy(info->firmware_version, rom_buffer + 20, 6);

[0285] / / 5. Access the sensor via I2C to read the temperature (address 0x49)

[0286] uint reg_temp = 0x00;

[0287] uint8_t temp_data[2] = {0};

[0288] struct i2c_msg msgs[] = {

[0289] {.addr = 0x49, .flags = 0, .len = 1, .buf = ®_temp},

[0290] {.addr = 0x49, .flags = I2C_M_RD, .len = 2, .buf = temp_data}

[0291] };

[0292] struct i2c_rdwr_ioctl_data msgset = {

[0293] .msgs = msgs,

[0294] .nmsgs = 2

[0295] };

[0296] if (ioctl(smbus_path[slot], I2C_RDWR, &msgset) < 0)

[0297] return SMBUS_READ_ERROR;

[0298] info->temperature = ((temp_data[0] << 8) | temp_data[1]) / 256.0;

[0299] / / 6. Read power consumption (address 0x48)

[0300] uint reg_power = 0x01;

[0301] uint8_t power_data[2] = {0};

[0302] msgs[0].buf = ®_power;

[0303] msgs[1].buf = power_data;

[0304] if (ioctl(smbus_path[slot], I2C_RDWR, &msgset) < 0)

[0305] return SMBUS_READ_ERROR;

[0306] info->power_usage = (double)((power_data[0] << 8) | power_data[1]) / 100.0; / / Convert unit to watts

[0307] / / 7. Read Power-Brake settings (address 0x50, register 0xA0)

[0308] uint reg_brake = 0xA0;

[0309] uint8_t brake_data = 0;

[0310] msgs[0].addr = 0x50;

[0311] msgs[0].buf = ®_brake;

[0312] msgs[0].len = 1;

[0313] msgs[1].addr = 0x50;

[0314] msgs[1].flags = I2C_M_RD;

[0315] msgs[1].len = 1;

[0316] msgs[1].buf = &brake_data;

[0317] if (ioctl(smbus_path[slot], I2C_RDWR, &msgset) < 0)

[0318] return SMBUS_WRITE_ERROR;

[0319] / / Assuming 70 represents a 70% power limit

[0320] info->power_brake = brake_data / 100.0;

[0321] / / 8. Read ECC status and error information (address 0x58)

[0322] uint reg_ecc[2] = {0x01, 0x02};

[0323] uint8_t ecc_data[8] = {0};

[0324] msgs[0].buf = reg_ecc;

[0325] msgs[0].len = 1;

[0326] msgs[1].addr = 0x58;

[0327] msgs[1].flags = I2C_M_RD;

[0328] msgs[1].len = 8;

[0329] msgs[1].buf = ecc_data;

[0330] if (ioctl(smbus_path[slot], I2C_RDWR, &msgset) < 0)

[0331] return SMBUS_READ_ERROR;

[0332] info->ecc_status = ecc_data[0]; / / Byte 0 indicates the ECC status.

[0333] info->reset_indicator = ecc_data[1]; / / The first byte indicates whether a hardware reset is required.

[0334] / / Accumulated number of ECC errors (4 bytes)

[0335] memcpy(&info->ecc_error_count, ecc_data + 2, 4);

[0336] / / 9. Error reading PCIe bus (address 0x5C)

[0337] uint reg_pcie[2] = {0};

[0338] uint8_t pcie_data[4] = {0};

[0339] msgs[0].addr = 0x5C;

[0340] msgs[1].addr = 0x5C;

[0341] msgs[0].buf = reg_pcie;

[0342] msgs[0].len = 1;

[0343] msgs[1].len = 4;

[0344] msgs[1].buf = pcie_data;

[0345] if (ioctl(smbus_path[slot], I2C_RDWR, &msgset) < 0)

[0346] return SMBUS_WRITE_ERROR;

[0347] memcpy(&info->pcie_error_count, pcie_data, 4);

[0348] return SMBUS_SUCCESS;

[0349] }

[0350] void gpu_smbus_release(void)

[0351] {

[0352] for (int i = 0; i < MAX_GPU_SLOTS; i++) {

[0353] if (smbus_path[i] >= 0) {

[0354] close(smbus_path[i]);

[0355] smbus_path[i] = -1;

[0356] }

[0357] }

[0358] }

[0359] int enumerate_gpus_from_pcie(int max_count, int *count, int *indices)

[0360] {

[0361] / / In practice, the PCIe bus should be scanned to detect the GPU.

[0362] *count = 2; / / Assuming there are 2 GPUs in the system

[0363] indices[0] = 0; / / On the first-level bus

[0364] indices[1] = 1; / / On the second-level bus

[0365] return SMBUS_SUCCESS;

[0366] }

[0367] In an exemplary embodiment, the BMC call library main function to obtain can be defined as:

[0368] #include "gpu_smbus.h"

[0369] #include<stdio.h>

[0370] int main()

[0371] {

[0372] / / Initialize SMBus

[0373] int bus_number = 4; / / SMBus bus number on the system motherboard

[0374] if (gpu_smbus_init(bus_number) != SMBUS_SUCCESS) {

[0375] printf("Error initializing SMBus\n");

[0376] return 1;

[0377] }

[0378] / / Enumerate all GPUs

[0379] int slots[MAX_GPU_SLOTS] = {0};

[0380] int slot_count = 0;

[0381] enumerate_gpus_from_pcie(MAX_GPU_SLOTS, &slot_count, slots);

[0382] / / Get detailed information for each GPU

[0383] GPUSystemInfo info;

[0384] for (int i = 0; i < slot_count; i++) {

[0385] if (get_gpu_info_by_slot(slots[i], &info) == SMBUS_SUCCESS) {

[0386] printf("\nGPU %d Information:\n", i+1);

[0387] printf("Vendor: %s\n", info.vendor);

[0388] printf("Model: %s\n", info.model);

[0389] printf("SN: %s\n", info.serial_number);

[0390] printf("Firmware: %s\n", info.firmware_version);

[0391] printf("Temperature: %.1f°C\n", info.temperature);

[0392] printf("Power Usage: %.2f W\n", info.power_usage);

[0393] printf("Power Brake: %.0f%%\n", info.power_brake * 100);

[0394] printf("ECC Status: %s\n", info.ecc_status? "Enabled": "Disabled");

[0395] printf("Reset Indicator: %d\n", info.reset_indicator);

[0396] printf("ECC Error Count: %lu\n", info.ecc_error_count);

[0397] printf("PCIe Error Count: %lu\n", info.pcie_error_count);

[0398] }

[0399] }

[0400] / / Release resources

[0401] gpu_smbus_release();

[0402] return 0;

[0403] }}

[0404] The computer-readable storage media involved in this application include random access memory (RAM), memory, read-only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disks, removable disks, CD-ROMs (compact disc read-only memory), or any other form of storage media known in the art.

[0405] This application provides a computer program product, including a computer program / instructions, which, when executed by a processor, implement the steps of the GPU information acquisition method described in any of the above embodiments.

[0406] For descriptions of relevant parts in the GPU information acquisition system, electronic device, and computer-readable storage medium provided in this application's embodiments, please refer to the detailed description of the corresponding parts in the GPU information acquisition method provided in this application's embodiments; they will not be repeated here. Furthermore, parts of the technical solutions provided in this application that are consistent with the implementation principles of corresponding technical solutions in the prior art have not been described in detail to avoid excessive elaboration.

[0407] It should also be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0408] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for acquiring GPU information, characterized in that, Applications to baseboard management controllers include: Obtain the PCIe slot information of the GPU to be identified; Based on the PCIe slot information, the bus information of the GPU to be identified is determined; Obtain the slave address of the GPU to be identified; Based on the bus information and the slave address, obtain the external library of the GPU to be identified; The external library is invoked to obtain the target information of the GPU to be identified.

2. The GPU information acquisition method according to claim 1, characterized in that, The process of obtaining the PCIe slot information of the GPU to be identified includes: Receive the first IPMI command transmitted by the BIOS; The first IPMI command is parsed to obtain the PCIe slot information of the GPU to be identified; The PCIe slot information of the GPU to be identified includes the slot information of the GPU to be identified obtained by the BIOS after scanning the PCIe device during the POST phase.

3. The GPU information acquisition method according to claim 1, characterized in that, The step of determining the bus information of the GPU to be identified based on the PCIe slot information includes: Obtain the mapping table between slot information and the I2C bus; Based on the mapping table, the target I2C bus corresponding to the PCIe slot information is determined; The target I2C bus is used as the bus information of the CPU to be identified.

4. The GPU information acquisition method according to claim 1, characterized in that, The step of obtaining the slave address of the GPU to be identified includes: Obtain the second IMPI command transmitted through the human-computer interaction interface; The second IPMI command is parsed to obtain the slave address of the GPU to be identified; The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

5. The GPU information acquisition method according to claim 1, characterized in that, The step of obtaining the slave address of the GPU to be identified includes: Receive address information transmitted from the web interface; The address information is parsed to obtain the slave address of the GPU to be identified; The slave address includes the slave address obtained from the out-of-band management manual of the GPU to be identified.

6. The GPU information acquisition method according to claim 1, characterized in that, The step of obtaining the external libraries of the GPU to be identified based on the bus information and the slave address includes: Based on the bus information and the slave address, the external library for obtaining the GPU to be identified is invoked out of band.

7. The GPU information acquisition method according to claim 1, characterized in that, Before calling the external library to obtain the target information of the GPU to be identified, the method further includes: The GPU information structure is determined, which includes GPU identity information, GPU runtime state, and GPU health information; Based on the GPU information structure, define the library files; The method for obtaining information that generates the library file; The external library is generated based on the library file and the information acquisition method. The GPU identity information includes manufacturer name, device model, serial number, and firmware version; the GPU runtime status includes temperature, power consumption, and Power Brake ratio; and the GPU health information includes ECC switch status, reset flag, number of ECC errors, and number of PCIe bus errors.

8. A GPU information acquisition system, characterized in that, Applications to baseboard management controllers include: The PCIe slot information acquisition module is used to acquire the PCIe slot information of the GPU to be identified. The bus information acquisition module is used to determine the bus information of the GPU to be identified based on the PCIe slot information. The slave address acquisition module is used to acquire the slave address of the GPU to be identified; An external library acquisition module is used to acquire the external libraries of the GPU to be identified based on the bus information and the slave address. The GPU information acquisition module is used to call the external library to obtain the target information of the GPU to be identified.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor, configured to implement the steps of the GPU information acquisition method as described in any one of claims 1 to 7 when executing the computer program.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores a computer program that, when executed by a processor, implements the steps of the GPU information acquisition method as described in any one of claims 1 to 7.

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