Integrated circuit power network routing optimization methods, computer devices and storage media
By collaboratively optimizing wiring width and distance, and combining resource usage budget and performance margin, the problems of resource waste and slow optimization calculation in integrated circuit power network wiring optimization are solved, achieving efficient and accurate optimization of power networks.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2026-01-08
- Publication Date
- 2026-04-03
AI Technical Summary
In existing integrated circuit power network routing optimization methods, the optimization processes for routing width and routing distance are separated, resulting in resource waste and slow convergence speed of optimization calculations, and failing to effectively balance the design requirements of connectivity and power voltage drop.
A collaborative optimization method is adopted, which adjusts the wiring width and wiring distance, and combines the connectivity and voltage drop performance indicators of the power network to perform phased optimization calculations. Resource usage budget and performance margin are used as the basis for adjustment to ensure the optimal performance of the power network.
It achieves simultaneous optimization of power network connectivity and power voltage drop performance under limited resources, improving the efficiency and accuracy of cabling optimization and avoiding resource waste and redundant calculations.
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Figure CN121480434B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the technical field of integrated circuit design, specifically to a method for optimizing power network routing in integrated circuits, as well as a computer device and a computer-readable storage medium for implementing this method. Background Technology
[0002] With the rapid development of large-scale integrated circuit technology, the design requirements for the power networks of integrated circuits are becoming increasingly stringent. Currently, the power networks of the interposer layer of integrated circuits need to meet multiple design requirements. For example, all power pins must be correctly connected to meet connectivity requirements, and the voltage drop of the power supply network must be within the allowable range, that is, it needs to meet the IR Drop requirement. At the same time, the wiring resource usage cannot exceed the preset limits.
[0003] Typically, when routing power networks, routing distance and routing width are key parameters controlling the aforementioned indicators. However, the two are in competition. For example, reducing the routing distance can increase the number of routing channels, thereby improving connectivity, but may increase crosstalk; while increasing the routing width can reduce the resistance of the routing, thereby improving the performance of power voltage drop, but will occupy more routing resources and may affect the connectivity of the power network.
[0004] To balance the relationship between wiring width and wiring distance, so that the power network wiring can simultaneously meet the design requirements of connectivity and power voltage drop, it is also necessary to minimize the data occupied by the power network. Therefore, power network wiring needs to be optimized. Existing optimization methods mainly include the following two approaches: First, the manual trial-and-error method, which requires designers to manually adjust the wiring width and wiring distance based on experience, performing multiple wiring simulations until the design requirements are met; second, the step-by-step optimization method, which first optimizes the wiring distance to solve the connectivity problem, then fixes the wiring distance and optimizes the wiring width to solve the power voltage drop problem. However, this method often does not consider the impact of wiring distance when adjusting the wiring width.
[0005] However, existing cabling methods suffer from the following main problems: First, the cabling optimization process is fragmented, resulting in the complete separation of the optimization calculations for cabling width and cabling distance, potentially undermining the optimization results of the previous stage in a later stage. Second, the cabling optimization process does not consider the shared use of limited cabling resources by parameter adjustments, which may lead to the depletion of cabling resources. Third, there are no clear rules guiding when and how to coordinate the adjustment of the two parameters, cabling width and cabling distance, and due to the lack of coordinated optimization, the cabling optimization calculation process needs to be repeated multiple times, resulting in slow convergence. Summary of the Invention
[0006] The primary objective of this invention is to provide an integrated circuit power network routing optimization method that coordinates the optimization of wiring width and wiring distance.
[0007] A second objective of the present invention is to provide a computer device for implementing the above-described integrated circuit power network routing optimization method.
[0008] A third objective of this invention is to provide a readable storage medium for implementing the above-described integrated circuit power network routing optimization method.
[0009] To achieve the first objective of this invention, the integrated circuit power network routing optimization method provided by this invention includes: setting initial parameters for power network routing and obtaining process constraints; performing initial routing based on the initial parameters and constraints and obtaining initial performance indicators of the power network after initial routing; evaluating the connectivity status of the power network after initial routing; if the number of unconnected pins in the power network does not meet the set requirements, performing connectivity optimization calculations on the power network by adjusting the routing parameters of the power network to ensure that the number of unconnected pins meets the set requirements; evaluating the power voltage drop status of the power network; if the worst-case power voltage drop value is greater than a preset power voltage drop threshold, performing power voltage drop optimization calculations by adjusting the routing parameters of the power network to reduce the worst-case power voltage drop value to below the power voltage drop threshold; and routing the power network based on the final determined routing parameters obtained from the power voltage drop optimization calculations; wherein, the routing parameters include routing width and routing distance; adjusting the routing parameters of the power network includes at least one of the following: increasing routing width, decreasing routing width, increasing routing distance, and decreasing routing distance.
[0010] As can be seen from the above scheme, the present invention optimizes the wiring of the power network by coordinating wiring width and wiring distance. During the optimization calculation, the connectivity and voltage drop performance of the power network are evaluated at the same time to ensure the optimal performance of the power network and minimize resource consumption.
[0011] A preferred approach is to perform connectivity optimization calculations on the power network, which includes: calculating the current cabling resource occupancy and available resource budget of the power network; if the current available resource budget is sufficient, reducing the cabling distance by a first increment and re-routing, and updating the cabling resource occupancy and available resource budget.
[0012] Therefore, given the current available resource budget, reducing the cabling distance by the first value can maximize cabling density and minimize resource consumption without compromising the power network's voltage drop.
[0013] A further approach is to determine whether there is a margin in the current power supply voltage drop if the current available resource budget is insufficient. If there is a margin, the wiring width is reduced by the second magnitude, and the available resource budget is recalculated.
[0014] Therefore, when the available resource budget is insufficient but the power supply voltage drop has a margin, the wiring density can be increased by reducing the wiring width with the second amplitude, thereby solving the problem of insufficient available resource budget.
[0015] A further approach is to determine whether the current power drop still has a margin, which includes: determining whether the worst-case power drop value in the current power network is lower than the design threshold by at least one preset safety margin.
[0016] Therefore, the above method can make full use of the maximum power voltage drop of the power network while avoiding the problem of excessively low power voltage drop.
[0017] A further approach is to perform power drop optimization calculations on the power network, including: calculating the current cabling resource utilization rate and available resource budget of the power network; if the current available resource budget is sufficient, increasing the cabling width by a third increment and re-routing, and updating the cabling resource utilization rate and the worst-case power drop value.
[0018] Therefore, given sufficient available resources, increasing the cabling width by a third value can reduce the power drop in the power network, thereby improving power drop performance.
[0019] A further approach is to check if the current available resource budget is insufficient, and if so, to check if there is any margin in the connectivity of the current power network. If there is, to increase the cabling distance by the fourth magnitude and recalculate the available resource budget.
[0020] Therefore, it can be seen that when the available resource budget is insufficient but the power voltage drop has a margin, the available resource budget of the power network can be increased by increasing the cabling distance with the fourth amplitude.
[0021] A further approach is to increase the wiring width by the third amplitude and rewire, and then perform a connectivity check. If increasing the wiring width causes new unconnected pins to not meet the preset requirements, then roll back and increase the wiring width by the fifth amplitude and rewire; where the fifth amplitude is less than the third amplitude.
[0022] Therefore, if new unconnected pins appear after increasing the wiring width by the third value and rerouting, it indicates that the increase in the third value is too large. It is necessary to revert to the state where the wiring width has not been increased and increase the wiring width by a smaller fifth value, so as to make full use of wiring resources and optimize the performance of the power network.
[0023] A further approach is to route the power network based on the final determined routing parameters obtained from the power drop optimization calculation, and then perform connectivity verification and power drop verification on the routed power network. If the connectivity verification or power drop verification fails, the connectivity optimization calculation and power drop optimization calculation are performed again.
[0024] Therefore, after connectivity optimization calculation and power drop optimization calculation, a final verification is still required. If the final verification fails, the optimization calculation needs to be repeated to ensure that the final wiring can pass the connectivity verification and power drop verification.
[0025] To achieve the second objective described above, the computer device provided by the present invention includes a processor and a memory. The memory stores a computer program, and when the computer program is executed by the processor, it implements each step of the above-described integrated circuit power network routing optimization method.
[0026] To achieve the third objective mentioned above, the storage medium provided by the present invention stores a computer program, which, when executed by a processor, implements each step of the aforementioned integrated circuit power network routing optimization method. Attached Figure Description
[0027] Figure 1 This is a flowchart of an embodiment of the integrated circuit power network routing optimization method of the present invention.
[0028] Figure 2 This is a flowchart of connectivity optimization calculation in an embodiment of the integrated circuit power network routing optimization method of the present invention.
[0029] Figure 3 This is a flowchart of the power supply voltage drop optimization calculation in an embodiment of the integrated circuit power network routing optimization method of the present invention.
[0030] The present invention will be further described below with reference to the accompanying drawings and embodiments. Detailed Implementation
[0031] The integrated circuit power network routing optimization method of the present invention is used to optimize the routing of the power network of an integrated circuit during the integrated circuit design stage, especially optimizing the routing distance and width of the power network, so that the power network meets the performance indicators of connectivity and power voltage drop, while minimizing resource consumption. The method of the present invention can be implemented on a computer device having a processor and a memory, the memory being the readable storage medium of the present invention, on which a computer program is stored. When the computer program is executed by the processor, it can implement the aforementioned integrated circuit power network routing optimization method.
[0032] Example of integrated circuit power network routing optimization method:
[0033] See Figure 1 When routing the power network of an integrated circuit, step S11 is first executed to set the initial routing parameters of the power network. These initial parameters include the initial routing distance S0 and the initial routing width W0. In this embodiment, the routing distance is the distance between two adjacent but non-intersecting routing paths. Typically, the distance between two adjacent but non-intersecting routing paths cannot be less than the set minimum routing distance. The routing width is the width of the routing path. Typically, the width of the routing paths in the power network is uniform, and the width of each routing path cannot be less than the preset minimum routing width. When the routing width increases, the resistance of the routing path decreases, resulting in a smaller voltage drop in the power network, allowing the power supply voltage drop index of the power network to meet the preset requirements.
[0034] Furthermore, step S11 also requires obtaining the process constraints of the integrated circuit, including the minimum wiring distance S_min, the minimum wiring width W_min, and the maximum wiring resource utilization rate U_max, for example, 80%.
[0035] Then, step S12 is executed to route the power network based on the obtained initial parameters and obtain the initial performance indicators of the power network, such as the electrical performance indicators and thermal performance indicators of the power network.
[0036] Next, the first stage of routing optimization calculation is performed. The first stage of routing optimization calculation is the connectivity optimization of the power network, which is the connectivity optimization calculation considering the impact of power voltage drop. Its goal is to reduce the number of unconnected pins N_unconn of the power network to 0 or below the set threshold within the resource budget by adjusting the routing distance (and the routing width if necessary).
[0037] Specifically, step S13 is executed to evaluate the connectivity status of the power network, i.e., to calculate the number of unconnected pins N_unconn of the power network. In this embodiment, the number of unconnected pins N_unconn is the total number of power pins on a power network in the entire integrated circuit system that should be connected but have not yet been connected to the power network via wiring. Typically, during integrated circuit design, the number of pins that each power network needs to be connected is predetermined. Therefore, when calculating the number of unconnected pins N_unconn, it is first necessary to confirm the number of pins that are already connected to the power network, thereby calculating the number of unconnected pins N_unconn.
[0038] Then, step S14 is executed to determine whether the number of unconnected pins N_unconn in the power network meets the set requirement. In this embodiment, the set requirement is that the number of unconnected pins N_unconn is 0. If the set requirement is met, the second stage of optimization calculation is directly entered, i.e., step S16 is executed. If the number of unconnected pins N_unconn is greater than 0, step S15 is executed to perform connectivity optimization calculation on the power network.
[0039] See Figure 2 When performing connectivity optimization calculations on the power network, step S21 is executed first to calculate the cabling resource occupancy rate Ucurrent and the available resource budget of the power network.
[0040] The cabling resource utilization rate Ucurrent is calculated as follows: First, determine the cabling parameters of the current power network. Assume the cabling area of the power network is rectangular with dimensions Lx × Ly, where Lx is the length of the cabling area and Ly is the width of the cabling area. Then, calculate the number of available tracks Nh in the horizontal cabling layer (M2) based on the current cabling distance S, where available tracks are the available paths for cabling, and the number of available tracks in the horizontal cabling layer Nh = Ly / S. Next, calculate the number of available tracks Nv in the vertical cabling layer (M1) based on the current cabling distance S, where the number of available tracks in the vertical cabling layer Nv = Lx / S. Then, calculate the total number of available tracks Ntotal, i.e., the total number of available tracks Ntotal = Nh + Nv. Next, calculate the occupied track resources. Specifically, for each power cabling, calculate its equivalent occupied track number ni using the following formula: ni = Wi / S, where Wi is the line width of the power cabling. Considering the length of the power cabling, calculate the weighted occupied track number Nused using the following formula:
[0041]
[0042] Where Nwires is the total number of power lines, li is the length of the i-th power line, and Lref is the reference length, which can be set to max(Lx, Ly). Furthermore, the reference length Lref is the characteristic length of the routing region, which is usually taken as the maximum side length of the routing region in the X and Y directions.
[0043] Finally, calculate the resource utilization rate Ucurrent using the following formula: Ucurrent = Nused / Ntotal × 100%. When the resource utilization rate Ucurrent approaches or exceeds the preset maximum cabling resource utilization rate Umax (e.g., 80%), cabling resources are considered scarce. Furthermore, calculate the available resource budget Budget using the following formula: Budget = Umax – Ucurrent.
[0044] After calculating the resource utilization rate Ucurrent and the available resource budget Budget, step S22 is executed to determine whether the available resource budget is sufficient. In this embodiment, if the available resource budget Budget is greater than 0, it is considered that the available resource budget is sufficient, and step S23 is executed. If the available resource budget Budget is less than or equal to 0, it is considered that the available resource budget is insufficient, and step S24 is executed.
[0045] If the available resource budget is sufficient, rule R1 is applied. Rule R1 reduces the routing distance by a first magnitude when the available resource budget is sufficient. The first magnitude is 0.1 micrometers, which increases routing resources. After reducing the routing distance by the first magnitude, rerouting is required according to the new routing distance, and the resource utilization and available resource budget are recalculated. Then, step S26 is executed to determine whether the iteration termination condition has been reached.
[0046] If the result of step S22 is negative, then rule R2 is used for optimization calculation. Rule R2 specifically determines whether the current power drop has a margin. If there is a margin, the wiring width is appropriately reduced to free up some wiring resources. Specifically, step S24 is executed to determine whether the current power drop has a margin. Determining whether the current power drop has a margin means calculating the worst-case power drop value IR_max of the current power network. The worst-case power drop value IR_max is a dynamic feedback signal during the optimization calculation process. It is also determined whether the worst-case power drop value IR_max is lower than the design threshold of the power network's power drop by at least one preset safety margin, for example, a safety margin of 2%. If the sum of the worst-case power drop value IR_max and the safety margin is less than or equal to the design threshold of the power network's power drop, then the power network's power drop is considered to have a margin, and the wiring width can be safely reduced to free up wiring resources.
[0047] Therefore, if the judgment result of step S24 is yes, then step S25 is executed to reduce the wiring width with the second amplitude, for example, the second amplitude is 0.05 micrometers, and then the available resource budget is recalculated. After recalculating the available resource budget, step S26 is executed to determine whether the iteration termination condition has been reached. In this embodiment, if one of the following conditions is met, it is considered that the iteration termination condition has been met: the number of unconnected pins N_unconn is 0; the current wiring width reaches the minimum wiring distance S_min; the number of unconnected pins N_unconn no longer decreases for two consecutive iterations. If the number of unconnected pins N_unconn is 0, it means that the connectivity problem has been solved, so the iteration calculation can be terminated. After terminating the iteration calculation, the current optimization parameters are recorded, that is, the parameters after connectivity optimization are recorded, including the wiring distance S_phase1 after the first stage optimization, the wiring width W_phase1 after the first stage optimization, and the resource utilization rate U_phase1 after the first stage optimization.
[0048] If the judgment result of step S24 is negative, it indicates that there is a defect in the power network design. Step S27 is executed to output the feedback result of design failure.
[0049] Looking back Figure 1 After performing connectivity optimization calculations on the power network, the second stage of optimization design is carried out, which is to optimize the power voltage drop. The design goal is to reduce the power voltage drop below a pre-set threshold by adjusting the wiring width (and wiring distance if necessary) while maintaining good connectivity. Specifically, step S16 is executed to evaluate the power voltage drop status of the power network, that is, to calculate the worst-case power voltage drop value IR_max based on the optimization results of the first stage. The method for calculating the worst-case power voltage drop value IR_max includes: extracting the geometric parameters of each power wiring segment based on the current wiring results, including the length L and width W of the power wiring, and combining process parameters, such as the resistivity ρ and metal thickness H of the power wiring, to calculate the equivalent resistance R = ρ·L / (W·H) of each power wiring segment. Then, based on the connection relationship of each power supply line segment, a tree-like resistance network model is constructed with the power pad as the root node and each power pin as the leaf node, and the path resistance from each power pin to the power pad is calculated; based on the estimated current load of each pin, the corresponding voltage drop is calculated; finally, the maximum value of the voltage drop of all pins is taken, and its ratio with the supply voltage is taken as the worst-case power voltage drop value IR_max.
[0050] Then, step S17 is executed to determine whether the worst-case power drop value IR_max is greater than the preset power drop threshold, such as 5%. If not, it is considered that the power drop optimization goal has been achieved, and step S19 is executed. If the worst-case power drop value IR_max is greater than the preset power drop threshold, then step S18 needs to be executed to optimize the power drop calculation.
[0051] See Figure 3 When performing optimization calculations on power supply voltage drop, step S31 is executed first. Based on the wiring distance S_phase1 and wiring width W_phase1 obtained from the first stage optimization calculation, the wiring resource occupancy rate and available resource budget of the power network are calculated. The specific calculation method is the same as the method described above, and will not be repeated here.
[0052] Then, step S32 is executed to determine if the current available resources are sufficient. If sufficient, rule R3 is used for optimization. Specifically, the wiring width is increased while meeting the worst-case power drop of the power network. Therefore, step S33 is executed to increase the wiring width by a third value, where the third value is 0.1 micrometers. After rewiring, the current resource utilization rate Ucurrent and the worst-case power drop value IR_max need to be recalculated.
[0053] If the result of step S32 is negative, then rule R4 is used for optimization calculation. Rule R4 is: if there is still a margin in the connectivity of the current power network, the wiring distance is appropriately increased to release wiring resources, and if the available resource budget is sufficient after releasing the wiring resources, rule R3 is applied to increase the wiring width. Specifically, step S34 is executed to determine if there is still a margin in the connectivity of the current power network. For example, it is determined whether all pins are connected and the wiring redundancy is high. If there is a margin in connectivity, then step S35 is executed to increase the wiring distance with the fourth amplitude, thereby releasing wiring resources. In this embodiment, the fourth amplitude can be 0.1 micrometers. Then, the available resource budget is recalculated, and step S32 is executed again to determine whether the available resource budget is sufficient. If step S34 determines that there is no margin in connectivity, for example, the number of unconnected pins N_unconn is greater than 0 or the wiring redundancy is low, then step S36 is executed to report a design failure, indicating that the current wiring parameters cannot meet the power drop design requirements while ensuring connectivity.
[0054] In addition, after adjusting the wiring width in step S33, connectivity needs to be verified again. Specifically, step S37 is executed to determine if any new unconnected pins have appeared due to the wiring width adjustment. If not, step S40 is executed. If new unconnected pins appear, step S38 is executed to revert to the previous step, that is, to the wiring width before the last wiring width adjustment. Based on the wiring width before the last adjustment, a smaller increase in wiring width is attempted, for example, increasing the wiring width by a fifth amplitude value, which needs to be less than the third amplitude value, for example, the fifth amplitude value is 0.05 micrometers. Then, step S39 is executed to perform connectivity verification again. If the connectivity verification passes, step S40 is executed. If the connectivity verification fails, the wiring distance needs to be increased according to rule R4 to release resources, therefore step S35 is executed.
[0055] After each iteration, step S40 is executed to determine whether the conditions for terminating the iteration calculation are met. The iteration is considered terminated if one of the following conditions is met: the worst-case power drop value IR_max is less than the pre-set power drop threshold IR_threshold; the maximum allowed number of iterations is reached; or the worst-case power drop value IR_max no longer improves after two consecutive iterations. After terminating the iteration calculation, the optimized routing parameters from the second stage are recorded to obtain the final routing parameters, including the final routing distance S_final and the final routing width W_final.
[0056] Looking back Figure 1 After performing power drop optimization calculations, step S19 is executed to route the power network based on the optimization results of the second stage. Finally, step S20 is executed to verify the performance of the routed power network, including verifying connectivity and power drop performance. Specifically, it is determined whether the connectivity of the power network meets the preset requirements, i.e., whether the number of unconnected pins N_unconn is 0, and whether the worst-case power drop value IR_max is less than or equal to the preset power drop threshold IR_threshold. If both conditions are met, the power network is considered to have passed the connectivity and power drop verifications, and the power network routing is considered successful. If any of the above conditions are not met, the power network routing is considered not to meet the performance requirements, and it is necessary to return to step S13 to redesign the power network routing and readjust parameters such as routing distance and routing width.
[0057] The following example illustrates the power network routing optimization calculation process in this embodiment. Assume the initial parameters of the integrated circuit system's power network are: initial routing distance S0 = 2.0 micrometers, initial routing width W0 = 1.0 micrometers, process constraints are: minimum routing distance S_min = 1.5 micrometers, maximum routing resource utilization U_max = 80%, and performance requirements are: number of unconnected pins N_unconn = 0, worst-case power drop IR_max ≤ 5%.
[0058] When performing power network routing optimization calculations, the first stage of optimization calculation is performed, namely connectivity optimization. Specifically, after initial routing, the number of unconnected pins N_unconn = 3, the worst-case power drop IR_max = 4%, and the current routing resource utilization U_current = 70%. Furthermore, after calculation, the available resource budget Budget = 80% - 70% = 10%, meaning the available resource budget Budget is greater than 0. At this point, rule R1 is applied for optimization calculation, reducing the routing distance to 1.9 micrometers. Then, based on the updated routing distance, rerouting is performed. After rerouting, the number of unconnected pins N_unconn = 1, the current routing resource utilization U_current = 75%, and the worst-case power drop IR_max = 4.2%. Since the available resource budget Budget is still greater than 0 at this point (5%), the routing distance is reduced again to 1.8 micrometers, and rerouting is performed again. The result of the rerouting is that the number of unconnected pins N_unconn=0, the current routing resource utilization U_current=78%, and the worst-case power supply voltage drop IR_max=4.5%. At this point, the connectivity problem has been resolved, and the first stage of optimization calculations is complete.
[0059] Then, the second stage of optimization calculation is performed. Since the number of unconnected pins N_unconn=0 in the current state, and the worst-case power supply voltage drop IR_max=4.5%, it already meets the requirement that the worst-case power supply voltage drop IR_max≤5%, so the second stage of optimization calculation is not required.
[0060] In the example above, assuming the worst-case power drop IR_max requirement is IR_max ≤ 4.0%, further optimization is needed. Since the available resource budget (Budget = 80% - 78% = 2%) is still greater than 0, rule R3 can be applied to increase the power network routing width to 1.1 micrometers, and then rerouting. After rerouting, the worst-case power drop IR_max = 4.2%, the current routing resource utilization (U_current) = 79.5%, and the number of unconnected pins (N_unconn) = 0. Since the resource budget is now 0.5%, still greater than 0, there is still room for further optimization. Therefore, the power network routing width can be increased again to 1.15 micrometers, and rerouting can be done again. After rerouting again, the worst-case power drop IR_max = 4.0%, the current routing resource utilization (U_current) = 80%, and the number of unconnected pins (N_unconn) = 0. At this point, the performance requirements of the power network have been met, and the optimization objective has been achieved; the optimization calculation is now complete.
[0061] The power network cabling optimization calculation method of this invention divides the optimization of power network cabling parameters into two stages: connectivity optimization and power drop optimization. A collaborative mechanism is established between the two stages to improve the efficiency of the optimization calculation and avoid repeatedly adjusting cabling width and distance. In the first stage of optimization, the collaborative adjustment rule is that in the connectivity optimization stage, when resources are insufficient, the cabling width is conditionally reduced to free up resources and create space for reducing the layout distance. In the second stage of optimization, when resources are insufficient, the collaborative adjustment rule is that when resources are insufficient, the cabling distance is conditionally increased to free up resources and create space for increasing the cabling width. Furthermore, in the power drop optimization stage, connectivity is re-verified after each increase in cabling width. If problems are found, a rollback is initiated and collaborative adjustment is attempted to prevent the optimization process from undermining the results of the previous stage.
[0062] Furthermore, this invention employs a resource occupancy budget approach as a reference indicator for cabling optimization. It dynamically calculates available resources based on the maximum permissible resource occupancy rate, guiding the adjustment of cabling parameters. Therefore, this invention utilizes power drop margin and connectivity margin as triggering conditions for coordinated adjustment, achieving safe and controllable adjustment of cabling parameters and significantly improving the cabling optimization efficiency of power networks.
[0063] Computer device embodiment:
[0064] The computer device in this embodiment can be a desktop computer or a data center or data station. It has a processor, a memory, and a computer program stored in the memory and executable on the processor, such as an information processing program for implementing the above-described information processing method. When the processor executes the computer program, it implements each step of the above-described integrated circuit power network routing optimization method.
[0065] For example, a computer program can be divided into one or more modules, one or more of which are stored in memory and executed by a processor to complete the various modules of the present invention. One or more modules can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in a terminal device.
[0066] The processor referred to in this invention can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor. The processor is the control center of the terminal device, connecting various parts of the terminal device through various interfaces and lines.
[0067] Memory can be used to store computer programs and / or modules. The processor implements various functions of the terminal device by running or executing the computer programs and / or modules stored in the memory, and by accessing data stored in the memory. Memory may mainly include a program storage area and a data storage area. The program storage area may store the operating system, applications required for at least one function, etc.; the data storage area may store data created based on the use of the mobile phone, etc. In addition, memory may include high-speed random access memory, and may also include non-volatile memory, such as hard disks, RAM, plug-in hard disks, smart media cards (SMC), secure digital cards (SD cards), flash cards, at least one disk storage device, flash memory device, or other volatile solid-state storage devices.
[0068] Storage medium examples:
[0069] If a computer program stored in a computer device is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. This computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the various steps of the above-described integrated circuit power network routing optimization method.
[0070] Computer programs include computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. Computer-readable media can include: any entity or device capable of carrying computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content included in computer-readable media can be appropriately added to or subtracted according to the requirements of legislation and patent practice in a jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, computer-readable media do not include electrical carrier signals and telecommunication signals.
[0071] Finally, it should be emphasized that the above are merely preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A method for optimizing power network routing in integrated circuits, characterized in that, include: Set the initial parameters for power network routing and obtain the process constraints. Perform initial routing based on the initial parameters and the constraints, and obtain the initial performance indicators of the power network after initial routing. The connectivity of the power network after initial routing is evaluated. If the number of unconnected pins in the power network does not meet the set requirements, a connectivity optimization calculation is performed on the power network. The routing parameters of the power network are adjusted so that the number of unconnected pins in the power network meets the set requirements. The power drop status of the power network is evaluated. If the worst-case power drop value is greater than the preset power drop threshold, power drop optimization calculation is performed. The wiring parameters of the power network are adjusted so that the worst-case power drop value of the power network is reduced to below the power drop threshold. The power network is routed based on the final determined routing parameters obtained from the power drop optimization calculation; The wiring parameters include wiring width and wiring distance; Adjusting the wiring parameters of the power network includes at least one of the following: increasing the wiring width, decreasing the wiring width, increasing the wiring distance, and decreasing the wiring distance; The connectivity optimization calculation for the power network includes: calculating the current cabling resource occupancy rate and available resource budget of the power network; if the current available resource budget is sufficient, reducing the cabling distance by a first magnitude and re-routing, and updating the cabling resource occupancy rate and available resource budget. The power drop optimization calculation includes: calculating the current cabling resource utilization rate and available resource budget of the power network; if the current available resource budget is sufficient, increasing the cabling width by a third increment and re-routing, and updating the cabling resource utilization rate and the worst-case power drop value.
2. The integrated circuit power network routing optimization method according to claim 1, characterized in that: If the current available resource budget is insufficient, determine whether the current power drop has a margin. If it does, reduce the wiring width by the second magnitude and recalculate the available resource budget.
3. The integrated circuit power network routing optimization method according to claim 2, characterized in that: Determining whether the current power drop has a margin includes: determining whether the worst-case power drop value in the current power network is lower than the design threshold by at least one preset safety margin.
4. The integrated circuit power network routing optimization method according to claim 1, characterized in that: If the current available resource budget is insufficient, check if there is any margin in the connectivity of the current power network. If there is, increase the cabling distance by the fourth magnitude and recalculate the available resource budget.
5. The integrated circuit power network routing optimization method according to claim 1, characterized in that: After increasing the wiring width by the third value and rewiring, a connectivity check is performed. If increasing the wiring width causes new unconnected pins to not meet the preset requirements, the wiring width is increased by the fifth value and rewiring is performed after reverting. The fifth amplitude value is smaller than the third amplitude value.
6. The integrated circuit power network routing optimization method according to any one of claims 1 to 5, characterized in that: After routing the power network based on the final determined routing parameters obtained from the power drop optimization calculation, the network is then subjected to connectivity verification and power drop verification. If either the connectivity verification or the power drop verification fails, the connectivity optimization calculation and the power drop optimization calculation are performed again.
7. A computer device, characterized in that, It includes a processor and a memory, the memory storing a computer program, which, when executed by the processor, implements the various steps of the integrated circuit power network routing optimization method as described in any one of claims 1 to 6.
8. A storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, it implements the various steps of the integrated circuit power network routing optimization method as described in any one of claims 1 to 6.
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