Integrated circuit wiring optimization method, device, equipment, medium and method

By constructing an obstacle bounding box and evenly distributing the remaining space within the channel, the center alignment of integrated circuit wiring is achieved, solving the problems of wiring position offset and density imbalance, and improving wiring efficiency and signal integrity.

CN121480435APending Publication Date: 2026-02-06PRIMARIUS TECH CO LTD
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Patent Information

Application Number
CN202511636632.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-10
Publication Date
2026-02-06

AI Technical Summary

Technical Problem

Existing integrated circuit routing methods lack quantitative analysis of the total remaining space of channels in high-density areas, which leads to routing position deviation, resulting in layout asymmetry and density imbalance, causing signal crosstalk and timing deviation, and lacking automatic centering and alignment capabilities.

Method used

By constructing axis-aligned wiring channels based on obstacle bounding boxes, calculating and evenly distributing the remaining space within the channels, the new wiring is centered and aligned with the existing wiring. The wiring path is adjusted to meet design rules using either a push-first or bypass mode.

Benefits of technology

It improves the space utilization of wiring channels, optimizes wiring density balance and signal integrity, and enhances the yield and reliability of integrated circuits.

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Abstract

The invention relates to the technical field of integrated circuit design automation, and provides an integrated circuit wiring optimization method, device, equipment, medium and method, and the method comprises the steps: obtaining the width of a new wiring meeting design rule inspection and the geometric outer boundary of an obstacle; constructing a wiring channel aligned with a preset coordinate axis according to a bounding box of all obstacles, and determining at least one wiring channel through which the new wiring passes; the total residual space in the wiring channel is averagely distributed to the inner sides of the two opposite side walls of the wiring channel; and carrying out spatial distribution adjustment on the new wiring and the existing wiring so as to enable the adjusted new wiring and the existing wiring to be centered and aligned on the premise of meeting design rule inspection. According to the invention, the axial alignment wiring channel is constructed based on the obstacle bounding box, and the wiring in the channel is subjected to spatial distribution adjustment to realize centering alignment, so that the space utilization rate of the wiring channel is improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the field of Electronic Design Automation (EDA), and in particular, to an integrated circuit routing optimization method, device, equipment, medium and method. BACKGROUND

[0002] In the related art, in the physical design of an integrated circuit, the routing stage needs to complete the metal routing connection of the signal line under the premise of satisfying the Design Rule Check (DRC). The traditional routing method usually uses an automatic router based on maze search to find a feasible path between obstacles, but lacks the overall planning ability of the routing channel space. The router only focuses on whether the current new routing can pass, but does not uniformly model and cooperatively optimize the existing routing and new routing in the channel, resulting in the problem that the routing result often deviates. Especially in high-density layout areas, due to the lack of quantitative analysis of the total remaining space of the channel, the routing position is often biased to one side, causing the layout to be asymmetric and the routing density to be unbalanced, thereby causing signal integrity problems such as signal crosstalk and timing deviation. In addition, the existing method usually relies on heuristic rules or manual intervention when dealing with the space allocation of the existing routing and the new routing, and it is difficult to realize automatic center alignment.

[0003] Therefore, there is an urgent need for an integrated circuit routing optimization method, device, equipment, medium and method to improve the above problems. SUMMARY

[0004] The present application provides an integrated circuit routing optimization method, device, equipment, medium and method, which is used to construct an axis-aligned routing channel based on an obstacle bounding box, and adjust the spatial distribution of the routing in the channel to realize center alignment, thereby improving the space utilization of the routing channel.

[0005] According to a first aspect of the present invention, an integrated circuit routing optimization method is provided, comprising: obtaining the width of a new routing that satisfies design rule checks and the geometric outer boundaries of obstacles; constructing bounding boxes based on the geometric outer boundaries of obstacles, constructing routing channels aligned with preset coordinate axes based on the bounding boxes of all obstacles, and determining at least one routing channel through which the new routing passes; calculating the minimum total occupied width of all routing within the channel under the condition of satisfying design rule checks based on the width of the routing channel, the width of the new routing, the width of existing routing within the routing channel, and the minimum spacing in the design rules, subtracting the minimum total occupied width from the total width of the channel to obtain the total unoccupied remaining space; distributing the total remaining space within the routing channel evenly to the inner sides of two opposite sidewalls of the routing channel; and adjusting the spatial distribution of the new routing and existing routing to center-align the adjusted new routing and existing routing while satisfying design rule checks.

[0006] In one implementation, constructing a wiring channel aligned with a preset coordinate axis based on the bounding boxes of all obstacles, and determining at least one wiring channel through which the new wiring passes, includes: dividing the layout area based on the bounding boxes of all obstacles using coordinate axis-aligned dividing lines, and determining the blank area enclosed by adjacent obstacles as a candidate wiring channel; obtaining the direction vector of the new wiring entering the current layout position; determining the extension path of the new wiring based on the direction vector, and matching the candidate wiring channel into which the path falls, to determine the wiring channel through which the new wiring passes, and calculating the width of the wiring channel.

[0007] In one implementation, spatial distribution adjustment of new and existing cabling includes: calling the corresponding cabling device according to the currently set calculation mode to generate a cabling path that meets the design rule check; wherein the calculation mode includes a push-priority mode or a detour-only mode; when in push-priority mode, calling a cabling device that supports cabling push function to move existing cabling in the cabling channel and make way for new cabling; when in detour-only mode, calling a non-push-priority cabling device to lay new cabling by detour without moving existing cabling.

[0008] In one implementation, before calling the corresponding router according to the currently set calculation mode, the method further includes: switching the calculation mode according to a judgment condition; the judgment condition includes at least one of user input information, total remaining space, signal type of existing wiring, or wiring constraints in the design rules.

[0009] In one embodiment, the corresponding router is invoked according to the current set computing mode, including: determining the candidate routing channel through which the new routing passes; confirming that the width of the channel is sufficient to accommodate the new routing based on the routing path generated by the router; obtaining all existing routings and the new routing in the routing channel, and adjusting the spatial distribution of all routings in the routing channel according to the minimum spacing specified by the process design rules.

[0010] In one embodiment, after the blank area surrounded by the adjacent obstacles is determined as the candidate routing channel, the method further includes: when there are multiple candidate routing channels and the width of each channel is sufficient to accommodate the new routing, selecting a target channel according to the total remaining space in each candidate routing channel to balance the routing resources among the multiple channels; the target channel is the channel with the largest total remaining space, or the channel with the total remaining space closest to the width required by the new routing is selected in the premise of meeting the demand of the new routing; the width of the total remaining space is greater than the width of the new routing.

[0011] In one embodiment, the spatial distribution adjustment includes: obtaining all routings passing through the same candidate routing channel; calculating the total occupied width of all routings in the channel according to the width of all routings and the minimum spacing specified by the process design rules; subtracting the total occupied width from the total width of the channel to obtain the total remaining space that is not occupied.

[0012] In one embodiment, when the minimum spacing requirements between all routings in the design rules are the same, the minimum spacing is taken as a uniform routing spacing, and the unoccupied remaining space in the channel is evenly distributed to the inner sides of the two opposite side walls, so that the spacing between all routings is equal, and the distance between the outer routing and the side wall of the channel is equal to the uniform routing spacing.

[0013] According to a second aspect of the embodiments of the present application, an integrated circuit routing optimization device is provided for the method of any one of the first aspect, including: a routing information obtaining unit for obtaining initial routing information that meets the design rule check, the initial routing information including a new routing and obstacles; a routing channel constructing unit for constructing bounding boxes based on the geometric outer boundaries of the obstacles, constructing routing channels aligned with preset coordinate axes according to the bounding boxes of all obstacles, and determining at least one routing channel through which the new routing passes; a distribution adjusting unit for adjusting the spatial distribution of the new routing and the existing routings in the routing channel according to the width of the routing channel, the width of the new routing, the width of the existing routings in the routing channel, and the minimum spacing in the design rules, so that the adjusted new routing and existing routings are centrally aligned under the premise of meeting the design rule check; and evenly distributing the total remaining space in the routing channel to the inner sides of the two opposite side walls of the routing channel.

[0014] According to a third aspect of the embodiments of the present application, an electronic device is provided, comprising a memory and a processor, the memory is configured to store a computer program executable by the processor; and the processor is configured to execute the computer program in the memory to implement the method described above.

[0015] According to a fourth aspect of the embodiments of the present application, a computer readable storage medium is provided, and the computer readable storage medium stores a computer program, and when the computer program executable in the storage medium is executed by a processor, the method described above can be implemented.

[0016] According to a fifth aspect of the embodiments of the present application, a computer program product is provided, comprising a computer program, and when the computer program is executed by a processor, the method described above can be implemented.

[0017] Compared with the prior art, the beneficial effects of the present application are as follows: by acquiring initial routing information containing new routing and obstacles, and constructing a bounding box based on the geometric outer boundary of the obstacles, a candidate routing channel aligned with the coordinate axis and surrounded by adjacent obstacles is identified, after at least one routing channel through which the new routing passes is determined, the total width of the channel, the width of the new routing, the width of the existing routing and the minimum spacing specified by the process design rule are comprehensively calculated to obtain the minimum total occupied width of all routings in the channel that meet the design rule check, and the total remaining space that is not occupied is obtained. By equally distributing the total remaining space to the inner sides of the two opposite side walls of the routing channel, the distance from the edge routing in the same routing channel to the obstacle is equalized, so that the new routing and the existing routing are aligned in the middle as a whole, which is conducive to subsequent uniformity of routing density and optimization of signal integrity, and finally improves the yield and reliability of the integrated circuit. BRIEF DESCRIPTION OF DRAWINGS

[0018] Figure 1 is a flowchart of an integrated circuit routing optimization method according to an exemplary embodiment.

[0019] Figure 2 is a distribution diagram of a candidate routing channel according to an exemplary embodiment.

[0020] Figure 3 is a distribution diagram of existing routing and new routing according to another exemplary embodiment.

[0021] Figure 4 is a block diagram of an integrated circuit routing optimization device according to an exemplary embodiment.

[0022] Figure 5 is a block diagram of an electronic device according to an exemplary embodiment.

[0023] Explanation of reference numerals in the drawings: 1, first obstacle; 2, second obstacle; 3, third obstacle; 4, fourth obstacle; 5, existing wiring; 6, new wiring; 7, candidate wiring channel; 10, integrated circuit wiring optimization apparatus; 11, wiring information acquisition unit; 12, wiring channel construction unit; 13, distribution adjustment unit; 900, electronic device; 922, processing component; 926, power supply component; 932, memory; 950, network interface; 958, input / output interface. DETAILED DESCRIPTION

[0024] Unless otherwise defined, technical or scientific terms used in this specification shall have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. In the following detailed description of embodiments of the application, numerous specific details are set forth in order to provide a thorough understanding of the application. However, there can be embodiments of the application to which the detailed description is not meant to be limiting in which not all of these details are presented. The embodiments of the application described herein are meant to be illustrative only and changes and modifications can be suggested to these embodiments, by one of ordinary skill in the art, without departing from the spirit and scope of the application.

[0025] As shown in FIG. 1, the first embodiment of the present application provides an integrated circuit wiring optimization method, comprising the following steps S1-S4: Figure 1 Step S1, obtaining initial wiring information satisfying design rule check, the initial wiring information including width of new wiring and geometric outer boundary of obstacles. Step S2, constructing bounding box based on geometric outer boundary of obstacles, constructing wiring channel aligned with preset coordinate axis according to bounding boxes of all obstacles, and determining at least one wiring channel through which the new wiring passes.

[0026] Step S3, calculating minimum total occupied width of all wirings in the channel under the condition of satisfying design rule check according to width of the wiring channel, width of the new wiring, width of existing wiring in the wiring channel, and minimum spacing in the design rule, subtracting the minimum total occupied width from total width of the channel to obtain total remaining space not occupied, and evenly distributing the total remaining space in the wiring channel to inner sides of two opposite side walls of the wiring channel.

[0027] Step S4, adjusting spatial distribution of the new wiring and the existing wiring to center and align the adjusted new wiring and the existing wiring under the premise of satisfying design rule check.

[0028] Step S4, adjusting spatial distribution of the new wiring and the existing wiring to center and align the adjusted new wiring and the existing wiring under the premise of satisfying design rule check.

[0029] As shown in FIG. 2, the second embodiment of the present application provides an integrated circuit wiring optimization method, comprising the following steps S1-S4: Figure 2As shown, it is worth noting that the obstacles are arranged in at least two, in some examples, the first obstacle 1 and the third obstacle 3 are rectangular, the second obstacle 2 is circular, and the fourth obstacle 4 is diamond-shaped. The coordinate axes are the X-axis and the Y-axis, and the bounding boxes of the four obstacles are all rectangular. Between each bounding box, the candidate routing channels 7 are divided along the X-axis and the Y-axis. When the candidate routing channel 7 contains existing routing 5 and new routing 6, the candidate routing channel 7 is determined as the target routing channel. The routing channel, the existing routing 5 and the new routing 6 can extend along the X-axis and the Y-axis in the positive direction or in the negative direction.

[0030] In some embodiments, the routing channel aligned with the preset coordinate axis is constructed according to the bounding boxes of all obstacles, and the at least one routing channel through which the new routing 6 passes is determined, including: based on the bounding boxes of all obstacles, the layout area is divided by the coordinate axis-aligned partition line, and the blank area surrounded by adjacent obstacles is determined as the candidate routing channel 7; the direction vector of the new routing 6 entering the current layout position is obtained; the extension path of the new routing 6 is determined according to the direction vector, and the candidate routing channel 7 into which the path falls is matched to determine the routing channel through which the new routing 6 passes, and the width of the routing channel is calculated.

[0031] In some specific embodiments, the routing channel aligned with the preset coordinate axis is constructed based on the bounding boxes of all obstacles, and the at least one routing channel through which the new routing 6 passes is determined, specifically including the following steps: first, the bounding boxes of each obstacle in the layout are generated based on the geometric outer boundary of the obstacle, and the entire layout area is divided by the vertical and horizontal partition lines aligned with the coordinate axis to identify the rectangular blank area surrounded by adjacent obstacles as the candidate routing channel 7; then, the direction vector of the new routing 6 entering the current layout position is obtained, which represents the extension trend or connection target direction of the routing on the chip plane; then, the potential extension path of the new routing 6 is predicted according to the direction vector, and the path is spatially matched with all candidate routing channels 7 to determine at least one candidate channel into which it falls, thereby selecting the target routing channel through which the new routing 6 passes; finally, based on the distance between the bounding boxes of the obstacles on both sides of the selected channel, the effective width of the routing channel is calculated to provide geometric parameter support for subsequent spatial distribution adjustment.

[0032] In some embodiments, the design rule check is used to ensure that the layout meets the requirements of the manufacturing process, including but not limited to minimum line width, minimum spacing, layering rules and density constraints. These design rules can be provided by the foundry and are usually integrated into the electronic design automation tool in the form of a rule file. The initial routing information is an intermediate routing result generated after completing the preliminary automatic routing or interactive routing, which contains new routing 6 paths to be optimized and obstacle information existing around them. The obstacles include other signal lines, power ground lines, device boundaries, keep-out zones or locked fixed routes.

[0033] In some embodiments, the spatial distribution adjustment of the new routing 6 and the existing routing 5 includes: calling a corresponding router according to the currently set calculation mode to generate a routing path that meets the design rule check; wherein the calculation mode includes a push-priority mode or a only-avoid mode; when in the push-priority mode, a router supporting routing push function is called to move the existing routing 5 in the routing channel and make way for the new routing 6; when in the only-avoid mode, a non-push routing router is called to route the new routing 6 by avoiding mode without moving the existing routing 5.

[0034] In some embodiments, the process of spatial distribution adjustment of the new routing 6 and the existing routing 5 dynamically selects the corresponding routing strategy according to the currently set calculation mode to generate a routing path that meets the design rule check. The calculation mode mainly includes "push-priority mode" and "only-avoid mode". When the system runs in the push-priority mode, a routing router supporting routing push function is called to allow limited displacement or spacing compression of part of the existing routing 5 in the routing channel during the routing of the new routing 6, thereby making way for higher routing efficiency and space utilization; this mode is suitable for the early stage of layout and routing, and can effectively alleviate the local congestion problem. When the system is in the only-avoid mode, a non-push routing router is called to strictly maintain the physical position of the existing routing 5 unchanged, and the new routing 6 is routed by avoiding mode in the available blank area to avoid interference with the circuit structure that has been verified; this mode is suitable for the later stage of design, key signal routing or scenarios with higher timing stability requirements. By flexibly switching the calculation mode, this embodiment can balance the routing efficiency and design stability at different design stages.

[0035] In some embodiments, before calling the corresponding router according to the currently set calculation mode, it further includes: switching the calculation mode according to the determination condition; the determination condition includes at least one of user input information, total remaining space, signal type of the existing routing 5 or routing constraint condition in the design rule.

[0036] In some embodiments, the system further dynamically switches the calculation mode based on multiple decision conditions to adapt to the needs of different layout scenarios before invoking the corresponding router according to the current set calculation mode. The decision conditions include but are not limited to: priority instructions input by the user, the total remaining space in the current routing channel, the signal type carried by the existing routing 5, and the routing constraints defined in the design rules. The signal type includes but is not limited to clock signals, power signals, and high-speed differential signals, and the routing constraints include but are not limited to minimum spacing, shielding requirements, and length matching conditions.

[0037] For example, when it is detected that the total remaining space is insufficient and there is no critical signal, the system can automatically switch to the push priority mode to release space by fine-tuning the existing routing 5; when the channel contains high-sensitivity signals or the user explicitly specifies that the existing routing 5 cannot be moved, the system switches to the only detour mode to ensure the integrity of the existing routing 5 layout. By introducing a multi-dimensional decision mechanism, this embodiment realizes intelligent adaptive selection of routing strategies, taking into account both the design rule compliance and the signal integrity.

[0038] In some embodiments, invoking the corresponding router according to the current set calculation mode includes: determining the candidate routing channel 7 through which the new routing 6 passes; verifying that the width of the channel is sufficient to accommodate the new routing 6 based on the routing path generated by the router; and obtaining all existing routings 5 and new routings 6 in the routing channel, and adjusting the spatial distribution of all routings in the routing channel according to the minimum spacing specified by the process design rules.

[0039] In some embodiments, invoking the corresponding router according to the current set calculation mode specifically includes the following processes: first, determining the candidate routing channel 7 through which the new routing 6 passes, which is surrounded by the bounding box of adjacent obstacles and aligned with the preset coordinate axis; then, verifying whether the width of the candidate channel is sufficient to accommodate the new routing 6 and the minimum spacing requirement between the new routing 6 and the existing routing 5 based on the preliminary routing path generated by the router; if the channel width meets the process design rules, further obtaining all existing routings 5 in the channel and the new routing 6 to be laid this time as a whole routing group for unified management; then, calculating the minimum total occupied space of the routings in the channel according to the minimum spacing, the width of each routing, and the total width of the channel specified in the process design rules, and evenly distributing the remaining space to both sides of the channel, and then adjusting the spatial distribution of all routings in the channel to ensure that they are centrally aligned under the premise of meeting the design rules. All routings include new routings 6 and existing routings 5. This embodiment not only guarantees the compliance of the routing, but also further optimizes the spatial distribution, so that the routing and the channel side wall maintain a symmetrical margin, thereby improving the scalability of subsequent routing operations.

[0040] For example, Figure 3As shown, in some specific embodiments, there are existing routing 5 and new routing 6 between the first obstacle 1 and the second obstacle 2. The existing routing 5 and the new routing 6 both extend along the Y direction. The profile of the existing routing 5 is IJKL, and the minimum spacing outer profile is PQST. The profile of the new routing 6 is HGMN, and the minimum spacing outer profile is IORL. The bounding box of the first obstacle 1 is ABCD, and the bounding box of the second obstacle 2 is F on the side wall of the routing channel. After the center alignment, the distance from point D to the straight line JK is equal to the distance from point F to the straight line HN.

[0041] In some embodiments, after determining the blank area surrounded by adjacent obstacles as the candidate routing channel 7, the method further comprises: when there are multiple candidate routing channels 7 and the width of each channel is sufficient to accommodate the new routing 6, selecting a target channel according to the total remaining space in each candidate routing channel 7 to balance the routing resources among multiple channels; the target channel is the channel with the largest total remaining space, or the channel with the total remaining space closest to the required width of the new routing 6 is selected as the target channel under the premise of meeting the width requirement of the new routing 6; the width of the total remaining space is greater than the width of the new routing 6.

[0042] In some specific embodiments, after determining the blank area surrounded by adjacent obstacles as the candidate routing channel 7, if there are multiple candidate channels and the width of each channel is sufficient to accommodate the new routing 6, the system further selects a channel according to the total remaining space in each channel to realize the dynamic balance of routing resources among multiple channels. Specifically, the system preferentially selects the channel with the largest total remaining space as the target channel, thereby maximizing the subsequent routing margin and being suitable for early layout or congestion-sensitive scenarios; or, under the premise of meeting the width requirement of the new routing 6, the channel with the total remaining space closest to the required width of the new routing 6 is selected to reduce space fragmentation and improve overall space utilization. This strategy ensures that the width of the remaining space of the selected channel is strictly greater than the width of the new routing 6, avoiding spacing violations due to excessive matching. By introducing a channel selection mechanism based on the remaining space, this embodiment not only improves the routing rate, but also optimizes the distribution uniformity of global routing resources, which is beneficial to the smooth execution of subsequent incremental routing.

[0043] In some embodiments, the space distribution adjustment comprises: obtaining all routings through the same candidate routing channel 7; calculating the total occupied width of all routings in the channel according to the width of all routings and the minimum spacing specified by the process design rules; and subtracting the total occupied width from the total width of the channel to obtain the total remaining space that is not occupied.

[0044] In some specific embodiments, the space distribution adjustment process includes unified modeling and collaborative optimization of all wires passing through the same candidate routing channel 7. Specifically, first, all wire objects within the channel, including the new wire 6 and the existing wire 5, are identified and acquired, and are managed as a whole wire group. Then, based on the physical width of each wire and the minimum spacing requirement specified by the process design rules, the minimum safe distance between adjacent wires is calculated segment by segment, and all wire widths and necessary spacings are added up to obtain the total occupied width of the wire group in the channel. Next, the total width of the channel is reduced by the total occupied width to obtain the total remaining space not occupied by wires. The remaining space serves as the basis for subsequent space allocation, and is used to achieve the centered alignment or asymmetric optimization of the wire group in the channel. Through this adjustment mechanism based on global occupancy analysis, the present application can ensure that all wires achieve high-density, low-violation, and regular layout of automatic routing under the premise of meeting the design rules.

[0045] In some embodiments, when the minimum spacing requirement between all wires in the design rules is the same, the minimum spacing is taken as the uniform wire spacing, and the remaining space not occupied in the channel is evenly distributed to the inner sides of the two opposite side walls, so that the spacing between all wires is equal, and the distance between the outer wire and the channel side wall is equal to the uniform wire spacing.

[0046] In some specific embodiments, the space distribution adjustment process achieves high-precision space optimization by globally analyzing the wire resources in the candidate routing channel 7. Specifically, the system first identifies and acquires all wires passing through the candidate routing channel 7, including the new wire 6 and the existing wire 5, and treats them as a whole wire group for unified processing. Then, based on the physical width of each wire and the minimum spacing requirement specified by the process design rules, the system calculates the minimum safe interval between adjacent wires, and adds up all wire widths and necessary spacings to obtain the minimum total occupied width required by the wire group in the channel. Next, the total available width of the wire channel is reduced by the above total occupied width to obtain the total remaining space not occupied by wires. This remaining space reflects the surplus area available for layout optimization in the channel, and is a key parameter for subsequent implementation of wire centered alignment, balanced allocation of white space on both sides, or dynamic resource scheduling. Through this adjustment mechanism based on global occupancy analysis, the present application can significantly improve the regularity and space utilization of wire layout under the premise of meeting the design rule checks.

[0047] As Figure 4As shown, in a second embodiment of the present invention, an integrated circuit routing optimization device 10 is provided for any of the methods described in the above embodiments, comprising: a routing information acquisition unit 11, configured to acquire initial routing information that satisfies design rule checks, the initial routing information including a new routing 6 and obstacles; a routing channel construction unit 12, configured to construct bounding boxes based on the geometric outer boundaries of the obstacles, construct routing channels aligned with preset coordinate axes based on the bounding boxes of all obstacles, and determine at least one routing channel traversed by the new routing 6; and a distribution adjustment unit 13, configured to spatially adjust the new routing 6 and existing routing 5 according to the width of the routing channel, the width of the new routing 6, the width of existing routing 5 within the routing channel, and the minimum spacing in the design rules, so that the adjusted new routing 6 and existing routing 5 are centered and aligned while satisfying the design rule checks; and to evenly distribute the total remaining space within the routing channel to the inner sides of the two opposite sidewalls of the routing channel.

[0048] A third embodiment of the present invention provides an electronic device, including a memory and a processor, wherein the memory is used to store a computer program executable by the processor; and the processor is used to execute the computer program in the memory to implement the method of any of the above embodiments.

[0049] like Figure 5 The diagram shown is a block diagram of an electronic device according to an exemplary embodiment. For example, electronic device 900 may be provided as a server. (Refer to...) Figure 3 The electronic device 900 includes a processing component 922, which further includes one or more processors, and memory resources represented by memory 932 for storing instructions, such as application programs, that can be executed by the processing component 922. The application programs stored in memory 932 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 922 is configured to execute instructions to perform the methods described above.

[0050] Electronic device 900 may also include a power supply component 926 configured to perform power management of electronic device 900, a wired or wireless network interface 950 configured to connect electronic device 900 to a network, and an input / output (I / O) interface 958. Electronic device 900 may operate on an operating system stored in memory 932, such as Windows Server™, MacOS X™, Unix™, Linux™, FreeBSD™, or similar.

[0051] In an example embodiment, a non-transitory computer-readable storage medium, such as the memory 932 including instructions, is also provided, which can be executed by the processing component 922 of the electronic device 900 to complete the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk and an optical data storage device.

[0052] In an example embodiment, a non-transitory computer-readable storage medium, such as the memory 932 including instructions, is also provided, which can be executed by the processing component 922 of the electronic device 900 to complete the above method. For example, the non-transitory computer-readable storage medium can be a ROM, a random access memory (RAM), a CD-ROM, a magnetic tape, a floppy disk and an optical data storage device.

[0053] A fourth embodiment of the present application provides a readable storage medium, and the readable storage medium stores a program. The program is executed to implement the method of any one of the above embodiments.

[0054] A fifth embodiment of the present application provides a computer program product, and the computer program product includes a computer program. The computer program is executed to implement the method of any one of the above embodiments.

[0055] In the present application, the terms "first", "second" are only for descriptive purposes, and cannot be understood as indicating or implying relative importance. The term "a plurality of" means two or more, unless otherwise explicitly limited.

[0056] The above description of the embodiments is to facilitate the understanding and application of the present application by those of ordinary skill in the art. Those skilled in the art can easily make various modifications to the embodiments, and apply the general principles described herein to other embodiments without having to pay creative labor. Therefore, the present application is not limited to the embodiments herein, and the improvements and modifications made by those skilled in the art based on the disclosure of the present application without departing from the scope and spirit of the present application are within the scope of the present application.

Claims

1. A method for optimizing integrated circuit routing, characterized in that, include: Obtain the width of the new wiring that meets the design rule checks, as well as the geometric outer boundary of the obstacles; Construct bounding boxes based on the geometric outer boundaries of the obstacles, construct wiring channels aligned with preset coordinate axes based on the bounding boxes of all obstacles, and determine at least one wiring channel through which the new wiring passes. Based on the width of the cabling channel, the width of the new cabling, the width of the existing cabling in the cabling channel, and the minimum spacing in the design rules, calculate the minimum total occupied width of all cabling in the channel under the condition of satisfying the design rule check. Subtract the minimum total occupied width from the total width of the channel to obtain the total unoccupied remaining space. The total remaining space within the wiring channel is evenly distributed to the inner sides of the two opposite side walls of the wiring channel; Adjust the spatial distribution of new and existing cabling to ensure that the adjusted new and existing cabling are centered and aligned while meeting design rule checks.

2. The method according to claim 1, characterized in that, Construct a wiring path aligned with a preset coordinate axis based on the bounding boxes of all obstacles, and determine at least one wiring path traversed by the new wiring, including: Based on the bounding boxes of all obstacles, the layout area is divided by dividing lines aligned with the coordinate axes, and the blank area enclosed by adjacent obstacles is determined as a candidate wiring channel. Obtain the direction vector of the new wiring entering the current layout position; The extension path of the new wiring is determined based on the direction vector, and the candidate wiring channels into which the path falls are matched to determine the wiring channels through which the new wiring passes, and the width of the wiring channel is calculated.

3. The method according to claim 1, characterized in that, Spatial distribution adjustments to new and existing cabling, including: The corresponding router is invoked according to the currently set calculation mode to generate a routing path that meets the design rule check. The calculation modes include a push-priority mode or a bypass mode; When in push-priority mode, a router that supports the wiring push function is invoked to move existing wiring in the wiring channel and make way for the new wiring. When in bypass mode only, the non-push router is invoked to lay the new wiring by bypassing without moving the existing wiring.

4. The method according to claim 3, characterized in that, Before calling the corresponding router according to the currently set calculation mode, the following is also included: The calculation mode is switched according to the judgment conditions; The determination criteria include at least one of the following: user input information, the total remaining space, the signal type of existing wiring, or wiring constraints in the design rules.

5. The method according to claim 3, characterized in that, The corresponding router is invoked based on the currently set calculation mode, including: Determine the candidate cabling paths through which the new cabling will pass; Based on the wiring path generated by the router, it is confirmed that the width of the channel is sufficient to accommodate the new wiring; Obtain all existing wiring and new wiring within the wiring channel, and adjust the spatial distribution of all wiring within the wiring channel according to the minimum spacing specified in the process design rules.

6. The method according to claim 2, characterized in that, After identifying the blank area enclosed by adjacent obstacles as a candidate wiring path, the following steps are also included: When there are multiple candidate cabling channels and the width of each channel is sufficient to accommodate the new cabling, the target channel is selected based on the total remaining space in each candidate cabling channel to balance the cabling resources among the multiple channels. The target channel is the channel with the largest total remaining space, or, provided that the new cabling requirements are met, the channel with the largest total remaining space that is closest to the width required for the new cabling is selected first; the width of the total remaining space is greater than the width of the new cabling.

7. The method according to claim 1, characterized in that, The spatial distribution adjustment includes: Get all cabling passing through the same candidate cabling channel; Calculate the total width occupied by all wiring within the channel based on the width of all wiring and the minimum spacing specified in the process design rules; Subtract the total occupied width from the total width of the channel to obtain the total unoccupied remaining space.

8. The method according to claim 1, characterized in that, When the minimum spacing requirement between all wirings in the design rules is the same, the minimum spacing is taken as the uniform wiring spacing, and the unoccupied remaining space in the channel is evenly distributed to the inner sides of the two opposite side walls so that the spacing between all wirings is equal, and the distance between the outer wiring and the channel side wall is equal to the uniform wiring spacing.

9. An integrated circuit wiring optimization apparatus, used in the method according to any one of claims 1 to 8, characterized in that, include: The wiring information acquisition unit is used to acquire initial wiring information that meets the design rule check, wherein the initial wiring information includes new wiring and obstacles; The wiring channel construction unit is used to construct a bounding box based on the geometric outer boundary of the obstacle, construct a wiring channel aligned with a preset coordinate axis based on the bounding boxes of all obstacles, and determine at least one wiring channel through which the new wiring passes. The distribution adjustment unit is used to spatially adjust the new and existing wiring according to the width of the wiring channel, the width of the new wiring, the width of the existing wiring in the wiring channel, and the minimum spacing in the design rules, so that the adjusted new and existing wiring are centered and aligned while meeting the design rule check. The total remaining space within the wiring channel is evenly distributed to the inner sides of the two opposite side walls of the wiring channel.

10. An electronic device, characterized in that, The device includes a memory and a processor, the memory being used to store a computer program executable by the processor; the processor being used to execute the computer program in the memory to implement the method as described in any one of claims 1 to 8.

11. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the executable computer program in the storage medium is executed by a processor, it can implement the method as described in any one of claims 1 to 8.

12. A computer program product, comprising a computer program, characterized in that, When the computer program is executed by a processor, it implements the method as described in any one of claims 1 to 8.