Diode and preparation method thereof, chip and electronic equipment

By introducing defect structures, especially defect layers, into the anode region of the diode, the problem of large reverse recovery current in fast recovery diodes is solved, improving their switching characteristics and performance in high-frequency scenarios.

CN121487271APending Publication Date: 2026-02-06BYD CO LTD +1
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Patent Information

Application Number
CN202511401962.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-09-26
Publication Date
2026-02-06

AI Technical Summary

Technical Problem

Existing fast recovery diodes have large reverse recovery currents in high-frequency applications, resulting in poor switching characteristics and affecting their use and promotion in high-frequency scenarios.

Method used

Introducing defect structures, especially defect layers, into the anode region of a diode reduces the injection efficiency of the anode region, thereby reducing the reverse recovery current.

Benefits of technology

By reducing the hole injection efficiency in the anode region, the time for the diode to switch from the on state to the off state is shortened, reducing switching losses and improving switching characteristics, making it suitable for high-frequency applications.

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Abstract

According to the diode and the preparation method thereof, the chip and the electronic equipment provided by the invention, through the defect structure included in the anode region of the diode, the injection efficiency of the anode region when the diode is in the conduction state is reduced, so that the injection efficiency of the anode region is improved in the process of switching the diode from the conduction state to the turn-off state; therefore, the number of holes flowing back to the anode region from the drift region is reduced, unbalanced carriers accumulated in the drift region can be removed more quickly in the process that the diode is switched from the on state to the off state, reverse recovery current is reduced, the switching loss of the diode is reduced, the reverse recovery characteristic of the diode is optimized, and the reliability of the diode is improved. Therefore, the switching characteristic of the diode is improved, and the diode can be used and popularized in a high-frequency scene.
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Description

[0001] Technology

[0002] This application relates to the field of semiconductor technology, and in particular to a diode and its fabrication method, a chip, and an electronic device. Background Technology

[0003] A fast recovery diode (FRD) is a semiconductor power diode characterized by good switching characteristics and short reverse recovery time. FRDs are primarily used in high-frequency applications where frequent on / off switching is required. When an FRD is on, a large number of non-equilibrium carriers are injected into the drift region. When the FRD switches from on to off, these non-equilibrium carriers in the drift region need to be completely removed before the FRD can be turned off. This removal of non-equilibrium carriers generates a reverse recovery current. A large reverse recovery current will prolong the turn-off time and increase the turn-off losses, significantly affecting the switching characteristics of the FRD and hindering its use and widespread adoption in high-frequency applications. Summary of the Invention

[0004] This application provides a diode, its fabrication method, chip, and electronic device, which can effectively reduce the reverse recovery current of the diode to improve its switching characteristics.

[0005] The first aspect of this application provides a diode, comprising: an anode region, a drift region, and a cathode region; the anode region includes a defect structure, the defect structure being used to reduce the injection efficiency of the anode region when the diode is in a conducting state, thereby reducing the reverse recovery current during the process of the diode switching from a conducting state to a turning-off state.

[0006] In one embodiment of the first aspect of this application, the defect structure includes: at least one defect layer disposed within the anode region and parallel to the plane in which the anode region is located.

[0007] In one embodiment of the first aspect of this application, the projection of the defect layer onto the plane covers the entire anode region; or, the projection of the defect layer onto the plane covers a portion of the anode region.

[0008] In one embodiment of the first aspect of this application, the defect layer is disposed within the anode region, offset towards the location of the offset region.

[0009] In one embodiment of the first aspect of this application, the thickness of the defect layer ranges from 0.1 to 0.3 μm.

[0010] In one embodiment of the first aspect of this application, the thickness of the defect layer is negatively correlated with the current value of the reverse recovery current.

[0011] In one embodiment of the first aspect of this application, the defect layer includes a metal impurity layer.

[0012] In one embodiment of the first aspect of this application, the metal impurities in the metal impurity layer include Au or Pt.

[0013] In one embodiment of the first aspect of this application, the defect structure specifically includes multiple defect layers, which are spaced apart and lie on parallel planes.

[0014] In one embodiment of the first aspect of this application, the number of defect layers is negatively correlated with the current value of the reverse recovery current.

[0015] In one embodiment of the first aspect of this application, it further includes: a first metal layer disposed on the back side of the cathode region; and a second metal layer disposed on the front side of the anode region.

[0016] In one embodiment of the first aspect of this application, the cathode region is an N-type heavily doped region; the drift region is an N-type lightly doped region; and the anode region is a P-type heavily doped region.

[0017] In one embodiment of the first aspect of this application, the cell structure of the diode includes: an NPT structure, a PT structure, an SPT structure, or an FS structure.

[0018] In one embodiment of the first aspect of this application, the semiconductor material of the diode includes: Si, SiC, GaAs, or GaN.

[0019] A second aspect of this application provides a method for fabricating a diode, comprising: providing a substrate to form a cathode region; forming a drift region on the front side of the cathode region; forming an anode region on the front side of the drift region, and forming a defect structure within the anode region, the defect structure being used to reduce the injection efficiency of the anode region when the diode is in a conducting state, thereby reducing the reverse recovery current during the process of the diode switching from a conducting state to a turning-off state.

[0020] In one embodiment of the second aspect of this application, the defect structure includes at least one defect layer. The step of forming an anode region on the front side of the drift region and forming the defect structure within the anode region includes: forming a portion of a cathode region corresponding to one side of the defect layer on the back side of the defect layer; forming the defect layer; and forming another portion of a cathode region corresponding to the other side of the defect layer on the front side of the defect layer.

[0021] In one embodiment of the second aspect of this application, the thickness of a portion of the cathode region corresponding to one side of the defect layer is greater than the thickness of another portion of the cathode region corresponding to the other side of the defect layer.

[0022] In one embodiment of the second aspect of this application, the thickness of the defect layer ranges from 0.1 to 0.3 μm.

[0023] In one embodiment of the second aspect of this application, the thickness of the defect layer is negatively correlated with the current value of the reverse recovery current.

[0024] In one embodiment of a second aspect of this application, the defect layer includes a layer of metallic impurities.

[0025] In a second aspect of this application, after forming the defect layer, the method further includes: sputtering metal impurities on the back side of the cathode region or the front side of the anode region to form a metal impurity layer.

[0026] In one embodiment of the second aspect of this application, the metal impurities in the metal impurity layer include Au or Pt.

[0027] In one embodiment of the second aspect of this application, the defect structure specifically includes a plurality of defect layers, the plurality of defect layers are spaced apart, and the planes in which the plurality of defect layers are located are parallel.

[0028] In one embodiment of the second aspect of this application, the number of defect layers is negatively correlated with the current value of the reverse recovery current.

[0029] In one embodiment of the second aspect of this application, the method further includes: forming a second metal layer on the front side of the anode region; and forming a first metal layer on the back side of the cathode region.

[0030] In one embodiment of the second aspect of this application, the cathode region is an N-type heavily doped region; the drift region is an N-type lightly doped region; and the anode region is a P-type heavily doped region.

[0031] In one embodiment of the second aspect of this application, the cell structure of the diode includes: an NPT structure, a PT structure, an SPT structure, or an FS structure.

[0032] In one embodiment of the second aspect of this application, the semiconductor material of the diode includes: Si, SiC, GaAs, or GaN.

[0033] A second aspect of this application provides a method for fabricating an FRD, comprising: forming a defect structure in the anode region of the FRD during the fabrication process, wherein the defect structure is used to reduce the injection efficiency of the anode region when the FRD is in a conducting state, thereby reducing the reverse recovery current during the process of the FRD switching from a conducting state to a turning-off state.

[0034] A third aspect of this application provides a chip including the FRD as described in the first aspect of this application.

[0035] A fourth aspect of this application provides an electronic device including the chip described in the third aspect of this application.

[0036] The diode, its fabrication method, chip, and electronic device provided in this application reduce the injection efficiency of the anode region when the diode is in the conducting state by including defect structures in the anode region. This reduces the number of holes flowing back from the drift region to the anode region during the switching process from the conducting state to the turning-off state. As a result, the non-equilibrium carriers accumulated in the drift region can be removed more quickly during the switching process from the conducting state to the turning-off state, thus reducing the reverse recovery current, lowering the switching loss of the diode, optimizing the reverse recovery characteristics of the diode, and improving the switching characteristics of the diode. This is more conducive to the use and promotion of the diode in high-frequency scenarios. Attached Figure Description

[0037] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0038] Figure 1 This is a schematic diagram of the structure of a diode in the prior art;

[0039] Figure 2 A schematic diagram of the structure of a diode provided in this application;

[0040] Figure 3 A schematic diagram of the structure of a diode provided in this application;

[0041] Figure 4 A schematic diagram of an embodiment of the diode fabrication process provided in this application;

[0042] Figure 5 A schematic diagram of an embodiment of the diode fabrication process provided in this application;

[0043] Figure 6 This is a schematic diagram of an embodiment of the diode fabrication process provided in this application. Detailed Implementation

[0044] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill without creative effort are within the scope of protection of this application.

[0045] The terms “first,” “second,” “third,” “fourth,” etc. (if present) in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a particular order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented, for example, in orders other than those illustrated or described herein. Furthermore, the terms “comprising” and “having,” and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0046] A diode is a semiconductor electronic component with unidirectional conductivity. Its core function is to allow current to flow in only one direction (forward) while almost blocking current in the reverse direction.

[0047] In one specific implementation, an FRD is a semiconductor power diode with fast reverse recovery characteristics. It is typically used as a high-frequency, high-current rectifier diode and freewheeling diode in electronic circuits that require efficient and fast switching, such as switching power supplies, pulse width modulation (PWM) modulators, uninterruptible power supplies, inverters, and motor drives. It features good switching characteristics and short reverse recovery time.

[0048] Figure 1 This is a schematic diagram of the structure of a diode in the prior art, taking an FRD diode as an example. Figure 1 The diode shown comprises, in sequence, a first metal layer 101, a cathode region 102 of a first conductivity type, a drift region 103 of a first conductivity type, an anode region 104a of a second conductivity type, and a second metal layer 105.

[0049] Specifically, in Figure 1 From bottom to top, the first metal layer 101, the cathode region 102 of the first conductivity type, the drift region 103 of the first conductivity type, the anode region 104a of the second conductivity type, and the second metal layer 105 are sequentially stacked. The first conductivity type is N-type, and the second conductivity type is P-type.

[0050] In one embodiment, the cell structure of the diode can also be a PT structure, an NPT structure, an SPT structure, or an FS structure, etc.

[0051] In one embodiment, the semiconductor material used in the diode includes Si, SiC, GaAs, or GaN, etc.

[0052] In one specific implementation, the first metal layer 101 is specifically a back metal layer. The cathode region 102 of the second conductivity type is specifically a heavily doped N-type semiconductor region, achieved by high-concentration doping with pentavalent elements such as phosphorus and arsenic, and can be simply referred to as the cathode N+ region, cathode N+ region, etc. The drift region 103 of the first conductivity type is specifically a lightly doped N-type semiconductor region, achieved by low-concentration doping with pentavalent elements such as phosphorus and arsenic, and can be simply referred to as the cathode N- region, cathode N- region, etc. The anode region 104a of the second conductivity type is specifically a heavily doped P-type semiconductor region, achieved by high-concentration doping with trivalent elements such as boron and aluminum, and can be simply referred to as the cathode P+ region. The second metal layer 105 is specifically a front metal layer.

[0053] More specifically, such as Figure 1 The diode shown, through the structural combination of a cathode region 102 (N+) of the first conductivity type, a drift region 103 (N-) of the first conductivity type, and an anode region 104a (P+) of the second conductivity type, can achieve low resistance conduction under forward bias and high resistance cutoff characteristics under reverse bias.

[0054] With a positive voltage applied to the second metal layer 105 and zero bias applied to the first metal layer 101, majority carriers (holes) in the anode region 104a of the second conductivity type are injected into the drift region 103 of the first conductivity type, and majority carriers (electrons) in the cathode region 102 of the first conductivity type are injected into the drift region 103 of the first conductivity type. Simultaneously, due to the lower doping concentration and higher resistivity of the drift region 103 of the first conductivity type, the holes injected from the anode region 104a of the second conductivity type and the electrons injected from the cathode region 102 of the first conductivity type recombine in the drift region 103 of the first conductivity type, and also accumulate in the drift region, forming a conductivity modulation effect. The conductivity modulation effect significantly increases the carrier concentration in the drift region 103 of the first conductivity type, thereby reducing its resistivity and allowing current to pass through the diode more easily. At this time, the diode exhibits a low-resistance conducting state, allowing a large current to pass through.

[0055] When the second metal layer 105 is at zero bias and the first metal layer 101 is positively voltaged, the non-equilibrium carriers injected into the drift region 103 of the first conductivity type are subjected to the action of the electric field. Holes flow back to the anode region 104a of the second conductivity type and electrons flow back to the cathode region 102 of the first conductivity type, thereby forming a depletion layer in the drift region 103 of the first conductivity type. Due to its low doping concentration and high resistivity, the drift region 103 of the first conductivity type becomes the main voltage-bearing region. The width of the depletion layer will expand with the increase of the reverse voltage until it reaches an equilibrium state. At this time, the diode exhibits a high-resistance off state, and almost no current is allowed to pass through.

[0056] As can be seen from the two states of the diode described above, when the diode switches between the two states, the switching speed is affected by the recombination and extraction speed of the carriers in the drift region 103 of the first conductivity type. In particular, when the diode switches from the conducting state to the turning-off state, the non-equilibrium carriers accumulated in the drift region 103 of the first conductivity type need to be removed before the diode can switch to the turning-off state. The removal of these non-equilibrium carriers forms a reverse recovery current. When the reverse recovery current is large, it will prolong the time required for the diode to turn off and increase the turn-off loss of the diode, which will greatly affect the switching characteristics of the diode and is not conducive to the use and promotion of the diode in high-frequency scenarios.

[0057] In existing technologies, there are two main methods to reduce reverse recovery current. One method is to irradiate the device with electrons to control its global lifetime. This method can precisely control the concentration of recombination centers, thereby reducing carrier lifetime, but it suffers from poor high-temperature stability and high leakage current. The other method is to use heavy metal diffusion, such as Pt, to control carrier lifetime and thus reduce reverse recovery current. This method has the advantages of good high-temperature stability and low leakage current, but it is prone to causing a negative temperature coefficient, leading to a decrease in dynamic durability.

[0058] It can be seen that existing methods for reducing reverse recovery current each have their shortcomings. Therefore, this application provides a diode and its fabrication method, which can effectively reduce the reverse recovery current of the diode to improve its switching characteristics. The technical solution of this application will be described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0059] Figure 2 This application provides a schematic diagram of the structure of a diode, taking an FRD as an example. Figure 2 The diode shown comprises, in sequence, a first metal layer 101, a cathode region 102, a drift region 103, an anode region 104a, and a second metal layer 105. The cathode region 102 and the drift region 103 have the same conductivity type, referred to as the first conductivity type cathode region 102 and drift region 103. The anode region 104a has a different conductivity type than the cathode region 102, referred to as the second conductivity type anode region 104a. Specifically, the first conductivity type can be N-type, and the second conductivity type can be P-type.

[0060] Furthermore, in the diode provided in this application, the anode region 104a of the second conductivity type of the diode includes a defect structure, wherein the defect structure can be used to reduce the injection efficiency of holes in the anode region 104a of the second conductivity type to the drift region 103 of the first conductivity type when the diode is in the conducting state, thereby reducing the number of holes injected into the drift region 103 of the first conductivity type.

[0061] For example, as Figure 2 The diode shown is an example of a structure consisting of a cathode region 102 (N+) of the first conductivity type, a drift region 103 (N-) of the first conductivity type, and an anode region 104a (P+) of the second conductivity type.

[0062] With a positive voltage applied to the second metal layer 105 and zero bias applied to the first metal layer 101, majority carriers (holes) in the anode region 104a of the second conductivity type are injected into the drift region 103 of the first conductivity type, and majority carriers (electrons) in the cathode region 102 of the first conductivity type are injected into the drift region 103 of the first conductivity type. Simultaneously, the presence of the defect layer 104b prevents some holes in the anode region 104a of the second conductivity type from being injected into the drift region 103 of the first conductivity type. Because the doping concentration of the drift region 103 of the first conductivity type is low, its resistivity is high. Holes injected into the anode region 104a of the second conductivity type and electrons injected into the cathode region 102 of the first conductivity type will recombine in the drift region 103 of the first conductivity type, forming a conductivity modulation effect. Although the defect layer 104b prevents some holes from being injected into the drift region 103 of the first conductivity type, this reduction does not affect the formation of the conductivity modulation effect. The conductivity modulation effect significantly increases the carrier concentration in the drift region 103 of the first conductivity type, thereby reducing its resistivity and allowing current to pass through the diode more easily. At this time, the diode exhibits a low-resistance conducting state, allowing large currents to pass through.

[0063] With the second metal layer 105 at zero bias and the first metal layer 101 under positive voltage, the non-equilibrium carriers injected into the drift region 103 of the first conductivity type are, under the influence of the electric field, causing holes to flow back to the anode region 104a of the second conductivity type and electrons to flow back to the cathode region 102 of the first conductivity type, thus forming a depletion layer in the drift region 103 of the first conductivity type. Due to the presence of the defect layer 104b, some holes in the anode region 104a of the second conductivity type are prevented from being injected into the drift region 103 of the first conductivity type. Therefore, during the hole return process, the number of holes flowing back to the anode region 104a of the second conductivity type is also relatively small. When the number of holes is small, the reverse recovery current is small. Alternatively, the drift region 103 of the first conductivity type, due to its low doping concentration and high resistivity, becomes the main voltage-bearing region. The width of the depletion layer expands with the increase of the reverse voltage until it reaches an equilibrium state. At this point, the diode exhibits a high-resistance off state, and almost no current can pass through.

[0064] Therefore, during the switching process from the on-state to the off-state of the diode provided in this application, the number of holes flowing back from the drift region 103 to the anode region 104a is reduced, enabling the non-equilibrium carriers accumulated in the drift region 103 to be removed more quickly. By reducing the hole injection efficiency, the lifetime of the carriers is reduced, thus reducing the reverse recovery current formed when these non-equilibrium carriers are removed. This, in turn, reduces the time required for the diode to switch from the on-state to the off-state, reduces the switching losses of the diode, optimizes the reverse recovery characteristics of the diode, and improves the switching characteristics of the diode, which is more conducive to the use and promotion of the diode in high-frequency scenarios.

[0065] In one specific implementation, refer to Figure 2 In the illustrated embodiment, the defect structure within the anode region 104a of the second conductivity type of the diode specifically includes a defect layer 104b, or a defect interface, etc. The defect layer specifically refers to the portion within the anode region 104a of the second conductivity type where the atomic arrangement deviates from the ideal periodicity, which can be caused by crystal growth defects, impurity aggregation, etc.

[0066] For example, in one embodiment, a layer of defects is formed in the anode region 104a of the second conductivity type of the diode along the cell axis. Specifically, lattice dislocations can be introduced to introduce defects. These defects can act as recombination centers, reducing carrier lifetime and thus reducing reverse recovery current. The formed defects are as follows: Figure 2 The defect layer 104b is shown. Compared with other existing structures used to reduce reverse recovery current, this method eliminates the need for electron irradiation or hydrogen / helium injection to achieve local lifetime control, greatly reducing production costs and facilitating the mass production of diodes.

[0067] It is understandable that the atomic arrangement of the other parts of the anode region 104a of the second conductivity type, excluding the defect layer 104b, does not deviate from the ideal periodicity.

[0068] In one embodiment, the number of defect layers 104b can be one or more. Figure 2 In the example shown, a defect layer 104b is used as an example. The defect layer 104b is specifically disposed within the anode region 104a and is parallel to the plane in which the anode region 104a is located.

[0069] As can be seen, the diode provided in this embodiment introduces a defect layer 104b within the anode region 104a of the second conductivity type of the diode. Compared with the prior art's method of reducing reverse recovery current through electron irradiation or heavy metal diffusion, the process and cost are simpler and the implementation is more efficient. This allows for a better reduction of the diode's reverse recovery current. This structure enables the introduction of lattice dislocations in the cell structure and the introduction of defects within the anode region 104a of the second conductivity type to form recombination centers without affecting the diode's withstand voltage or other parameters. This effectively reduces the diode's reverse recovery current, lowers its switching losses, and improves its switching characteristics.

[0070] In one embodiment, such as Figure 2 The position of the defect interface in the cellular structure of the defect layer 104b shown can be adjusted according to the depletion layer position during the actual breakdown voltage of the device. In a specific implementation, the defect layer 104b is specifically located within the anode region 104a of the second conductivity type, biased towards the offset region 103 of the first conductivity type, i.e. Figure 2 The lower-middle position within the anode region 104a of the second conductivity type can more effectively block holes in more areas of the anode region 104a of the second conductivity type, preventing more holes from being injected into the drift region 103 of the first conductivity type, thereby improving the reduction effect on reverse recovery current.

[0071] In one embodiment, the projection of the defect layer 104b onto the plane can cover the entire anode region 104a, that is, the projected area of ​​the defect layer 104b and the anode region 104a is the same. Alternatively, in another embodiment, the projection of the defect layer 104b onto the plane can only cover a portion of the entire anode region 104, in which case the portion of the defect layer 104b that does not cover the plane containing the anode region 104a can still be the anode region 104a.

[0072] It is understandable that, such as Figure 2 The thickness of the defect layer 102b shown is less than the thickness of the anode region 104a of the second conductivity type. In one embodiment, such as Figure 2The thickness of the defect layer 104b shown ranges from 0.1 to 0.3 μm. In one embodiment, the thickness of the defect layer 104b is negatively correlated with the reverse recovery current. For example, the smaller the thickness of the defect layer 104b, the worse the effect of blocking holes in the anode region 104a of the second conductivity type, and the larger the reverse recovery current; conversely, the larger the thickness of the defect layer 104b, the better the effect of blocking holes in the anode region 104a of the second conductivity type, and the smaller the reverse recovery current. The thickness of the defect layer 104b can be set according to engineering needs and the requirements of the diode, thereby enabling the diode to more flexibly meet the needs of more different application scenarios, which is more conducive to the use and promotion of the diode.

[0073] In one embodiment, the defect layer 104b in the diode provided in this application includes a metallic impurity 104c.

[0074] For example, Figure 3 A schematic diagram of the structure of a diode provided in this application is shown below. Figure 3 The diode shown comprises, in sequence, a first metal layer 101, a cathode region 102, a drift region 103, an anode region 104a, and a second metal layer 105. Among these, in... Figure 2 Based on the diode shown, the defect layer 104b is specifically a metal impurity layer 104c, thereby forming a structure as shown. Figure 3 The metal impurity layer 104c within the anode region 104a of the second conductivity type in the diode shown.

[0075] In one specific implementation, a metal impurity layer can be sputtered on the back side of the N-type silicon substrate or the front side of the P-type epitaxial layer, causing the metal impurities to accumulate at the defect layer 104b, thereby forming a layer such as... Figure 3 The metal impurity layer 104c shown is illustrated.

[0076] The diode provided in this embodiment includes a metal impurity layer 104c in the anode region 104a of the second conductivity type, which can further enhance the control of the defect layer 104b on the hole injection efficiency in the anode region 104a of the second conductivity type of the diode, thereby more effectively improving the reduction effect on reverse recovery current.

[0077] In one embodiment, such as Figure 3 The metallic impurities shown can be Au or Pt, etc., in the 104C diode, and can be set and adjusted according to the engineering requirements and usage needs of the diode.

[0078] In addition, in such Figure 2 and Figure 3In the illustrated embodiment, taking the anode region 104a of the diode as an example, it is shown that a defect layer 104b or a metal impurity layer 104c is disposed within it. In other embodiments, the diode may also include multiple defect layers 104b, or multiple metal impurity layers 104c, or the diode may simultaneously include at least one 104b and at least one metal impurity layer 104c. In one embodiment, the multiple defect layers 104b are spaced apart, and the planes containing the multiple defect layers 104b are parallel.

[0079] The number of defect layers 104b and the number of metal impurity layers 104c are negatively correlated with the reverse recovery current. For example, the fewer the number of defect layers 104b or metal impurity layers 104c, the worse the blocking effect on holes in the anode region 104a of the second conductivity type, and the larger the reverse recovery current. Conversely, the more the number of defect layers 104b or metal impurity layers 104c, the better the blocking effect on holes in the anode region 104a of the second conductivity type, and the smaller the reverse recovery current. The number of defect layers 104b or metal impurity layers 104c can be set according to engineering needs and diode usage requirements, allowing the diode to more flexibly meet the needs of more diverse application scenarios, thus facilitating its use and promotion.

[0080] This application also provides a method for fabricating a diode, which can be used to manufacture the diode provided in the foregoing embodiments of this application. Specifically, one embodiment of this application provides a method for fabricating a diode including:

[0081] S1: Provides a substrate to form a cathode region 102;

[0082] S2: A drift region 103 is formed on the front side of the cathode region 102;

[0083] S3: An anode region 104a is formed on the front side of the drift region 103, and a defect structure is formed in the anode region 104a. The defect structure is used to reduce the injection efficiency of the anode region 104a when the diode is in the conducting state, thereby reducing the reverse recovery current during the process of the diode switching from the conducting state to the turning-off state.

[0084] More specifically, based on the above preparation method, the formation of an anode region 104a on the front side of the drift region 103 in S3, and the formation of a defect structure within the anode region 104a, specifically includes:

[0085] S31: On the back side of the defect layer 104b, a portion of the cathode region 104a corresponding to one side of the defect layer 104b is formed. Figure 2Taking the structure shown as an example, when a defect layer 104b is formed, a portion of the cathode region 104a corresponding to the lower side of the defect layer 104b is first formed on the front side of the drift region 103 and the back side of the defect layer 104b.

[0086] S32: Form the defect layer 104b.

[0087] S33: On the front side of the defect layer 104b, another portion of the cathode region 104a corresponding to the other side of the defect layer 104b is formed. Figure 2 Taking the structure shown as an example, on the front side of the defect layer 104b, another part of the cathode region 104a corresponding to the upper side of the defect layer 104b is formed.

[0088] In one embodiment, the defect layer 104b is specifically disposed within the anode region 104a of the second conductivity type, at a position biased towards the offset region 103 of the first conductivity type. Then, the thickness of a portion of the cathode region 104a corresponding to one side of the defect layer 104b is greater than the thickness of another portion of the cathode region 104a corresponding to the other side of the defect layer 104b.

[0089] More specifically, based on the above-described fabrication method, this application also provides a specific implementation of a diode fabrication method, comprising the following steps:

[0090] S101: A substrate of the first conductivity type, serving as a cathode region 102 of the first conductivity type. For example, an N+ type silicon substrate is provided.

[0091] S102: A drift region 103 of the first conductivity type is formed on the front side of the cathode region 102 of the first conductivity type. For example, the N-type epitaxial layer is grown on the front side of the N+ type silicon substrate to form a drift region 103 of the first conductivity type. Figure 4 The structure shown.

[0092] S103: A second conductivity type anode region 104a is formed on the front side of the drift region 103 of the first conductivity type. For example, the P+ type epitaxial layer is grown on the front side of the N- epitaxial layer, and the formed P+ type epitaxial layer includes a defect layer 104b, forming a structure such as... Figure 5 The structure shown.

[0093] S104: A second metal layer 105 is formed on the front side of the anode region 104a of the second conductivity type. For example, a front metal layer is sputtered from the front side of a P+ type epitaxial layer to form a layer such as... Figure 6 The structure shown.

[0094] S105: Flip the silicon wafer to form a first metal layer 101 on the back side of the cathode region 102 of the first conductivity type, completing the fabrication of the diode's cell structure, forming a structure as shown in the image. Figure 2 The structure shown.

[0095] Combination Figure 2 The diode structure shown, prepared by the method provided in this embodiment, reduces the number of holes flowing from the drift region 103 of the first conductivity type back to the anode region 104a of the second conductivity type during the switching from the on state to the off state. This allows the non-equilibrium carriers accumulated in the drift region 103 of the first conductivity type to be removed more quickly. By reducing the hole injection efficiency, the lifetime of the carriers is reduced, thus reducing the reverse recovery current formed when these non-equilibrium carriers are removed. This, in turn, reduces the time required for the diode to switch from the on state to the off state, reduces the switching loss of the diode, optimizes the reverse recovery characteristics of the diode, and improves the switching characteristics of the diode. This is more conducive to the use and promotion of the diode in high-frequency scenarios.

[0096] The above-described S101-S105 provided in this application provides a method for preparing such as Figure 2 The method for fabricating diodes shown is applicable to, for example, Figure 3 The method for fabricating the diode shown includes:

[0097] S201: Provide a substrate of a first conductivity type as a cathode region 102 of the first conductivity type. For example, provide an N+ type silicon substrate.

[0098] S202: A drift region 103 of the first conductivity type is formed on the front side of the cathode region 102 of the first conductivity type. For example, the N-type epitaxial layer is grown on the front side of the N+ type silicon substrate to form a drift region 103 of the first conductivity type. Figure 4 The structure shown.

[0099] S203: A second conductivity type anode region 104a is formed on the front side of the drift region 103 of the first conductivity type. For example, the P+ type epitaxial layer is grown on the front side of the N- epitaxial layer, and the formed P+ type epitaxial layer includes a defect layer 104b, forming a structure as described above. Figure 5 The structure shown.

[0100] S204: On the back side of the cathode region (102) of the first conductivity type, or on the front side of the anode region (104a) of the second conductivity type, a metal impurity is sputtered to form a metal impurity layer 104c. For example, a metal impurity layer, such as Au or Pt, is sputtered on the back side of the N-type silicon substrate or on the front side of the P-type epitaxial layer, wherein the impurities in the metal layer diffuse and are non-uniformly distributed in the axial direction, forming a layer such as... Figure 3 The metal impurity layer 104c shown is illustrated.

[0101] S205: A second metal layer 105 is formed on the front side of the anode region 104a of the second conductivity type. For example, a front metal layer is sputtered on the front side of a P+ type epitaxial layer.

[0102] S206: Flip the silicon wafer to form a first metal layer 101 on the back side of the cathode region 102 of the first conductivity type, completing the fabrication of the diode's cell structure, forming a structure as shown in the image. Figure 3 The structure shown.

[0103] Combination Figure 3 The diode structure shown, prepared by the method provided in this embodiment, can further enhance the control of hole injection efficiency in the anode region 104a of the second conductivity type of the diode by the defect layer 104b during the switching from the on state to the off state. This more effectively improves the reduction effect on reverse recovery current, allowing the non-equilibrium carriers accumulated in the drift region 103 of the first conductivity type to be removed more quickly. By reducing the hole injection efficiency, the lifetime of the carriers is reduced, thus reducing the reverse recovery current formed when these non-equilibrium carriers are removed. This reduces the time required for the diode to switch from the on state to the off state, reduces the switching loss of the diode, optimizes the reverse recovery characteristics of the diode, and improves the switching characteristics of the diode, making it more conducive to the use and promotion of the diode in high-frequency scenarios.

[0104] More specifically, for the N+ conductivity type cathode region, the N- conductivity type drift region, and the P+ conductivity type anode region, this application also provides a specific implementation of a diode fabrication method, including the following steps: providing an N-type conductivity type substrate to fabricate the cathode N+ region; fabricating the N- drift region; fabricating the anode P+ region; fabricating a defect layer; continuing to fabricate the anode P+ region; fabricating the front metal; flipping the silicon wafer to fabricate the back metal.

[0105] It should be specifically noted that this process step is only one method for realizing the structure of this patent, and is not intended to limit the method of realizing this structure. The above method for realizing the structure of this invention is only for explaining this structure and is not intended to limit this patent. Furthermore, the order of the process steps in the patent can be changed according to the specific process. All manufacturing methods that can form the structure of this patent are within the protection scope of this patent.

[0106] This application also provides a chip that includes the diode provided in the foregoing embodiments of this application, or includes a diode fabricated using a diode fabrication method. In practical applications, this chip is used in multiple fields such as new energy vehicles, smart home appliances, rail transportation, and aerospace.

[0107] This application also provides an electronic device, including the chip provided in the embodiments of this application.

[0108] Those skilled in the art will understand that all or part of the steps in the above-described embodiments of diode fabrication methods can be implemented using hardware related to program instructions. The aforementioned program can be stored in a computer-readable storage medium. When executed, the program performs the steps of the above-described method embodiments; and the aforementioned storage medium includes various media capable of storing program code, such as ROM, RAM, magnetic disks, or optical disks.

[0109] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A diode, characterized by, Comprising: an anode region (104a), a drift region (103) and a cathode region (102); a defect structure is included in the anode region (104a), which is used to reduce the injection efficiency of the anode region (104a) when the diode is in the on state, thereby reducing the reverse recovery current during the switching process from the on state to the off state.

2. The diode according to claim 1, wherein the defect structure includes at least one defect layer (104b) disposed in the anode region (104a) and parallel to the plane where the anode region (104a) is located.

3. The diode according to claim 2, wherein the projection of the defect layer (104b) on the plane covers the entire anode region (104a); or the projection of the defect layer (104b) on the plane covers part of the anode region (104a).

4. The diode according to claim 2, wherein the defect layer (104b) is disposed in the anode region (104a) and is biased towards the location of the drift region (103).

5. The diode according to claim 2, wherein the thickness of the defect layer (104b) ranges from 0.1 to 0.3 μm.

6. The diode according to claim 2, wherein the thickness of the defect layer (104b) is negatively correlated with the current value of the reverse recovery current.

7. The diode according to any one of claims 2-6, wherein the defect layer (104b) includes a metal impurity layer (104c).

8. The diode according to claim 7, wherein the metal impurity in the metal impurity layer (104c) includes Au or Pt.

9. The diode according to claim 2, wherein the defect structure specifically includes a plurality of defect layers (104b) disposed at intervals and parallel to the plane.

10. The diode according to claim 8, wherein the number of the defect layers (104b) is negatively correlated with the current value of the reverse recovery current. Further comprising:

11. The diode of claim 1, wherein a first metal layer (101) disposed on the back of the cathode region (102); a second metal layer (105) disposed on the front of the anode region (104a).

12. The diode according to claim 1, wherein the cathode region (102) is an N-type heavily doped region; the drift region (103) is an N-type lightly doped region; the anode region (104a) is a P-type heavily doped region.

13. The diode according to claim 1, wherein the cell structure of the diode includes an NPT structure, a PT structure, an SPT structure or an FS structure.

14. The diode according to claim 1, wherein the semiconductor material of the diode includes Si, SiC, GaAs or GaN. Comprising:

15. A method of manufacturing a diode, characterized by, providing a substrate, forming a cathode region (102); ​ a drift region (103) is formed on the front surface of the cathode region (102); an anode region (104a) is formed on the front surface of the drift region (103), and a defect structure is formed in the anode region (104a), the defect structure being used to reduce the injection efficiency of the anode region (104a) when the diode is in the on state, thereby reducing the reverse recovery current during the switching of the diode from the on state to the off state.

16. The method of claim 15, wherein the diode is formed by a process comprising: The defect structure includes at least one defect layer (104b), and the forming of the anode region (104a) on the front surface of the drift region (103) and the forming of the defect structure in the anode region (104a) include: on the back surface of the defect layer (104b), a part of the cathode region (104a) corresponding to one side of the defect layer (104b) is formed; the defect layer (104b) is formed; on the front surface of the defect layer (104b), another part of the cathode region (104a) corresponding to the other side of the defect layer (104b) is formed.

17. The method according to claim 16, wherein the thickness of the part of the cathode region (104a) corresponding to one side of the defect layer (104b) is greater than the thickness of the other part of the cathode region (104a) corresponding to the other side of the defect layer (104b).

18. The method according to claim 16, wherein the thickness of the defect layer (104b) ranges from 0.1 to 0.3 μm.

19. The method according to claim 16, wherein the thickness of the defect layer (104b) is negatively related to the current value of the reverse recovery current.

20. The method according to any one of claims 16-19, wherein the defect layer (104b) includes a metal impurity layer (104c).

21. The method of claim 20, wherein the diode is prepared by a method comprising: The method further includes, after the forming of the defect layer (104b): sputtering metal impurities on the back surface of the cathode region (102) or the front surface of the anode region (104a) to form a metal impurity layer (104c).

22. The method according to claim 21, wherein the metal impurities in the metal impurity layer (104c) include Au or Pt.

23. The method for fabricating a diode according to claim 16, characterized in that, The defect structure specifically includes a plurality of defect layers (104b), the plurality of defect layers (104b) are arranged at intervals, and the planes where the plurality of defect layers (104b) are located are parallel.

24. The method according to claim 23, wherein the number of the defect layers (104b) is negatively related to the current value of the reverse recovery current.

25. The method of claim 15, wherein the diode is a PIN diode. The method further includes: forming a second metal layer (105) on the front surface of the anode region (104a); forming a first metal layer (101) on the back surface of the cathode region (102).

26. The method according to claim 15, wherein the cathode region (102) is an N-type heavily doped region; the drift region (103) is an N-type lightly doped region; the anode region (104a) is a P-type heavily doped region.

27. The method of claim 15, wherein: the cell structure of the diode comprises an NPT structure, a PT structure, an SPT structure, or an FS structure.

28. The method of claim 15, wherein: the semiconductor material of the diode comprises Si, SiC, GaAs, or GaN.

29. A chip, characterized by a diode as claimed in any one of claims 1 to 14.

30. An electronic device, comprising: a chip as claimed in claim 29.