Fault determination circuit and method, detection device, electronic apparatus, and moving object

Abstract

The invention provides a failure determination circuit and method, a detection device, an electronic apparatus, and a moving object. The failure determination circuit can perform failure determination of an analog-to-digital converter without stopping operation of the analog-to-digital converter which continuously receives analog voltage signals and converts the analog voltage signals into digital voltage signals. The failure determination circuit includes: a first conversion unit that continuously performs A / D conversion on a first analog signal based on a first physical quantity detection signal; a switching unit into which a plurality of signals including a first reference voltage and a second analog signal based on the first physical quantity detection signal are input, and which outputs the signals in a time division manner; a second conversion unit for A / D converting the output of the switching unit; and a comparison determination unit that performs a failure determination of the first conversion unit on the basis of a signal based on a first digital signal obtained by A / D converting the first analog signal by the first conversion unit and a signal based on a second digital signal obtained by A / D converting the second analog signal by the second conversion unit.

Description

[0001] This invention patent application is a divisional application of the invention patent application entitled "Fault Judgment Circuit and Method, Detection Device, Electronic Equipment, Mobile Body", filed on March 7, 2018, with application number "201810187467.X". Technical Field

[0002] This invention relates to fault determination circuits, physical quantity detection devices, electronic devices, moving bodies, and fault determination methods. Background Technology

[0003] Analog-to-digital converters (ADCs), which receive analog voltage signals and convert them into digital voltage signals, are used in most semiconductor components and are installed in various electronic devices. Furthermore, Δ-Σ type ADCs are sometimes used as high-precision ADCs.

[0004] For example, Patent Document 1 discloses a technology related to a Σ-Δ analog-to-digital converter (also called a Δ-Σ analog-to-digital converter) that is an analog-to-digital converter and performs analog-to-digital conversion at high resolution.

[0005] Patent Document 1: Japanese Patent Application Publication No. 7-058639

[0006] However, since the Δ-Σ analog-to-digital converter continuously receives analog voltage signals and converts them into digital voltage signals, it is difficult to diagnose the fault of the Δ-Σ analog-to-digital converter, for example, when it is installed in an electronic device and in operation. Summary of the Invention

[0007] The present invention was made in view of the problems mentioned above. According to several aspects of the present invention, a fault determination circuit and a fault determination method are provided that can determine the fault of an analog-to-digital converter without stopping the operation of the analog-to-digital converter that continuously receives analog voltage signals and converts them into digital voltage signals, as well as a physical quantity detection device, electronic device and mobile body using the fault determination circuit.

[0008] The present invention was made to solve at least a part of the above-mentioned problems and can be implemented in the following manner or by the following application example.

[0009] [Application Example 1]

[0010] The fault determination circuit of this application example includes: a first conversion unit that continuously performs A / D conversion on a first analog signal based on a first physical quantity detection signal; a switching unit that takes in multiple signals, including a first reference voltage and a second analog signal based on the first physical quantity detection signal, and outputs these signals in a time-division manner; a second conversion unit that performs A / D conversion on the output of the switching unit; and a comparison determination unit that determines the fault of the first conversion unit based on a signal based on a first digital signal and a signal based on a second digital signal, wherein the first digital signal is obtained by the first conversion unit performing A / D conversion on the first analog signal, and the second digital signal is obtained by the second conversion unit performing A / D conversion on the second analog signal.

[0011] "Continuously" means "continuous" and "substantially continuous," such as "continuing the action after a rest period that is sufficiently short relative to the duration of the action."

[0012] According to the fault determination circuit of this application example, the first conversion unit performs A / D conversion on the first analog signal based on the first physical quantity detection signal to generate a first digital signal, and the second conversion unit performs A / D conversion on the second analog signal based on the first physical quantity to generate a second digital signal. That is, the first digital signal and the second digital signal are equivalent signals based on the first physical quantity detection signal. Then, the first digital signal and the second digital signal are compared in the comparison determination unit. Since the first digital signal and the second digital signal are equivalent signals, the comparison determination unit can determine whether the conversion results of the first conversion unit and the second conversion unit are accurate by performing a comparison, such as detecting the difference between the first digital signal and the second digital signal. Therefore, fault determination of the first conversion unit can be performed without stopping the operation of the continuously operating first conversion unit.

[0013] [Application Example 2]

[0014] In the fault determination circuit of the above application example, the fault determination circuit may also have a self-determination unit, which determines the fault of the second conversion unit based on the signal obtained by the second conversion unit performing A / D conversion on the first reference voltage.

[0015] According to the fault determination circuit of this application example, the second conversion unit performs A / D conversion on the first reference voltage. The first reference voltage is a known voltage that serves as a reference for the fault determination circuit. That is, the expected value of the digital signal obtained by the second conversion unit through A / D conversion of the first reference voltage is known. The self-determination unit can determine the fault of the second conversion unit by comparing the expected value of the digital signal obtained by the second conversion unit through A / D conversion with the measured value of the digital signal obtained by the second conversion unit through A / D conversion of the first reference voltage.

[0016] Furthermore, according to the fault determination circuit of this application example, the fault determination of the second conversion unit is performed based on the first reference voltage. Therefore, the second digital signal input to the comparison determination unit is a signal obtained from a normal conversion. Thus, the comparison determination unit can accurately determine the fault of the first conversion unit by comparing the first and second digital signals. Therefore, the accuracy of fault determination of the first conversion unit can be improved without stopping the operation of the continuously operating first conversion unit.

[0017] [Application Example 3]

[0018] In the fault determination circuit of the above application example, the switching unit may also be input with a second reference voltage, and the self-determination unit may determine the fault of the second conversion unit based on the signal obtained by the second conversion unit performing A / D conversion on the second reference voltage.

[0019] According to the fault determination circuit of this application example, the second conversion unit performs A / D conversion on the second reference voltage. The second reference voltage, in the fault determination circuit, is a voltage that serves as a reference, different from the first reference voltage, and is a known voltage. That is, the expected value of the digital signal obtained by the second conversion unit through A / D conversion of the second reference voltage is known. The self-determination unit can determine the fault determination of the second conversion unit by comparing the expected value of the digital signal obtained by the second conversion unit through A / D conversion with the measured value of the digital signal obtained by the second conversion unit through A / D conversion of the second reference voltage.

[0020] Furthermore, according to the fault determination circuit of this application example, in addition to the first reference voltage, a second reference voltage is also provided for fault determination of the second converter, thereby further improving the accuracy of fault determination of the second converter. As a result, the comparison determination unit can determine the fault of the first converter with greater accuracy. Therefore, the accuracy of fault determination of the first converter can be further improved without stopping the operation of the continuously operating first converter.

[0021] [Application Example 4]

[0022] In the fault determination circuit of the above application example, the switching unit may also be input with a second physical quantity detection signal.

[0023] According to the fault determination circuit of this application example, a second physical quantity detection signal can also be input to the switching unit. Therefore, the second conversion unit can also be used to perform A / D conversion of other physical quantity detection signals, enabling miniaturization of the fault determination circuit and the device equipped with the fault determination circuit.

[0024] [Application Example 5]

[0025] In the fault determination circuit of the above application example, the fault determination circuit may also include a correction unit, wherein the second physical quantity detection signal is a temperature-based signal, and the correction unit corrects the first digital signal according to a third digital signal obtained by the second conversion unit through A / D conversion of the second physical quantity detection signal.

[0026] According to the fault determination circuit of this application example, the second physical quantity detection signal can also be a temperature-based signal. Furthermore, the correction unit uses the temperature-based third digital signal output from the second conversion unit to correct the first digital signal; therefore, the signal output from the correction unit becomes a signal that takes temperature characteristics into account. This improves the accuracy of the signal output from the fault determination circuit.

[0027] [Application Example 6]

[0028] In the fault determination circuit of the above application example, the sampling rate of the first conversion unit may be greater than the sampling rate of the second conversion unit.

[0029] [Application Example 7]

[0030] In the fault determination circuit of the above application example, the resolution of the first conversion unit may be higher than the resolution of the second conversion unit.

[0031] In the fault determination circuits of these application examples, it is preferable that at least one of the sampling rate and resolution of the first conversion unit is greater than that of the second conversion unit. By increasing the resolution and sampling rate of the first conversion unit, which performs continuous A / D conversion, the accuracy of the A / D conversion can be improved. On the other hand, by reducing the resolution and sampling rate of the second conversion unit, which performs A / D conversion in a time-division manner, the fault determination circuit can be miniaturized, and the current consumption of the fault determination circuit can be reduced.

[0032] [Application Example 8]

[0033] In the fault determination circuit of the above application example, the switching unit may also be input with a selection signal, and the switching unit may select and output any signal from the input signals, including the second analog signal and the first reference voltage, according to the selection signal.

[0034] According to the fault determination circuit of this application example, the switching unit can arbitrarily set the period, frequency, time, etc. of the multiple signals, including the second analog signal and the first reference voltage, that are output. Therefore, the fault determination circuit can easily change the fault determination of the first converter, the fault determination of the second converter, and the A / D conversion period of other multiple signals, thus realizing a highly versatile fault determination circuit.

[0035] [Application Example 9]

[0036] In the fault determination circuit of the above application example, the fault determination circuit may also include a third conversion unit that continuously performs A / D conversion on a third analog signal based on a third physical quantity detection signal. The switching unit also inputs a fourth analog signal based on the third physical quantity detection signal. The comparison determination unit compares the signal based on the fourth digital signal and the signal based on the fifth digital signal to determine the fault of the third conversion unit. The fourth digital signal is obtained by the third conversion unit performing A / D conversion on the third analog signal, and the fifth digital signal is obtained by the second conversion unit performing A / D conversion on the fourth analog signal.

[0037] According to the fault determination circuit of this application example, the fault determination circuit may further include a third conversion unit that continuously performs A / D conversion on a third analog signal based on a third physical quantity detection signal and outputs a fourth digital signal. At this time, the fourth analog signal based on the third physical quantity detection signal is input to the switching unit. That is, the second conversion unit performs A / D conversion on the fourth analog signal in a time-division manner to generate a fifth digital signal. Then, by comparing the fourth digital signal and the fifth digital signal in the comparison determination unit, a fault determination can be performed on the third conversion unit that continuously performs A / D conversion. Therefore, fault determination for both the first and third conversion units can be performed without stopping their continuous operation.

[0038] [Application Example 10]

[0039] The fault determination method of this application example includes a step of fault determination in a fault determination circuit, wherein the fault determination circuit has: a first conversion unit that continuously performs A / D conversion on a first analog signal based on a first physical quantity detection signal; a switching unit that inputs multiple signals including a first reference voltage and a second analog signal based on the first physical quantity detection signal, and outputs these signals in a time-division manner; a second conversion unit that performs A / D conversion on the output of the switching unit; and a comparison determination unit that compares the output signal of the first conversion unit and the output signal of the second conversion unit. In this step, the comparison determination unit compares a signal based on a first digital signal and a signal based on a second digital signal to determine the fault of the first conversion unit. The first digital signal is obtained by the first conversion unit performing A / D conversion on the first analog signal, and the second digital signal is obtained by the second conversion unit performing A / D conversion on the second analog signal.

[0040] According to the fault determination method of this application example, a first conversion unit performs A / D conversion on a first analog signal based on a first physical quantity detection signal to generate a first digital signal, and a second conversion unit performs A / D conversion on a second analog signal based on the first physical quantity detection signal to generate a second digital signal. That is, the first digital signal and the second digital signal are equivalent signals based on the first physical quantity detection signal. Then, the first digital signal and the second digital signal are compared in a comparison determination unit. Since the first digital signal and the second digital signal are equivalent signals, the comparison determination unit can determine whether the conversion results of the first conversion unit and the second conversion unit are accurate by performing comparisons such as detecting the difference between the first digital signal and the second digital signal. Therefore, fault determination of the first conversion unit can be performed without stopping the operation of the continuously operating first conversion unit.

[0041] [Application Example 11]

[0042] The physical quantity detection device in this application example has a fault determination circuit in any of the above application examples.

[0043] According to the physical quantity detection device of this application example, since the fault determination of the first conversion unit can be performed without stopping the operation of the first conversion unit that can continuously acquire physical quantities, a highly reliable physical quantity detection device can be realized.

[0044] [Application Example 12]

[0045] The electronic device in this application example has the physical quantity detection device described in the above application example.

[0046] [Application Example 13]

[0047] The moving body in this application example has the physical quantity detection device described in the above application example.

[0048] Based on these application examples, since a highly reliable physical quantity detection circuit is used that can determine the fault of the first converter without stopping the operation of the first converter that can continuously acquire physical quantities, it is also possible to realize, for example, highly reliable electronic devices and mobile bodies. Attached Figure Description

[0049] Figure 1 This is a diagram showing a structural example of the physical quantity detection device according to the first embodiment.

[0050] Figure 2 This is a top view showing the vibrating plate of the physical quantity detection element according to the first embodiment.

[0051] Figure 3 This is a diagram used to explain the operation of the physical quantity detection element in the first embodiment.

[0052] Figure 4 This is a diagram used to explain the operation of the physical quantity detection element in the first embodiment.

[0053] Figure 5 This is a diagram showing the structure of the drive circuit according to the first embodiment.

[0054] Figure 6 This is a diagram showing the structure of the detection circuit according to the first embodiment.

[0055] Figure 7 This is a diagram showing the structure of the physical quantity processing circuit of the first embodiment.

[0056] Figure 8 This is a flowchart illustrating the fault determination method of the first embodiment.

[0057] Figure 9 This is a flowchart illustrating the fault determination method of the first embodiment.

[0058] Figure 10 This is a flowchart illustrating the fault determination method of the first embodiment.

[0059] Figure 11 This is a diagram showing a structural example of the physical quantity detection device according to the second embodiment.

[0060] Figure 12 This is a diagram showing the structure of the physical quantity processing circuit of the second embodiment.

[0061] Figure 13 This is a schematic diagram illustrating the electronic device of this embodiment.

[0062] Figure 14This is a schematic diagram illustrating the electronic device of this embodiment.

[0063] Figure 15 This is a schematic diagram illustrating the movable body of this embodiment.

[0064] Label Explanation

[0065] 1: Physical quantity detection device; 3: MCU; 10: Reference voltage circuit; 20: Drive circuit; 30: Detection circuit; 40: Physical quantity processing circuit; 41: Digital arithmetic circuit; 42: Interface circuit; 50: DSP; 60: Oscillation circuit; 70: Temperature sensor; 80: Storage unit; 100, 100A, 100B, 100C: Physical quantity detection elements; 101a, 101b: Drive vibrating arm; 102: Detection vibrating arm; 103: Counterweight; 104a, 104b: Drive base; 105a, 10 5b: Connecting arm; 106: Counterweight; 107: Detection base; 112, 113: Driving electrodes; 114, 115: Detection electrodes; 116: Common electrode; 200: Physical quantity detection circuit; 210: Conversion circuit; 220: High-pass filter; 230, 260: Comparators; 240: Full-wave rectifier circuit; 250: Integrator; 310, 320: Charge amplifier; 330: Differential amplifier; 340: High-pass filter; 350: AC amplifier; 360, 361, 362: Synchronous detection circuit; 3 70, 371, 372: Variable gain amplifiers; 380, 381, 382: Switched capacitor filters; 390, 391, 392: Output buffers; 410, 411, 412, 420, 421, 422: A / D conversion circuits; 430: Multiplexer; 440: Voltage generation unit; 450: Switching control unit; 460: Clock generation circuit; 510, 511, 512, 520, 521, 522: Digital filters; 530, 540: Fault determination unit; 550: Digital correction unit; 40 0: Physical quantity detector; 1200: Mobile phone; 1202: Operation button; 1204: Handpiece; 1208: Display unit; 1300: Still digital camera; 1302: Housing (body); 1310: Display unit; 1306: Shutter button; 1304: Receiving unit; 1308: Memory; 1312: Video signal output terminal; 1314: Input / output terminal; 1440: Personal computer; 1430: Television monitor; 1500: Automobile; 1502: Vehicle body; 1504: Electronic control unit. Detailed Implementation

[0066] Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings. Furthermore, the embodiments described below are not intended to unduly limit the scope of the present invention as described in the claims. Also, all structures described below are not necessarily essential structural elements of the present invention.

[0067] Hereinafter, a physical quantity processing device (angular velocity processing device) will be used as an example to describe a device that uses the fault determination circuit of this embodiment.

[0068] 1. Physical quantity detection device

[0069] 1.1 First Implementation Method

[0070] [Structure of the physical quantity detection device]

[0071] Figure 1 This is a diagram showing a structural example of a first embodiment of the physical quantity detection device (angular velocity processing device) 1. In the first embodiment, the physical quantity detection device 1 is configured to include a physical quantity detection element 100 and a physical quantity detection circuit 200. It may also be configured to further include an MCU (Micro Control Unit) 3 that uses data output from the physical quantity detection device 1 to perform various calculations, processing and control.

[0072] The physical quantity detection element 100 includes a vibrating plate with a drive electrode and a detection electrode. Generally, in order to minimize the impedance of the vibrating plate and improve the oscillation efficiency, the vibrating plate is sealed in a hermetically sealed package. In a first embodiment of the physical quantity detection device 1, the physical quantity detection element 100 has a so-called double-T type vibrating plate, which has two drive vibrating arms with a top view shape of T.

[0073] Figure 2 This is a top view of the vibrating plate of the physical quantity detection element 100 according to the first embodiment of the physical quantity detection device 1. The physical quantity detection element 100, for example, has a double-T-shaped vibrating plate formed from a Z-cut quartz substrate. Since the resonant frequency of the vibrating plate made of quartz material varies very little with temperature changes, it has the advantage of improving the detection accuracy of angular velocity. Furthermore, Figure 2 The X, Y, and Z axes in the diagram represent the axes of the quartz crystal.

[0074] like Figure 2As shown, the driving vibrating arm 101a of the vibrating plate of the physical quantity detection element 100 extends from the driving base 104a in the +Y-axis direction and the -Y-axis direction, and the driving vibrating arm 101b extends from the driving base 104b in the +Y-axis direction and the -Y-axis direction. Driving electrodes 112 and 113 are formed on the side and top surfaces of the driving vibrating arm 101a, respectively, and driving electrodes 113 and 112 are formed on the side and top surfaces of the driving vibrating arm 101b, respectively. The driving electrodes 112 and 113 are respectively connected via... Figure 1 The physical quantity detection circuit 200 shown is connected to the drive circuit 20 via its DS and DG terminals.

[0075] The driving base 104a is connected to the rectangular detection base 107 via a connecting arm 105a extending in the -X-axis direction and the +X-axis direction, and the driving base 104b is connected to the rectangular detection base 107 via a connecting arm 105b extending in the -X-axis direction and the +X-axis direction.

[0076] The detection vibrating arm 102 extends from the detection base 107 in the +Y axis direction and the -Y axis direction. Detection electrodes 114 and 115 are formed on the upper surface of the detection vibrating arm 102, and a common electrode 116 is formed on the side surface of the detection vibrating arm 102. The detection electrodes 114 and 115 are respectively connected via... Figure 1 The S1 and S2 terminals of the physical quantity detection circuit 200 shown are connected to the detection circuit 30. Furthermore, the common electrode 116 is grounded.

[0077] When an AC voltage is supplied as a driving signal between the driving electrodes 112 and 113 of the driving vibrating arms 101a and 101b, such as Figure 3 As shown, the driving vibration arms 101a and 101b undergo bending vibration (excitation vibration) as shown by arrow B, due to the inverse piezoelectric effect, with the front ends of the two driving vibration arms 101a and 101b repeatedly approaching and separating from each other.

[0078] In this state, if an angular velocity with the Z-axis as the rotation axis is applied to the vibrating plate of the physical quantity detection element 100, the driving vibrating arms 101a and 101b will acquire Coriolis force in both the bending vibration direction indicated by arrow B and the Z-axis. The result is as follows: Figure 4 As shown, connecting arms 105a and 105b vibrate as indicated by arrow C. Furthermore, the detection vibrating arm 102, in conjunction with the vibration of connecting arms 105a and 105b (arrow C), undergoes bending vibration as indicated by arrow D. The phase of the bending vibration of the detection vibrating arm 102, accompanied by Coriolis force, differs by 90° from the phase of the bending vibration (excitation vibration) of the driving vibrating arms 101a and 101b.

[0079] Furthermore, if the magnitude of the vibration energy or the amplitude of the vibration when the driving vibration arms 101a and 101b undergo bending vibration (excited vibration) is equal in both driving vibration arms 101a and 101b, a balance of vibration energy is achieved in the driving vibration arms 101a and 101b, and the detection vibration arm 102 does not undergo bending vibration when no angular velocity is applied to the physical quantity detection element 100. However, if the balance of vibration energy between the two driving vibration arms 101a and 101b is broken, the detection vibration arm 102 will produce bending vibration even when no angular velocity is applied to the physical quantity detection element 100. This bending vibration is called leakage vibration, and it is the bending vibration of arrow D, similar to the vibration based on Coriolis force, but it is in phase with the driving signal.

[0080] Furthermore, due to the piezoelectric effect, alternating current charges based on these bending vibrations are generated in the detection electrodes 114 and 115 of the detection arm 102. Here, the alternating current charges generated based on the Coriolis force vary depending on the magnitude of the Coriolis force (in other words, the magnitude of the angular velocity applied to the physical quantity detection element 100). On the other hand, the alternating current charges generated based on leakage vibrations are constant and are independent of the magnitude of the angular velocity applied to the physical quantity detection element 100.

[0081] Furthermore, a rectangular counterweight 103 with a width greater than that of the driving vibration arms 101a and 101b is formed at the front end of each driving vibration arm 101a and 101b. By forming the counterweight 103 at the front end of the driving vibration arms 101a and 101b, the Coriolis force can be increased and the desired resonant frequency can be obtained with a relatively short vibration arm. Similarly, a counterweight 106 with a width greater than that of the detection vibration arm 102 is formed at the front end of the detection vibration arm 102. By forming the counterweight 106 at the front end of the detection vibration arm 102, the alternating current charge generated in the detection electrodes 114 and 115 can be increased.

[0082] As described above, the physical quantity detection element 100 uses the Z-axis as the detection axis and outputs the AC charge (angular velocity component) based on the Coriolis force and the AC charge (vibration leakage component) based on the leakage vibration of the excitation vibration via the detection electrodes 114 and 115.

[0083] Return to Figure 1 In the first embodiment of the physical quantity detection device 1, the physical quantity detection circuit 200 is configured to include a reference voltage circuit 10, a drive circuit 20, a detection circuit 30, a physical quantity processing circuit 40, an oscillation circuit 60, a temperature sensor 70, and a storage unit 80, and may be, for example, a single-chip integrated circuit (IC). Alternatively, the physical quantity detection circuit 200 may also employ a structure that omits or modifies some of these elements, or adds other elements.

[0084] The reference voltage circuit 10 generates a constant voltage or constant current, such as a reference voltage (analog ground voltage), based on the power supply voltage provided from the VDD terminal of the physical quantity detection circuit 200, and provides it to the drive circuit 20, the detection circuit 30, and the digital processing circuit 41 included in the physical quantity processing circuit 40. Here, the voltage input to the physical quantity processing circuit 40 is specifically set as the reference voltage VREF.

[0085] The drive circuit 20 generates a drive signal to excite the physical quantity detection element 100 to vibrate, and provides it to the drive electrode 112 of the physical quantity detection element 100 via the DS terminal. Furthermore, the drive circuit 20 receives an oscillating current generated in the drive electrode 113 by the excitation vibration of the physical quantity detection element 100 via the DG terminal. The drive circuit 20 performs feedback control on the amplitude level of the drive signal to keep the amplitude of the oscillating current constant. Additionally, the drive circuit 20 generates a detector signal SDET with the same phase as the drive signal and outputs it to the detection circuit 30.

[0086] The detection circuit 30 receives AC charges (detection currents) generated in the two detection electrodes 114 and 115 of the physical quantity detection element 100 via terminals S1 and S2, respectively. The detection circuit 30 uses the detection signal SDET to detect the angular velocity components contained in these AC charges (detection currents), and generates and outputs signals (angular velocity signals) VAO10 and VAO20 with voltage levels corresponding to the magnitude of the angular velocity components.

[0087] The storage unit 80 has a non-volatile memory (not shown) that stores various adjustment data (adjustment data, correction data, etc.) for the drive circuit 20 and the detection circuit 30. The non-volatile memory can be configured as, for example, a MONOS (Metal Oxide Nitride Oxide Silicon) type memory or an EEPROM (Electrically Erasable Programmable Read-Only Memory). Furthermore, the storage unit 80 can also be configured to have a register (not shown) that, when the power supply to the physical quantity detection circuit 200 is turned on (when the voltage at the VDD terminal rises from 0V to the desired voltage), transfers various adjustment data, processing data, etc., stored in the non-volatile memory to the register and holds it therein, and provides the various adjustment data, processing data, etc., held in the register to the drive circuit 20 and the detection circuit 30.

[0088] Temperature sensor 70 outputs a voltage signal (temperature signal) VTO corresponding to the temperature of its surroundings. This signal can be positive (higher voltage at higher temperatures) or negative (lower voltage at higher temperatures). Temperature sensor 70 can, for example, be a circuit that outputs a voltage proportional to absolute temperature (PTAT).

[0089] The physical quantity processing circuit 40 is configured to include a digital arithmetic circuit 41 and an interface circuit 42.

[0090] The digital operation circuit 41 operates according to the master clock signal MCLK. After converting the voltage levels of the angular velocity signals VAO10 and VAO20 output by the detection circuit 30 into digital values, it performs the prescribed operation to generate digital data (angular velocity data) VDO1 and outputs it to the interface circuit 42.

[0091] Interface circuit 42 receives various instructions sent by MCU 3 and processes them by sending data corresponding to the instructions to MCU 3. Furthermore, interface circuit 42 performs the following processes: reading data stored in storage unit 80 (non-volatile memory or register) according to requests from MCU 3 and outputting it to MCU 3; writing data input from MCU 3 into storage unit 80 (non-volatile memory or register). Interface circuit 42 is, for example, an interface circuit for an SPI (Serial Peripheral Interface) bus. The select signal, clock signal, and data signal sent by MCU 3 are input to interface circuit 42 via the SS terminal, SCLK terminal, and SI terminal of physical quantity detection circuit 200, respectively. Interface circuit 42 outputs the data signal to MCU 3 via the SO terminal of physical quantity detection circuit 200. Alternatively, interface circuit 42 can also be an interface circuit corresponding to various buses other than SPI (e.g., I2C (Inter-Integrated Circuit) bus).

[0092] The oscillation circuit 60 functions as a clock generation circuit, generating the master clock signal MCLK and outputting it to the digital arithmetic circuit 41 contained in the physical quantity processing circuit 40. The oscillation circuit 60 may be configured as a ring oscillator or a CR oscillation circuit, for example.

[0093] [Structure of the driving circuit]

[0094] Next, the driving circuit 20 will be described. Figure 5 This is a diagram showing an example of the structure of the drive circuit 20. (See diagram for example.) Figure 5As shown, the drive circuit 20 of the first embodiment of the physical quantity detection device 1 is configured to include an I / V conversion circuit 210, a high-pass filter (HPF) 220, a comparator 230, a full-wave rectifier circuit 240, an integrator 250, and a comparator 260. Alternatively, the drive circuit 20 may also be configured by omitting or modifying some of these elements, or by adding other elements.

[0095] The I / V conversion circuit 210 converts the oscillating current generated by the excitation vibration of the physical quantity detection element 100 and input via the DG terminal into an AC voltage signal.

[0096] The high-pass filter 220 removes the offset of the output signal of the I / V conversion circuit 210.

[0097] Comparator 230 compares the reference voltage and the output signal of high-pass filter 220 to generate a binarized signal. When the binarized signal is high, the NMOS transistor is turned on and outputs a low level; when the binarized signal is low, the NMOS transistor is turned off, and the output voltage of integrator 250, which is pulled up through a resistor, is output as a high level. Then, the output signal of comparator 230 is provided as a drive signal to physical quantity detection element 100 via the DS terminal. By matching the frequency of this drive signal (drive frequency) with the resonant frequency of physical quantity detection element 100, the physical quantity detection element 100 can be made to oscillate stably.

[0098] The full-wave rectifier circuit 240 rectifies (full-wave rectifies) the output signal of the I / V conversion circuit 210 and outputs a DC-converted signal.

[0099] Integrator 250 integrates and outputs the output voltage of full-wave rectifier circuit 240 based on the desired voltage VRDR generated from the voltage provided by reference voltage circuit 10. The higher the output of full-wave rectifier circuit 240 (the larger the amplitude of the output signal of I / V conversion circuit 210), the lower the output voltage of integrator 250. Therefore, the larger the oscillation amplitude, the lower the high-level voltage of the output signal (drive signal) of comparator 230; the smaller the oscillation amplitude, the higher the high-level voltage of the output signal (drive signal) of comparator 230. Thus, automatic gain control (AGC) is applied in a manner that keeps the oscillation amplitude constant.

[0100] Comparator 260 amplifies the voltage of the output signal of high-pass filter 220, generates a binarized signal (square wave voltage signal) and outputs it as the detector signal SDET.

[0101] [Structure of the detection circuit]

[0102] Next, the detection circuit 30 will be described. Figure 6 This is a diagram showing an example of the structure of the detection circuit 30. (As shown...) Figure 6 As shown, the detection circuit 30 in the first embodiment of the physical quantity detection device 1 is configured to include charge amplifiers 310 and 320, a differential amplifier 330, a high-pass filter (HPF) 340, an AC amplifier 350, a synchronous detector circuit 360, a variable gain amplifier 370, a switched capacitor filter (SCF) 380, and an output buffer 390. Alternatively, the detection circuit 30 of the first embodiment may also employ a structure that omits or modifies some of these elements, or adds other elements.

[0103] The charge amplifier 310 receives an alternating current (detection current) including angular velocity and vibration leakage components from the detection electrode 114 of the vibrating plate of the physical quantity detection element 100 via the S1 terminal. Similarly, the charge amplifier 320 receives an alternating current (detection current) including angular velocity and vibration leakage components from the detection electrode 115 of the vibrating plate of the physical quantity detection element 100 via the S2 terminal.

[0104] The charge amplifiers 310 and 320 convert the input AC charge (detection current) into AC voltage signals. The AC charge (detection current) input to charge amplifier 310 and the AC charge (detection current) input to charge amplifier 320 are 180° out of phase with each other, so the output signals of charge amplifier 310 and charge amplifier 320 are out of phase (180° out of phase) with each other.

[0105] The differential amplifier 330 differentially amplifies the output signals of the charge amplifier 310 and the charge amplifier 320. Through the differential amplifier 330, the in-phase component is eliminated, and the out-of-phase component is added and amplified.

[0106] The high-pass filter 340 removes the DC component contained in the output signal of the differential amplifier 330.

[0107] AC amplifier 350 amplifies the output signal of high-pass filter 340 and outputs it to synchronous detector circuit 360.

[0108] The synchronous detection circuit 360 is configured to include two synchronous detection circuits 361 and 362. Both synchronous detection circuits 361 and 362 receive the output signal from the AC amplifier 350 as input. Furthermore, in the first embodiment of the physical quantity detection device 1, the synchronous detection circuits 361 and 362 have the same structure. Therefore, synchronous detection circuits 361 and 362 will be described as synchronous detection circuit 360.

[0109] The synchronous detection circuit 360 uses the detection signal SDET input from the drive circuit 20 to synchronously detect the angular velocity component contained in the output signal (detected signal) of the AC amplifier 350. The synchronous detection circuit 360 is configured, for example, as follows: when the detection signal SDET is high, the output signal of the AC amplifier 350 is directly selected; when the detection signal SDET is low, the signal obtained by inverting the output signal of the AC amplifier 350 relative to a reference voltage is selected.

[0110] The output signal of AC amplifier 350 contains angular velocity and vibration leakage components. However, the angular velocity component is in phase with the detection signal SDET, while the vibration leakage component is out of phase with the detection signal SDET. Therefore, the angular velocity component is synchronously detected by the synchronous detection circuit 360, while the vibration leakage component is not detected.

[0111] The variable gain amplifier 370 is configured to include variable gain amplifiers 371 and 372. Variable gain amplifier 371 receives the output signal of the synchronous detection circuit 361 as input, and variable gain amplifier 372 receives the output signal of the synchronous detection circuit 362 as input. Furthermore, in the first embodiment, variable gain amplifiers 371 and 372 have the same structure, differing only in the input signals. Therefore, variable gain amplifiers 371 and 372 will be described as variable gain amplifier 370.

[0112] The variable gain amplifier 370 amplifies or attenuates the output signal from the synchronous detector circuit 360 to output a signal at the desired voltage level. The output signal of the variable gain amplifier 370 is input to the switched capacitor filter 380.

[0113] The switched-capacitor filter 380 is configured to include switched-capacitor filters 381 and 382. Switched-capacitor filter 381 receives the output signal of the variable gain amplifier 371 as input, and switched-capacitor filter 382 receives the output signal of the variable gain amplifier 372 as input. Furthermore, in the first embodiment, switched-capacitor filters 381 and 382 have the same structure, differing only in the input signals. Therefore, switched-capacitor filters 381 and 382 will be described as switched-capacitor filter 380.

[0114] The switched-capacitor filter 380 functions as a low-pass filter, removing high-frequency components from the output signal of the variable gain amplifier 370 and allowing signals within the specified frequency range to pass through. The frequency characteristics of this switched-capacitor filter 380 (low-pass filter) are determined by the frequency of a clock signal (not shown) obtained through stable oscillation by the physical quantity detection element 100 and the capacitance ratio of the capacitor (not shown). Therefore, compared to an RC low-pass filter, it has the advantage of minimal deviation in frequency characteristics.

[0115] The output signal of the switched capacitor filter 380 is buffered in the output buffer 390 and amplified or attenuated to the desired voltage level as needed.

[0116] Output buffer 390 is configured to include output buffers 391 and 392. Output buffer 391 amplifies or attenuates the signal output from switched capacitor filter 381 to a desired voltage level as needed. The output signal of output buffer 391 is output from detection circuit 30 as angular velocity signal VAO10, and the output signal of output buffer 392 is output from detection circuit 30 as angular velocity signal VAO20.

[0117] Based on the above, the angular velocity detection signal detected by the physical quantity detection element 100 is input to the detection circuit 30 from terminals S1 and S2. Furthermore, after being converted into a voltage signal by the charge amplifier 320, the angular velocity detection signal is amplified by the differential amplifier 330, the DC component is removed by the high-pass filter 340, and then the signal is amplified by the AC amplifier 350. The signals output from the AC amplifier 350 are respectively input to synchronous detection circuits 361 and 362, each with the same structure, and are output as angular velocity signals VAO10 and VAO20 via variable gain amplifiers 371 and 372, switched capacitor filters 381 and 382, ​​and output buffers 391 and 392.

[0118] That is, the angular velocity signals VAO10 and VAO20 are analog signals generated based on the same angular velocity detection signal (an example of the "first physical quantity detection signal"), and are analog signals generated by the same circuit structure. In other words, the angular velocity signals VAO10 (an example of the "first analog signal") and VAO20 (an example of the "second analog signal") are output from the detection circuit 30 as equivalent signals.

[0119] Angular velocity signals VAO10 and VAO20 are respectively input to the physical quantity processing circuit 40 (described later) and converted into digital signals. At this time, the angular velocity signal VAO10 is continuously input to the A / D conversion circuit 410 (see reference). Figure 7 The A / D conversion is performed, and in contrast, the angular velocity signal VAO20 is multiplexed by the multiplexer 430 (see reference). Figure 7 The angular velocity signal VAO20 is switched and input to the A / D conversion circuit 420 in a time-division manner. That is, the noise generated by the multiplexer 430 during switching output may be superimposed on the angular velocity signal VAO10. As shown in the first embodiment of the physical quantity detection device 1, by separating the angular velocity signals VAO10 and VAO20 in the detection circuit 30 and outputting them separately, the noise generated by the multiplexer 430 can be reduced from being superimposed on the angular velocity signal VAO10.

[0120] Furthermore, in the first embodiment of the physical quantity detection device 1, it is sufficient to generate angular velocity signals VAO10 and VAO20 without generating noise, as these signals are analog signals based on the same angular velocity detection signal. Therefore, the time point at which the signal based on the angular velocity detection signal is separated in the detection circuit 30 is not limited to just before it is input to the synchronous detection circuit 360.

[0121] [Structure and Operation of Physical Quantity Detection Circuit]

[0122] Next, the details of the physical quantity processing circuit 40 will be explained. Figure 7 This is a diagram showing an example of the structure of the physical quantity processing circuit 40. The physical quantity processing circuit 40 is configured to include a digital arithmetic circuit 41 and an interface circuit 42.

[0123] like Figure 7 As shown, the digital processing circuit 41 includes an A / D conversion circuit 410, an A / D conversion circuit 420, a multiplexer 430, a voltage generation unit 440, a switching control unit 450, a clock generation circuit 460, and a DSP (Digital Signal Processor) 50. Alternatively, the digital processing circuit 41 may also employ a structure that omits or modifies some of these elements, or adds other elements.

[0124] The clock generation circuit 460 generates and outputs the sampling clock signal CLK1 of the A / D conversion circuit 410 and the sampling clock signal CLK2 of the A / D conversion circuit 420 based on the master clock signal MCLK (output signal of the oscillation circuit 60).

[0125] The A / D conversion circuit 410 (an example of the "first conversion unit") synchronously performs A / D conversion on the angular velocity signal VAO10 output by the detection circuit 30 with the sampling clock signal CLK1 and outputs the angular velocity digital signal VD10 (an example of the "first digital signal").

[0126] In the first embodiment, the A / D conversion circuit 410 receives an angular velocity signal VAO10, which serves as a detection signal for the physical quantity detection element 100, via the detection circuit 30. To improve the detection accuracy of the physical quantity detection device 1, the A / D conversion circuit 410 is preferably configured with high resolution and a high sampling rate. Furthermore, in the first embodiment, the physical quantity detection device 1 needs to detect and output angular velocity at any given time. That is, the A / D conversion circuit 410 also needs to accurately detect the angular velocity signal VAO10 that is accidentally detected by the physical quantity detection element 100. Therefore, the A / D conversion circuit 410 needs to perform continuous A / D conversion. Thus, the A / D conversion circuit 410 of the first embodiment is preferably configured to perform continuous A / D conversion using a high-resolution ΔΣ-type A / D converter or a successive approximation (SAR) type A / D converter.

[0127] Here, "continuously performing A / D conversion" in this embodiment means performing A / D conversion as follows: sampling continuously input signals (continuous-time signals) at a predetermined period and converting them into discrete-time signals. That is, "continuously" means "continuous" and "substantially continuous," such as "continuing to operate after a sufficiently short rest period relative to the operation period."

[0128] The voltage generation unit 440 is based on the reference voltage VREF (reference) input from the reference voltage circuit 10. Figure 1 The voltage generation unit 440 generates various voltage levels used in the physical quantity processing circuit 40. Specifically, for example, it transforms the input reference voltage VREF using a regulator or resistor divider to generate a first voltage VREF1 (an example of a "first reference voltage") and a second voltage VREF2 (an example of a "second reference voltage"), which are known voltages, and outputs them to the multiplexer 430. Furthermore, the voltage generation unit 440 also generates and outputs, for example, the reference voltage or other driving voltage of the A / D conversion of the A / D conversion circuits 410 and 420.

[0129] The first voltage VREF1 and the second voltage VREF2, like the reference voltage for A / D conversion in A / D conversion circuits 410 and 420 or the drive voltage of other structures generated by the voltage generation unit 440, are voltages determined during the design phase. Therefore, they can be processed as known voltages in the physical quantity detection device 1.

[0130] The multiplexer 430 (an example of a "switching unit") receives an angular velocity signal VAO20 from the detection circuit 30, a temperature signal VTO from the temperature sensor 70, a first voltage VREF1, a second voltage VREF2, and a control signal Ctr1 as inputs, and outputs a MUX output signal VMO. That is, the multiplexer 430 receives multiple signals, including the angular velocity signal VAO20, the first voltage VREF1, the second voltage VREF2, and the temperature signal VTO (an example of a "second physical quantity detection signal") detected by the temperature sensor 70 (an example of a "second physical quantity detection element"), and outputs these signals as the MUX output signal VMO in a time-division manner. In other words, the MUX output signal VMO is a single signal that includes the angular velocity signal VAO20, the temperature signal VTO, the first voltage VREF1, and the second voltage VREF2. Furthermore, the signals input to the multiplexer 430 are not limited to these; for example, pressure, humidity, and other signals can also be input.

[0131] The switching control unit 450 outputs control signal Ctr1 to the multiplexer 430 and control signal Ctr2 to the DSP 50.

[0132] The control signal Ctr1 (an example of a "selection signal") selects the signal output from the multiplexer 430. For example, if the control signal Ctr1 is a 2-bit signal, when the control signal Ctr1 is "11", the multiplexer 430 selects the angular velocity signal VAO20 as the MUX output signal VMO. Furthermore, when the control signal Ctr1 is "00", the multiplexer 430 selects the temperature signal VTO as the MUX output signal VMO. Furthermore, when the control signal Ctr1 is "10", the multiplexer 430 selects the first voltage VREF1 as the MUX output signal VMO. Furthermore, when the control signal Ctr1 is "01", the multiplexer 430 selects the second voltage VREF2 as the MUX output signal VMO.

[0133] That is, the multiplexer 430 selects from multiple input signals according to the control signal Ctr1 and outputs them in a time-division manner. Thus, the output periods of the angular velocity signal VAO20, temperature signal VTO, first voltage VREF1, and second voltage VREF2 contained in the MUX output signal VMO can be set and changed via the control signal Ctr1. Because the output periods of the angular velocity signal VAO20, temperature signal VTO, first voltage VREF1, and second voltage VREF2 contained in the MUX output signal VMO can be changed, optimal settings can be made according to the intended use or operating environment of the physical quantity detection device 1. Therefore, a physical quantity detection device 1 including a general-purpose fault diagnosis circuit can be realized.

[0134] Control signal Ctr2 is synchronously input to the fault determination unit 530, fault determination unit 540, and digital correction unit 550 included in DSP 50. That is, control signal Ctr2 transmits the information of which of the multiplexer 430 controlled by control signal Ctr1 is the angular velocity signal VAO20, the temperature signal VTO, the first voltage VREF1, and the second voltage VREF2 to the fault determination unit 530, fault determination unit 540, and digital correction unit 550 included in DSP 50. Here, in the first embodiment of physical quantity detection device 1, control signal Ctr2 and control signal Ctr1 are represented as signals with the same structure, but are not limited thereto.

[0135] The A / D conversion circuit 420 (an example of the "second conversion unit") synchronously performs A / D conversion on the MUX output signal VMO (an example of the "output of the switching unit") output by the multiplexer 430 with the sampling clock signal CLK2, and outputs the MUX output digital signal VDMO. Therefore, the MUX output digital signal VDMO output by the A / D conversion circuit 420 is a digital signal that includes, in a time-division manner, an angular velocity digital signal VD20 (an example of the "second digital signal") obtained by converting the angular velocity signal VAO20 into a digital signal, a temperature digital signal VDTO (an example of the "third digital signal") obtained by converting the temperature signal VTO into a digital signal, a first digital voltage VDREF1 obtained by converting the first voltage VREF1 into a digital signal, and a second digital voltage VDREF2 obtained by converting the second voltage VREF2 into a digital signal.

[0136] The DSP 50 is configured to include digital filters 510 and 520, fault determination unit 530 and 540, and digital correction unit 550.

[0137] The digital filter 510 filters the angular velocity digital signal VD10 output from the A / D conversion circuit 410 synchronously with the master clock signal MCLK.

[0138] The digital filter 520 filters the MUX output digital signal VDMO from the A / D conversion circuit 420 synchronously with the master clock signal MCLK.

[0139] The fault determination unit 540 (an example of a "self-determination unit") receives the output signal of the digital filter 520, the control signal Ctr2, and the master clock signal MCLK as inputs. The fault determination unit 540 determines whether the first digital voltage VDREF1 and the second digital voltage VDREF2 contained in the input MUX output digital signal VDMO are within a specified range, in sync with the master clock signal MCLK, to determine the fault of the A / D conversion circuit 420.

[0140] In detail, the fault determination unit 540 determines, for example, that the output signal of the digital filter 520 is a signal based on the first digital voltage VDREF1 when the input control signal Ctr2 is "10". Then, it determines whether the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) input to the fault determination unit 540 is within a stored predetermined range. If the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) is within the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 is normal. On the other hand, if the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) is outside the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 has malfunctioned. Then, the fault determination unit 540 outputs a signal for setting a fault flag to a register (not shown).

[0141] For example, when the input control signal Ctr2 is "01", the fault determination unit 540 determines that the output signal of the digital filter 520 is a signal based on the second digital voltage VDREF2. Then, it determines whether the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) input to the fault determination unit 540 is within a stored predetermined range. If the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) is within the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 is normal. On the other hand, if the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) is outside the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 has malfunctioned. Then, the fault determination unit 540 outputs a signal for setting a fault flag to a register (not shown).

[0142] Here, the first voltage VREF1 and the second voltage VREF2 are known voltages generated by the voltage generation unit 440. Therefore, the expected values ​​of the first digital voltage VDREF1 and the second digital voltage VDREF2, which are converted into digital signals by the A / D conversion circuit 420, are also known and can be stored in advance in the fault determination unit 540. Thus, the fault determination unit 540 can determine whether the A / D conversion circuit 420 is faulty.

[0143] Furthermore, the reference voltage used to determine the fault of the A / D conversion circuit 420 can be either the first voltage VREF1 or the second voltage VREF2, and can also be composed of three or more reference voltages. However, as shown in this embodiment, the first voltage VREF1 and the second voltage VREF2 are preferred for determination. For example, in the case where the A / D conversion circuit 420 produces a fault with a constant output value, it is sometimes impossible to accurately determine the fault using only one reference voltage. However, by using both the first voltage VREF1 and the second voltage VREF2, the fault can be determined. As shown in this embodiment, by determining the fault of the A / D conversion circuit 420 based on the first voltage VREF1 and the second voltage VREF2, the determination accuracy can be improved.

[0144] The fault determination unit 530 (an example of a "comparison determination unit") receives the output signals of digital filter 510, digital filter 520, control signal Ctr2, and master clock signal MCLK as inputs. The fault determination unit 530 performs fault determination of the A / D conversion circuit 410 by comparing the input output signals of digital filter 510 and digital filter 520 in sync with the master clock signal MCLK.

[0145] In detail, the fault determination unit 530 determines, for example, that the output signal of the digital filter 520 is a signal based on the angular velocity digital signal VD20 when the input control signal Ctr2 is "11". Then, the fault determination unit 530 compares the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, with the signal based on the angular velocity digital signal VD20, which is the output signal of the digital filter 520. Then, by determining whether the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, is accurate, a fault determination is performed on the A / D conversion circuit 410.

[0146] As described above, the angular velocity digital signal VD10 is a digital signal obtained by A / D conversion of the angular velocity signal VAO10, and the angular velocity digital signal VD20 is a digital signal obtained by A / D conversion of the angular velocity signal VAO20. Furthermore, both angular velocity signals VAO10 and VAO20 are analog signals based on the same angular velocity detection signal. That is, the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, and the signal based on the angular velocity digital signal VD20, which is the output signal of the digital filter 520, are equivalent signals.

[0147] Therefore, the fault determination unit 530 can determine that the A / D conversion circuit 410 is normal when the comparison result between the signal based on the angular velocity digital signal VD10 and the signal based on the angular velocity digital signal VD20 is within a specified range. Furthermore, on the other hand, the fault determination unit 530 can determine that the A / D conversion circuit 410 has malfunctioned when the comparison result between the signal based on the angular velocity digital signal VD10 and the signal based on the angular velocity digital signal VD20 is outside the specified range. Then, the fault determination unit 530 outputs a signal for setting a fault flag, for example, to a register (not shown).

[0148] That is, in this embodiment, a fault determination circuit is constructed by a multiplexer 430, an A / D conversion circuit 410, an A / D conversion circuit 420, and a fault determination unit 530 to realize fault determination of the continuously operating A / D conversion circuit 410. Moreover, by performing fault determination (self-determination) of the time-division A / D conversion circuit 420 by the multiplexer 430, the A / D conversion circuit 420, and the fault determination unit 540, the accuracy of fault determination of the continuously operating A / D conversion circuit 410 can be improved.

[0149] The digital correction unit 550 (an example of a "correction unit") receives the output signals of the digital filter 510, the digital filter 520, the control signal Ctr2, and the master clock signal MCLK as inputs. The digital correction unit 550 corrects the input output signal of the digital filter 510 synchronously with the master clock signal MCLK based on the output signal of the digital filter 520.

[0150] In detail, for example, when the input control signal Ctr2 is "00", the digital correction unit 550 determines that the output signal of the digital filter 520 is a signal based on the temperature digital signal VDTO. Then, the digital correction unit 550 performs various processing on the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, such as offset correction, sensitivity correction, output range adjustment, and bit limiting.

[0151] In addition, when the temperature digital signal VDTO is input, the correction data of the digital correction unit 550 is corrected according to the temperature digital signal VDTO.

[0152] Furthermore, the digital correction unit 550 corrects the output signal of the input digital filter 520 and outputs it as angular velocity data VDO1 to the interface circuit 42.

[0153] Interface circuit 42 receives various instructions sent by MCU 3 and processes them by sending the data corresponding to the instructions to MCU 3.

[0154] As described above, the A / D conversion circuit 410 needs to continuously perform A / D conversions to detect continuously or suddenly input physical quantities. Therefore, the A / D conversion circuit 410 of the first embodiment is preferably structured to continuously perform A / D conversions using a high-resolution ΔΣ-type A / D converter or a successive approximation (SAR) type A / D converter. On the other hand, the A / D conversion circuit 420 only needs to be capable of performing A / D conversions on the angular velocity signal VAO20, temperature signal VTO, first voltage VREF1, and second voltage VREF2 input from the multiplexer 430 in a time-division manner. That is, preferably, the sampling rate of the A / D conversion circuit 410 is greater than that of the A / D conversion circuit 420, and the resolution of the A / D conversion circuit 410 is higher than that of the A / D conversion circuit 420. This allows for reduced power consumption and miniaturization of the physical quantity detection device 1.

[0155] Therefore, fault determination can be performed while the A / D conversion circuit 410 is in operation, which continuously performs high-precision A / D conversion, and the power consumption and miniaturization of the physical quantity detection device 1 can be achieved.

[0156] [Fault Diagnosis Method]

[0157] Figure 8 This is a flowchart illustrating a fault determination method in the first embodiment of the physical quantity detection device 1. Furthermore, Figure 9 It is used for containing Figure 8 The flowchart describes the details of step S600. Figure 10 It is used for containing Figure 8 The flowchart describes the detailed content of step S700.

[0158] In the first embodiment of the physical quantity detection device 1, fault detection is preferably performed in the order of fault determination of A / D conversion circuit 420 (step S600) and fault determination of A / D conversion circuit 410 (step S700). This improves the reliability of the A / D conversion result of A / D conversion circuit 420 used in the fault determination of continuously operating A / D conversion circuit 410, thereby improving the accuracy of fault determination of A / D conversion circuit 410.

[0159] use Figure 9 The detailed process for fault diagnosis of A / D conversion circuit 420 (step S600) is explained.

[0160] A / D conversion circuit 420 performs A / D conversion on the first voltage VREF1 input from multiplexer 430. Specifically, as described above, it performs A / D conversion on the MUX output signal VMO, which includes the first voltage VREF1, output from multiplexer 430 (step S610).

[0161] Next, the fault determination unit 540 determines whether the first digital voltage VDREF1, which has been converted into a digital signal by the A / D conversion circuit 420, is within the normal range (step S620). Specifically, the fault determination unit 540 receives a MUX output digital signal VDMO, obtained by converting the MUX output signal VMO into a digital signal in the A / D conversion circuit 420. When the control signal Ctr2 is "10", the fault determination unit 540 determines that the input MUX output digital signal VDMO is the first digital voltage VDREF1. Then, the fault determination unit 540 determines whether the MUX output digital signal VDMO (the first digital voltage VDREF1) is within the normal range.

[0162] The first voltage VREF1 is a known voltage generated in the physical quantity detection device 1. Therefore, the first digital voltage VDREF1, converted into a digital signal, is also known. Thus, the fault determination unit 540 can determine the expected value of the input first digital voltage VDREF1. Then, a fault in the A / D conversion circuit 420 can be determined by comparing the expected value of the first digital voltage VDREF1 with the measured value of the first digital voltage VDREF1. Furthermore, the normal value range for determining the first digital voltage VDREF1 is determined by a value that includes the reading error of the A / D conversion circuit 420 and the deviation of the first voltage VREF1 from the expected value when the A / D conversion circuit 420 performs A / D conversion on the known first voltage VREF1.

[0163] When the fault determination unit 540 determines that the input first digital voltage VDREF1 is outside the normal range, it determines that the A / D conversion circuit 420 has malfunctioned and sets a fault flag in a register or the like (step S630). The fault flag can be used, for example, to notify the outside of the fault via the interface circuit 42, and can also be used to stop the physical quantity detection device 1 from operating. Conversely, when the fault determination unit 540 determines that the input first digital voltage VDREF1 is within the normal range, it determines that the A / D conversion circuit 420 is operating normally.

[0164] Next, the A / D conversion circuit 420 performs A / D conversion on the second voltage VREF2 input from the multiplexer 430. Specifically, as described above, the MUX output signal VMO, which includes the second voltage VREF2, output from the multiplexer 430, is subjected to A / D conversion. (Step S640)

[0165] Then, the fault determination unit 540 determines whether the second digital voltage VDREF2, which has been converted into a digital signal by the A / D conversion circuit 420, is within the normal range (step S650). Specifically, the fault determination unit 540 receives a MUX output digital signal VDMO, obtained by converting the MUX output signal VMO into a digital signal in the A / D conversion circuit 420. When the control signal Ctr2 is "01", the fault determination unit 540 determines that the input MUX output digital signal VDMO is the second digital voltage VDREF2. Then, the fault determination unit 540 determines whether the MUX output digital signal VDMO (the second digital voltage VDREF2) is within the normal range.

[0166] The second voltage VREF2 is a known voltage generated in the physical quantity detection device 1. Therefore, the second digital voltage VDREF2, which is converted into a digital signal, is also known. Thus, the fault determination unit 540 can determine the expected value of the input second digital voltage VDREF2. Then, a fault in the A / D conversion circuit 420 can be determined by comparing the expected value of the second digital voltage VDREF2 with the measured value of the second digital voltage VDREF2. Furthermore, the normal value range for determining the second digital voltage VDREF2 is determined by a value that includes the reading error of the A / D conversion circuit 420 and the deviation of the second voltage VREF2 from the expected value when the A / D conversion circuit 420 performs A / D conversion on the known second voltage VREF2.

[0167] When the fault determination unit 540 determines that the input second digital voltage VDREF2 is outside the normal range, it determines that the A / D conversion circuit 420 has malfunctioned and sets a fault flag in a register or the like (step S660). The fault flag can be used, for example, to notify the outside of the fault via the interface circuit 42, and can also be used to stop the physical quantity detection device 1 from operating. Conversely, when the fault determination unit 540 determines that the input second digital voltage VDREF2 is within the normal range, it determines that the A / D conversion circuit 420 is operating normally.

[0168] Based on the above information, fault diagnosis of the A / D conversion circuit 420 can be performed.

[0169] Return to Figure 8 In the first embodiment of the physical quantity detection device 1, after determining whether the A / D conversion circuit 420 is faulty by fault determination (step S600), the fault determination of the A / D conversion circuit 410 is performed (step S700).

[0170] use Figure 10The detailed process of fault diagnosis (step S700) for A / D conversion circuit 410 is explained.

[0171] The A / D conversion circuit 410 converts the input angular velocity signal VAO10 into a digital signal (step S710).

[0172] A / D conversion circuit 420 performs A / D conversion on the angular velocity signal VAO20 input from multiplexer 430. Specifically, as described above, A / D conversion is performed on the MUX output signal VMO, which includes the angular velocity signal VAO20, output from multiplexer 430 (step S720).

[0173] Next, the fault determination unit 530 compares the angular velocity digital signal VD10, which is converted into a digital signal by the A / D conversion circuit 410, and the angular velocity digital signal VD20, which is converted into a digital signal by the A / D conversion circuit 420 (step S730). Specifically, the fault determination unit 530 inputs the angular velocity digital signal VD10, which is converted into a digital signal by the A / D conversion circuit 410, and the MUX output digital signal VDMO, which is obtained by converting the MUX output signal VMO into a digital signal in the A / D conversion circuit 420.

[0174] The fault determination unit 530 compares the angular velocity digital signals VD10 and VD20 to determine whether the comparison result is within the normal range (step S730). Specifically, the fault determination unit 530 inputs the MUX output digital signal VDMO, obtained by converting the MUX output signal VMO into a digital signal in the A / D conversion circuit 420. When the control signal Ctr2 is "11", the fault determination unit 530 determines that the input MUX output digital signal VDMO is the angular velocity digital signal VD20. Then, the fault determination unit 530 compares the angular velocity digital signal VD10 and the MUX output digital signal VDMO (angular velocity digital signal VD20) to determine whether the comparison result is within the normal range.

[0175] When the fault determination unit 530 determines that the comparison result between the angular velocity digital signals VD10 and VD20 is outside the normal range, it determines that the A / D conversion circuit 410 has malfunctioned and sets a fault flag in a register or the like (step S740). The fault flag can be used, for example, to notify the outside of the fault via the interface circuit 42, and can also be used to stop the physical quantity detection device 1 from operating. Conversely, when the fault determination unit 530 determines that the comparison result between the angular velocity digital signals VD10 and VD20 is within the normal range, it determines that the A / D conversion circuit 410 is operating normally.

[0176] Based on the above, it is possible to determine whether there is a fault without stopping the continuous operation of the A / D conversion circuit 410.

[0177] [Functions and Effects]

[0178] As described above, in the physical quantity detection device 1 of the first embodiment, the A / D conversion circuit 410 performs A / D conversion on the angular velocity signal VAO10 based on the angular velocity detection signal detected by the physical quantity detection element 100 to generate the angular velocity digital signal VD10, and the A / D conversion circuit 420 performs A / D conversion on the angular velocity signal VAO20 based on the angular velocity detection signal detected by the physical quantity detection element 100 to generate the angular velocity digital signal VD20. That is, the angular velocity digital signals VD10 and VD20 are equivalent signals based on the angular velocity detection signal detected by the physical quantity detection element 100. Then, the angular velocity digital signals VD10 and VD20 are compared in the fault determination unit 530. Since the angular velocity digital signals VD10 and VD20 are equivalent signals, the fault determination unit 530 can, for example, determine whether the A / D conversion results of the A / D conversion circuits 410 and 420 are accurate by comparing the difference between the detected angular velocity digital signals VD10 and VD20. Therefore, fault determination of the A / D conversion circuit 410 can be performed without stopping its continuous operation.

[0179] In the physical quantity detection device 1 of the first embodiment, the A / D conversion circuit 420 performs A / D conversion on the first voltage VREF1. The first voltage VREF1 is a known voltage, serving as a reference voltage for the physical quantity processing circuit 40. That is, the expected value of the first digital voltage VDREF1 obtained by the A / D conversion circuit 420 of the first voltage VREF1 is known. The fault determination unit 540 can determine the fault of the A / D conversion circuit 420 by comparing the expected value of the first digital voltage VDREF1 with the measured value of the first digital voltage VDREF1 obtained by the A / D conversion circuit 420 of the first voltage VREF1.

[0180] Furthermore, in the physical quantity detection device 1 of the first embodiment, the A / D conversion circuit 420 performs A / D conversion on the second voltage VREF2. The second voltage VREF2 is a reference voltage different from the first voltage VREF1, and is a known voltage. That is, the expected value of the second digital voltage VDREF2 obtained by the A / D conversion circuit 420 of the second voltage VREF2 is known. The fault determination unit 540 can determine the fault of the A / D conversion circuit 420 by comparing the expected value of the second digital voltage VDREF2 with the measured value of the second digital voltage VDREF2 obtained by the A / D conversion circuit 420 of the second voltage VREF2.

[0181] In the physical quantity detection device 1 of the first embodiment, a first voltage VREF1 and a second voltage VREF2 are used to determine the fault of the A / D conversion circuit 420. Therefore, the angular velocity digital signal VD20 input to the fault determination unit 530 is a signal obtained by the A / D conversion circuit 420 through normal conversion. Thus, the fault determination unit 530 can accurately determine the fault of the A / D conversion circuit 410 by comparing the angular velocity digital signals VD10 and VD20.

[0182] In the physical quantity detection device 1 of the first embodiment, the multiplexer 430 receives a temperature signal VTO detected by the temperature sensor 70 as input. That is, since the A / D conversion circuit 420 performs A / D conversion in a time-division manner, it can also function as an A / D converter for multiple signals. Therefore, the A / D conversion circuit 420 can, for example, function as an element that performs A / D conversion on the temperature signal VTO detected by the temperature sensor 70 used for temperature correction in the physical quantity detection device 1 and the detected signal, thereby enabling miniaturization of the physical quantity detection device 1.

[0183] 1.2 Second Implementation Method

[0184] Figure 11 This is a diagram showing the structure of the physical quantity detection device 1 according to the second embodiment. Furthermore, Figure 12 This diagram illustrates the structure of the physical quantity processing circuit 40 according to the second embodiment. In the physical quantity detection device 1 of the first embodiment, a physical quantity is obtained by inputting a signal detected by a physical quantity detection element 100 to an A / D conversion circuit 410 that continuously performs A / D conversion. In contrast, in the physical quantity detection device 1 of the second embodiment, a physical quantity is obtained by inputting signals detected by multiple (three in the second embodiment) physical quantity detection elements 100A, 100B, and 100C to multiple (three in the second embodiment) A / D conversion circuits 410, 411, and 412 respectively.

[0185] Furthermore, regarding the physical quantity detection device 1 of the second embodiment, the same reference numerals are used for structural elements that are the same as those in the first embodiment, and descriptions that are repeated in the first embodiment are omitted. Contents that are different from those in the first embodiment are described.

[0186] Figure 11 This is a diagram showing the structure of the physical quantity detection device 1 according to the second embodiment. The physical quantity detection device 1 of the second embodiment is configured to include a physical quantity detection circuit 200 and three physical quantity detection elements 100A, 100B, and 100C. It may also be configured to further include an MCU 3 that uses the output data of the physical quantity detection device 1 to perform various calculations, processing, and control.

[0187] The three physical quantity detection elements 100A, 100B, and 100C, like those in the first embodiment, have a so-called double-T-shaped vibrating plate structure. This double-T-shaped vibrating plate has two T-shaped drive vibrating arms, the details of which are omitted (see [reference]). Figures 2-4 ).

[0188] The physical quantity detection circuit 200 of the second embodiment is configured similarly to that of the first embodiment, including a reference voltage circuit 10, a drive circuit 20, a detection circuit 30, a physical quantity processing circuit 40, an oscillation circuit 60, a temperature sensor 70, and a storage unit 80. Furthermore, the physical quantity detection circuit 200 of the second embodiment has a drive circuit 20 and a detection circuit 30 corresponding to the three physical quantity detection elements 100A, 100B, and 100C, respectively. The detailed structure of each drive circuit 20 and detection circuit 30 is the same as that of the first embodiment, and its description is omitted (see [reference]). Figure 5 , Figure 6 ).

[0189] The detection circuit 30 connected to the detection electrode of the physical quantity detection element 100A outputs angular velocity signals VAO10 and VAO20. Furthermore, the detection circuit 30 connected to the detection electrode of the physical quantity detection element 100B outputs angular velocity signals VAO11 and VAO21. Furthermore, the detection circuit 30 connected to the detection electrode of the physical quantity detection element 100C outputs angular velocity signals VAO12 and VAO22. Here, similar to the first embodiment, the two angular velocity signals VAO1i (i=0~2) and VAO2i (i=0~2) output from each detection circuit 30 are equivalent signals. That is, angular velocity signals VAO10 and VAO20 are equivalent signals, angular velocity signals VAO11 and VAO21 are equivalent signals, and angular velocity signals VAO12 and VAO22 are equivalent signals.

[0190] Furthermore, the reference voltage circuit 10, oscillation circuit 60, temperature sensor 70, and storage unit 80 in the second embodiment have the same structure as those in the first embodiment, and their descriptions are omitted.

[0191] Figure 12 This is a diagram illustrating the structure of the physical quantity processing circuit 40 according to the second embodiment. Similar to the first embodiment, the physical quantity processing circuit 40 includes a digital arithmetic circuit 41 and an interface circuit 42.

[0192] The digital processing circuit 41 includes a clock generation circuit 460, A / D conversion circuits 410, 411, and 412, an A / D conversion circuit 420, a multiplexer 430, a voltage generation unit 440, a switching control unit 450, and a DSP 50. The digital processing circuit 41 may also be structured by omitting or changing some of these elements, or by adding other elements.

[0193] The clock generation circuit 460 generates and outputs the sampling clock signal CLK1 of the A / D conversion circuits 410, 411, and 412 and the sampling clock signal CLK2 of the A / D conversion circuit 420 based on the master clock signal MCLK (output signal of the oscillation circuit 60).

[0194] The A / D conversion circuit 410, synchronized with the sampling clock signal CLK1, performs A / D conversion on the angular velocity signal VAO10 output by the detection circuit 30 based on the angular velocity detection signal of the physical quantity detection element 100A, and outputs the angular velocity digital signal VD10.

[0195] The A / D conversion circuit 411 (an example of the "third conversion unit") synchronously with the sampling clock signal CLK1 performs A / D conversion on the angular velocity signal VAO11 (an example of the "third analog signal") output by the detection circuit 30 based on the angular velocity detection signal (an example of the "third physical quantity detection signal") of the physical quantity detection element 100B. This outputs the angular velocity digital signal VD11 (an example of the "fourth digital signal").

[0196] The A / D conversion circuit 412, synchronized with the sampling clock signal CLK1, performs A / D conversion on the angular velocity signal VAO12 output by the detection circuit 30 based on the angular velocity detection signal of the physical quantity detection element 100C, and outputs the angular velocity digital signal VD12.

[0197] Furthermore, the A / D conversion circuits 410, 411, and 412 in the second embodiment are preferably structured such that A / D conversion is performed continuously using a ΔΣ-type A / D converter with high resolution or a successive approximation (SAR) type A / D converter.

[0198] The voltage generation unit 440 is similar to the first embodiment in that it receives a reference voltage VREF (see reference) output from the reference voltage circuit 10. Figure 1 This converts it into various voltages used in the physical quantity processing circuit 40.

[0199] The multiplexer 430 receives angular velocity signals VAO20, VAO21 (an example of a "fourth analog signal"), and VAO22 from the detection circuit 30, a temperature signal VTO from the temperature sensor 70, a first voltage VREF1, a second voltage VREF2, and a control signal Ctr1 as inputs, and outputs a MUX output signal VMO. That is, the multiplexer 430 receives multiple signals including angular velocity signals VAO20, VAO21, VAO22, the first voltage VREF1, the second voltage VREF2, and the temperature signal VTO detected by the temperature sensor 70, and outputs these signals as the MUX output signal VMO in a time-division manner. In other words, the MUX output signal VMO is a single signal including the angular velocity signal VAO20, the temperature signal VTO, the first voltage VREF1, and the second voltage VREF2. Furthermore, the signals input to the multiplexer 430 are not limited to these; signals such as pressure and humidity can also be input.

[0200] The switching control unit 450 outputs control signal Ctr1 to the multiplexer 430 and control signal Ctr2 to the DSP 50.

[0201] The control signal Ctr1 selects the signal output from the multiplexer 430. For example, if the control signal Ctr1 is a 3-bit signal, when the control signal Ctr1 is "101", the multiplexer 430 selects the angular velocity signal VAO20 as the MUX output signal VMO. When the control signal Ctr1 is "110", the multiplexer 430 selects the angular velocity signal VAO21 as the MUX output signal VMO. When the control signal Ctr1 is "111", the multiplexer 430 selects the angular velocity signal VAO22 as the MUX output signal VMO. When the control signal Ctr1 is "000", the multiplexer 430 selects the temperature signal VTO as the MUX output signal VMO. When the control signal Ctr1 is "010", the multiplexer 430 selects the first voltage VREF1 as the MUX output signal VMO. Furthermore, when the control signal Ctr1 is “001”, the multiplexer 430 selects the second voltage VREF2 as the MUX output signal VMO.

[0202] Control signal Ctr2 is synchronously input to the fault determination unit 530, fault determination unit 540, and digital correction unit 550 included in DSP 50. That is, control signal Ctr2 transmits the information of which of the output signals of the multiplexer 430 controlled by control signal Ctr1 is angular velocity signal VAO20, VAO21, VAO22, temperature signal VTO, first voltage VREF1, and second voltage VREF2 to the fault determination unit 530, fault determination unit 540, and digital correction unit 550 included in DSP 50. Here, in the first embodiment of physical quantity detection device 1, control signal Ctr2 and control signal Ctr1 are represented as signals with the same structure, but are not limited thereto.

[0203] Similar to the first embodiment, the A / D conversion circuit 420 performs A / D conversion on the MUX output signal VMO output by the multiplexer 430 in sync with the sampling clock signal CLK2, outputting the MUX output digital signal VDMO. Therefore, the MUX output digital signal VDMO output by the A / D conversion circuit 420 is a digital signal that, in a time-division manner, includes: an angular velocity digital signal VD20 obtained by converting the angular velocity signal VAO20 into a digital signal; an angular velocity digital signal VD21 obtained by converting the angular velocity signal VAO20 into a digital signal (an example of the "fifth digital signal"); an angular velocity digital signal VD22 obtained by converting the angular velocity signal VAO20 into a digital signal; a temperature digital signal VDTO obtained by converting the temperature signal VTO into a digital signal; a first digital voltage VDREF1 obtained by converting the first voltage VREF1 into a digital signal; and a second digital voltage VDREF2 obtained by converting the second voltage VREF2 into a digital signal.

[0204] The DSP 50 includes digital filters 510, 511, 512, and 520, fault determination units 530 and 540, and a digital correction unit 550.

[0205] The digital filter 510 filters the angular velocity digital signal VD10 output from the A / D conversion circuit 410 synchronously with the master clock signal MCLK.

[0206] The digital filter 511 filters the angular velocity digital signal VD11 output from the A / D conversion circuit 411 synchronously with the master clock signal MCLK.

[0207] The digital filter 512 filters the angular velocity digital signal VD12 output from the A / D conversion circuit 412 synchronously with the master clock signal MCLK.

[0208] The digital filter 520 filters the MUX output digital signal VDMO from the A / D conversion circuit 420 synchronously with the master clock signal MCLK.

[0209] The fault determination unit 540 receives the output signal of the digital filter 520, the control signal Ctr2, and the master clock signal MCLK as inputs. The fault determination unit 540 determines whether the first digital voltage VDREF1 and the second digital voltage VDREF2 contained in the input MUX output digital signal VDMO are within a specified range, in sync with the master clock signal MCLK, to determine the fault of the A / D conversion circuit 420.

[0210] In detail, the fault determination unit 540 determines, for example, that the output signal of the digital filter 520 is a signal based on the first digital voltage VDREF1 when the input control signal Ctr2 is "010". Then, it determines whether the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) input to the fault determination unit 540 is within a stored predetermined range. If the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) is within the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 is normal. On the other hand, if the output signal of the digital filter 520 (the signal based on the first digital voltage VDREF1) is outside the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 has malfunctioned. Then, the fault determination unit 540 outputs a signal for setting a fault flag to a register (not shown).

[0211] For example, when the input control signal Ctr2 is "001", the fault determination unit 540 determines that the output signal of the digital filter 520 is a signal based on the second digital voltage VDREF2. Then, it determines whether the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) input to the fault determination unit 540 is within a stored predetermined range. If the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) is within the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 is normal. On the other hand, if the output signal of the digital filter 520 (the signal based on the second digital voltage VDREF2) is outside the predetermined range, the fault determination unit 540 determines that the A / D conversion circuit 420 has malfunctioned. Then, the fault determination unit 540 outputs a signal for setting a fault flag to a register (not shown).

[0212] Similar to the first embodiment, the first voltage VREF1 and the second voltage VREF2 are known, so the fault determination unit 540 can determine whether the A / D conversion circuit 420 is faulty.

[0213] The fault determination unit 530 receives the output signals of digital filters 510, 511, 512, and 520, control signal Ctr2, and master clock signal MCLK as inputs. The fault determination unit 530 compares the input output signals of digital filters 510 and 520 synchronously with the master clock signal MCLK to determine faults in the A / D conversion circuits 410, 411, and 412.

[0214] In detail, the fault determination unit 530 determines, for example, that the output signal of the digital filter 520 is a signal based on the angular velocity digital signal VD20 when the input control signal Ctr2 is "101". Then, the fault determination unit 530 compares the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, with the signal based on the angular velocity digital signal VD20, which is the output signal of the digital filter 520. Then, by determining whether the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, is accurate, a fault determination is made in the A / D conversion circuit 410.

[0215] Furthermore, the fault determination unit 530 determines, for example, that the output signal of the digital filter 520 is a signal based on the angular velocity digital signal VD20 when the input control signal Ctr2 is "110". Then, the fault determination unit 530 compares the signal based on the angular velocity digital signal VD11, which is the output signal of the digital filter 511, with the signal based on the angular velocity digital signal VD21, which is the output signal of the digital filter 520. Moreover, the fault determination of the A / D conversion circuit 410 is performed by determining whether the signal based on the angular velocity digital signal VD11, which is the output signal of the digital filter 511, is accurate.

[0216] Furthermore, the fault determination unit 530 determines, for example, that the output signal of the digital filter 520 is a signal based on the angular velocity digital signal VD22 when the input control signal Ctr2 is "111". Then, the fault determination unit 530 compares the signal based on the angular velocity digital signal VD12, which is the output signal of the digital filter 512, with the signal based on the angular velocity digital signal VD22, which is the output signal of the digital filter 520. Finally, by determining whether the signal based on the angular velocity digital signal VD12, which is the output signal of the digital filter 512, is accurate, a fault determination is performed on the A / D conversion circuit 410.

[0217] The angular velocity digital signal VD10 is a digital signal obtained by A / D conversion of the angular velocity signal VAO10, and the angular velocity digital signal VD20 is a digital signal obtained by A / D conversion of the angular velocity signal VAO20. Furthermore, both angular velocity signals VAO10 and VAO20 are analog signals of the angular velocity detection signal detected by the physical quantity detection element 100A. That is, the signal based on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, and the signal based on the angular velocity digital signal VD20, which is the output signal of the digital filter 520, are equivalent signals.

[0218] Therefore, the fault determination unit 530 can determine whether the A / D conversion circuit 410 is faulty by comparing the signal based on the angular velocity digital signal VD10 and the signal based on the angular velocity digital signal VD20.

[0219] Similarly, the signal based on the angular velocity digital signal VD11, which is the output signal of the digital filter 511, and the signal based on the angular velocity digital signal VD21, which is the output signal of the digital filter 520, are signals based on the angular velocity detection signal detected by the physical quantity detection element 100B, and are equivalent signals.

[0220] Therefore, the fault determination unit 530 can determine whether the A / D conversion circuit 411 is faulty by comparing the signal based on the angular velocity digital signal VD11 and the signal based on the angular velocity digital signal VD21.

[0221] Similarly, the signal based on the angular velocity digital signal VD12, which is the output signal of the digital filter 512, and the signal based on the angular velocity digital signal VD22, which is the output signal of the digital filter 520, are signals based on the angular velocity detection signal detected by the physical quantity detection element 100C, and are equivalent signals.

[0222] Therefore, the fault determination unit 530 can determine whether the A / D conversion circuit 412 is faulty by comparing the signal based on the angular velocity digital signal VD12 and the signal based on the angular velocity digital signal VD22.

[0223] Furthermore, when any A / D conversion circuit is determined to be faulty in the fault determination of A / D conversion circuits 410, 411, and 412, the fault determination unit 530 outputs a signal for setting a fault flag to a register (not shown).

[0224] The digital correction unit 550 receives the output signals of digital filters 510, 511, 512, and 520, as well as a control signal Ctr2 and a master clock signal MCLK. Synchronously with the master clock signal MCLK, the digital correction unit 550 corrects the input output signals of digital filters 510, 511, and 512 based on the output signal of digital filter 520.

[0225] Specifically, the digital correction unit 550, for example, determines that the output signal of the digital filter 520 is a temperature digital signal VDTO when the input control signal Ctr2 is "000". Then, the digital correction unit 550 performs various processing on the angular velocity digital signal VD10, which is the output signal of the digital filter 510, including offset correction, sensitivity correction, output range adjustment, and bit limiting, to generate digital data (angular velocity data) VDO10 and output it to the interface circuit 42. Furthermore, it performs various processing on the angular velocity digital signal VD11, which is the output signal of the digital filter 511, including offset correction, sensitivity correction, output range adjustment, and bit limiting, to generate digital data (angular velocity data) VDO11 and output it to the interface circuit 42. Finally, it performs various processing on the angular velocity digital signal VD12, which is the output signal of the digital filter 512, including offset correction, sensitivity correction, output range adjustment, and bit limiting, to generate digital data (angular velocity data) VDO12 and output it to the interface circuit 42.

[0226] As described above, according to the second embodiment of the physical quantity detection device 1, it is not necessary to stop any of the A / D conversion circuits 410, 411, and 412 from operation to determine a fault. The A / D conversion circuits 410, 411, and 412 continuously perform A / D conversion on the angular velocity signals VAO10, 11, and 12 output from the plurality of physical quantity detection elements 100 (100A, 100B, and 100C). That is, the physical quantity detection device 1 of the second embodiment can also achieve high reliability, for example, in a triaxial angular velocity sensor.

[0227] 1.3 Variations

[0228] In the above embodiments, a physical quantity detection device (angular velocity detection device) including a physical quantity detection element for detecting angular velocity was described as an example. However, the present invention can also be applied to physical quantity detection devices including physical quantity detection elements for detecting various physical quantities. Furthermore, the physical quantity detected by the physical quantity detection element is not limited to angular velocity; it can also be angular acceleration, acceleration, geomagnetism, tilt, etc. Furthermore, the vibrating plate of the physical quantity detection element does not have to be double-T type; for example, it can be a tuning fork type or a comb type, or a sound plate type with a triangular prism, square prism, or cylindrical shape. Furthermore, the material of the vibrating plate of the physical quantity detection element can replace quartz (SiO2), and can use piezoelectric materials such as lithium tantalate (LiTaO3), lithium niobate (LiNbO3), or piezoelectric ceramics such as lead zirconate titanate (PZT), or silicon semiconductors. Furthermore, for example, it can be constructed by distributing a piezoelectric thin film such as zinc oxide (ZnO) or aluminum nitride (AlN) sandwiched between driving electrodes on a portion of the surface of the silicon semiconductor. Furthermore, the physical quantity sensing element is not limited to piezoelectric elements; it can also be vibratory elements such as electrodynamic, electrostatic capacitive, eddy current, optical, and strain gauge types. Alternatively, the physical quantity sensing element is not limited to vibration type; it can also be optical, rotary, or fluid type.

[0229] 2. Electronic devices

[0230] Next, refer to the appendix Figure 1 The electronic device of this embodiment will be described below. The electronic device of this embodiment includes the physical quantity detection device 1 of the present invention. Hereinafter, the electronic device including the physical quantity detector 400 will be described as the physical quantity detection device 1 of the present invention.

[0231] Figure 13 This is a perspective view schematically showing a mobile phone (including PHS) 1200 as an electronic device in this embodiment.

[0232] like Figure 13 As shown, the mobile phone 1200 has multiple operation buttons 1202, an earpiece 1204, and a microphone 1206, with a display unit 1208 disposed between the operation buttons 1202 and the earpiece 1204. This mobile phone 1200 also includes a physical quantity detector 400.

[0233] Such a mobile phone 1200 is equipped with a physical quantity detector 400.

[0234] Figure 14 This is a perspective view schematically showing a still digital camera 1300 as an electronic device in this embodiment. Additionally, in Figure 14 The interface also provides a simple demonstration of connections to external devices.

[0235] Here, a conventional camera exposes a silver halide photographic film by exposing the light image of the subject. In contrast, a still digital camera 1300 generates an image signal (image signal) by photoelectric conversion of the light image of the subject through an imaging element such as a CCD (Charge Coupled Device).

[0236] The configuration is such that a display unit 1310 is provided on the back of the housing (body) 1302 of the still digital camera 1300, which displays the image signal of the CCD and functions as a viewfinder that displays the subject as an electronic image.

[0237] Furthermore, a receiving unit 1304, including an optical lens (camera optical system) and a CCD, is provided on the front side (back side in the figure) of the housing 1302.

[0238] The photographer confirms the image of the subject displayed on the display unit 1310, and when the shutter button 1306 is pressed, the image signal of the CCD at that moment is transmitted to the memory 1308 and saved.

[0239] Furthermore, in this still digital camera 1300, a video signal output terminal 1312 and a data communication input / output terminal 1314 are provided on the side of the housing 1302. The video signal output terminal 1312 is connected to a television monitor 1430, and the data communication input / output terminal 1314 is connected to a personal computer 1440 as needed. Moreover, the camera is configured to output the image signal stored in the memory 1308 to the television monitor 1430 and the personal computer 1440 through predetermined operations.

[0240] This type of still digital camera 1300 is equipped with a physical quantity detector 400.

[0241] In addition, electronic devices with physical quantity detectors 400 can be used in addition to... Figure 13 The mobile phone shown Figure 14In addition to the still digital cameras shown, applications include personal computers (mobile personal computers), inkjet printers, notebook computers, televisions, video cameras, video recorders, various navigation devices, pagers, electronic notebooks (including those with communication functions), electronic dictionaries, calculators, video game consoles, head-mounted displays, word processors, workstations, video phones, crime prevention television monitors, electronic binoculars, POS terminals, medical devices (such as electronic thermometers, blood pressure monitors, blood glucose meters, electrocardiogram measuring devices, ultrasound diagnostic devices, electronic endoscopes), fish finders, various measuring devices, measuring instruments (such as measuring instruments for vehicles, airplanes, rockets, and ships), attitude control of robots or human bodies, flight simulators, etc.

[0242] The electronic device of this embodiment includes a physical quantity detector 400 capable of suppressing the increase in circuit size and detecting angular velocity and acceleration with stable characteristics. Therefore, a more reliable electronic device can be realized at a lower cost.

[0243] 3. Moving bodies

[0244] Next, refer to the appendix Figure 1 The moving body of this embodiment will be described below. The moving body of this embodiment includes the physical quantity sensor of the present invention. Hereinafter, the moving body including the physical quantity detector 400 will be described as the physical quantity sensor of the present invention.

[0245] Figure 15 This is a perspective view schematically showing the automobile 1500 as a moving body in this embodiment.

[0246] The vehicle 1500 is equipped with a physical quantity detector 400. Specifically, such as... Figure 15 As shown, the vehicle body 1502 of the automobile 1500 is equipped with an electronic control unit (ECU) 1504. This ECU contains a physical quantity detection element 400 that detects the angular velocity of the automobile 1500 and controls the engine output. Furthermore, the physical quantity detector 400 can also be widely used in vehicle attitude control units, anti-lock braking systems (ABS), and tire pressure monitoring systems (TPMS).

[0247] The electronic device of this embodiment includes a physical quantity detector 400 capable of suppressing the increase in circuit size and detecting angular velocity and acceleration with stable characteristics. Therefore, a more reliable electronic device can be realized at a lower cost.

[0248] This invention is not limited to this embodiment, and various modifications can be implemented within the scope of the spirit of this invention.

[0249] The above-described embodiments and variations are examples only and are not limited to them. For example, the various embodiments and variations can also be appropriately combined.

[0250] This invention includes structures that are substantially the same as those described in the embodiments (e.g., structures with the same function, method, and result, or structures with the same purpose and effect). Furthermore, this invention includes structures formed by replacing non-essential parts of the structures described in the embodiments. Furthermore, this invention includes structures capable of achieving the same functional effect or the same purpose as the structures described in the embodiments. Furthermore, this invention includes structures formed by incorporating known techniques into the structures described in the embodiments.

Claims

1. A fault determination circuit, comprising: The first conversion unit continuously performs A / D conversion on the first analog signal based on the first physical quantity detection signal; The switching unit receives multiple signals, including a first reference voltage and a second analog signal based on the first physical quantity detection signal, and outputs these signals in a time-division manner. The second conversion unit performs A / D conversion on the output of the switching unit; as well as Comparison and Judgment Department The comparison and determination unit determines the fault of the first conversion unit based on a signal based on a first digital signal and a signal based on a second digital signal. The first digital signal is obtained by the first conversion unit performing A / D conversion on the first analog signal, and the second digital signal is obtained by the second conversion unit performing A / D conversion on the second analog signal.

2. The fault determination circuit according to claim 1, wherein, The fault determination circuit also has its own determination unit. The self-determination unit determines the fault of the second conversion unit based on the signal obtained by the second conversion unit performing A / D conversion on the first reference voltage.

3. The fault determination circuit according to claim 2, wherein, The switching unit is also input with a second reference voltage. The self-determination unit determines the fault of the second conversion unit based on the signal obtained by the second conversion unit performing A / D conversion on the second reference voltage.

4. The fault determination circuit according to any one of claims 1 to 3, wherein, The switching unit also receives a second physical quantity detection signal.

5. The fault determination circuit according to claim 4, wherein, The fault determination circuit also includes a calibration unit. The second physical quantity detection signal is a temperature-based signal. The correction unit corrects the first digital signal based on the third digital signal obtained by the second conversion unit through A / D conversion of the second physical quantity detection signal.

6. The fault determination circuit according to any one of claims 1 to 5, wherein, The sampling rate of the first conversion unit is greater than the sampling rate of the second conversion unit.

7. The fault determination circuit according to any one of claims 1 to 6, wherein, The resolution of the first conversion unit is higher than that of the second conversion unit.

8. The fault determination circuit according to any one of claims 1 to 7, wherein, The switching unit also receives a selection signal. The switching unit selects and outputs any signal from a plurality of input signals, including the second analog signal and the first reference voltage, according to the selection signal.

9. The fault determination circuit according to any one of claims 1 to 8, wherein, The fault determination circuit also includes a third conversion unit, which continuously performs A / D conversion on the third analog signal based on the third physical quantity detection signal. The switching unit also receives a fourth analog signal based on the detection signal of the third physical quantity. The comparison and determination unit compares the signal based on the fourth digital signal and the signal based on the fifth digital signal to determine the fault of the third conversion unit. The fourth digital signal is obtained by the third conversion unit through A / D conversion of the third analog signal, and the fifth digital signal is obtained by the second conversion unit through A / D conversion of the fourth analog signal.

10. A fault determination method, comprising a fault determination step performed in a fault determination circuit. in, The fault determination circuit includes: a first conversion unit that continuously performs A / D conversion on a first analog signal based on a first physical quantity detection signal; and a switching unit that takes in multiple signals, including a first reference voltage and a second analog signal based on the first physical quantity detection signal, and outputs these signals in a time-division manner. The second conversion unit performs A / D conversion on the output of the switching unit; and the comparison and determination unit compares the output signal of the first conversion unit and the output signal of the second conversion unit. In the aforementioned step, the comparison determination unit compares the signal based on the first digital signal and the signal based on the second digital signal to determine the fault of the first conversion unit. The first digital signal is obtained by the first conversion unit performing A / D conversion on the first analog signal, and the second digital signal is obtained by the second conversion unit performing A / D conversion on the second analog signal.

11. A physical quantity detection device, wherein, The physical quantity detection device has a fault determination circuit as described in any one of claims 1 to 9.

12. An electronic device, wherein, The electronic device has the physical quantity detection device as described in claim 11.

13. A mobile body, wherein, The moving body has the physical quantity detection device as described in claim 11.

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