Startup method and electronic equipment

Abstract

The invention discloses a startup method and electronic equipment, relates to the technical field of terminals, and can detect abnormal power supply of a central processing unit (CPU) core group, make adaptive adjustment, and start the electronic equipment based on the CPU core group with normal power supply, so that the electronic equipment is started to display a desktop. The problem that the electronic equipment cannot be started up due to abnormal power supply of the CPU core group in the starting-up process is solved, and the electronic equipment can be normally started up. The method is applied to the electronic equipment, the electronic equipment comprises at least one CPU core group, and each CPU core group comprises one or more CPU cores. In the startup process of the electronic equipment, under the condition that it is detected that power supply of the first CPU core group is abnormal and power supply of the second CPU core group is normal, the electronic equipment is started based on the second CPU core group; and then, after the electronic equipment is started, a desktop is displayed.

Description

Technical Field

[0001] This application relates to the field of terminal technology, and more particularly to a boot method and electronic device for recovering from a central processing unit (CPU) core failure. Background Technology

[0002] Currently, processors are widely used in electronic devices such as smartphones and other mobile devices. With the continuous development of processors, the concept of big.LITTLE CPUs has emerged. Integrating high-performance large cores with high-efficiency small cores allows for flexible handling of various task challenges. In this mode, light workloads can be assigned to small cores, significantly reducing power consumption; large cores can focus on heavy workloads without having to handle other light tasks. For electronic devices, this mode also reduces heat generation and enhances battery life. Therefore, CPU cores can be divided into different core groups based on their size and function, with different core groups assigned different workloads.

[0003] During the boot process of electronic devices, a common problem is that a CPU core failure can prevent the entire boot process from starting normally, resulting in the electronic device failing to boot. Summary of the Invention

[0004] This application provides a power-on method and electronic device that can make adaptive adjustments when a power supply abnormality is detected in the CPU core group, indicating a power supply failure in the CPU core group. The electronic device is then powered on based on a CPU core group with normal power supply, thereby enabling the electronic device to power on and display the desktop. This improves the problem of electronic devices failing to power on due to a power supply abnormality in any CPU core group during the power-on process, allowing the device to power on normally.

[0005] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0006] Firstly, a boot-up method is provided, applicable to an electronic device, wherein the electronic device includes at least one central processing unit (CPU) core group, and each CPU core group includes one or more CPU cores. In this method, during the boot-up process of the electronic device, if a power supply abnormality is detected in a first CPU core group while the power supply to a second CPU core group is normal, the electronic device is booted based on the second CPU core group; subsequently, the electronic device displays the desktop after booting.

[0007] In the above boot method, if an abnormal power supply to the first CPU core group is detected while the power supply to the second CPU core group is normal, the electronic device is booted based on the second CPU core group. This indicates that the first CPU core group cannot boot the electronic device normally, while the second CPU core group can. In this case, the second CPU core group can be selected to boot the electronic device. If the current CPU core group has a power supply failure, it cannot boot normally, nor can it boot the electronic device. In this case, the electronic device can be booted based on another CPU core group with normal power supply. This improves the problem of electronic devices failing to boot due to a power supply failure of any CPU core group during the boot process, and also achieves the goal of booting the electronic device based on a CPU core group with normal power supply.

[0008] In one possible implementation of the first aspect, each of the aforementioned CPU core groups shares a power supply detection feedback point. The detection of a power supply abnormality in the first CPU core group includes detecting that the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds a preset range. Each CPU core group shares a power supply detection feedback point PIN, thereby detecting the power supply voltage value of the CPU core group connected to it. The power supply voltage value detected by the power supply detection feedback point PIN can typically indicate whether the connected CPU core group can be powered normally, thus determining whether the electronic device can be started. The preset range is the range corresponding to a normal power supply voltage for the CPU core group. It can be set according to the attributes of the CPU core group and actual needs, or it can be set based on statistical analysis of the normal operating voltage range of CPU core groups in actual applications. If it exceeds this range, the power supply is considered abnormal; if it is within this range, the power supply is considered normal. In this implementation, using whether the voltage value of the power supply detection feedback point exceeds the preset range to determine whether the power supply is abnormal can establish a standard for judging CPU core group abnormalities.

[0009] If the power supply voltage value detected by the power supply detection feedback point PIN is not within the preset range, it indicates that the CPU core group is abnormally powered. The CPU core group itself may be faulty, or the power supply connection between the CPU core group and the chip may be broken. The solder balls of the power supply detection feedback point of the CPU core group on the chip may be cracked, and the CPU core group is currently unable to be powered normally.

[0010] In one possible implementation of the first aspect, detecting that the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds a preset range includes: repeatedly detecting the voltage value of the power supply detection feedback point corresponding to the first CPU core group; and continuously detecting that the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range more than a preset number of times. The preset number of times can be set according to actual needs. In this implementation, since a single measurement may have errors, each misjudgment will lead to abnormal startup of the electronic device. Using continuous multiple measurements can avoid errors and improve the accuracy of the detection data.

[0011] In one possible implementation of the first aspect, when a power supply abnormality is detected in the first CPU core group, that first CPU core group is made unavailable. In this implementation, instead of discarding all CPU core groups, the current CPU core group is discarded when a power supply abnormality is detected, thus allowing the electronic device to still power on and start up even when the CPU is malfunctioning. This implementation avoids using a CPU core group with a faulty power supply to power on the electronic device, which could lead to more serious damage or burnout of the electronic device.

[0012] In one possible implementation of the first aspect, the first CPU core group includes a main CPU core. Before starting the electronic device based on the second CPU core group, the highest frequency of the CPU cores in the second CPU core group is increased. During this process, the first CPU core group includes the main CPU core. Due to a power supply failure in the first core group including the main CPU core, the electronic device can only be started using the second CPU core group excluding the main CPU core. Due to factors such as the frequency and voltage of non-main CPU cores, the second CPU core group excluding the main CPU core is usually not used for startup in the electronic device's startup process. Therefore, it is necessary to increase the frequency of the non-main CPU cores to start the electronic device. In this implementation, the highest frequency of the CPU cores in the second CPU core group is increased to meet the conditions for the electronic device to power on and start. This allows the electronic device to start promptly, ensuring that it can still power on and start even when the first CPU core group experiences a power supply failure. This effectively addresses the problem of electronic devices failing to power on due to a power supply failure in any CPU core group.

[0013] In one possible implementation of the first aspect, after the electronic device boots up and displays its desktop, it supports a preset first function but does not support a second function. The first function may include data backup and short-range communication and / or telephone; the second function differs from the first function. The first function is an emergency function. After the electronic device boots up, only the emergency function, namely data backup and short-range communication and / or telephone, is supported for emergency situations. Because of abnormal CPU core power supply, whether it's the main CPU core or a non-main CPU core, an abnormality indicates a major malfunction in the electronic device; therefore, an emergency function is needed for emergency handling. In this implementation, after the electronic device boots up, it only supports the first function, i.e., the emergency function, thus ensuring that even when an abnormal CPU core power supply is detected, the electronic device can still boot up to perform emergency handling to avoid data loss and ensure user safety.

[0014] In one possible implementation of the first aspect, starting the electronic device based on the second CPU core group includes: starting the electronic device based on the second CPU core group to enter a safe escape mode; in this safe escape mode, the electronic device supports the first function but does not support the second function. In this implementation, after starting the electronic device based on the second CPU core group, it enters a safe escape mode. At this time, the electronic device only supports the first function, namely the emergency function, to avoid loss of user data and ensure user safety.

[0015] In one possible implementation of the first aspect, after the aforementioned electronic device starts up and displays its desktop, a prompt is made to back up the data on the electronic device and / or switch to another device. In this implementation, the electronic device is actually in a faulty state, and the prompt to back up the data on the electronic device and / or switch to another device is made to avoid data loss and subsequent unavailability of the electronic device.

[0016] In one possible implementation of the first aspect, upon detecting a data backup operation, data backup processing is performed using a data backup application in the aforementioned electronic device. In this implementation, when a data backup operation is detected, data backup processing is performed using a data backup application in the aforementioned electronic device to prevent data loss and subsequent unavailability of the electronic device.

[0017] In one possible implementation of the first aspect, the aforementioned boot process includes an XBL stage. The detection of a power supply abnormality for the first CPU core group includes: in the XBL stage, a power supply abnormality for the first CPU core group is detected; and / or, in the XBL stage, the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds a preset range; and / or, in the XBL stage, the voltage value of the power supply detection feedback point corresponding to the first CPU core group is detected multiple times, and the number of times the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range is greater than a preset number. Since the XBL stage guides memory initialization, setting the specific steps for detecting a power supply abnormality in the CPU core group (abnormality judgment conditions, number of detections, etc.) in the XBL stage allows the detected power supply data of the CPU core group to be stored in memory, thereby enabling this data during the XBL stage. This implementation can improve the problem of electronic devices failing to boot due to a power supply abnormality in any CPU core group during the boot process. In the XBL stage, the next stage, the ABL stage, is only executed if a power supply abnormality is detected in the first CPU core group and the power supply to the second CPU core group is normal.

[0018] In one possible implementation of the first aspect, the aforementioned boot process further includes an ABL (Advanced Boot Recording) stage, where setting the first CPU core group to be unavailable includes: in the ABL stage, setting the first CPU core group to be unavailable. Since the ABL stage is primarily for guiding the Kernel boot process, setting the CPU core removal module in the ABL stage can guide the disabling of the first CPU core group before the Kernel boots, thus preventing the first CPU core group from being enabled in subsequent Kernel stages. This implementation avoids using a first CPU core group with abnormal power supply for booting the electronic device, which could lead to more serious damage or burnout of the electronic device.

[0019] In one possible implementation of the first aspect, the aforementioned boot process includes a kernel stage. The frequency boosting process for the highest CPU core in the second CPU core group includes: during the kernel stage, boosting the highest frequency of the CPU core in the second CPU core group. Since the kernel stage mainly includes the startup of a series of kernel layers, such as the startup of some drivers, setting the CPU dynamic frequency scaling module in the kernel stage can drive the startup of the CPU dynamic frequency scaling operation within the CPU dynamic frequency scaling module. When the second CPU core group includes the main CPU core, i.e., the second CPU core group is a large CPU core group, it already meets the electrical conditions for booting up the electronic device, so the second CPU core group can be directly used for booting up the electronic device. When the second CPU core group does not include the main CPU core, i.e., the second CPU core group is a small CPU core group, it does not meet the electrical conditions for booting up the electronic device, so the highest frequency of the small CPU core needs to be boosted. In this implementation, a normally powered CPU core group can meet the boot conditions for the electronic device, thus enabling a successful boot.

[0020] In one possible implementation of the first aspect, the aforementioned power-on process includes a Kernel 1 stage. The aforementioned startup of the electronic device based on the second CPU core group further includes: in the Kernel 1 stage, starting the electronic device based on the second CPU core group to enter a safe escape mode. After dynamic frequency adjustment, the second CPU core group now meets the electrical conditions for power-on, so the electronic device can be started based on the second CPU core group to enter the next stage, the FW stage, a safe escape mode. This implementation ensures that the electronic device can still be powered on even when the power supply to the first CPU core group is abnormal, thus promptly addressing the problem of electronic devices failing to power on due to power supply abnormalities in any CPU core group.

[0021] In one possible implementation of the first aspect, the aforementioned boot process further includes a Firewall (FW) stage. After the electronic device boots up and displays the desktop, the process further includes: during the FW stage, the electronic device enters a safe escape mode; and / or, during the FW stage, a prompt is given to back up the data in the electronic device and / or switch devices. Since the FW stage mainly includes the startup of a series of application framework layers, such as the startup of some managers and predefined functions, these managers can include window managers, content providers, view systems, phone managers, resource managers, notification managers, etc. Correspondingly, the data backup for the first function belongs to resource manager management, the phone belongs to phone manager management, and communication belongs to phone notification management, etc. Setting the safe escape module in the FW stage can well support the startup of the preset first function. If the electronic device is in a faulty state due to abnormal CPU core power supply, the FW stage also prompts the user to back up the data in the electronic device and / or switch devices. In this implementation, the user can be promptly prompted to back up data and / or switch devices, and data can be backed up in a timely manner to avoid user loss.

[0022] In one possible implementation of the first aspect, the aforementioned boot-up process further includes an application startup phase, and the aforementioned data backup further includes: during the application startup phase, launching a data backup application in the electronic device to perform data backup processing. Since the application startup phase involves launching a series of application layers, which can include a series of application packages, and the data backup operation requires a data backup application, which is a type of application package, placing the data backup module during the application startup phase effectively enables the data backup operation to be launched. In this implementation, performing data backup processing through a data backup application effectively backs up data to prevent user data loss.

[0023] Secondly, an electronic device is provided, which has the function of implementing the method provided in the first aspect. This function can be implemented by hardware or by hardware executing corresponding software. The hardware or software includes one or more modules corresponding to the above-described function.

[0024] Thirdly, an electronic device is provided, comprising: one or more processors and a memory; the processor includes at least one central processing unit (CPU) core group, each CPU core group including one or more CPU cores, the memory being used to store computer execution instructions, wherein when the electronic device is running, the processor executes the computer execution instructions stored in the memory to cause the electronic device to perform a power-on startup method as provided in any of the first aspects above.

[0025] Fourthly, a computer-readable storage medium is provided that stores instructions which, when executed on a computer, enable the computer to perform the boot-up method provided in any of the first aspects above.

[0026] Fifthly, a computer program product containing instructions is provided, which, when run on a computer, enables the computer to execute the boot-up method provided in any of the first aspects above.

[0027] The technical effects of any of the design methods in aspects two through five can be found in the technical effects of different design methods in aspect one, and will not be repeated here. Attached Figure Description

[0028] Figure 1 A schematic diagram of a large, medium, and small CPU core group provided in an embodiment of this application;

[0029] Figure 2 A schematic diagram illustrating a power-on failure due to a CPU core hardware malfunction, provided as an embodiment of this application;

[0030] Figure 3 A hardware structure diagram of an electronic device provided in an embodiment of this application;

[0031] Figure 4 This is a schematic diagram of a power-on startup method provided in an embodiment of this application;

[0032] Figure 5 A schematic diagram of a structure in which a first core group and a second core group are respectively connected to their respective power supply detection feedback points, as provided in an embodiment of this application;

[0033] Figure 6 This application provides a schematic diagram of a CPU core group booting up and starting the desktop based on normal power supply.

[0034] Figure 7 This application provides a schematic diagram of a startup prompt.

[0035] Figure 8 A schematic diagram of a power-on method based on the power-on mode corresponding to the CPU core group power supply detection result, provided in an embodiment of this application;

[0036] Figure 9 A power-on flowchart provided for an embodiment of this application;

[0037] Figure 10 A schematic diagram illustrating the addition of a boot-up module based on the boot process, provided as an embodiment of this application;

[0038] Figure 11This application provides a boot sequence diagram based on the boot process. Detailed Implementation

[0039] The technical solutions of the embodiments of this application will be described below with reference to the accompanying drawings. In the description of this application, unless otherwise stated, " / " indicates that the objects before and after are in an "or" relationship. For example, A / B can represent A or B. "And / or" in this application is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone, where A and B can be singular or plural. Furthermore, in the description of this application, unless otherwise stated, "multiple" refers to two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be single or multiple. Furthermore, to facilitate a clear description of the technical solutions in the embodiments of this application, the terms "first" and "second" are used in the embodiments of this application to distinguish identical or similar items with substantially the same function and effect. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or execution order, and that "first" and "second" are not necessarily different. Meanwhile, in the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is being used as an example, illustration, or description. Any embodiment or design scheme described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design schemes. Specifically, the use of terms such as "exemplary" or "for example" is intended to present related concepts in a concrete manner for ease of understanding.

[0040] The Central Processing Unit (CPU), as the core of a computer system's computation and control, is the final execution unit for information processing and program execution. The CPU is one of the main components of an electronic computer, a core part of the computer. Its main functions are interpreting computer instructions and processing data in computer software. The CPU is the core component responsible for reading, decoding, and executing instructions. The CPU mainly consists of two parts: the control unit and the arithmetic logic unit (ALU), which also includes high-speed cache memory and the data and control buses that connect them. The three core components of an electronic computer are the CPU, internal memory, and input / output devices. The CPU's main functions are processing instructions, executing operations, controlling timing, and processing data.

[0041] In today's era of rapid information technology development, electronic devices have become an indispensable part of our daily lives. The CPU is not only the "brain" of these devices, but also a key factor determining their performance and operating efficiency. It is the core component of electronic devices, responsible for executing operating system instructions and software applications.

[0042] Currently, processors are widely used in electronic devices such as smartphones and other mobile devices. With the continuous development of processors, the concept of big.LITTLE CPUs has emerged. Integrating high-performance large cores with high-efficiency small cores allows for flexible handling of various task challenges. In this mode, light workloads can be assigned to small cores, significantly reducing power consumption; large cores can focus on heavy workloads without having to handle other light tasks. For electronic devices, this mode also reduces heat generation and enhances battery life. Therefore, CPU cores can be divided into different core groups based on their size and function, with different core groups assigned different workloads.

[0043] The boot process of electronic devices relies on the CPU cores within them. In related technologies, a common problem is that a CPU core failure can prevent the entire boot process from functioning correctly, leading to the device failing to power on. For example, if any CPU core experiences a power supply failure, it's assumed that the CPU cores will fail to boot due to the power supply issue, ultimately preventing the device from powering on. Therefore, any power supply failure in a single CPU core is considered a power supply failure for the entire CPU, thus preventing the electronic device from booting.

[0044] For example, see Appendix Figure 1 For CPU cores in electronic devices, large cores include CPU0, and a large core group includes one large core, CPU0. Medium cores include CPU1, CPU2, CPU3, and CPU4, and a medium core group includes four medium cores, CPU1, CPU2, CPU3, and CPU4. Small cores include CPU5, CPU6, and CPU7, and a small core group includes three small cores, CPU5, CPU6, and CPU7. See appendix. Figure 2 If any CPU core group experiences a power supply failure, the electronic device will fail to boot due to the power supply issue, ultimately preventing the device from starting. This is just one example; CPU core groups can be divided in other ways and are not limited to this.

[0045] To address the issue of electronic devices failing to boot due to CPU core group failures, this application provides a boot-up method. In this method, if a power supply abnormality is detected in a first CPU core group while the power supply to a second CPU core group is normal, the electronic device is booted based on the second CPU core group; after booting, the electronic device displays the desktop. The electronic device includes at least one CPU core group, and each CPU core group includes one or more CPU cores. When the power supply to one CPU core group is abnormal, another normal CPU core group is used to power and boot the electronic device, ensuring that the electronic device can still boot even when the CPU core group power supply is abnormal.

[0046] Based on the power-on method provided in the embodiments of this application, if the current CPU core group has an abnormal power supply and a power supply failure, the current CPU core group cannot start normally, and the electronic device cannot start normally either. In this case, the electronic device can be started based on other CPU core groups with normal power supply, thereby improving the problem that the electronic device cannot start due to a power supply failure of any CPU core group during the power-on process, and also achieving the purpose of starting the electronic device based on a CPU core group with normal power supply.

[0047] The boot-up method provided in this application is applied to electronic devices. These electronic devices can be mobile phones, tablets, desktops, laptops, handheld computers, notebook computers, ultra-mobile personal computers (UMPCs), netbooks, cellular phones, personal digital assistants (PDAs), augmented reality (AR) / virtual reality (VR) devices, and other devices capable of CPU-based startup. This application does not impose any special limitations on the specific form of the electronic device.

[0048] The embodiments of this application will be specifically described below using a mobile phone as an example of an electronic device. It should be understood that a mobile phone is only one example of the above-described electronic device, and a mobile phone may have more or fewer components, may combine two or more components, or may have different component configurations.

[0049] Appendix Figure 3A schematic diagram of the hardware structure of electronic device 100 is shown. Electronic device 100 may include a processor 110, an external memory interface 120, an internal memory 121, a universal serial bus (USB) interface 130, a charging management module 140, a power management module 141, a battery 142, antenna 1, antenna 2, a mobile communication module 150, a wireless communication module 160, an audio module 170, a sensor module 180, buttons 190, a motor 191, an indicator 192, a camera 193, a display screen 194, and a user identification module (SIM) card interface 195, etc. The sensor module 180 may include pressure sensors, gyroscope sensors, barometric pressure sensors, magnetic sensors, accelerometers, distance sensors, proximity sensors, fingerprint sensors, temperature sensors, touch sensors, ambient light sensors, bone conduction sensors, etc.; the audio module 170 may include a speaker, receiver, microphone, headphone jack, etc.

[0050] It is understood that the structure illustrated in this embodiment does not constitute a specific limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may include more or fewer components than illustrated, or combine some components, or split some components, or have different component arrangements. The illustrated components may be implemented in hardware, software, or a combination of software and hardware.

[0051] Processor 110 may include one or more processing units, such as: application processor (AP), modem processor, graphics processing unit (GPU), image signal processor (ISP), controller, memory, video codec, digital signal processor (DSP), baseband processor, and / or neural network processing unit (NPU), etc. The different processing units may be independent devices or integrated into one or more processors.

[0052] The controller can be the nerve center and command center of the electronic device 100. The controller can generate operation control signals according to the instruction opcode and timing signals to complete the control of fetching and executing instructions.

[0053] The processor 110 may also include a memory for storing instructions and data. In some embodiments, the memory in the processor 110 is a cache memory. This memory can store instructions or data that the processor 110 has just used or that are used repeatedly. If the processor 110 needs to use the instruction or data again, it can directly retrieve it from the aforementioned memory. This avoids repeated accesses, reduces the waiting time of the processor 110, and thus improves the efficiency of the system. For example, the voltage value and preset range of the power supply detection feedback point corresponding to the CPU core group can be stored, and sent to a flag bit after logical judgment.

[0054] In some embodiments, the processor 110 may include one or more interfaces. These interfaces may include an inter-integrated circuit (I2C) interface, an inter-integrated circuit sound (I2S) interface, a pulse code modulation (PCM) interface, a universal asynchronous receiver / transmitter (UART) interface, a mobile industry processor interface (MIPI), a general-purpose input / output (GPIO) interface, a user identity module (SIM) interface, and / or a universal serial bus (USB) interface. For example, a GPIO interface may be used to connect to a CPU core power supply detection feedback point to input the CPU core power supply voltage value.

[0055] It is understood that the interface connection relationships between the modules illustrated in the embodiments of the present invention are merely illustrative and do not constitute a structural limitation on the electronic device 100. In other embodiments of this application, the electronic device 100 may also employ different interface connection methods or combinations of multiple interface connection methods as described in the above embodiments.

[0056] The mobile communication module 150 can provide solutions for wireless communication, including 2G / 3G / 4G / 5G, applied to the electronic device 100. In some embodiments, at least some functional modules of the mobile communication module 150 can be housed in the processor 110. In some embodiments, at least some functional modules of the mobile communication module 150 and at least some modules of the processor 110 can be housed in the same device. For example, after the electronic device is powered on, it can support a first function, which may include making an emergency call using 2G / 3G / 4G / 5G wireless communication via the mobile communication module 150.

[0057] The wireless communication module 160 can provide solutions for wireless communication applications on the electronic device 100, including wireless local area networks (WLANs) (such as Wi-Fi), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), and Infrared (IR) technologies. The wireless communication module 160 can be one or more devices integrating at least one communication processing module.

[0058] Electronic device 100 implements display functions through a GPU, a display screen 194, and an application processor. The GPU is a microprocessor for image processing, connected to the display screen 194 and the application processor. The GPU is used to perform mathematical and geometric calculations and for graphics rendering. Processor 110 may include one or more GPUs, which execute program instructions to generate or modify display information.

[0059] The display screen 194 is used to display images, videos, etc. The display screen 194 includes a display panel. In some embodiments, the electronic device 100 may include one or N display screens 194, where N is a positive integer greater than 1.

[0060] The display screen is used to show images, videos, text, etc. For example, it displays primary functions such as telephone, backup application, Wi-Fi, and short-range communication, while also displaying a lightning bolt warning symbol and the text "Please back up your data and / or switch devices as soon as possible."

[0061] The external storage interface 120 can be used to connect an external memory card, such as a Micro SD card, to expand the storage capacity of the electronic device 100. The external memory card communicates with the processor 110 through the external storage interface 120 to perform data storage functions. For example, files such as music, videos, and voltage values ​​of CPU core power supply detection feedback points can be stored on the external memory card.

[0062] Internal memory 121 can be used to store computer executable program code, which includes instructions. Processor 110 executes various functional applications and data processing of electronic device 100 by running the instructions stored in internal memory 121.

[0063] For example, the internal memory may include a program storage area and a data storage area. The program storage area may store the operating system and at least one application program required for a given function (such as sound playback, image playback, data backup, emergency calls, messages, etc.). The data storage area may store data created during phone use (such as voltage values ​​at CPU core power supply detection feedback points, preset ranges, telephone calls, short-range communication, text messages, voice messages, etc.). Furthermore, the internal memory may include high-speed random access memory and non-volatile memory, such as at least one disk storage device, flash memory, universal flash storage (UFS), etc.

[0064] Electronic device 100 can implement audio functions, such as music playback and recording, through the speaker, receiver, microphone, headphone jack, and application processor in audio module 170.

[0065] Audio module 170 is used to convert digital audio information into analog audio signal output, and also to convert analog audio input into digital audio signal. Audio module 170 can also be used for encoding and decoding audio signals. In some embodiments, audio module 170 may be located in processor 110, or some functional modules of audio module 170 may be located in processor 110. A speaker, also called a "loudspeaker," is used to convert audio electrical signals into sound signals. Electronic device 100 can listen to music or hands-free calls through the speaker. A receiver, also called a "handpiece," is used to convert audio electrical signals into sound signals. When electronic device 100 answers a phone call or voice message, the receiver can be brought close to the user's ear to hear the voice. A microphone, also called a "microphone" or "voice transducer," is used to convert sound signals into electrical signals. When making a phone call or sending a voice message, the user can bring their mouth close to the microphone to input the sound signal. Electronic device 100 may have at least one microphone. A headphone jack is used to connect wired headphones.

[0066] When the electronic device 100 displays video content, the audio module 170 can synchronously play the audio content corresponding to the video content.

[0067] For example, when the electronic device 100 prompts the user, and displays a lightning warning symbol and the text "Please back up your data and / or replace your device as soon as possible" on the display screen, the audio content corresponding to the text content is played synchronously through the audio module 170.

[0068] The following embodiments of this application use an electronic device that includes multiple CPU core groups, each CPU core group including one or more CPU cores, as an example to specifically illustrate the boot-up method of this application.

[0069] See appendix Figure 4 The method may include steps S401-S403:

[0070] Step S401: During the power-on process of the electronic device, if an abnormal power supply to the first CPU core group is detected while the power supply to the second CPU core group is normal.

[0071] During the power-on process, the electronic device checks the power supply status of each CPU core group. If the first CPU core group is found to have an abnormal power supply while the second CPU core group has a normal power supply, it indicates that both CPU core groups have abnormal and normal power supplies. Only under these circumstances can the device proceed to the next step, S402. In other words, when all CPU core groups have normal power supplies, the electronic device powers on normally; when all CPU core groups have abnormal power supplies, the electronic device cannot power on.

[0072] Step S402: Start the electronic device based on the second CPU core group.

[0073] When both CPU cores have abnormal power supply and normal power supply, the CPU cores with normal power supply can function normally. However, if, as in related technologies, the normally powered CPU cores are deemed insufficient to power on the electronic device and are discarded, the electronic device will fail to power on, resulting in the loss of much data. Users will also be unable to perform emergency procedures, potentially leading to user disconnection or threats to user safety. Therefore, in this embodiment, when both CPU cores have abnormal power supply and normal power supply, the electronic device can be powered on using the normally powered CPU cores.

[0074] Step S403: The electronic device displays the desktop after startup.

[0075] Electronic devices boot up based on a properly powered CPU core group and display the desktop. At this point, the desktop allows for some simple operations and emergency handling.

[0076] If a power supply failure is detected in the first CPU core group, while the power supply to the second CPU core group is normal, the electronic device can be started using the second CPU core group. This indicates that the first CPU core group cannot start the electronic device normally, while the second CPU core group can. In this case, the second CPU core group can be selected to start the electronic device. If the current CPU core group has a power supply failure, it cannot start normally, nor can it start the electronic device. In this case, the electronic device can be started using another CPU core group with normal power supply. This improves the problem of electronic devices failing to start due to a power supply failure in any CPU core group during the boot process, and also achieves the goal of starting the electronic device using a CPU core group with normal power supply.

[0077] The above three steps S401-S403 are implemented under the condition that the power supply of the first CPU core group is abnormal and the power supply of the second CPU core group is normal. Therefore, it is necessary to accurately detect the abnormal and normal power supply of the CPU core group.

[0078] In order to accurately detect whether the power supply of the CPU core group is abnormal or normal, and to enable the electronic device to start up based on the CPU core group with normal power supply, in addition to steps S401-S403, specific steps for detecting abnormalities and steps for judging the accuracy of detection are added.

[0079] For example, detecting a power supply abnormality in the first CPU core group in step S401 above includes: detecting that the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds a preset range. This is only one example, and the parameters for detecting a power supply abnormality in the CPU core group can be other parameters, such as current value or power value, etc., and are not limited thereto.

[0080] Based on their size and function, CPU cores are divided into large cores and small cores. Large cores are called "performance cores" or "P-cores," based on the Golden Cove architecture, and can include 8 cores and 16 threads, supporting Hyper-threading. For example, only large cores support the AVX-512 instruction set and DLBoost deep learning acceleration. Small cores are called "efficiency cores" or "E-cores," based on the Gracemont architecture, and can include 8 cores and 8 threads, but do not support Hyper-threading. Therefore, based on the size and function of the CPU cores, high-performance large cores can be grouped into one CPU core group called the large core group, and high-efficiency small cores can be grouped into another core group called the small core group. Different core groups are assigned different workloads.

[0081] To monitor the status of CPU core groups, many processors incorporate hardware-based power supply detection feedback points for different CPU core groups. Each CPU core group can share a single power supply detection feedback point, or multiple CPU core groups can share a single power supply detection feedback point. Each power supply detection feedback point corresponds to a PIN (i.e., a pin or pin). For example, large core groups share one power supply detection feedback point, medium core groups share another, and small core groups share a single voltage detection feedback point. See the appendix for further examples. Figure 5 The large core group and the medium core group are set up as one CPU core group, called the "first core group" or "large CPU core group", which share a power supply detection feedback point PIN1. The small core group is set up as another CPU core group, called the "second core group" or "small CPU core group", which shares a power supply detection feedback point PIN2.

[0082] Simultaneously, the voltage value of the power supply detection feedback point is used as a benchmark to determine whether the power supply is abnormal. Each CPU core group's power supply detection feedback point PIN is used to detect the corresponding CPU core group's power supply voltage value. The preset range represents the range corresponding to a normal CPU core group power supply voltage. This range can be set according to the CPU core group's attributes and actual needs, or based on statistical analysis of the normal operating voltage range of CPU core groups in practical applications. If the voltage exceeds this range, the power supply is considered abnormal; if it falls within the range, the power supply is considered normal.

[0083] For example, the power supply voltage of the power supply detection feedback point PIN can be detected using a voltage register. Whether the power supply voltage of the power supply detection feedback point PIN is abnormal can be determined based on the flag bit of the corresponding voltage register on the CPU chip. In some embodiments, due to differences in CPU chip designs from different CPU manufacturers, the voltage registers used to determine the CPU core group's operating status may differ on different CPU chips. The operating status of the CPU core group at the power supply detection feedback point can be detected in real time based on the data stored in the voltage register. In other words, the electronic device can determine the operating status of the CPU core group based on the target data corresponding to the target register. Accordingly, the target data corresponding to the target register may include a voltage register flag bit, which the electronic device uses to determine whether the CPU core group's power supply is abnormal. In some embodiments, the voltage value of the power supply detection feedback point PIN detected by the voltage register is stored in the voltage register and compared with a preset range stored in the voltage register. When the voltage value of the power supply detection feedback point PIN is within the preset range, the target value of the voltage register is determined to be 0, indicating that the corresponding CPU core group's power supply is normal. When the voltage value of the power supply detection feedback point PIN exceeds the preset range, the target value of the voltage register is determined to be 1, indicating that the corresponding CPU core group's power supply is abnormal. Here, as long as the voltage register has flag bits to perform the register function, such as a watchdog register or a config register, the type of voltage register is not limited.

[0084] Abnormal voltage values ​​detected by the power supply feedback point PIN can be categorized into two types. One type is caused by a fault in the CPU core assembly itself, leading to abnormal power supply voltage detected by the PIN connected to the CPU core assembly. This fault in the CPU core assembly could be due to a hardware or software malfunction. The other type is caused by an abnormality in the power supply feedback point PIN itself. Since the power supply feedback point PIN is made of SOC solder balls, these solder balls form isolated solder joints. During CPU core operation, these isolated solder joints are subjected to prolonged thermal fatigue, posing a risk of cracking. PIN cracking can lead to abnormal power supply voltage detected by the power supply feedback point. Both faults in the CPU core assembly itself and abnormalities in the power supply feedback point PIN will result in abnormal power supply voltage detected by the PIN. Abnormalities in the power supply feedback point PIN are most likely caused by hardware malfunctions. See the appendix for related technologies. Figure 2If any CPU core experiences a power supply failure, the electronic device will fail to boot due to the hardware power supply anomaly. Remedial measures include: 1) Replacing the CPU core. Since the CPU core is the core of the electronic device's computation and control, even replacing it cannot guarantee a successful boot, and the cost of replacing the CPU core is relatively high; 2) Replacing the electronic device. Because the electronic device cannot boot, the user cannot operate all its functions, leading to data loss, loss of emergency functions, and compromised user safety; etc.

[0085] In this embodiment, when an electronic device fails to power on due to a hardware malfunction, it can be powered on using a software-implemented power-on control method. When the current CPU core group experiences a power supply failure, the software stops using that CPU core group, and the electronic device is powered on using other CPU core groups with normal power supply. This improves the problem of electronic devices failing to power on due to a power supply failure of any CPU core group during the power-on process, and also achieves the goal of powering on the electronic device using CPU core groups with normal power supply.

[0086] The detection of the voltage value at the power supply detection feedback point corresponding to the first CPU core group exceeding the preset range in the above steps can be a single measurement or multiple measurements. For example, multiple measurements include: repeatedly detecting the voltage value at the power supply detection feedback point corresponding to the first CPU core group; and the number of times the voltage value at the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range is greater than a preset number.

[0087] In this embodiment, when a CPU core hardware failure prevents an electronic device from booting, it can be enabled to boot via software. For example, see the appendix. Figure 6 When the power supply to the current CPU core group is abnormal, the abnormal CPU core group can be removed from the software and the electronic device can be started based on other CPU core groups with normal power supply. This can improve the problem that the electronic device cannot be started due to the power supply failure of any CPU core group during the boot process, and can also achieve the purpose of starting the electronic device based on the CPU core group with normal power supply.

[0088] The detection of the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeding the preset range in the above steps can be a single measurement or multiple measurements. For example, the multiple measurements include: repeatedly detecting the voltage value of the power supply detection feedback point corresponding to the first CPU core group; and the number of times the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range is greater than a preset number.

[0089] The preset number of measurements can be set according to actual needs, such as 3 or 5 times. Generally, a single measurement will have errors, and each misjudgment will cause the electronic device to start up abnormally. Using multiple consecutive measurements can reduce the occurrence of errors, thereby improving the accuracy of the detection data.

[0090] For the first CPU core group whose power supply abnormality has been accurately detected, it has effectively become a faulty CPU core group and cannot perform its corresponding tasks. Forcing the faulty CPU core group to operate could cause more serious damage to the electronic device, potentially affecting other normal CPU core groups, or even burning out the entire electronic device. To protect the electronic device and ensure it can still power on even with a CPU core group experiencing a power supply abnormality, this application uses the first CPU core group as an example to exemplify the actions taken after the first CPU core group experiences a power supply abnormality.

[0091] For example, the first CPU core group mentioned above is set to unavailable.

[0092] This step disables the CPU core group in the event of a power supply failure, as described above. In other words, when a power supply failure is detected, the CPU core group with the abnormal power supply is disabled and removed from the software to prevent it from being used to power on the electronic device, which could lead to more serious damage or burnout.

[0093] Large core groups and small core groups handle different workloads due to their different functions. For example, tasks involving big data analysis and parallel computing can utilize the powerful computing capabilities of large core groups, while background services and applications can use small core groups for energy saving. Since booting up is a task related to big data analysis and parallel computing, requiring high voltage, high power, and high frequency, large core groups are generally used for booting. Small core groups typically handle background services and applications, requiring lower voltage, power, and frequency requirements for booting. Therefore, if small core groups are used for booting, their electrical conditions must be modified to meet the booting requirements. In some embodiments, this can be achieved by increasing the frequency. This application uses frequency increase as an example to illustrate the process.

[0094] For example, the highest frequency of the CPU cores in the second CPU core group is increased.

[0095] This step occurs before starting the electronic device based on the second CPU core group, assuming the first CPU core group includes the main CPU core. The first core group, including the main CPU core, is typically a high-frequency group, used for executing critical tasks of the electronic device. The second CPU core group, not including the main CPU core, is typically a low-frequency group, used for executing non-critical tasks of the electronic device. In other words, when the first core group experiences a power supply failure, the second core group is used for startup. This requires increasing the maximum frequency of the CPU cores in the second core group to meet the startup requirements of the electronic device, thus ensuring a successful startup.

[0096] CPU frequency refers to the frequency of the digital clock signal inside the CPU. The clock signal consists of high and low states during oscillation, and is a square wave signal continuously emitted at specific voltage amplitudes and time intervals. The time interval between signals is the period, measured in seconds (s); the number of pulses generated per unit time (1 second) is the frequency, measured in Hz. Different CPU frequencies result in different processing speeds and capabilities. If the first core group, including the main CPU cores, experiences a power outage, the electronic device is in a faulty state and can only be powered on by the second CPU core group, which has a normal power supply, to perform emergency procedures. Therefore, it is necessary to increase the CPU frequency of the second CPU core group as much as possible, such as increasing its maximum operating frequency, to improve its processing speed and capabilities, thereby better executing the boot process. In other words, the maximum frequency of the second CPU core group can be increased.

[0097] Once the electronic device starts up and displays its desktop, it enters the desktop application startup phase. At this point, system services have completed startup, the electronic device's system is ready, and the desktop application will launch. Users can then start launching applications and performing various operations on the device. However, if there is a CPU core power supply failure, the affected CPU core will be unavailable and unable to handle tasks. Therefore, the electronic device cannot support all applications. In such cases, the electronic device can implement emergency measures, supporting some simple operations and functions while restricting the use of other functions to prevent user data loss and ensure user safety.

[0098] For example, the emergency response is as follows: the electronic device supports a preset first function but does not support a second function.

[0099] The first function includes: data backup and short-range communication and / or telephone; the second function is different from the first function.

[0100] The emergency response at this point can be understood as a safe escape mode. Starting the aforementioned electronic device based on the second CPU core group essentially means entering this safe escape mode, allowing for simple operations and emergency handling. In other words, the electronic device supports the first function mentioned above but not the second function. For example, see the appendix. Figure 6 The first function is for emergency calls, such as alarm calls. Short-range communication uses Wi-Fi to send information, and data backup uses Wi-Fi to transfer data.

[0101] Meanwhile, due to a CPU core power supply anomaly, the electronic device is actually in a faulty state. To avoid data loss and subsequent unavailability of the device, for example, after the electronic device boots up and displays the desktop, a prompt can be displayed to back up the data on the device and / or to switch to another device. This promptly reminds the user to take relevant actions, save user data, and switch devices as soon as possible. The above prompt can be text or voice. If it is a text prompt, it can be displayed on the screen of the electronic device, for example, see Appendix. Figure 7 Display a lightning bolt warning symbol and the text "Please back up your data and / or replace the device as soon as possible" on the screen of the electronic device. If it is a voice prompt, a speaker or loudspeaker can be used.

[0102] Furthermore, to avoid data loss and subsequent unavailability of electronic devices, for example, when a data backup operation is detected, the data backup operation is performed, that is, the data backup process is performed through the data backup application in the electronic device.

[0103] In some embodiments, see Appendix Figure 8 When the first CPU core group is a large / medium core group and the second CPU core group is a small core group, the voltage register is used to detect the power supply voltage of the CPU core group power supply detection feedback point PIN. For example, after setting the first CPU core group as a large / medium core group and the second CPU core group as a small core group, and using the voltage register to detect the power supply voltage of the CPU core group power supply detection feedback point PIN, the specific boot process steps are detailed in the appendix. Figure 8 ,as follows:

[0104] Step 1. Power on and start the computer.

[0105] Step 2. Detect the CPU core group power supply voltage in the voltage register.

[0106] In this step, during the power-on process, the electronic device detects the power supply status of each CPU core group through a voltage register. The power supply status of each CPU core group is determined by the power supply voltage detected by the CPU core group's power supply detection feedback point PIN, which is stored in the voltage register.

[0107] Step 3. Select different boot modes based on the power supply status of different CPU core groups detected.

[0108] This step involves three boot modes: Boot Mode 1, Boot Mode 2, and Boot Mode 3, each corresponding to different CPU core power supply conditions. For example, Boot Mode 1: If an abnormal power supply to the large / medium core group is detected, while the small core group's power supply is normal, the electronic device is started based on the small core group. This indicates that the large / medium core group has failed and cannot boot the electronic device normally, while the small core group can. In this case, the abnormally powered large / medium core group is removed from the software, and the electronic device is started using the small core group. Simultaneously, the highest frequency of the small core group's CPU cores is increased to meet the boot requirements of the electronic device. Boot Mode 2: If the large / medium core group's power supply is normal, while the small core group's power supply is abnormal, the abnormally powered small core group is removed from the software, and the electronic device is started based on the large / medium core group, proceeding to the next step, the safety escape mode. Boot Mode 3: If both the large / medium core group and the small core group's power supply are normal, the device boots normally. This step selects different boot modes based on the power supply status of different CPU core groups detected, thereby improving the problem of electronic devices failing to boot due to power supply failure of any CPU core group during the boot process, and also achieving the purpose of booting the electronic device based on the CPU core group with normal power supply.

[0109] In some embodiments, in the third step, the large and medium core groups have strong processing speed and processing capabilities, and the electronic device can first determine whether the large and medium core groups have abnormal power supply, and then determine whether the small core groups have abnormal power supply.

[0110] Step 4. Enter safe escape mode.

[0111] This step is only activated when there is a power supply failure in the CPU core group. Whether it's a power supply failure in the large / medium core group or the small core group, there is still a power supply failure in the CPU core group. At this time, the electronic device is actually in a fault state. In order to avoid data loss and subsequent unavailability of the electronic device, it is required to enter the safety escape mode.

[0112] Step 5. Only the first function is supported.

[0113] In this step, the first function includes: data backup and short-range communication and / or telephone. Entering safe escape mode allows for some simple operations and emergency procedures; for example, see the appendix. Figure 6 Examples include emergency calls, sending messages via Wi-Fi, and transmitting data via Wi-Fi.

[0114] Step 6. Back up your data.

[0115] In this step, to avoid data loss and subsequent unavailability of electronic devices, for example, when a data backup operation is detected, the data backup operation is performed, that is, the data backup process is performed through the data backup application in the electronic device.

[0116] In the above six steps, when a CPU core group power supply abnormality is detected, the software stops using the CPU core group with abnormal power supply and starts the electronic device based on other CPU core groups with normal power supply. This can improve the problem of electronic devices failing to start due to power supply failure of any CPU core group during the boot process, and can also achieve the purpose of starting the electronic device based on CPU core groups with normal power supply.

[0117] This application also provides a boot-up method, as shown in the attached document. Figure 10 As shown, the method includes: adding modules corresponding to the above boot-up steps S401-S403 in the boot-up process, so that they execute the corresponding boot-up steps on the software of the electronic device. Meanwhile, as... Figure 11 As shown, in the power-on process, the power-on steps corresponding to the newly added modules are executed adaptively according to the power-on sequence.

[0118] This application uses a layered architecture software system of an electronic device as an example to illustrate its process.

[0119] The software system of electronic devices can adopt a layered architecture, event-driven architecture, microkernel architecture, microservice architecture, or cloud architecture. This application uses a layered architecture software system as an example. A layered architecture divides the software into several layers, each with a clear role and function. Layers communicate with each other through software interfaces.

[0120] The booting of electronic devices is achieved through software systems. From booting up to logging into the desktop, a series of software processes need to be started. Different processes correspond to different booting process stages, and different booting process stages correspond to the startup of different layers of the software system.

[0121] For example, see Appendix Figure 9 :

[0122] The boot process of an electronic device includes the boot loader stage, the kernel startup stage, the application framework startup stage (also known as the FW stage), and the application startup stage (also known as the application stage).

[0123] The boot loader stage can include the Extensible Bootloader stage (also known as the XBL stage) and the Application Bootloader stage (also known as the ABL stage). The XBL stage is used for memory initialization and startup, while the ABL stage is mainly for booting the kernel.

[0124] When a device is powered on or restarted, it is first started by the boot loader stage.

[0125] The boot loader stage involves the execution of a series of initialization code, followed by the loading of the operating system kernel into memory. The boot loader stage is typically stored in the device's firmware, and its main task is to initialize the hardware and load and start the operating system kernel. In the boot loader stage, memory initialization is first performed in the XBL stage, followed by the loading of the operating system kernel into memory to initiate the kernel's boot process.

[0126] Next, the kernel is started in the Kernel stage.

[0127] The kernel phase includes the startup of a series of kernel layers. The kernel layer is the layer between hardware and software. The kernel layer includes at least a series of driver-related tasks, such as display drivers, camera drivers, audio drivers, and sensor drivers.

[0128] Next, the application framework layer is started in the FW phase.

[0129] The FW phase includes the startup of a series of application framework layers. The application framework layers include the application layer's application programming interface (API) and the startup of the programming framework. The application framework layers include some predefined functions. The application framework layers may include a window manager, content provider, activity manager, input manager, view system, phone manager, resource manager, power manager, notification manager, etc.

[0130] Finally, the application layer, or App layer, is launched during the application startup phase.

[0131] The application startup phase includes the startup of a series of application layers. Each application layer can include a suite of application packages. These packages may include applications such as camera, gallery, calendar, phone, maps, navigation, network (WLAN), Bluetooth, music, video, browser, email, and SMS.

[0132] The power-on method provided in this application can also be adapted to each stage of the power-on process of the corresponding electronic device by adding modules, thereby improving the problem that the electronic device cannot be powered on due to abnormal power supply to any CPU core group during the power-on process, and enabling it to power on normally. This application uses a power-on flowchart as an example to illustrate the power-on method.

[0133] Appendix Figure 10 This refers to the boot process in this embodiment of the invention.

[0134] During the XBL phase, a new CPU core group power supply detection module was added.

[0135] In the XBL phase, a newly added CPU core group power supply detection module is used to detect whether the power supply of the CPU core group is abnormal. Since the XBL phase boots the memory initialization process, setting the CPU core group power supply detection module in the XBL phase allows the detected CPU core group power supply data to be stored in memory, thus enabling this data during the XBL phase. The electronic device includes at least one central processing unit (CPU) core group. Each CPU core group includes one or more CPU cores. Each CPU core group shares a power supply detection feedback point, and each power supply detection feedback point corresponds to a PIN (i.e., pin). The PIN of the power supply detection feedback point for each CPU core group can be used to detect the power supply voltage value of the corresponding CPU core group. For example, the voltage value of the CPU core group power supply detection feedback point in the CPU core group power supply detection module is used as a benchmark to determine whether the power supply is abnormal. Specifically, whether the voltage value of the power supply detection feedback point corresponding to the CPU core group exceeds a preset range is used to determine whether the CPU core group power supply is abnormal. The preset range is the range corresponding to a normal CPU core group power supply voltage. It can be set according to the attributes of the CPU core group and actual needs, or it can be set based on the voltage range of normal operation of the CPU core group in statistical applications. When the power supply exceeds the preset range, it is considered abnormal; when it is within the preset range, it is considered normal.

[0136] Meanwhile, to ensure the accuracy of the test results, the CPU core group power supply detection module also performs multiple tests on the voltage value of the CPU core group power supply detection feedback point. Only when the number of times the voltage value of the power supply detection feedback point corresponding to the CPU core group exceeds the preset range is it determined that the voltage value of the power supply detection feedback point corresponding to the CPU core group exceeds the preset range, i.e., the corresponding CPU core group power supply is abnormal.

[0137] The preset number of measurements can be set according to actual needs, and can be set to 3 times. Generally, a single measurement will have errors, and each misjudgment will cause the electronic device to start up abnormally. Using multiple consecutive measurements can reduce the occurrence of errors, thereby improving the accuracy of the test data.

[0138] During the XBL phase, the next phase, ABL, will only be executed if the power supply to the first CPU core group is detected to be abnormal and the power supply to the second CPU core group is normal.

[0139] During the ABL phase, a new CPU core removal operation module was added.

[0140] In the ABL (Advanced Boot Recording) phase, a newly added CPU core removal module is used to disable the first CPU core group (which has a faulty power supply) when a power supply abnormality is detected, while the second CPU core group has a normal power supply. Since the ABL phase primarily aims to boot the kernel, setting the CPU core removal module in the ABL phase allows the kernel to discard the first CPU core group before kernel startup, thus preventing it from being enabled in subsequent kernel phases. Disabling the first CPU core group with a faulty power supply means that when a power supply abnormality is detected, the CPU core group with the faulty power supply is discarded (for example, the first CPU core group). This prevents the electronic device from being booted using the faulty first CPU core group, which could lead to more serious damage or burnout. After this operation, only the CPU core groups with a normal power supply are available (for example, the second CPU core group).

[0141] In the Kernel stage, a new CPU dynamic frequency adjustment module was added.

[0142] In the Kernel I stage, a newly added CPU dynamic frequency adjustment module is used to dynamically adjust the frequency of the second CPU core group. Since the Kernel I stage mainly includes a series of kernel-level startups, such as the startup of some drivers, setting the CPU dynamic frequency adjustment module in the Kernel I stage can drive the initiation of CPU dynamic frequency adjustment operations within the module. When the second CPU core group includes the main CPU core (i.e., the second CPU core group is a large CPU core group), it already meets the electrical conditions for the electronic device to power on, so it can be directly used to power on the electronic device. When the second CPU core group does not include the main CPU core (i.e., the second CPU core group is a small CPU core group), it does not meet the electrical conditions for the electronic device to power on, so the highest frequency of the small CPU cores needs to be increased to meet the power-on conditions, thus enabling successful power-on. After dynamic frequency adjustment, the second CPU core group now meets the electrical conditions for power-on, so the electronic device can be started based on the aforementioned second CPU core group to enter the next stage, the FW stage, the safe escape mode.

[0143] During the FW phase, a new safety escape module has been added.

[0144] In the FW (Flight Management) phase, a new safety escape module is added for emergency handling of electronic devices. This module includes a safety escape mode where the electronic device supports a preset first function but not a second function. The first function can only perform emergency tasks such as data backup, short-range communication, and / or telephone calls. Since the FW phase primarily involves the startup of a series of application framework layers, such as the startup of managers and predefined functions (managers including window managers, content providers, view systems, telephone managers, resource managers, and notification managers), the data backup function (the first function) is managed by the resource manager, telephone calls by the telephone manager, and communication by the telephone notification manager. Setting the safety escape module in the FW phase effectively supports the startup of the preset first function. Simultaneously, due to a CPU core power supply failure, the affected CPU core becomes unavailable and unable to handle tasks. Therefore, the electronic device is in a faulty state. To avoid data loss and the device's unavailability, a prompt to back up the data and / or switch devices is required to proceed to the next phase, the application startup phase, for data backup.

[0145] A data backup module has been added during the application startup phase.

[0146] During the application startup phase, a new data backup module is added to perform data backup processing via the data backup application on the electronic device after detecting a data backup operation. Since the application startup phase involves the startup of a series of application layers, which can include a series of application packages, and the data backup operation requires the data backup application (which is a type of application package), placing the data backup module during the application startup phase effectively enables the initiation of the data backup operation.

[0147] During the XBL stage to the application startup stage, modules corresponding to the startup methods when the CPU core group power supply is abnormal are adaptively added according to the startup of the corresponding layer in different stages. This enables the electronic device to perform corresponding functions in different stages of startup, thereby solving the technical problem in the prior art that the electronic device cannot start up when any CPU core group power supply abnormality is detected. The electronic device can start up based on the CPU core group with normal power supply, so that the electronic device can start up and display the desktop. This improves the problem of electronic devices failing to start up due to any CPU core group power supply abnormality during the startup process, and enables it to start up normally.

[0148] Correspondingly, each boot-up stage has its own timing sequence. The boot-up method provided in this application can also be described using the timing sequence corresponding to each boot-up stage. This application uses a boot-up timing diagram as an example to illustrate the boot-up method.

[0149] Appendix Figure 11 This is a boot sequence diagram of an embodiment of the present invention.

[0150] First, in the XBL stage, the CPU core group power supply is detected.

[0151] The CPU core group power supply detection is used to detect whether the power supply to the CPU core group is abnormal, corresponding to the CPU core group power supply detection module in the XBL stage of the boot process. The method and number of checks for abnormalities are as described above.

[0152] During the XBL phase, the next phase of operation is only executed if an abnormal power supply to the first CPU core group is detected and the power supply to the second CPU core group is normal. The next phase is the ABL phase.

[0153] Next, during the ABL phase, the CPU core removal operation is performed.

[0154] The CPU core removal operation is used to remove CPU cores that are experiencing power supply abnormalities. This corresponds to the CPU core removal module in the ABL (Advanced Boot Record) stage of the boot process. The core removal operation method is as described above.

[0155] Next, in the Kernel stage, the CPU cores undergo dynamic frequency adjustment.

[0156] Among them, CPU dynamic frequency adjustment is used to dynamically adjust the frequency according to the CPU core group at startup to meet the requirements of the safe escape mode, corresponding to the CPU dynamic frequency adjustment module in the Kernel stage of the boot process. The dynamic frequency adjustment method is as described above.

[0157] During the FW phase, enter safe escape mode.

[0158] The safety escape mode is used for emergency handling of electronic devices, corresponding to the safety escape module in the FW phase of the power-on process. The safety escape method is as described above.

[0159] Data backup is performed during the application startup phase.

[0160] The data backup function, upon detecting a data backup operation, executes a data backup process via a data backup application within the electronic device. This corresponds to the data backup module during the application startup phase of the boot process. This is the data backup method described above.

[0161] The modules and corresponding timings added in each stage from the XBL stage to the application startup stage are the same. This is also to enable the electronic device to start based on the CPU core group with normal power supply when any CPU core group power supply is detected as abnormal. This allows the electronic device to start up and display the desktop, improving the problem of electronic devices failing to start up due to abnormal power supply of any CPU core group during the startup process, and enabling it to start up normally.

[0162] It is understood that, in order to achieve the above functions, the electronic device includes hardware and / or software modules that perform the respective functions. Based on the algorithmic steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is implemented in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application in conjunction with the embodiments, but such implementation should not be considered beyond the scope of this application.

[0163] This embodiment can divide the electronic device into functional modules according to the above method example. For example, each function can be divided into its own functional modules, or two or more functions can be integrated into one processing module. The integrated modules can be implemented in hardware. It should be noted that the module division in this embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0164] This application also provides an electronic device that may include one or more processors and a memory.

[0165] The memory is coupled to the processor. For example, the memory and the processor can be coupled together via a bus.

[0166] The memory stores computer program code. This computer program code includes computer instructions, which, when executed by the processor, cause the electronic device to perform the screen projection method described in this embodiment.

[0167] The processor can be a processor or controller, such as a central processing unit (CPU), a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, transistor logic devices, hardware components, or any combination thereof. It can implement or execute the various exemplary logic blocks, modules, and circuits described in conjunction with this disclosure. The processor can also be a combination that implements computational functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0168] The bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. These buses can be categorized as address buses, data buses, control buses, etc.

[0169] This application also provides a computer-readable storage medium storing computer program code. When the processor executes the computer program code, the electronic device executes the relevant method steps in the above method embodiments.

[0170] This application also provides a computer program product that, when run on a computer, causes the computer to execute the relevant method steps described in the above method embodiments.

[0171] The electronic devices, computer storage media, or computer program products provided in this application are all used to execute the corresponding methods provided above. Therefore, the beneficial effects they can achieve can be referred to the beneficial effects in the corresponding methods provided above, and will not be repeated here.

[0172] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0173] In the several embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of modules or units described above is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0174] The units described above as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0175] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The functions of the integrated unit can be implemented in hardware or as software functional units.

[0176] If the integrated units described above are implemented as software functional units and sold or used as independent products, they can be stored in a readable storage medium. Based on this understanding, the technical solutions of the embodiments of this application, in essence, or the contributing parts, or all or part of the technical solutions, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0177] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power-on startup method, characterized in that, Applied to an electronic device, the electronic device including at least one central processing unit (CPU) core group, each CPU core group including one or more CPU cores, the method includes: During the power-on process of the electronic device, if an abnormal power supply to the first CPU core group is detected while the power supply to the second CPU core group is normal, the electronic device is started based on the second CPU core group. The electronic device displays a desktop after startup.

2. The method according to claim 1, characterized in that, Each CPU core group shares a power supply detection feedback point. Detecting a power supply abnormality in the first CPU core group includes: The voltage value of the power supply detection feedback point corresponding to the first CPU core group was detected to be outside the preset range.

3. The method according to claim 2, characterized in that, The detection that the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range includes: The voltage value of the power supply detection feedback point corresponding to the first CPU core group was detected multiple times. The number of times the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range is greater than the preset number.

4. The method according to any one of claims 1-3, characterized in that, In the event of a detected power supply anomaly to the first CPU core group, the method further includes: Set the first CPU core group to unavailable.

5. The method according to any one of claims 1-4, characterized in that, The first CPU core group includes a main CPU core, and before starting the electronic device based on the second CPU core group, the method further includes: The highest frequency of the CPU cores in the second CPU core group is increased.

6. The method according to claim 5, characterized in that, After the electronic device is powered on and displays its desktop, it supports a preset first function but does not support a second function; the first function includes data backup and short-range communication and / or telephone; the second function is different from the first function.

7. The method according to claim 6, characterized in that, The step of starting the electronic device based on the second CPU core group includes: The electronic device is started based on the second CPU core group to enter the safe escape mode; in the safe escape mode, the electronic device supports the first function but does not support the second function.

8. The method according to any one of claims 1-7, characterized in that, After the electronic device displays its desktop upon startup, the method further includes: The device is prompted to back up the data and / or switch devices.

9. The method according to any one of claims 1-8, characterized in that, Also includes: A data backup operation is detected, and data backup processing is performed through the data backup application in the electronic device.

10. The method according to any one of claims 1-9, characterized in that, The boot process includes the XBL stage, and the detection of an abnormal power supply to the first CPU core group includes: During the XBL phase, a power supply anomaly was detected in the first CPU core group; and / or, During the XBL stage, the voltage value of the power supply detection feedback point corresponding to the first CPU core group is detected to exceed a preset range; and / or, During the XBL stage, the voltage value of the power supply detection feedback point corresponding to the first CPU core group is detected multiple times, and the number of times the voltage value of the power supply detection feedback point corresponding to the first CPU core group exceeds the preset range is greater than the preset number.

11. The method according to claim 4, characterized in that, The boot process also includes an ABL (Automatic Boot Record) stage, wherein setting the first CPU core group to be unavailable includes: During the ABL phase, the first CPU core group is set to unavailable.

12. The method according to claim 5, characterized in that, The boot process includes a kernel stage, and the process of increasing the highest frequency of the CPU cores in the second CPU core group includes: In the Kernel stage, the highest frequency of the CPU cores in the second CPU core group is increased.

13. The method according to claim 7, characterized in that, The boot process includes a kernel stage, and the step of booting the electronic device based on the second CPU core group further includes: During the Kernel phase, the electronic device is activated based on the second CPU core group to enter the safe escape mode.

14. The method according to claim 7 or 8, characterized in that, The boot process also includes a firmware (FW) stage, which, after the electronic device boots up and displays the desktop, further includes: During the FW phase, the electronic device enters a safe escape mode; and / or, During the FW phase, you are prompted to back up the data in the electronic device and / or switch devices.

15. The method according to any one of claims 1-14, characterized in that, The boot process also includes an application startup phase, and the data backup also includes: During the application startup phase, the data backup application in the electronic device is launched to perform data backup processing.

16. An electronic device, characterized in that, include: The electronic device includes a memory and one or more processors, the one or more processors including at least one central processing unit (CPU) core group, each CPU core group including one or more CPU cores, the memory storing computer program code including computer instructions that, when executed by the processor, cause the electronic device to perform the method as described in any one of claims 1-15.

17. A computer-readable storage medium, characterized in that, Includes computer instructions that, when executed on the electronic device, cause the electronic device to perform the method as described in any one of claims 1-15.

18. A computer program product, characterized in that, When the computer program product is run on a computer, it causes the computer to perform the method as described in any one of claims 1-15.

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