Harmonic compensation method for distributed active filtering system

By establishing a Norton equivalent model and virtual impedance control in low-voltage distribution networks, the compensation current is dynamically adjusted to achieve multi-inverter collaborative allocation of harmonic compensation tasks. This solves the problems of low equipment utilization and unbalanced compensation in harmonic control in low-voltage distribution networks, and improves system stability and the effectiveness of key harmonic control.

CN121507755APending Publication Date: 2026-02-10STATE GRID GANSU ELECTRIC POWER RESEARCH INSTITUTE
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Patent Information

Application Number
CN202511668576.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-11-14
Publication Date
2026-02-10

AI Technical Summary

Technical Problem

In low-voltage distribution networks, centralized passive or active filters cannot take into account the differences in harmonic characteristics of each feeder, resulting in increased harmonic distortion at local nodes and low equipment utilization. Existing distributed active filter systems have failed to effectively solve the problems of parallel coordinated control of multiple devices and compensation task allocation under limited capacity.

Method used

By establishing a Norton equivalent model of the distribution network, calculating the harmonic responsibility coefficient of each feeder, and using virtual impedance droop control and frequency division allocation algorithm, the compensation current is dynamically adjusted to realize the autonomous and collaborative allocation of compensation tasks by multiple inverters.

Benefits of technology

Accurately locate harmonic sources, optimize the allocation of compensation resources, improve system stability and equipment utilization, and ensure effective control of critical harmonics.

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Abstract

The invention provides a harmonic compensation method for a distributed active filtering system, and relates to the technical field of power distribution networks, and the method comprises the steps: obtaining load data and distributed power data of a power distribution network, and building a power distribution network Norton equivalent model based on a Norton equivalent circuit; pCC harmonic voltage is detected, harmonic responsibility coefficients of all feeder lines are calculated in combination with a Norton equivalent model of the power distribution network, and a harmonic responsibility quantification result is obtained; obtaining harmonic compensation capacity based on the harmonic responsibility quantification result, and dynamically adjusting virtual impedance through droop control to generate basic compensation current; based on the basic compensation current, the compensation capacity of each frequency is adjusted through a frequency division distribution algorithm; a compensation task is autonomously distributed in proportion through multiple inverters according to the adjusted compensation capacity of each frequency; according to the invention, the harmonic source is accurately positioned to optimize the compensation resource allocation, and the stability of the system is significantly improved through the autonomous cooperation of multiple devices.
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Description

Technical Field

[0001] This invention relates to the field of power distribution network technology, and more specifically, to a harmonic compensation method for a distributed active filter system. Background Technology

[0002] With the rapid development of power electronics technology, the penetration rate of a large number of nonlinear power electronic devices (such as frequency converters and rectifiers) and distributed energy sources (such as photovoltaics and wind power) in low-voltage distribution networks is constantly increasing, leading to increasingly prominent voltage harmonic distortion problems at the point of common coupling (PCC), which seriously affects power quality and equipment safety. Traditional harmonic mitigation methods mainly rely on centralized passive or active filters, but in low-voltage distribution networks with multiple feeders and dispersed loads, they have the following limitations: Limited compensation effect: Centralized devices cannot take into account the harmonic characteristics differences of each feeder, which may lead to increased harmonic distortion at local nodes; Poor adaptability: The distribution network topology and load switching change frequently, and centralized devices in fixed locations cannot dynamically adjust the compensation strategy; Low equipment utilization: Distributed energy grid-connected equipment (such as photovoltaic inverters) and power quality management devices are functionally independent and have not achieved collaborative optimization.

[0003] While existing distributed active power filter (DAFS) systems propose a decentralized compensation approach, they fail to address the issues of coordinated control of multiple devices in parallel and the allocation of compensation tasks under capacity constraints. Although some multi-functional inverter designs integrate photovoltaic grid connection and harmonic compensation functions, they do not consider the differences in responsibility of each feeder for PCC harmonics, resulting in unreasonable allocation of compensation resources and difficulty in prioritizing the treatment of critical harmonics when capacity is insufficient. Summary of the Invention

[0004] The purpose of this invention is to provide a harmonic compensation method for a distributed active filter system, which can optimize the allocation of compensation resources by accurately locating the harmonic source and significantly improve the stability of the system through autonomous collaboration of multiple devices.

[0005] The technical solution of this invention is as follows:

[0006] In a first aspect, this application provides a harmonic compensation method for a distributed active filter system, which includes the following steps:

[0007] S1. Obtain load data and distributed generation data of the distribution network, and establish a Norton equivalent model of the distribution network based on the Norton equivalent circuit.

[0008] S2. Detect PCC harmonic voltage, and calculate the harmonic responsibility coefficient of each feeder by combining the Norton equivalent model of the distribution network to obtain the harmonic responsibility quantification results;

[0009] S3. Obtain the harmonic compensation capacity based on the harmonic responsibility quantification results, and dynamically adjust the virtual impedance through droop control to generate the basic compensation current.

[0010] S4. Based on the basic compensation current, adjust the compensation capacity of each frequency through a frequency division and allocation algorithm;

[0011] S5. The multiple inverters autonomously allocate compensation tasks according to the adjusted compensation capacity of each frequency.

[0012] Furthermore, in step S1, the calculation formula for the aforementioned Norton equivalent model of the distribution network includes: ,

[0013] In the formula, Let be the i-th harmonic voltage at PCC. For the parallel impedance of other branches, Let i be the i-th harmonic impedance of feeder k. This is the harmonic voltage source for feeder k.

[0014] Furthermore, in step S2, the calculation formulas for the harmonic liability coefficients of each feeder mentioned above include: ,

[0015] In the formula, Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. Let be the i-th harmonic voltage at PCC. Let α be the i-th harmonic voltage at PCC. k This represents the phase difference between the k-harmonic voltage of the feeder and the total harmonic voltage of the PCC. A positive value indicates a "pollution-type" feeder, while a negative value indicates a "filter-type" feeder.

[0016] Furthermore, in step S3, the calculation process for the compensation current includes: , ,

[0017] In the formula, For virtual harmonic impedance, For the rated virtual impedance, Let be the droop coefficient of the i-th harmonic. , These are the rated and actual harmonic compensation capacities, respectively. The overall target harmonic compensation current, For target harmonic compensation current, Let be the voltage of the i-th harmonic.

[0018] Furthermore, in step S4, the calculation process for adjusting the compensation capacity of each frequency using the frequency division allocation algorithm includes: , ,

[0019] In the formula, Let be the capacity allocation coefficient for the i-th harmonic compensation. Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. The voltage regulation degree of the i-th harmonic at PCC. Let k be the responsibility factor for the j-th harmonic at PCC for feeder k. for, This represents the maximum allowable compensation capacity of the inverter. This represents the total rated capacity of the inverter for harmonic compensation at all frequencies.

[0020] Furthermore, step S5 includes: clamping the compensation capacity of each frequency through the Limit module; when the photovoltaic active power output increases and the harmonic compensation capacity is insufficient, only the compensation depth of low priority harmonics is reduced to ensure that the distortion of high responsibility harmonics is reduced by more than 25%.

[0021] Secondly, this application provides an electronic device, comprising:

[0022] Memory, used to store one or more programs;

[0023] processor;

[0024] When one or more of the above programs are executed by the above processor, a method for harmonic compensation of a distributed active filter system as described in any of the first aspects above is implemented.

[0025] Thirdly, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements a harmonic compensation method for a distributed active filter system as described in any of the first aspects above.

[0026] Compared with the prior art, the present invention has at least the following advantages or beneficial effects:

[0027] (1) The present invention provides a method for harmonic compensation of a distributed active filter system. By establishing the harmonic responsibility coefficient of the feeder, the contribution of each feeder to the harmonic voltage distortion at the PCC is quantified, and “polluting” and “filtering” feeders are distinguished. This method achieves accurate positioning of the harmonic source, avoids blind compensation, and optimizes the allocation of compensation resources.

[0028] (2) The present invention adopts a droop control strategy based on virtual harmonic impedance, and realizes capacity adaptive allocation when multiple devices are connected in parallel by dynamically adjusting the equivalent impedance of the inverter, which significantly improves the stability of the system.

[0029] (3) This invention proposes a compensation capacity allocation algorithm that integrates harmonic responsibility and distortion degree. When the equipment capacity is insufficient, it prioritizes the compensation depth of high responsibility frequency harmonics, realizes frequency division optimization under capacity constraints, ensures the control of key harmonics, and improves equipment utilization. Attached Figure Description

[0030] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0031] Figure 1 This is a flowchart illustrating the steps of a harmonic compensation method for a distributed active filter system according to the present invention.

[0032] Figure 2 This is a schematic structural block diagram of an electronic device according to an embodiment of the present invention.

[0033] Icons: 101, memory; 102, processor; 103, communication interface. Detailed Implementation

[0034] Terminology Explanation:

[0035] Limit module: A functional module used for capacity clamping compensation in a distributed active filter system.

[0036] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0037] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0038] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0039] It should be noted that, in this document, the term "comprising" or any other variation thereof is intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0040] The following detailed description of some embodiments of this application is provided in conjunction with the accompanying drawings. Unless otherwise specified, the various embodiments and features described below can be combined with each other.

[0041] Example 1

[0042] Please see Figure 1 , Figure 1 The diagram shows the steps of a harmonic compensation method for a distributed active filter system provided in an embodiment of this application.

[0043] In a first aspect, this application provides a harmonic compensation method for a distributed active filter system, which includes the following steps:

[0044] S1. Obtain load data and distributed generation data of the distribution network, and establish a Norton equivalent model of the distribution network based on the Norton equivalent circuit.

[0045] S2. Detect PCC harmonic voltage, and calculate the harmonic responsibility coefficient of each feeder by combining the Norton equivalent model of the distribution network to obtain the harmonic responsibility quantification results;

[0046] S3. Obtain the harmonic compensation capacity based on the harmonic responsibility quantification results, and dynamically adjust the virtual impedance through droop control to generate the basic compensation current.

[0047] S4. Based on the basic compensation current, adjust the compensation capacity of each frequency through a frequency division and allocation algorithm;

[0048] S5. The multiple inverters autonomously allocate compensation tasks according to the adjusted compensation capacity of each frequency.

[0049] In a preferred embodiment, the calculation formula for the Norton equivalent model of the distribution network in step S1 includes: ,

[0050] In the formula, Let be the i-th harmonic voltage at PCC. For the parallel impedance of other branches, Let i be the i-th harmonic impedance of feeder k. This is the harmonic voltage source for feeder k.

[0051] In a preferred embodiment, the calculation formula for the harmonic liability factor of each feeder in step S2 includes: ,

[0052] In the formula, Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. Let be the i-th harmonic voltage at PCC. Let α be the i-th harmonic voltage at PCC. k This represents the phase difference between the k-harmonic voltage of the feeder and the total harmonic voltage of the PCC. A positive value indicates a "pollution-type" feeder, while a negative value indicates a "filter-type" feeder.

[0053] In a preferred embodiment, step S3, the calculation process for the compensation current includes: , ,

[0054] In the formula, For virtual harmonic impedance, For the rated virtual impedance, Let be the droop coefficient of the i-th harmonic. , These are the rated and actual harmonic compensation capacities, respectively. The overall target harmonic compensation current, For target harmonic compensation current, Let be the voltage of the i-th harmonic.

[0055] In a preferred embodiment, step S4, the calculation process for adjusting the compensation capacity of each frequency using the frequency division allocation algorithm, includes: , ,

[0056] In the formula, Let be the capacity allocation coefficient for the i-th harmonic compensation. Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. The voltage regulation degree of the i-th harmonic at PCC. Let k be the responsibility factor for the j-th harmonic at PCC for feeder k. for, This represents the maximum allowable compensation capacity of the inverter. This represents the total rated capacity of the inverter for harmonic compensation at all frequencies.

[0057] As a preferred implementation, step S5 includes: clamping the compensation capacity of each frequency through the Limit module; when the photovoltaic active power output increases and the harmonic compensation capacity is insufficient, only reducing the compensation depth of low priority harmonics to ensure that the distortion of high responsibility harmonics is reduced by more than 25%.

[0058] Example 2

[0059] Please see Figure 2 , Figure 2 This is a schematic structural block diagram of an electronic device provided in an embodiment of this application.

[0060] An electronic device includes a memory 101, a processor 102, and a communication interface 103. The memory 101, processor 102, and communication interface 103 are electrically connected directly or indirectly to enable data transmission or interaction. For example, these components can be electrically connected to each other via one or more communication buses or signal lines. The memory 101 can be used to store software programs and modules. The processor 102 executes the software programs and modules stored in the memory 101 to perform various functional applications and data processing. The communication interface 103 can be used for signaling or data communication with other node devices.

[0061] The memory 101 may be, but is not limited to, random access memory (RAM), read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), etc.

[0062] The processor 102 can be an integrated circuit chip with signal processing capabilities. The processor 102 can be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it can also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0063] It is understood that the structure shown in the figure is for illustrative purposes only. A distributed active filter system harmonic compensation method may include more or fewer components than shown in the figure, or have a different configuration. The components shown in the figure can be implemented in hardware, software, or a combination thereof.

[0064] In the embodiments provided in this application, it should be understood that the disclosed methods can also be implemented in other ways. The embodiments described above are merely illustrative. For example, the flowcharts or block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of methods and computer program products according to various embodiments of this application. In this regard, each block in the flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions marked in the blocks may occur in a different order than those marked in the drawings. For example, two consecutive blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagram and / or flowchart, and combinations of blocks in the block diagram and / or flowchart, can be implemented using a dedicated hardware-based system that performs the specified function or action, or using a combination of dedicated hardware and computer instructions.

[0065] In addition, the functional modules in the various embodiments of this application can be integrated together to form an independent part, or each module can exist independently, or two or more modules can be integrated to form an independent part.

[0066] If the aforementioned functions are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a portion of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0067] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application should be included within the protection scope of this application.

[0068] It will be apparent to those skilled in the art that this application is not limited to the details of the exemplary embodiments described above, and that this application can be implemented in other specific forms without departing from the spirit or essential characteristics of this application. Therefore, the embodiments should be considered illustrative and non-limiting in all respects, and the scope of this application is defined by the appended claims rather than the foregoing description. Thus, all variations falling within the meaning and scope of equivalents of the claims are intended to be included within this application. No reference numerals in the claims should be construed as limiting the scope of the claims.

Claims

1. A harmonic compensation method for a distributed active filter system, characterized in that, Includes the following steps: S1. Obtain load data and distributed generation data of the distribution network, and establish a Norton equivalent model of the distribution network based on the Norton equivalent circuit. S2. Detect PCC harmonic voltage, and calculate the harmonic responsibility coefficient of each feeder by combining the Norton equivalent model of the distribution network to obtain the harmonic responsibility quantification results; S3. Obtain the harmonic compensation capacity based on the harmonic responsibility quantification results, and dynamically adjust the virtual impedance through droop control to generate the basic compensation current. S4. Based on the basic compensation current, adjust the compensation capacity of each frequency through a frequency division and allocation algorithm; S5. The multiple inverters autonomously allocate compensation tasks according to the adjusted compensation capacity of each frequency.

2. The method for harmonic compensation in a distributed active filter system as described in claim 1, characterized in that, In step S1, the calculation formula for the Norton equivalent model of the distribution network includes: , In the formula, Let be the i-th harmonic voltage at PCC. For the parallel impedance of other branches, Let i be the i-th harmonic impedance of feeder k. It is the harmonic voltage source for feeder k.

3. The method for harmonic compensation in a distributed active filter system as described in claim 2, characterized in that, In step S2, the calculation formula for the harmonic responsibility factor of each feeder is as follows: include: , In the formula, Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. Let be the i-th harmonic voltage at PCC. Let α be the i-th harmonic voltage at PCC. k This represents the phase difference between the k-harmonic voltage of the feeder and the total harmonic voltage of the PCC. A positive value indicates a "pollution-type" feeder, while a negative value indicates a "filter-type" feeder.

4. The harmonic compensation method for a distributed active filter system as described in claim 1, characterized in that, In step S3, the calculation process of the compensation current includes: , , In the formula, For virtual harmonic impedance, For the rated virtual impedance, Let be the droop coefficient of the i-th harmonic. , These are the rated and actual harmonic compensation capacities, respectively. The overall target harmonic compensation current, For target harmonic compensation current, Let be the voltage of the i-th harmonic.

5. The method for harmonic compensation in a distributed active filter system as described in claim 1, characterized in that, In step S4, the calculation process of adjusting the compensation capacity of each frequency using the frequency division allocation algorithm includes: , , In the formula, Let be the capacity allocation coefficient for the i-th harmonic compensation. Let k be the responsibility factor for the i-th harmonic at PCC for feeder k. The voltage regulation degree of the i-th harmonic at PCC. Let k be the responsibility factor for the j-th harmonic at PCC for feeder k. for, This is the maximum allowable compensation capacity of the inverter. This represents the total rated capacity of the inverter for harmonic compensation at all frequencies.

6. The harmonic compensation method for a distributed active filter system as described in claim 1, characterized in that, Step S5 includes: clamping the compensation capacity of each frequency through the Limit module. When the photovoltaic active power output increases and the harmonic compensation capacity is insufficient, only the compensation depth of low priority harmonics is reduced to ensure that the distortion of high responsibility harmonics is reduced by more than 25%.

7. An electronic device, characterized in that, include: Memory, used to store one or more programs; processor; When the processor executes the one or more programs, it implements a method for harmonic compensation of a distributed active filter system as described in any one of claims 1-6.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it implements a method for harmonic compensation of a distributed active filter system as described in any one of claims 1-6.