DAC (Digital-to-Analog Converter) output voltage control method, system and equipment based on stepping delay and medium

Abstract

The invention discloses a DAC (Digital-to-Analog Converter) output voltage control method, system and equipment based on stepping delay and a medium. The method comprises the following steps: acquiring the current output voltage of the DAC as an initial voltage value; receiving a target voltage value and a set value of a target slope parameter; the target slope parameter comprises a target step length and a target delay; and controlling the initial voltage value to gradually change from the target slope to the target voltage value through the target slope parameter. The method is realized without depending on a hardware circuit, the DAC can change the output voltage according to the set slope parameter through a software implementation process, and the requirements on the DAC output voltage slope in different scenes can be met. According to the method, the target slope parameter and the target voltage value can be changed at any time in the DAC output voltage adjusting process, the DAC output voltage is controlled to be changed into the new target voltage value according to the new slope parameter, and no error exists in the software running process. The method is easy to modify and migrate and has high universality.

Description

Technical Field

[0001] This invention relates to the field of electronic application technology, and specifically to a method, system, device, and medium for controlling the output voltage of a DAC based on step delay. Background Technology

[0002] In electronic applications such as industrial control, test and measurement, and audio processing, digital-to-analog converters (DACs) are often used to generate voltage signals.

[0003] However, in special scenarios such as driving specific power devices, simulating slowly changing sensor signals, or preventing power surges, it is necessary to control the rise or fall slope of the output voltage to achieve a smooth voltage ramp transition rather than an instantaneous jump.

[0004] Currently, slope control primarily relies on hardware circuits, such as slope limiting modules built using RC integrator circuits or operational amplifiers. However, such methods lack flexibility, making it difficult to quickly adjust time parameters or slope curves according to different application requirements, and hardware modifications are costly. Summary of the Invention

[0005] In view of this, embodiments of the present invention provide a DAC output voltage control method, system, device, and medium based on step delay.

[0006] The first aspect of this invention provides a DAC output voltage control method based on step delay, comprising the following steps: Obtain the current output voltage of the DAC as the initial voltage value; Receive the set values ​​of the target voltage value and the target slope parameter; the target slope parameter includes the target step size and the target delay; The initial voltage value is controlled by the target slope parameter, and gradually changes to the target voltage value with the target slope.

[0007] Furthermore, the target step size represents the degree of change in the initial voltage value in each step, and the target delay represents the delay waiting time in each step.

[0008] Furthermore, the step of controlling the initial voltage value to gradually change to the target voltage value by means of the target slope parameter specifically includes the following steps: Determine the direction of change and the number of steps for the initial voltage value; The output voltage of the DAC is controlled to gradually change towards the target voltage value according to the direction of change and the number of change steps, and finally reach the target voltage value.

[0009] Furthermore, the direction of change of the initial voltage value is determined based on the relationship between the initial voltage value and the target voltage value; The number of variable steps is obtained by subtracting the target voltage value from the initial voltage value and then dividing by the target step size.

[0010] Furthermore, controlling the DAC's output voltage to gradually change towards the target voltage value based on the direction and step size of the change, and ultimately reaching the target voltage value, specifically includes the following steps: Reset the loop counter; The initial voltage value is changed by a target step size in the direction of change to obtain the current voltage value; Control the DAC's current output voltage to switch to the current voltage value; After a target delay, the loop counter is incremented by one, and the process returns to the step of changing the initial voltage value by a target step in the direction of change, thus obtaining a new current voltage value, until the loop counter reaches the number of change steps. After the loop counter reaches the specified number of steps, the current output voltage of the DAC is corrected so that the current output voltage of the DAC changes to the target voltage value.

[0011] Furthermore, it also includes the following steps: Receive new target voltage values ​​and target slope parameter settings; The DAC's current output voltage is controlled by a new target slope parameter to gradually change to a new target voltage value.

[0012] Another aspect of the present invention discloses a DAC output voltage control system based on step delay, including a microcontroller and a DAC module; the microcontroller controls the DAC module according to the above-mentioned DAC output voltage control method based on step delay, so that the output voltage of the DAC module gradually changes to the target voltage value with a target slope.

[0013] Furthermore, the microcontroller includes a CPU, memory, and a loop counter; The CPU is used to determine the direction and step size of the initial voltage value change; and controls the output voltage of the DAC module to gradually change towards the target voltage value according to the direction and step size, so as to finally reach the target voltage value. The memory is used to store the target voltage value, target step size, and target delay, as well as the direction of change and the number of change steps calculated by the CPU; The loop counter is used to perform a counting operation after a target delay time until the count reaches the change step number.

[0014] Another aspect of the present invention discloses an electronic device, including a processor and a memory; The memory is used to store programs; The processor executes the program to implement the above-described DAC output voltage control method based on step delay.

[0015] In another aspect, the present invention discloses a computer-readable storage medium storing a program that is executed by a processor to implement the above-described step-delay-based DAC output voltage control method.

[0016] This invention also discloses a computer program product or computer program, which includes computer instructions stored in a computer-readable storage medium. A processor of a computer device can read the computer instructions from the computer-readable storage medium and execute the computer instructions, causing the computer device to perform the aforementioned method.

[0017] The embodiments of this invention have the following beneficial effects: This invention, based on a step-delay DAC output voltage control method, system, device, and medium, is implemented without relying on hardware circuitry. Through software implementation, the DAC can change its output voltage according to a set slope parameter, enabling it to meet the DAC output voltage ramp requirements in different scenarios. During DAC output voltage adjustment, the target slope parameter and target voltage value can be changed at any time, and the DAC output voltage can be controlled to change to the new target voltage value according to the new slope parameter, without errors occurring during software operation. This invention is easy to modify and migrate, has high versatility, and can be widely applied in various electronic application technology fields.

[0018] Additional aspects and advantages of the invention will be set forth in the description which follows, and in part will be obvious from the description or may be learned by practice of the invention. Attached Figure Description

[0019] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0020] Figure 1 This is a schematic diagram of the basic process of a DAC output voltage control method based on step delay according to the present invention; Figure 2 This is a schematic diagram illustrating the implementation process of the present invention, which controls the output voltage of the DAC to gradually change towards the target voltage value based on the direction of change and the number of change steps. Figure 3 This is a schematic diagram illustrating the effect of the DAC output voltage slope control of the present invention; Figure 4 This is a schematic diagram of a DAC output voltage control system based on step delay according to the present invention; Figure 5 This is a schematic diagram of a computer-readable storage medium structure according to the present invention. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0022] like Figure 1 As shown, the first embodiment of the present invention discloses a DAC output voltage control method based on step delay, including the following steps: S1. Obtain the current output voltage of the DAC as the initial voltage value; S2. Receive the set values ​​of the target voltage value and the target slope parameter; S3. The initial voltage value is controlled by the target slope parameter to gradually change to the target voltage value.

[0023] The embodiments of the present invention are implemented through software control, which eliminates the cost of peripheral RC filter circuits, dedicated waveform chips and other hardware compared to hardware control schemes. It also reduces the complexity and area of ​​PCB layout and routing, making it particularly suitable for use in cost-sensitive and space-constrained embedded systems.

[0024] The implementation process of each step of this invention is described in detail below: S1. Obtain the current output voltage of the DAC as the initial voltage value.

[0025] In this embodiment of the invention, an initial voltage value Da is set based on the current output voltage Va of the DAC. Da is the starting point of voltage ramp control, representing the initial voltage value of the DAC output before the ramp begins, and serves as the basis for calculating the number of steps and determining the direction, ensuring that the DAC output voltage changes smoothly from an accurate starting point.

[0026] S2. Receive the set values ​​of the target voltage value and the target slope parameter.

[0027] The target voltage value Db is the target point for voltage ramp control. It represents the final voltage value that the DAC output should reach and is used to define the endpoint of the ramp. In this embodiment of the invention, the difference between Db and Da determines the total amount of change in the DAC output voltage, and it is gradually approximated through a stepping loop.

[0028] The target slope parameters include the target step size Dx and the target delay tx. The target step size Dx represents the degree of change in the initial voltage value within each step. Dx controls the granularity of voltage change and determines the size of the voltage ramp step: a larger Dx value results in a larger voltage change per step and a steeper average slope; a smaller Dx value results in a smoother voltage change per step and a gentler slope. The target delay tx represents the delay time between each step and controls the rate of voltage change. It determines the interval between each step: a larger tx value results in a longer step interval, slower voltage change, and a gentler slope; a smaller tx value results in a shorter interval, faster change, and a steeper slope.

[0029] In this embodiment of the invention, the target voltage value Db, target step size Dx, and target delay tx can be modified in real time during the DAC output voltage slope adjustment process. During method execution, the values ​​of Db, Dx, and tx are read in real time to achieve dynamic adjustment of the DAC output voltage slope without interrupting the current voltage slope control flow. When it is necessary to adjust the DAC output voltage slope, the current output voltage of the DAC can be controlled by a new target slope parameter, gradually changing to the new target voltage value with the new target slope.

[0030] S3. The initial voltage value is controlled by the target slope parameter to gradually change to the target voltage value.

[0031] In step S3, the initial voltage value is controlled by the target slope parameter to gradually change to the target voltage value with the target slope. This specifically includes the following steps: S3-1. Determine the direction of change and the number of steps for the initial voltage value.

[0032] In this embodiment of the invention, the direction of change of the initial voltage value Da is determined based on the relationship between the initial voltage value Da and the target voltage value Db. That is, when Db > Da, the DAC output voltage is controlled to change upward, and when Db is less than Da, the DAC output voltage is controlled to change downward.

[0033] In this embodiment of the invention, the step size n is obtained by dividing the difference Da between the target voltage value Db and the initial voltage value by the target step size Dx. That is, n = |Db - Da| / Dx. Since the obtained n is not necessarily an integer, this embodiment of the invention rounds the step size n down. After completing the cyclic adjustment, the current output voltage of the DAC is corrected so that the current output voltage of the DAC changes to the target voltage value. Since the values ​​of the target voltage value Db, the target step size Dx, and the target delay tx may change according to the user settings during the cyclic adjustment, the direction of change and the step size n need to be recalculated each time the step adjustment is performed. This allows this embodiment of the invention to control the DAC output voltage to change to the new target voltage value according to the new slope parameter at any time, and there will be no errors during software operation.

[0034] S3-2. Control the DAC's output voltage to gradually change towards the target voltage value according to the direction of change and the number of change steps, and finally reach the target voltage value.

[0035] In step S3-2, the output voltage of the DAC is controlled to gradually change towards the target voltage value according to the direction of change and the number of change steps, and finally reach the target voltage value. Specifically, this includes the following steps: S3-2-1. Reset the loop counter; S3-2-2. Change the initial voltage value in the direction of change by a target step size to obtain the current voltage value; S3-2-3. Controls the DAC's current output voltage to switch to the current voltage value; S3-2-4. After a target delay time, increment the count of the loop counter by one, return to the step of changing the initial voltage value by a target step in the direction of change, obtain the new current voltage value, until the count of the loop counter reaches the number of change steps; S3-2-5. After the loop counter reaches the number of steps, the current output voltage of the DAC is corrected so that the current output voltage of the DAC changes to the target voltage value.

[0036] A schematic diagram illustrating the implementation process of controlling the DAC's output voltage to gradually change towards the target voltage value according to the direction and step size of the change is shown in the embodiment of the present invention. Figure 2 As shown, the direction of change and the number of steps are set in each loop, and the direction of change is represented by a direction flag.

[0037] Based on the direction flag, the current output voltage of the DAC is increased or decreased by a target step size Dx, so that the current output voltage of the DAC is closer to the target voltage value Db; at the same time, the counting of the loop counter is controlled by delay functions, so that the loop counter is incremented by one after a target delay tx.

[0038] After the loop counter increments by one, it returns to the step of changing the initial voltage value Da by a target step size in the direction of change. This causes the current output voltage of the DAC to gradually approach the target voltage value Db in a small step-like manner until the loop counter reaches the calculated number of change steps n.

[0039] After the loop counter reaches the calculated change step number n, since the target step size Dx may not be divisible by |Db-Da|, there will be a small deviation between the current output voltage of the DAC and the target voltage value Db at the end of the loop. At this point, the current output voltage of the DAC is fine-tuned to the target voltage value Db within a target delay tx, allowing the DAC to output voltage according to the target voltage value Db. Since the fine-tuning of the DAC is completed within a target delay tx, and the adjustment amount is necessarily less than the target step size Dx, the fine-tuning of the DAC will not significantly affect the overall control of the change in the DAC output voltage during the adjustment process. The DAC generally still adjusts the voltage according to the set slope parameters. The slope of the voltage adjustment is as follows... Figure 3 As shown, the total number of steps n = |Db - Da| / Dx (rounded down), the starting and ending voltages Va and Vb correspond to Da and Db respectively, and the voltage value Vx = Va + decode(Dx * i) for each i-th step, with a time interval tx between each step. It can be seen that this embodiment of the invention simulates the charging curve effect of a hardware RC circuit through "digital stepping + time delay," achieving precise software control of the voltage change slope.

[0040] The second embodiment of this invention discloses a DAC output voltage control system based on step delay, including a microcontroller and a DAC module. For example... Figure 4 As shown, the microcontroller controls the DAC module according to the step-delay-based DAC output voltage control method of the first embodiment, so that the output voltage of the DAC module gradually changes to the target voltage value with the target slope.

[0041] In this embodiment of the invention, the microcontroller includes a CPU, memory, and a loop counter. The CPU determines the direction and step size of the initial voltage value change; and controls the output voltage of the DAC module to gradually change towards the target voltage value based on the direction and step size, ultimately reaching the target voltage value. The memory stores the target voltage value, target step size, target delay, and the direction and step size calculated by the CPU. The loop counter performs a counting operation after one target delay time until the count reaches the required step size. The microcontroller stores the input parameters (Da, Db, Dx, tx) in its memory. These parameters may come from user configuration (e.g., input via serial port or keypad) or program presets; the CPU performs initialization calculations (including the step size n and direction determination). In the loop step control, the microcontroller's CPU updates its internal variable D_current in each adjustment and updates the loop counter i in real time, writing the updated D_current value into the DAC, making the DAC's output voltage approach the target voltage value Db. For the built-in DAC, the microcontroller directly sets the DAC's output voltage through the internal bus; for the external DAC, the MCU sends data to the DAC module through a digital interface (such as SPI or I2C), and the DAC module then outputs the corresponding analog voltage value.

[0042] The system design scheme of this invention uses a microcontroller to control the step value of the DAC output and insert a delay to generate a voltage ramp, which effectively reduces circuit complexity and cost and improves flexibility.

[0043] The methods described in the first embodiment of this invention are applicable to the system embodiments. The functions implemented in the system embodiments are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above methods.

[0044] The third embodiment of this invention discloses an electronic device. In this embodiment, a memory stores program instructions for implementing the step-delay-based DAC output voltage control method of any of the above embodiments. A processor executes the program instructions stored in the memory to perform the step-delay-based DAC output voltage control method. The processor may also be referred to as a CPU (Central Processing Unit). The processor may be an integrated circuit chip with signal processing capabilities. The processor may also be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. The general-purpose processor may be a microprocessor or any conventional processor, etc.

[0045] The methods described in the first embodiment of the present invention are applicable to the embodiments of the present electronic device. The specific functions implemented by the embodiments of the present electronic device are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above methods.

[0046] Figure 5 This is a schematic diagram of the structure of a computer-readable storage medium according to the fourth embodiment of the present invention. The computer-readable storage medium of the fourth embodiment stores program instructions capable of implementing the above-described step-delay-based DAC output voltage control method. These program instructions can be stored in the storage medium in the form of a software product, including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) or processor to execute all or part of the steps of the methods of various embodiments of the present invention. The aforementioned computer-readable storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks, or terminal devices such as computers, servers, mobile phones, and tablets.

[0047] The methods described in the first embodiment of the present invention are applicable to the computer-readable storage medium embodiment. The specific functions implemented by the computer-readable storage medium embodiment are the same as those in the above method embodiment, and the beneficial effects achieved are also the same as those achieved by the above method.

[0048] This embodiment also provides a computer program product that, when run on a computer, causes the computer to perform the aforementioned related steps to implement the DAC output voltage control method based on step delay provided in the above embodiment.

[0049] It should be noted that the user information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) involved in the embodiments of the present invention are all information and data authorized by the user or fully authorized by all parties. Furthermore, the collection, use and processing of related data must comply with the relevant laws, regulations and standards of the relevant countries and regions, and corresponding operation entry points are provided for users to choose to authorize or refuse.

[0050] Those skilled in the art will understand that modules in the device of the embodiments of the present invention can be adaptively modified and placed in one or more devices different from those embodiments. Modules, units, or components in the embodiments of the present invention can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the corresponding claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the corresponding claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0051] Through the above description of the embodiments, those skilled in the art will understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0052] It should be noted that the logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-included system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device. More specific examples (a non-exhaustive list) of computer-readable media include: an electrical connection having one or more wires (electronic device), a portable computer disk drive (magnetic device), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Alternatively, the computer-readable medium may be paper or other suitable media on which the program can be printed, since the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in a computer memory.

[0053] Furthermore, the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. In particular, for embodiments such as apparatus and devices, since they are basically similar to the method embodiments, the relevant parts can be referred to the description of the method embodiments. The apparatus, devices, and other embodiments described above are merely illustrative, and the modules, units, etc., described as separate components may or may not be physically separate, that is, they may be located in one place or distributed in multiple places, such as nodes in a system network. Specifically, some or all of the modules and units can be selected according to actual needs to achieve the purpose of the above-described embodiment solutions. Those skilled in the art can understand and implement this without creative effort.

[0054] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0055] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0056] Furthermore, the terms "first," "second," etc., used in the embodiments of this invention are for descriptive purposes only and should not be construed as indicating or implying relative importance, or implicitly specifying the number of technical features indicated in this embodiment. Therefore, features defined with terms such as "first" and "second" in the embodiments of this invention can explicitly or implicitly indicate that the embodiment includes at least one of those features. In the description of this invention, the word "multiple" means at least two or more, such as two, three, four, etc., unless otherwise explicitly specified in the embodiments.

[0057] In embodiments of the present invention, the terms "comprising," "including," or any other variations thereof are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of the present invention may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0058] Although embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and should not be construed as limiting the present invention. Those skilled in the art can make changes, modifications, substitutions, and variations to the above embodiments within the scope of the present invention. Other embodiments of the present invention will readily conceive of by considering the specification and practicing the invention. This application is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein. The specification and embodiments are to be considered exemplary only, and the true scope and spirit of the invention are indicated by the following claims.

Claims

1. A DAC output voltage control method based on step delay, characterized in that, Includes the following steps: Obtain the current output voltage of the DAC as the initial voltage value; Receive the set values ​​of the target voltage value and the target slope parameter; the target slope parameter includes the target step size and the target delay; The initial voltage value is controlled by the target slope parameter, and gradually changes to the target voltage value by the target slope.

2. The DAC output voltage control method based on step delay according to claim 1, characterized in that, The target step size represents the degree of change in the initial voltage value in each step, and the target delay represents the delay time in each step.

3. The DAC output voltage control method based on step delay according to claim 1, characterized in that, The process of controlling the initial voltage value by the target slope parameter to gradually change to the target voltage value with the target slope specifically includes the following steps: Determine the direction of change and the number of steps for the initial voltage value; The output voltage of the DAC is controlled to gradually change towards the target voltage value according to the direction of change and the number of change steps, and finally reach the target voltage value.

4. The DAC output voltage control method based on step delay according to claim 3, characterized in that, The direction of change of the initial voltage value is determined based on the relationship between the initial voltage value and the target voltage value. The number of variable steps is obtained by dividing the difference between the target voltage value and the initial voltage value by the target step size.

5. The DAC output voltage control method based on step delay according to claim 3, characterized in that, The process of controlling the DAC's output voltage to gradually change towards the target voltage value based on the direction and step size of the change, and ultimately reaching the target voltage value, specifically includes the following steps: Reset the loop counter; The initial voltage value is changed by a target step size in the direction of change to obtain the current voltage value; Control the DAC's current output voltage to switch to the current voltage value; After a target delay, the loop counter is incremented by one, and the process returns to the step of changing the initial voltage value by a target step in the direction of change, thus obtaining a new current voltage value, until the loop counter reaches the number of change steps. After the loop counter reaches the specified number of steps, the current output voltage of the DAC is corrected so that the current output voltage of the DAC changes to the target voltage value.

6. The DAC output voltage control method based on step delay according to claim 1, characterized in that, It also includes the following steps: Receive new target voltage values ​​and target slope parameter settings; The DAC's current output voltage is controlled by a new target slope parameter to gradually change to a new target voltage value.

7. A DAC output voltage control system based on step delay, characterized in that, It includes a microcontroller and a DAC module; the microcontroller controls the DAC module according to the DAC output voltage control method based on step delay as described in any one of claims 1-6, so that the output voltage of the DAC module gradually changes to the target voltage value with a target slope.

8. The DAC output voltage control method based on step delay according to claim 7, characterized in that, The microcontroller includes a CPU, memory, and a loop counter; The CPU is used to determine the direction and step size of the initial voltage value change; and controls the output voltage of the DAC module to gradually change towards the target voltage value according to the direction and step size, so as to finally reach the target voltage value. The memory is used to store the target voltage value, target step size, and target delay, as well as the direction of change and the number of change steps calculated by the CPU; The loop counter is used to perform a counting operation after a target delay time until the count reaches the change step number.

9. An electronic device, characterized in that, Including the processor and memory; The memory is used to store programs; The processor executes the program to implement a DAC output voltage control method based on step delay as described in any one of claims 1-6.

10. A computer-readable storage medium, characterized in that, The storage medium stores a program, which is executed by a processor to implement a DAC output voltage control method based on step delay as described in any one of claims 1-6.

Images