Signal generator for aging time delay relay

Abstract

The invention discloses a signal generator for aging a delay relay. The signal generator comprises a voltage conversion module, an oscillation frequency division module, a pulse width modulation module, a power driving module and a power relay module. The voltage conversion module converts high voltage of an external power supply into fixed low voltage to supply power to other modules, so that the problem that post-stage power supply can only supply low-voltage power is solved; the oscillation frequency division module generates a periodic pulse based on the low-voltage direct current signal and provides a basic signal for subsequent modulation; the pulse width modulation module adjusts the pulse signal to the target precision, prolongs the signal period and realizes accurate energy control; the power driving module performs current amplification on the modulation signal to generate a driving signal; the power relay module controls on-off of a power supply, an aged time-delay relay and a load through a driving signal, so that large-current driving is realized, and the problem of small driving current is solved.

Description

TECHNICAL FIELD

[0001] The application belongs to the technical field of hybrid integrated circuit burn-in, and relates to a signal generator for burn-in of a time delay relay. BACKGROUND

[0002] At present, with the rapid development of space technology, the reliability and safety of spacecraft have become the core elements to ensure the smooth progress of various space missions. Among them, the time delay relay, as a key device for the control of spacecraft pyrotechnics, is like a key link in the precise operation chain of the spacecraft. Its performance directly affects whether the space mission can be successfully executed, so the requirements for its safety and reliability are almost rigorous. High-temperature power burn-in is a key process that stimulates and eliminates early failure defects to improve reliability by applying electrical stress to products in a high-temperature environment. High-temperature power burn-in simulates the high-temperature and high-electric stress environment that products may encounter in actual use, accelerates the internal physical and chemical reaction processes, and promotes the early exposure of potential defects (such as material cracks, virtual welding, and medium defects). Therefore, high-temperature power burn-in, as a necessary test link to screen out products with early failure, is an important means to ensure the stable and reliable quality of time delay relays and plays an irreplaceable role in ensuring the safe operation of spacecraft.

[0003] The time delay relay required for burn-in is a 5-type (specified timing) solid-state time delay relay series circuit. This series of relays has unique operating characteristics and is equipped with only one power supply. When the power is turned on, the circuit does not immediately output on, but will start outputting the on signal after a specific time of t1 (50ms - 500s), and the output current can quickly reach 1A. After working for t2 (30ms - 500s), the output is turned off. More importantly, only after power-off and power-on, the time delay relay can re-enter the working state. When performing power burn-in, the test conditions are extremely strict. The load current must reach 1A under the specified bus voltage (such as 28V), and the current duty cycle needs to be controlled between 40%-60%, which means that the bus voltage must be in the form of a periodic pulse signal. According to the difference in the time delay time of the product, the signal period requires a large span, from tens of milliseconds to 1000 seconds.

[0004] However, the existing signal generator device is not capable of meeting this special requirement. The driving capacity of the conventional signal generator device is generally less than 50mA, and even the driving capacity of some special power signal generators is generally less than 500mA, which is far from meeting the requirement of the load current reaching dozens of amperes in batch aging. In terms of signal period, the signal period output by the conventional device is generally short, generally in the range of 1us-100s, and the output voltage is less than 20V, which is difficult to meet the signal period length and output voltage standard required by the aging of the series of delay relays. In addition, although the special type signal generator can meet part of the requirements in performance, the procurement cycle is long and the price is high, which undoubtedly increases the production cost and time cost. Therefore, it has become an urgent task to develop a signal generator with long signal period, large driving current, high output voltage, low price and adjustable cycle, in order to meet the aging requirements of the series of delay relays in large-scale production. SUMMARY

[0005] In view of the problems in the prior art, the present application provides a signal generator for aging of delay relays, thereby solving the technical problems of short signal period, small driving current and low voltage power supply in the prior art.

[0006] The present application is realized by the following technical solutions: A signal generator for aging of delay relays, comprising a voltage conversion module, an oscillation frequency division module, a pulse width modulation module, a power drive module and a power relay module; The input end of the voltage conversion module is electrically connected with an external power supply, and the output voltage of the external power supply is converted into a fixed low voltage and output to the oscillation frequency division module, the pulse width modulation module and the power drive module; The input end of the oscillation frequency division module receives the low voltage direct current signal output by the voltage conversion module, and generates a periodic pulse signal output to the pulse width modulation module; The pulse width modulation module adjusts the periodic pulse signal to a target precision and outputs a modulation signal to the power drive module; The power drive module amplifies the current of the modulation signal and generates a driving signal output to the power relay module; The output end of the power relay module is connected with a power supply and a delay relay circuit to be aged, and the output end of the delay relay circuit to be aged is connected with a power load, and the power relay module controls the on-off of the power supply, the delay relay circuit to be aged and the power load through the driving signal.

[0007] Preferably, the voltage conversion module comprises a positive three-terminal voltage regulator W1, a capacitor C INand capacitor C O ; the input pin V IN of the positive three-terminal voltage regulator W1 CC ; capacitor C IN is connected in parallel between the input pin V IN of the positive three-terminal voltage regulator W1 IN and the ground pin GND, and is placed close to the input pin V O of the positive three-terminal voltage regulator W1 IN ; capacitor C O is connected in parallel between the output pin V IN of the positive three-terminal voltage regulator W1 O and the ground pin GND, and is placed close to the output pin V

[0008] Preferably, the capacitance of capacitor C IN is 0.1 μF~0.47 μF; and the capacitance of capacitor C O is 0.1 μF~1 μF.

[0009] Preferably, the oscillation frequency dividing module comprises a binary counter U1, a decimal counter U2, and an RC clock oscillator; the output end of the RC clock oscillator is connected to the clock input pin of the binary counter U1, the power supply pin of the binary counter U1 is connected to the output end of the voltage conversion module, and the output pin of the binary counter U1 is connected to the clock input end of the decimal counter U2.

[0010] Preferably, the RC clock oscillator comprises a charging resistor R S , a discharging resistor R X , and an oscillation capacitor C X ; one end of the oscillation capacitor C X is connected to the charging resistor R S , and the other end is connected to the discharging resistor R X .

[0011] Preferably, the pulse width modulation module comprises a dual monostable multivibrator U3 and an RC modulator.

[0012] Preferably, the RC modulator comprises a first RC network and a second RC network; the first RC network comprises a resistor R X1 and a capacitor C X1 ; and the second RC network comprises a resistor R X2 and a capacitor C X2 .

[0013] Preferably, the power driving module comprises two groups of power driving units, one group of power driving units is composed of a triode T1, a base resistor R1, and an emitter resistor R2, and the other group of power driving units is composed of a triode T2, a base resistor R3, and an emitter resistor R4.

[0014] Preferably, each group of power drive units drives several to-be-aged time-delay relays.

[0015] Preferably, the signal generator comprises at least two groups of oscillation frequency division modules, and pulse width modulation modules, power drive modules and power relay modules correspondingly arranged with the two groups of oscillation frequency division modules.

[0016] Compared with the prior art, the signal generator has the following beneficial technical effects: The signal generator for time-delay relay aging provided by the present application firstly integrates a voltage conversion module, the input end of which is directly connected with an external power supply, and through wide-range voltage conversion technology, converts high-voltage input into stable low-voltage direct-current signals required by oscillation frequency division modules, pulse width modulation modules and power drive modules, thereby ensuring the safe operation of low-voltage control circuits and avoiding the interference of high-voltage direct access to sensitive devices through modular power supply design, and providing a reliable voltage basis for subsequent signal processing. Secondly, in order to break through the limitation of short signal period, the device adopts a cascade architecture of oscillation frequency division modules and pulse width modulation modules. The oscillation frequency division modules output long-period pulse signals to the pulse width modulation modules; the latter further improves the period accuracy of the input signals to the microsecond level, and realizes energy control through duty cycle adjustment, thereby prolonging the period of a single signal and providing adjustable timing parameters for aging tests. Finally, in view of the problem of small driving current, the device designs a two-stage current amplification mechanism: the modulation signal output by the pulse width modulation module first enters the power drive module for primary current amplification, and then the power relay module as the final switching device realizes high-voltage output and large-current on-off under the triggering of a low-voltage driving signal, directly driving the time-delay relay circuit and the load. This hierarchical amplification structure not only ensures the accurate modulation of control signals, but also meets the driving requirements of batch aging through the strong current carrying capacity of power devices, and finally realizes the signal output capability of long period, large current and high voltage. BRIEF DESCRIPTION OF DRAWINGS

[0017] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following will briefly introduce the drawings needed to be used in the embodiments. It should be understood that the following drawings only show some embodiments of the present application, and therefore should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can also be obtained without creative labor on the basis of these drawings.

[0018] Figure 1 The signal generator principle diagram in the present application; Figure 2 The signal generator principle diagram for aging of two varieties of time-delay relays in the present application; Figure 3The signal generator schematic diagram in the present application; Figure 4 The signal generator output timing diagram in the present application; Figure 5 The signal generator PCB wiring diagram in the present application. DETAILED DESCRIPTION

[0019] In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be described clearly and completely below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only some of the embodiments of the present application, but not all the embodiments. The components of the embodiments of the present application described and shown in the drawings can be arranged and designed in various different configurations.

[0020] Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the claimed present application, but only represents selected embodiments of the present application. All other embodiments obtained by those of ordinary skill in the art based on the embodiments in the present application without creative labor are within the scope of protection of the present application.

[0021] It should be noted that: similar reference numerals and letters represent similar items in the following drawings, therefore, once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings.

[0022] In the description of the embodiments of the present application, it should be noted that if the terms "upper", "lower", "horizontal", "inner" and the like indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship when the product of the present application is usually placed, which is only for the convenience of describing the present application and simplifying the description, and does not indicate or imply that the indicated device or element must have a particular orientation, be constructed and operated in a particular orientation, therefore, it cannot be understood as a limitation on the present application. In addition, the terms "first", "second" and the like are only used to distinguish the description, and cannot be understood as indicating or implying relative importance.

[0023] In addition, if the term "horizontal" appears, it does not mean that the component must be absolutely horizontal, but can be slightly inclined. For example, "horizontal" only means that its direction is relatively more horizontal than "vertical", and does not mean that the structure must be completely horizontal, but can be slightly inclined.

[0024] In the description of the embodiments of the present application, it also needs to be explained that, unless explicitly specified and limited, if the terms "arrange", "mount", "connect", "connect" appear, they should be understood in a broad sense, for example, it can be fixedly connected, or it can be detachably connected, or integrally connected; it can be mechanically connected, or it can be electrically connected; it can be directly connected, or it can be indirectly connected through an intermediate medium, or it can be the communication inside two elements. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0025] The present application will be further described in detail below with reference to the accompanying drawings: Embodiment 1 A signal generator for aging of time delay relay, comprising voltage conversion module, oscillation frequency division module, pulse width modulation module, power drive module and power relay module.

[0026] The voltage conversion module converts the power supply voltage V CC into a fixed voltage that can be used by the subsequent devices.

[0027] Further specifically, the voltage conversion module converts the externally input power supply voltage (such as 28V) into a stable low voltage (5V) to provide a working power supply for the subsequent modules. The voltage conversion module uses a positive three-terminal voltage regulator (such as LM7805) to suppress high-frequency noise through input / output capacitor filtering (such as 100μF electrolytic capacitor + 0.1μF ceramic capacitor). The input side can increase the overvoltage protection circuit (such as Zener diode) to prevent the power surge from damaging the subsequent devices.

[0028] The oscillation frequency division module converts the direct current voltage into a periodic pulse signal through binary and decimal counters, and modulates the pulse signal period to the required period accuracy range; by adjusting the R S , R X and C X values of the binary counter, the period can meet the aging requirements of different types of time delay relays.

[0029] Specifically, the function of the oscillation frequency division module is to generate a pulse signal with adjustable period as the time base of the aging test. The oscillation frequency division module converts the input direct current voltage into a periodic pulse signal that can be accurately controlled through the cascade architecture of the integrated binary counter (such as CD4060) and the decimal counter (such as CD4017). The core principle is to use the counter to divide and expand the basic oscillation signal, and through the charging resistor R S , the discharge resistor R X and the oscillation capacitor C XAn RC oscillation network is constructed to generate an initial clock signal, which is then divided through multiple stages to obtain a longer period pulse output. This is achieved by adjusting the charging resistor R. S The resistance value can be set to the base frequency reference and the discharge resistor R. X and oscillation capacitor C X The product value can fine-tune the timing parameters before and after frequency division, thereby accurately modulating the pulse signal period to the accuracy range required by the aging process, meeting the flexible adaptation requirements of different models of time delay relays for aging periods (such as from seconds to hours).

[0030] The pulse width modulation module, through a dual monostable multivibrator, modulates the pulse width of the periodic pulse signal generated by the oscillation frequency divider module within the required pulse width accuracy range, providing the drive signal voltage to the drive module; adjusting the R of the dual monostable multivibrator... X1 C X1 and R X2 C X2 The value allows its pulse width to meet the aging requirements of different models of time delay relays.

[0031] More specifically, the pulse width modulation module utilizes a dual monostable multivibrator (such as the CD4538 integrated device) to reconstruct the pulse width of the periodic pulse signal output from the oscillation frequency divider module. Through its dual monostable triggering characteristics, it controls the rise and fall times of the pulse, precisely adjusting the pulse width of the input signal to the required timing accuracy range for the aging process. Its core mechanism involves an external R... X1 C X1 and R X2 C X2 The two independent RC timing networks are configured, with the pulse turn-on and turn-off delay parameters set separately. The R... X1 C X1 The product of R and R controls the trigger speed of the pulse leading edge. X2 C X2 The product of these factors determines the attenuation characteristics of the pulse trailing edge, thus forming a drive signal with the target pulse width. This provides a voltage-adaptive control waveform for the subsequent power drive module. This parameterized adjustment method can flexibly match the different requirements of different models of time delay relays for aging tests on pulse width (such as milliseconds to seconds), duty cycle, or on-time duration, ensuring that the relay contacts withstand electrical stress tests that conform to actual working conditions under controllable on-off timing.

[0032] The power drive module amplifies the drive signal output from the pulse width modulation module to drive the power relay module, controlling the power relay module to turn on and off, and making it work periodically.

[0033] Further specifically, the power drive module uses a high-efficiency amplification circuit constructed by high-current gain semiconductor devices to expand the low-power drive signal (usually milliamperes of current) output by the pulse width modulation module, and uses the high-beta or transconductance characteristics of the devices to achieve linear power signal amplification. The core is to convert the 10 mA level current of the control signal into a 100 mA level current sufficient to drive several power relay circuits. By optimizing the on-resistance and switching speed of the drive circuit (such as using a Schottky diode to accelerate transistor turn-off), it ensures that the relay circuit completes the turn-on and turn-off actions within microseconds, and integrates a freewheeling protection diode to suppress the reverse electromotive force when the inductive load is powered off, avoiding damage to the driver caused by high-voltage spikes. Finally, the output of the stable and reliable drive current enables the power relay module to accurately perform the turn-on and turn-off operations according to the preset timing, ensuring that the relay contacts achieve zero-voltage switching or forced directional switching under the condition of periodic burn-in test without or with low arc.

[0034] The power relay module is used to realize the switching of the power supply and the load of the burn-in delay relay.

[0035] Further specifically, the power relay module is the core execution unit of the burn-in test system, which realizes efficient on-off control between the power supply and the measured delay relay and its load through electromagnetic or solid-state relay structure. It uses high-capacity contact groups to directly bear the large current impact required for burn-in, relies on metal sealing or magnetic blowout arc suppression technology to suppress arc generation when the contact is broken, ensures long-term switching reliability, and seamlessly connects with the previous power drive module through optical coupling isolation or relay coil drive interface to convert the drive signal into accurate action of mechanical contacts. In the periodic attraction and release process, it simulates the on-off cycle of the actual working condition, cooperates with the overcurrent protection and heat dissipation design to ensure safe operation of the system, and finally provides a stable and repeatable burn-in environment for the delay relay to verify its contact resistance stability and durability under thousands of on-off operations.

[0036] The output end of the power relay module includes an output positive end and an output negative end, which are connected to the power supply and the burn-in delay relay circuit, respectively. The burn-in delay relay circuit is connected to the power load and ground. The power relay module controls the on-off of the power supply, the burn-in delay relay circuit, and the power load through the drive signal.

[0037] Two or more groups of oscillation frequency division modules and pulse width modulation modules can be set to change their corresponding R X and C X values, R X1 , C X1 , and R X2 , C X2The signal generator for the aging of the delay relay can realize the periodic aging of the delay relay series circuit with different delay time by generating the driving signals with different period and pulse width.

[0038] Further, the signal generator for the aging of the delay relay comprises a voltage conversion module, at least two groups of oscillation frequency division modules and corresponding pulse width modulation modules, a power drive module, a power relay module, an aged delay relay circuit and a power load. S X X The adjustable oscillation frequency division unit is composed of binary and decimal counters in cascade and independent R X1 X1 X2 X2 The input pulse is independently pulse width modulated to form multiple driving signals with different period and pulse width.Each power relay module main contact is connected in series with the on-off control of the corresponding aged delay relay circuit and the power load circuit, and multiple module parameters are independently configured to realize the periodic aging of the delay relay series circuit with different delay time by a single power supply.

[0039] The signal generator for the aging of the delay relay only needs a power supply V CC ​​​​This allows for the aging of time-delay relays with one or more different delay times. After the power supply is powered on, the signal generator circuit generates a periodic pulse with a high-level pulse width slightly longer than the delay time t1+t2 of the time-delay relay and a low-level pulse width of 30ms±3ms, resulting in a load operating current of 1A and a current duty cycle of 40%~60%. Without changing the circuit structure and layout, the pulse period can be adjusted by modifying the output stage and RC value of the counter section in the oscillation frequency divider module, achieving pulse periods from short periods of up to 50ms to long periods of over 1000s. By adjusting the RC value of the dual monostable multivibrator in the pulse width modulation module, the low-level pulse width is modulated to 30ms±3ms, meeting the requirement of a "recycle time" of 30ms±3ms in the electrical parameters of the time-delay relay. Employing a power drive module and a multi-channel power relay module, the drive current capacity can reach tens of amps. Using a single power supply, a single board can simultaneously age over 60 time-delay relays, enabling large-scale power ageing. Two or more groups of oscillation frequency divider modules and pulse width modulation modules can be configured; by simply changing the capacitor and resistor values ​​of each module, time-delay relays with different delay times can be ageed simultaneously using a single power supply, saving on power supply equipment and ageing cycle costs. This signal generator is assembled on a PCB board, using common through-hole packaged components, making assembly simple and costing only a few hundred yuan, far lower than the cost of purchasing dedicated signal generator equipment.

[0040] Example 2 To further explain the technical solution of the present invention, this embodiment is used for illustration. Specifically: like Figure 1 As shown, the signal generator for aging time-delay relays includes a voltage conversion module, an oscillation frequency divider module, a pulse width modulation module, a power drive module, and a power relay module. Taking a time delay time of t1=500s and t2=500s as an example, batch power aging is achieved.

[0041] Figure 3 The voltage conversion module in the middle converts the power supply voltage V CC The voltage is converted to a fixed 5V voltage, which is sufficient for the operation of the subsequent oscillation frequency divider and pulse width modulation modules. This 5V voltage remains stable even when the power supply voltage fluctuates. The voltage conversion module consists of a positive three-terminal regulator W1 and a capacitor C. IN and capacitor C O Composition. The input terminal V of the positive three-terminal regulator. IN Connect the power supply voltage and connect a ceramic capacitor C close to ground near the input pin. IN With a capacitance of 0.1μF~0.47μF, it is used for input filtering to improve its anti-interference capability; the output V OConnect the power supply port of the subsequent component to supply power to the subsequent component, and connect a capacitor C close to the output pin to ground. O With a capacitance of 0.1μF~1μF, it is used to filter the output terminal and suppress output voltage fluctuations.

[0042] Figure 3 The oscillation frequency divider module in the system converts DC voltage into periodic pulse signals using binary and decimal counters, and modulates the pulse signals to the required periodic accuracy range. The oscillation frequency divider module consists of a binary counter U1, a decimal counter U2, and an RC clock oscillator. The RC clock oscillator includes a charging resistor R. S Discharge resistor R X and oscillation capacitor C X ; Oscillation capacitor C X One end is connected to the charging resistor R S The other end is connected to the discharge resistor R. X The 5V output of the voltage conversion module is connected to the power supply terminals of binary counter U1 and decimal counter U2. Simultaneously, the reset terminals of both counters are set low, and binary counter U1 begins timing, outputting a square wave signal with a period of T. The Q14 output of binary counter U1 serves as the clock signal, connected to the clock terminal of decimal counter U2. The two counters are cascaded, thus modulating the period length of binary counter U1 to 10T, generating a longer-period pulse signal with a high-level duty cycle of 10%. Adjust the charging resistor R of the RC clock oscillator according to the required time-delay relay model (time-delay relays have the same structure but different delay times). S Discharge resistor R X and oscillation capacitor C X Ultimately, a periodic pulse signal of more than 1000 seconds can be achieved, which can make its period meet the aging requirements of different models of time delay relays.

[0043] Figure 3 The pulse width modulation (PWM) module in the system uses a dual monostable multivibrator to modulate the pulse width of the periodic pulse signal generated by the oscillation frequency divider module within the required accuracy range, providing the drive signal voltage to the drive module. The PWM module consists of a dual monostable multivibrator U3 and an RC modulator, which includes a resistor R... X1 Capacitor C X1 and resistance R X2 Capacitor C X2 resistance R X1 and capacitor C X1 This forms the first RC network, used to adjust the pulse width of the first output signal. Resistor R X2 and capacitor C X2The second RC network is configured to adjust the pulse width or phase difference of the second output signal. The output end of the voltage conversion module is connected to the power supply end of the double monostable multivibrator U3, and the reset end is set to high level, thereby adjusting the resistance R X1 , capacitance C X1 and resistance R X2 value of the RC modulator, so as to modulate the low-level pulse width in one period to t L =30ms±3ms, so as to meet the requirement that the recirculation time in the delay relay series circuit electrical parameter is 30ms±3ms. The double monostable multivibrator U3 contains two output signals, and the low-level pulse phase difference time between the two signals is T. The two signals can respectively drive a group of power drive modules, thereby increasing the number of delay relay aging.

[0044] The function timing diagram of the voltage conversion module, the oscillation frequency division module and the pulse width modulation module is shown in Figure 4 .

[0045] Figure 3 The power drive module amplifies the drive signal output by the pulse width modulation module, and is used for driving the power relay module, controlling the turn-on and turn-off of the power relay module, and making the power relay module work periodically. The power drive module contains two groups. One group is composed of the triode T1, the base resistance R1 and the emitter resistance R2. The other group is composed of the triode T2, the base resistance R3 and the emitter resistance R4. The output end of the pulse width modulation module is connected to the base resistance R1. When the output end outputs low level, the triode T1 is turned off, and the emitter of the triode T1 is low level. When the output end outputs high level, the triode T1 is turned on, and the emitter of the triode T1 is high level, so that the power relay module is turned on. The input current range of the power relay module is 10mA~20mA, which exceeds the output current capacity of the pulse width modulation module. Therefore, the current amplification is needed through the triode T1.

[0046] Figure 3The power relay module is used to switch the power supply on and off with the time-delay relays being conditioned and the load. Two sets of power drive modules each control one set of power relay modules. Each set of power relay modules drives several time-delay relays to be conditioned, and their operation is controlled by single-pole double-throw switches K1 and K2. When the switch is closed, a drive signal is received at the input of the power relay, causing the metal-oxide-semiconductor field-effect transistor (MOSFET) at the output of the power relay to periodically turn on and off. At room temperature, the power relay module can withstand a current of 30A, and the conditioned current of a single time-delay relay is 1A. A maximum of 30 time-delay relays can be driven; therefore, two sets can drive 60 relays, enabling batch power conditioned time-delay relays.

[0047] If the time-delay relays to be aged include two types, then the block diagram of the signal generator is as follows: Figure 2 As shown, a single power supply is used to output 5V voltage through a voltage conversion module, which powers two sets of oscillation frequency divider modules, a pulse width modulation module, and a power drive module. Based on the delay time of each type of time-delay relay, the period of each oscillation frequency divider module and the pulse width of the pulse width modulation module are adjusted to control the periodic on and off of each power relay module, thus achieving batch power aging of different types of time-delay relays.

[0048] If the power supply has a sufficiently large current capacity, or if there are more types of time delay relays to be aged, then the corresponding modules can be added to achieve simultaneous aging of multiple types of time delay relays under a single power supply, saving power supply equipment and aging cycle costs.

[0049] Wiring diagram of the signal generator used for aging single-product time delay relays is as follows: Figure 5 As shown. This signal generator is manufactured using a low-cost PCB substrate with dimensions of 140mm × 140mm or less. Counters U1 and U2, dual monostable multivibrator U3, three-terminal regulator W1, transistors T1 and T2, and power relays A1 and A2 all use conventional through-hole packages and are all IC socket-mounted for easy component replacement. If more varieties or quantities of products need to be processed, only the corresponding number of signal generators need to be added. The total board cost is only a few hundred yuan, far lower than the cost of purchasing a dedicated power signal generator device.

[0050] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A signal generator for aging a time delay relay, characterized by, The signal generator comprises a voltage conversion module, an oscillation frequency division module, a pulse width modulation module, a power drive module, and a power relay module. An input end of the voltage conversion module is electrically connected with an external power supply, and the voltage conversion module converts an output voltage of the external power supply into a fixed low voltage and outputs the fixed low voltage to the oscillation frequency division module, the pulse width modulation module, and the power drive module. An input end of the oscillation frequency division module receives a low voltage direct current signal output by the voltage conversion module, and generates a periodic pulse signal and outputs the periodic pulse signal to the pulse width modulation module. The pulse width modulation module adjusts the periodic pulse signal to a target precision, and outputs a modulation signal to the power drive module. The power drive module amplifies a current of the modulation signal, and generates a drive signal and outputs the drive signal to the power relay module. An output end of the power relay module is connected with a power supply and a burned-in delay relay circuit, an output end of the burned-in delay relay circuit is connected with a power load, and the power relay module controls the power supply, the burned-in delay relay circuit, and the power load through the drive signal.

2. A signal generator for aging a time delay relay according to claim 1, characterized in that The voltage conversion module comprises a positive three-terminal voltage regulator W1, a capacitor C IN and a capacitor C O ; an input pin V IN of the positive three-terminal voltage regulator W1 is connected with an external power supply voltage V CC ; the capacitor C IN is connected in parallel between the input pin V IN of the positive three-terminal voltage regulator W1 and a ground pin GND, and is placed close to the input pin V IN of the positive three-terminal voltage regulator W1; the capacitor C O is connected in parallel between the input pin V IN of the positive three-terminal voltage regulator W1 and the ground pin GND, and is placed close to an output pin V O of the positive three-terminal voltage regulator W1.

3. A signal generator for aging a time delay relay according to claim 2, characterized in that The capacitance C IN is 0.1 μF to 0.47 μF; the capacitance C O is 0.1 μF to 1 μF.

4. A signal generator for aging a time delay relay according to claim 1, wherein The oscillation frequency division module comprises a binary counter U1, a decimal counter U2, and an RC clock oscillator.

5. A signal generator for aging a time delay relay according to claim 4, wherein The RC clock oscillator comprises a charging resistor R S , a discharging resistor R X , and an oscillation capacitor C X ; one end of the oscillation capacitor C X is connected to the charging resistor R S , and the other end is connected to the discharging resistor R X .

6. A signal generator for aging a time delay relay according to claim 1, wherein The pulse width modulation module comprises a dual monostable multivibrator U3 and an RC modulator.

7. A signal generator for aging a time delay relay according to claim 6, wherein The RC modulator comprises a first RC network and a second RC network; the first RC network comprises a resistance R X1 and a capacitance C X1 ; the second RC network comprises a resistance R X2 and a capacitance C X2 .

8. A signal generator for aging a time delay relay according to claim 1, wherein The power drive module comprises two groups of power drive units, one group of power drive units comprises a triode T1, a base resistor R1, and an emitter resistor R2, and the other group of power drive units comprises a triode T2, a base resistor R3, and an emitter resistor R4.

9. A signal generator for aging a time delay relay according to claim 8, wherein Each group of power drive units drives a plurality of burned-in delay relays.

10. A signal generator for aging a time delay relay according to claim 1, wherein The signal generator comprises at least two groups of oscillation frequency division modules, and pulse width modulation modules, power drive modules, and power relay modules corresponding to the two groups of oscillation frequency division modules, respectively.

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