Optical proximity correction method, device, storage medium and electronic equipment

Abstract

The application discloses an optical proximity correction method, device, storage medium and electronic equipment. The optical proximity correction method comprises the following steps: acquiring an integrated circuit layout, and dividing the integrated circuit layout into a plurality of independent line segments; performing a preset number of iteration cycles on each independent line segment; in each iteration, calculating a first movement amount based on an edge placement error of each independent line segment and adjusting the independent line segment; after completing the iteration cycle, identifying important graphic line segments sensitive to imaging logarithmic slope from all the independent line segments; determining a second movement amount for maximizing the imaging logarithmic slope of the important graphic line segments based on the first movement amount; adjusting the important graphic line segments according to the second movement amount, and performing optical proximity correction on the adjusted all independent line segments to generate a final corrected layout. The application can improve the design efficiency of the integrated circuit layout.

Description

Optical proximity effect correction methods, devices, storage media and electronic equipment Technical Field

[0001] This application relates to the field of integrated circuit technology, specifically to an optical proximity effect correction method, apparatus, storage medium, and electronic device. Background Technology

[0002] With the continuous evolution of integrated circuit manufacturing processes, the feature size of semiconductor devices has been shrinking to the nanometer scale. At this scale, the optical proximity effect (OPE) caused by light diffraction and interference during photolithography becomes increasingly significant, resulting in severe distortion between the actual image on the silicon wafer and the design pattern on the mask. To overcome this challenge, optical proximity correction (OPC) technology has become an indispensable key step in modern chip design and manufacturing processes. The core optimization goal of traditional OPC technology is to minimize the edge placement error (EPE), that is, to iteratively adjust the edge position of the layout pattern so that the edge of the simulated image coincides as closely as possible with the edge of the intended design pattern. In this process, a cost function centered on EPE is usually established, which drives the layout line segments to move through multiple feedback loops until the EPE converges to an acceptable range.

[0003] With the continuous increase in pattern density and complexity, especially in the fabrication of high-density memory and advanced logic circuits, the Normalized Image Log Slope (NILS) has become increasingly important as a key indicator for measuring the edge sharpness of lithographic imaging and the robustness of the process window. A high NILS means steeper imaging edges and less sensitivity to changes in depth of focus and exposure, thus enabling a more stable process window and higher production yield.

[0004] However, traditional OPC technology focuses on minimizing EPE, while NILS is mainly verified in the subsequent Optical Rule Check (ORC) stage. When the ORC check finds that the NILS in certain critical areas does not meet the standards, designers need to return to the OPC stage to readjust or even modify the design rules, which greatly affects the design efficiency of integrated circuit layout and prolongs the product development cycle. Summary of the Invention

[0005] This application provides an optical proximity effect correction method, apparatus, storage medium, and electronic device, which can improve the design efficiency of integrated circuit layout.

[0006] In a first aspect, embodiments of this application provide an optical proximity effect correction method, including:

[0007] Obtain the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments;

[0008] The independent line segment is iterated a preset number of times. In each iteration, a first movement amount is calculated based on the edge placement error of each independent line segment, and the independent line segment is adjusted.

[0009] After completing the iterative loop, important graphic line segments that are sensitive to the imaging log slope are identified from all the independent line segments.

[0010] A second movement amount is determined based on the first movement amount to maximize the imaging log slope of the important graphic line segment;

[0011] The important graphic segments are adjusted according to the second movement amount, and optical proximity effect correction is performed on all the adjusted independent segments to generate the final corrected layout.

[0012] In the optical proximity effect correction method provided in this application embodiment, determining a second movement amount that maximizes the imaging logarithmic slope of the important graphic line segment based on the first movement amount includes:

[0013] The movement tolerance range is calculated based on the first movement amount and the tolerance coefficient;

[0014] Within the range of motion tolerance, a second motion is searched that maximizes the imaging log slope of the important graphic line segment.

[0015] In the optical proximity effect correction method provided in this application embodiment, the step of searching for a second movement amount that maximizes the imaging logarithmic slope of the important graphic line segment within the movement tolerance range includes:

[0016] Within the range of motion tolerance, a scan is performed with a preset step size, and the imaging log slope of the important graphic line segment at each candidate position is calculated.

[0017] The second movement is determined based on the candidate position corresponding to the maximum imaging log slope.

[0018] In the optical proximity effect correction method provided in this application embodiment, the step of identifying important graphic line segments sensitive to the imaging logarithmic slope from all the independent line segments includes:

[0019] Obtain the graphical topology, dimensional rules, electrical functional importance, and / or process window sensitivity of each independent line segment;

[0020] Identify important graphic segments sensitive to the imaging log slope from all the independent segments based on the graphic topology, the dimensional rules, the importance of the electrical function, and / or the process window sensitivity.

[0021] In the optical proximity effect correction method provided in this application embodiment, the step of calculating a first movement amount based on the edge placement error of each independent line segment and adjusting the independent line segment includes:

[0022] Obtain the edge placement error for each of the individual line segments;

[0023] The first movement amount is calculated based on the edge placement error and the preset feedback coefficient;

[0024] Adjust each of the individual line segments according to the first movement amount.

[0025] In the optical proximity effect correction method provided in this application embodiment, obtaining the edge placement error of each of the independent line segments includes:

[0026] Each of the independent line segments is simulated using a photolithography model to predict the predicted imaging edge of each of the independent line segments;

[0027] The edge placement error is obtained by calculating the shortest distance between the predicted imaging edge and the independent line segment.

[0028] In the optical proximity effect correction method provided in this application embodiment, dividing the integrated circuit layout into multiple independent line segments includes:

[0029] The integrated circuit layout is analyzed according to predefined geometric rules and process constraints;

[0030] Based on the analysis results, the continuous edges in the integrated circuit layout are discretized into multiple independent line segments.

[0031] Secondly, embodiments of this application provide an optical proximity effect correction device, comprising:

[0032] The acquisition unit is used to acquire the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments;

[0033] An iterative unit is used to perform a preset number of iterative cycles on each of the independent line segments. In each iteration, a first movement amount is calculated based on the edge placement error of each of the independent line segments, and the independent line segments are adjusted.

[0034] The identification unit is used to identify important graphic line segments that are sensitive to the imaging log slope from all the independent line segments after the iteration loop is completed;

[0035] The determining unit is configured to determine a second movement amount that maximizes the imaging log slope of the important graphic line segment based on the first movement amount;

[0036] The correction unit is used to adjust the important graphic line segments according to the second movement amount, and to perform optical proximity effect correction on all the adjusted independent line segments to generate the final corrected pattern.

[0037] Thirdly, this application provides a storage medium storing a plurality of instructions adapted for loading by a processor to execute the optical proximity effect correction method described in any of the preceding claims.

[0038] Fourthly, this application provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the optical proximity effect correction method described in any of the preceding claims.

[0039] In summary, the optical proximity effect correction method provided in this application includes acquiring an integrated circuit layout and dividing the integrated circuit layout into multiple independent line segments; performing a preset number of iterative cycles on each independent line segment; in each iteration, calculating a first movement amount based on the edge placement error of each independent line segment and adjusting the independent line segment; after completing the iterative cycle, identifying important graphic line segments sensitive to the imaging logarithmic slope from all the independent line segments; determining a second movement amount based on the first movement amount to maximize the imaging logarithmic slope of the important graphic line segments; adjusting the important graphic line segments according to the second movement amount; and performing optical proximity effect correction on all the adjusted independent line segments to generate a final corrected layout. This application embodiment can improve the design efficiency of integrated circuit layouts. Attached Figure Description

[0040] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0041] Figure 1 is a schematic diagram of the application scenario of the optical proximity effect correction method provided in the embodiments of this application.

[0042] Figure 2 is a flowchart illustrating the optical proximity effect correction method provided in an embodiment of this application.

[0043] Figure 3 is a schematic diagram of the optical proximity effect correction device provided in the embodiment of this application.

[0044] Figure 4 is a schematic diagram of the structure of the electronic device provided in an embodiment of this application. Detailed Implementation

[0045] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0046] It should be noted that, in this document, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes that element. Furthermore, components, features, and elements with the same names in different embodiments of this application may have the same meaning or different meanings, the specific meaning of which must be determined by its interpretation in that specific embodiment or further in conjunction with the context of that specific embodiment.

[0047] It should be understood that the specific embodiments described herein are merely illustrative of this application and are not intended to limit this application.

[0048] In the following description, the use of suffixes such as "module," "part," or "unit" to denote elements is solely for the purpose of illustrative purposes and has no specific meaning in itself. Therefore, "module," "part," or "unit" may be used interchangeably.

[0049] In the description of this application, it should be noted that the terms "upper," "lower," "left," "right," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In addition, terms such as "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0050] Traditional OPC technology focuses on minimizing EPE (Extended Component Execution), while NILS (Non-Integrated Design Rule Check) is primarily verified in the subsequent Optical Rule Check (ORC) stage. When the ORC check finds that the NILS in certain critical areas does not meet the standards, designers need to return to the OPC stage to readjust or even modify the design rules, which greatly affects the design efficiency of integrated circuit layout and prolongs the product development cycle.

[0051] Based on this, embodiments of this application provide an optical proximity effect correction method, apparatus, storage medium, and electronic device. Specifically, the optical proximity effect correction apparatus can be integrated into an electronic device, which can be a server or a terminal, etc. The terminal can include mobile phones, wearable smart devices, tablet computers, laptops, and personal computers (PCs), etc. The server can be a single server or a server cluster composed of multiple servers, and can be a physical server or a virtual server.

[0052] For example, as shown in Figure 1, an electronic device can acquire an integrated circuit layout and divide the layout into multiple independent line segments; perform a preset number of iterations on each independent line segment; in each iteration, calculate a first movement amount based on the edge placement error of each independent line segment and adjust the independent line segment; after completing the iteration, identify important graphic line segments that are sensitive to the imaging logarithmic slope from all independent line segments; determine a second movement amount that maximizes the imaging logarithmic slope of the important graphic line segments based on the first movement amount; adjust the important graphic line segments according to the second movement amount, and perform optical proximity effect correction on all adjusted independent line segments to generate the final corrected layout.

[0053] The technical solutions shown in this application will be described in detail below through specific embodiments. It should be noted that the order of description of the following embodiments is not intended to limit the priority of the embodiments.

[0054] Please refer to Figure 2, which is a schematic flowchart of the optical proximity effect correction method provided in an embodiment of this application. The specific flow of the optical proximity effect correction method can be as follows:

[0055] 101. Obtain the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments.

[0056] In some embodiments, the integrated circuit layout to be processed (typically in GDSII or OASIS format) can be obtained from the upstream design environment. The layout can then be analyzed according to predefined geometric rules and process constraints. Finally, based on the analysis results, continuous edges in the integrated circuit layout are discretized into multiple independent line segments.

[0057] Specifically, the edges in the integrated circuit layout can be non-uniformly discretized based on their geometric complexity. For example, in areas with drastic curvature changes (such as corners or endpoints) or complex topologies, a higher partitioning density (i.e., the first density) can be used to divide the edges into shorter, independent line segments, ensuring flexibility and accuracy for subsequent adjustments. Conversely, in areas with straight contours or gentle curvature changes, a lower partitioning density (i.e., the second density) is used to divide the edges into longer, independent line segments, improving overall computational efficiency. Ultimately, the entire integrated circuit layout is transformed into a collection of numerous independently movable line segments.

[0058] Geometric rules can include minimum linewidth, minimum spacing, and pattern angle constraints. Process constraints can include parameters such as lithography machine illumination conditions, numerical aperture, and critical dimension targets for process nodes.

[0059] 102. Perform a preset number of iterations for each independent line segment. In each iteration, calculate the first movement amount based on the edge placement error of each independent line segment and adjust the independent line segment.

[0060] In this embodiment, a total number of iterations N can be preset based on historical experience data accumulated at specific process nodes, pre-simulation convergence analysis of typical test layout areas, and a comprehensive trade-off between available computing resources and project time costs. This aims to ensure that the optical proximity effect correction meets process requirements with reasonable computational overhead. In this embodiment, the preset number of iterations M is less than the total number of iterations N (e.g., M = N - 3), thereby ensuring that while the EPE is fully optimized, sufficient iteration leeway and computational resources are reserved for subsequent steps.

[0061] In each iteration, the edge placement error of each individual line segment can be obtained first. Specifically, each individual line segment can be simulated using a photolithography model to predict the predicted imaging edge of each individual line segment; thus, the shortest distance between the predicted imaging edge and the individual line segment can be calculated to obtain the edge placement error.

[0062] Next, the first movement amount is calculated based on the edge placement error and the preset feedback coefficient. Specifically, the first movement amount = EPE × preset feedback coefficient. This preset feedback coefficient is typically a value between 0.1 and 0.8. This preset feedback coefficient acts as a damping factor to control the step size of independent line segment movements. Its function is to prevent oscillations or non-convergence in the optimization process due to excessively large single movements, thereby ensuring the stability of the optimization process.

[0063] Finally, each individual line segment is adjusted based on the first movement amount. Specifically, after calculating the first movement amount, each individual line segment can be controlled to move by the displacement indicated by the first movement amount along the normal direction of its contour (i.e., the direction perpendicular to the edge). It should be noted that the positive or negative movement is determined by the sign of the EPE (usually defined as positive outside the design contour and negative inside), to ensure that the movement is in the direction that reduces the EPE.

[0064] It can be understood that after completing a preset number of iterations M, the EPE of the integrated circuit layout has been significantly improved, reaching a preliminary convergence state.

[0065] 103. After completing the iterative loop, identify important graphic line segments that are sensitive to the logarithmic slope of the image from all independent line segments.

[0066] In this embodiment, important graphic line segments sensitive to the imaging logarithmic slope can be identified from all independent line segments based on multidimensional rules. Specifically, the graphic topology, dimensional rules, electrical functional importance, and / or process window sensitivity of each independent line segment can be obtained; important graphic line segments sensitive to the imaging logarithmic slope can be identified from all independent line segments based on the graphic topology, dimensional rules, electrical functional importance, and / or process window sensitivity.

[0067] One method for identifying important pattern segments sensitive to the imaging logarithmic slope from all independent line segments based on the pattern topology is to identify all independent line segments located within a specific high-density periodic array structure as important pattern segments. For example, in the manufacturing of NAND flash memory or DRAM, its core memory cell array is considered an area where high-quality imaging must be guaranteed. Therefore, any independent line segment located within a specific high-density periodic array structure is identified as an important pattern segment.

[0068] Among all independent line segments, the important graphic line segments sensitive to the imaging logarithmic slope can be identified according to the size rules as follows: independent line segments whose own linewidth or the spacing between them and adjacent graphics is equal to or less than the resolution limit of the current lithography process are identified as important graphic line segments. It is understandable that the imaging quality of these graphics located at the process capability boundary is most sensitive to NILS.

[0069] Among these, identifying important graphical segments sensitive to the logarithmic slope of the imaging from all independent segments based on their electrical functional importance can be achieved by: identifying the independent segments corresponding to the graphics constituting key devices (such as transistor gates) or key signal paths (such as global clock lines, high-speed data lines, and key parts of power distribution networks) as important graphical segments based on the correspondence between the circuit netlist and the integrated circuit layout. It is understandable that variations in the size and shape of these independent segments directly affect the final speed and reliability of the circuit.

[0070] Specifically, identifying critical graphic segments sensitive to the imaging logarithmic slope from all independent segments based on process window sensitivity can be achieved by: recalling historical process data or running a fast process window simulation; identifying independent segments whose EPE or NILS values ​​change beyond a preset safety threshold when process parameters such as focus and exposure fluctuate normally. These independent segments represent the "weak links" within the process window and require optimization of NILS to enhance their robustness.

[0071] 104. Determine a second movement amount that maximizes the imaging log slope of the important graphic line segment based on the first movement amount.

[0072] In some embodiments, a motion tolerance range can be calculated first based on a first motion amount and a tolerance coefficient; then, within the motion tolerance range, a second motion amount is searched to maximize the imaging log slope of the important graphic line segment.

[0073] For each important graphic line segment, the final position achieved after iterative optimization in step 102 can be used as the reference position. Subsequently, the movement tolerance range is calculated based on the first movement amount of the important graphic line segment and the preset tolerance coefficient, thereby finding a better solution that maximizes NILS within a controlled range, so as to improve the imaging quality of key areas without significantly sacrificing the converged EPE accuracy.

[0074] The tolerance range is defined as the interval formed by offsetting |first movement amount × tolerance coefficient| in both positive and negative directions from the reference position. That is, the tolerance range = [reference position - |first movement amount × tolerance coefficient|, reference position + |first movement amount × tolerance coefficient|].

[0075] The tolerance coefficient is a configurable parameter ranging from 0.5 to 2.0. Its specific value depends on the importance and process sensitivity of the pattern segment. For example, a larger tolerance coefficient (e.g., 1.8) can be set for critical segments in a NAND array, while a smaller tolerance coefficient (e.g., 0.7) can be set for ordinary interconnect segments.

[0076] Subsequently, within a defined tolerance range of motion, discretization scanning is performed with a preset step size (e.g., 0.1 nm). For each candidate location within the scanning range, fast local lithography simulation can be performed to calculate the imaging log slope when the important pattern line segment is located at that location. Finally, the imaging log slopes corresponding to all candidate locations are compared, and a maximization selection strategy is adopted to determine the candidate location that produces the maximum imaging log slope as the optimal location. The amount of movement of this optimal location relative to the reference location is the second movement amount.

[0077] That is, the step "searching for a second movement amount that maximizes the imaging log slope of the important graphic line segment within the movement tolerance range" can be specifically as follows: scanning with a preset step size within the movement tolerance range, calculating the imaging log slope of the important graphic line segment at each candidate position; and determining the second movement amount based on the candidate position corresponding to the maximum imaging log slope.

[0078] Understandably, this second movement is the "common solution" of EPE and NILS found for this important graphic line segment, which can significantly improve the image edge quality while keeping the EPE basically unaffected.

[0079] 105. Adjust the important graphic lines according to the second movement amount, and perform optical proximity effect correction on all the adjusted independent lines to generate the final corrected layout.

[0080] For each important graphic line segment, its movement can be controlled according to the second movement amount. For other independent line segments of non-important graphic line segments, their final positions reached after the EPE-dominated optimization phase in step 102 remain unchanged.

[0081] After adjusting all individual line segments, a global optical proximity correction can be performed on the entire integrated circuit layout. This verifies and ensures that important graphic line segments optimized and moved by NILS do not cause new spacing violations, bridging, or graphic breaks between them and surrounding ordinary independent line segments due to changes in relative position. Through global simulation and fine-tuning, the adjustment results of all independent line segments are ensured to be optically coordinated, forming a uniform graphic distribution achievable under photolithography.

[0082] Finally, the layout data after global optical proximity effect correction is verified and formatted to generate a corrected layout that meets the requirements of downstream mask manufacturing.

[0083] In summary, the optical proximity effect correction method provided in this application includes acquiring an integrated circuit layout and dividing the layout into multiple independent line segments; performing a preset number of iterative cycles on each independent line segment; calculating a first movement amount based on the edge placement error of each independent line segment and adjusting the independent line segment in each iteration; identifying important graphic line segments sensitive to the imaging logarithmic slope from all independent line segments after completing the iteration cycle; determining a second movement amount based on the first movement amount to maximize the imaging logarithmic slope of the important graphic line segments; adjusting the important graphic line segments according to the second movement amount; and performing optical proximity effect correction on all adjusted independent line segments to generate the final corrected layout. This application embodiment achieves systematic collaborative optimization of EPE and NILS by embedding NILS optimization into the OPC flow, fundamentally changing the situation where the two optimizations are separated in the traditional flow. This application embodiment completely avoids the multiple design rework and iterations caused by NILS non-compliance in the traditional "OPC-ORC" serial flow, shortening the debugging cycle that could originally last for several weeks to a single flow run. By using automated and targeted NILS optimization search, the reliance on manual debugging by senior engineers is significantly reduced, labor costs are decreased, and the design efficiency of integrated circuit layouts is improved.

[0084] To facilitate better implementation of the optical proximity effect correction method provided in this application, this application also provides an optical proximity effect correction device. The meanings of the terms used are the same as in the optical proximity effect correction method described above, and specific implementation details can be found in the descriptions within the method embodiments.

[0085] Please refer to Figure 3, which is a schematic diagram of the optical proximity effect correction device provided in an embodiment of this application. The optical proximity effect correction device may include an acquisition unit 201, an iteration unit 202, an identification unit 203, a determination unit 204, and a correction unit 205.

[0086] Acquisition unit 201 is used to acquire the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments;

[0087] The iteration unit 202 is used to perform a preset number of iterations on each independent line segment. In each iteration, the first movement amount is calculated based on the edge placement error of each independent line segment and the independent line segment is adjusted.

[0088] The identification unit 203 is used to identify important graphic line segments that are sensitive to the imaging log slope from all independent line segments after the iteration loop is completed;

[0089] The determining unit 204 is used to determine a second movement amount that maximizes the imaging log slope of the important graphic line segment based on the first movement amount;

[0090] The correction unit 205 is used to adjust the important graphic line segments according to the second movement amount, and to perform optical proximity effect correction on all the adjusted independent line segments to generate the final corrected pattern.

[0091] For specific implementation methods of each of the above units, please refer to the embodiments of the optical proximity effect correction method described above, which will not be repeated here.

[0092] In summary, the optical proximity effect correction device provided in this application embodiment can acquire an integrated circuit layout through an acquisition unit 201, and divide the integrated circuit layout into multiple independent line segments; the iteration unit 202 performs a preset number of iterations on each independent line segment, and in each iteration, calculates a first movement amount based on the edge placement error of each independent line segment and adjusts the independent line segment; after completing the iteration cycle, the identification unit 203 identifies important graphic line segments sensitive to the imaging logarithmic slope from all independent line segments; the determination unit 204 determines a second movement amount based on the first movement amount to maximize the imaging logarithmic slope of the important graphic line segments; and the correction unit 205 adjusts the important graphic line segments according to the second movement amount and performs optical proximity effect correction on all adjusted independent line segments to generate a final corrected layout. This application embodiment can improve the design efficiency of integrated circuit layouts.

[0093] This application also provides an electronic device that may integrate the optical proximity effect correction device of this application, as shown in FIG4, which illustrates the structural schematic diagram of the electronic device involved in this application. Specifically:

[0094] The electronic device may include components such as a processor 301 with one or more processing cores and a memory 302 with one or more computer-readable storage media. Those skilled in the art will understand that the electronic device structure shown in FIG4 does not constitute a limitation on the electronic device, and may include more or fewer components than shown, or combine certain components, or have different component arrangements. Wherein:

[0095] The processor 301 is the control center of the electronic device. It connects various parts of the electronic device via various interfaces and lines. By running or executing software programs stored in the memory 302 and / or this application, and by calling data stored in the memory 302, it performs various functions and processes data, thereby providing overall monitoring of the electronic device. Optionally, the processor 301 may include one or more processing cores; preferably, the processor 301 may integrate an application processor and a modem processor, wherein the application processor mainly handles the operation of the storage medium, user interface, and application programs, while the modem processor mainly handles wireless communication. It is understood that the modem processor may not be integrated into the processor 301.

[0096] The memory 302 can be used to store software programs and this application. The processor 301 executes various functional applications and data processing by running the software programs and this application stored in the memory 302. The memory 302 may mainly include a program storage area and a data storage area. The program storage area may store applications required for operating the storage medium and at least one function; the data storage area may store data created based on the use of the electronic device. In addition, the memory 302 may include high-speed random access memory and may also include non-volatile memory, such as at least one disk storage device, flash memory device, or other volatile solid-state storage device. Accordingly, the memory 302 may also include a memory controller to provide the processor 301 with access to the memory 302.

[0097] Although not shown, the electronic device may also include a display unit, an input unit, and a power supply, etc., which will not be described in detail here. Specifically, in this embodiment, the processor 301 in the electronic device loads the executable files corresponding to the processes of one or more application programs into the memory 302 according to the following instructions, and the processor 301 runs the application programs stored in the memory 302 to realize various functions, as follows:

[0098] Obtain the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments;

[0099] For each independent line segment, perform a preset number of iterations. In each iteration, calculate the first movement amount based on the edge placement error of each independent line segment and adjust the independent line segment accordingly.

[0100] After completing the iterative loop, identify the important graphic line segments that are sensitive to the imaging log slope from all independent line segments;

[0101] A second movement amount is determined based on the first movement amount to maximize the imaging log slope of the important graphic line segments;

[0102] The important graphic segments are adjusted based on the second movement amount, and optical proximity effect correction is performed on all the adjusted independent segments to generate the final corrected pattern.

[0103] Those skilled in the art will understand that all or part of the steps in the various methods of the above embodiments can be performed by instructions, or by instructions controlling related hardware. These instructions can be stored in a computer-readable storage medium and loaded and executed by a processor.

[0104] Therefore, embodiments of this application provide a storage medium storing a plurality of instructions that can be loaded by a processor to execute steps in any of the methods provided in embodiments of this application. For example, the instructions can execute the following steps:

[0105] Obtain the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments;

[0106] For each independent line segment, perform a preset number of iterations. In each iteration, calculate the first movement amount based on the edge placement error of each independent line segment and adjust the independent line segment accordingly.

[0107] After completing the iterative loop, identify the important graphic line segments that are sensitive to the imaging log slope from all independent line segments;

[0108] A second movement amount is determined based on the first movement amount to maximize the imaging log slope of the important graphic line segments;

[0109] The important graphic segments are adjusted based on the second movement amount, and optical proximity effect correction is performed on all the adjusted independent segments to generate the final corrected pattern.

[0110] For details on the implementation of each of the above operations, please refer to the previous examples, which will not be repeated here.

[0111] The storage medium may include: read-only memory (ROM), random access memory (RAM), disk or optical disk, etc.

[0112] Since the instructions stored in the storage medium can execute the steps of any method provided in the embodiments of this application, the beneficial effects that any method provided in the embodiments of this application can achieve can be realized. For details, please refer to the previous embodiments, which will not be repeated here.

[0113] The optical proximity effect correction method, apparatus, storage medium, and electronic device provided in this application have been described in detail above. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for correcting the optical proximity effect, characterized in that, include: Obtain the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments; The independent line segment is iterated a preset number of times. In each iteration, a first movement amount is calculated based on the edge placement error of each independent line segment, and the independent line segment is adjusted. After completing the iterative loop, important graphic line segments that are sensitive to the imaging log slope are identified from all the independent line segments. The movement tolerance range is calculated based on the first movement amount and the tolerance coefficient; Within the range of motion tolerance, a second movement amount is searched that maximizes the imaging log slope of the important graphic line segment; the important graphic line segment is adjusted according to the second movement amount, while keeping the positions of other independent line segments, excluding the important graphic line segment, unchanged after the completion of the iteration cycle; then, optical proximity correction is performed on all the adjusted independent line segments to generate the final corrected pattern.

2. The optical proximity effect correction method as described in claim 1, characterized in that, The step of searching for a second movement amount that maximizes the imaging log slope of the important graphic line segment within the movement tolerance range includes: scanning within the movement tolerance range with a preset step size, calculating the imaging log slope of the important graphic line segment at each candidate position, and determining the second movement amount based on the candidate position corresponding to the maximum imaging log slope.

3. The optical proximity effect correction method as described in claim 1, characterized in that, The step of identifying important graphic segments sensitive to the imaging logarithmic slope from all the independent line segments includes: acquiring the graphic topology, dimensional rules, electrical functional importance, and / or process window sensitivity of each independent line segment; and identifying important graphic segments sensitive to the imaging logarithmic slope from all the independent line segments based on the graphic topology, dimensional rules, electrical functional importance, and / or process window sensitivity.

4. The optical proximity effect correction method as described in claim 1, characterized in that, The step of calculating a first movement amount based on the edge placement error of each independent line segment and adjusting the independent line segment includes: obtaining the edge placement error of each independent line segment; calculating a first movement amount based on the edge placement error and a preset feedback coefficient; and adjusting each independent line segment based on the first movement amount.

5. The optical proximity effect correction method as described in claim 4, characterized in that, The step of obtaining the edge placement error of each independent line segment includes: simulating each independent line segment using a photolithography model to predict the predicted imaging edge of each independent line segment; and calculating the shortest distance between the predicted imaging edge and the independent line segment to obtain the edge placement error.

6. The optical proximity effect correction method as described in claim 1, characterized in that, The step of dividing the integrated circuit layout into multiple independent line segments includes: analyzing the integrated circuit layout according to predefined geometric rules and process constraints; and discretizing continuous edges in the integrated circuit layout into multiple independent line segments based on the analysis results.

7. An optical proximity effect correction device, characterized in that, include: The acquisition unit is used to acquire the integrated circuit layout and divide the integrated circuit layout into multiple independent line segments; An iterative unit is used to perform a preset number of iterative cycles on each of the independent line segments. In each iteration, a first movement amount is calculated based on the edge placement error of each of the independent line segments, and the independent line segments are adjusted. The identification unit is used to identify important graphic line segments that are sensitive to the imaging log slope from all the independent line segments after the iteration loop is completed; A determining unit is configured to calculate the movement tolerance range based on the first movement amount and the tolerance coefficient; Within the range of motion tolerance, a second movement amount is searched to maximize the imaging logarithmic slope of the important graphic line segment; a correction unit is used to adjust the important graphic line segment according to the second movement amount, while keeping the positions of other independent line segments besides the important graphic line segment unchanged after the completion of the iteration cycle, and then performing optical proximity effect correction on all the adjusted independent line segments to generate a final corrected pattern.

8. A storage medium, characterized in that, The storage medium stores a plurality of instructions adapted for loading by a processor to execute the optical proximity effect correction method according to any one of claims 1-6.

9. An electronic device, characterized in that, It includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the optical proximity effect correction method as described in any one of claims 1-6.

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