Display driving device, driving chip and electronic equipment

Abstract

The invention relates to the technical field of display, in particular to a display driving device, a driving chip and electronic equipment, the display driving device comprises a time schedule controller and the display driving chip which are connected, and the display driving chip is used for counting error data received from the time schedule controller; when the counting number of the error data reaches a preset numerical value and the time sequence of the display driving device enters a vertical blanking area, the level state of a locking signal is changed from a first state to a second state, the locking signal is used for controlling a communication link between the display driving chip and the time sequence controller, and the time sequence of the display driving device enters the vertical blanking area. The level of the first state is different from that of the second state. The display abnormal phenomena such as flicker in the effective display area can be avoided, and the display quality and the user experience are improved.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to the technical field of display, and in particular, to a display driving device, a driving chip and an electronic device. BACKGROUND

[0002] At present, in the field of semiconductor, P2P protocol (Point-to-Point) is mainly applied to the transmission of driving IC (Integrated Circuit) information of display. P2P protocol is a special data transmission protocol between T-con (Timing Controller) and driving IC, and is used to realize one-to-one data communication between T-con and single driving IC. It is one of the key technologies for adapting high-resolution and high-refresh-rate screens.

[0003] In recent years, with the increasing demand of market for screen resolution and refresh rate, the requirement for display performance of driving IC is also increasing, and the data transmission rate is also increasing. Therefore, the accuracy of picture display is particularly important. How to distinguish and correct the error data received in the data transmission process without affecting the display effect is one of the key directions of the performance improvement of the protocol. If the driving IC continuously receives error data and fails to identify the error data, it will cause output error and may cause persistent display abnormality of the picture. SUMMARY

[0004] Therefore, the present disclosure provides a display driving device. The display driving device comprises a timing controller and a display driving chip connected to each other. The display driving chip is configured to:

[0005] count error data received from the timing controller;

[0006] when the number of counted error data reaches a preset value and the timing of the display driving device enters a vertical blanking period, change the level state of a lock signal from a first state to a second state, the lock signal is used to control the communication link between the display driving chip and the timing controller, and the first state and the second state are different in level.

[0007] In a possible implementation, the timing controller is configured to:

[0008] when detecting that the level state of the lock signal changes from the first state to the second state, send a calibration code to the display driving chip to restore the connection of the communication link between the display driving chip and the timing controller.

[0009] In a possible implementation, the display driving chip is further configured to:

[0010] The level state of the first pin of the timing controller is determined to determine whether the timing of the display driving device enters a vertical blanking area.

[0011] In a possible implementation, the display driving chip is further configured to:

[0012] In a case where preset indication information exists in the received data signal, it is determined that the timing of the display driving device enters a vertical blanking area.

[0013] In a possible implementation, the preset indication information is a vertical blanking area start instruction array.

[0014] In a possible implementation, the first state is a high level, and the second state is a low level.

[0015] According to another aspect of the present disclosure, a driving chip is provided, and the chip comprises the display driving device.

[0016] According to another aspect of the present disclosure, an electronic device is provided, and the electronic device comprises the driving chip and the display panel.

[0017] In a possible implementation, the display panel comprises any one of a liquid crystal display panel, an organic light-emitting diode display panel, a quantum dot light-emitting diode display panel, a mini light-emitting diode display panel, and a micro light-emitting diode display panel.

[0018] In a possible implementation, the electronic device comprises any one of a standalone display, a smart phone, a smart watch, a smart bracelet, a tablet computer, a notebook computer, an all-in-one computer, and an access control device.

[0019] The present disclosure can avoid display abnormal phenomena such as flicker in an effective display area, and improve display quality and user experience by counting error data received from the timing controller, changing the level state of the lock signal from a first state to a second state when the number of counted error data reaches a preset value, and the timing of the display driving device enters a vertical blanking area (V-blanking area).

[0020] Other features and aspects of the present disclosure will become apparent from the following detailed description of exemplary embodiments with reference to the drawings. BRIEF DESCRIPTION OF DRAWINGS

[0021] The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the present disclosure and serve to explain the principles of the present disclosure.

[0022] Figure 1aA block diagram of a display driver device according to an embodiment of the present disclosure is shown.

[0023] Figure 1b A flowchart illustrating the execution steps of a display driver chip according to an embodiment of the present disclosure is shown.

[0024] Figure 2 This diagram illustrates the timing of changing the state of the lock signal in related technologies. Figure 3 A timing diagram illustrating the change of the lock signal state in a display driver according to an embodiment of the present disclosure is shown.

[0025] Figure 4 This diagram illustrates how the system determines whether to enter the vertical blanking region based on the level change of the first pin.

[0026] Figure 5 A schematic diagram is shown illustrating the determination of whether to enter the vertical blanking region based on CMD array signal detection.

[0027] Figure 6a The diagram illustrates the image display effect without employing the related technologies of the embodiments of this disclosure. Figure 6b A schematic diagram illustrating the image display effect using the technical solution of this disclosure embodiment is shown. Detailed Implementation

[0028] Various exemplary embodiments, features, and aspects of this disclosure will now be described in detail with reference to the accompanying drawings. The same reference numerals in the drawings denote elements that have the same or similar functions. Although various aspects of the embodiments are shown in the drawings, they are not necessarily drawn to scale unless specifically indicated otherwise.

[0029] As used herein, the terms “comprising,” “including,” “having,” or variations thereof are open-ended and include one or more of the stated features, integrals, elements, steps, components, or functions, but do not exclude the presence or addition of one or more other features, integrals, elements, steps, components, functions, or groups thereof.

[0030] When an element is referred to as “connected,” “coupled,” “responding,” or a variation thereof relative to another element, it may be directly connected, coupled, or responding to another element, or there may be an intermediate element present.

[0031] Although the terms first, second, third, etc., may be used herein to describe various elements / operations, these elements / operations should not be limited by these terms. These terms are only used to distinguish one element / operation from another. Therefore, without departing from the teachings of the inventive concept, a first element / operation in some embodiments may be referred to as a second element / operation in other embodiments.

[0032] The term “exemplary” as used herein means “serving as an example, embodiment, or illustration.” Any embodiment illustrated herein as “exemplary” is not necessarily to be construed as superior to or better than other embodiments.

[0033] Furthermore, to better illustrate this disclosure, numerous specific details are set forth in the following detailed description. Those skilled in the art will understand that this disclosure can be practiced without certain specific details. In some instances, methods, means, components, and circuits well known to those skilled in the art have not been described in detail in order to highlight the main points of this disclosure.

[0034] The embodiments disclosed herein do not limit the specific implementation of the timing controller and the display driver chip; those skilled in the art can set them according to actual conditions and needs.

[0035] For example, the timing controller TCON is located between the image source and the driver chip. It can receive host image data and convert it into a panel driver chip compatible format (such as LVDS (Low-Voltage Differential Signaling) to miniLVDS / RSDS (Reduced Swing Differential Signaling) format); it can generate control signals such as horizontal synchronization (HSync), vertical synchronization (VSync), and data enable (DE); and it can perform image quality enhancement functions such as gamma correction, frame rate conversion (FRC), and data scrambling. This disclosure does not limit the specific functions of the timing controller TCON; those skilled in the art can implement it according to actual conditions and needs, referring to relevant technologies.

[0036] For example, the timing controller TCON can be implemented using a processing component. In some possible implementations, the processing component includes, but is not limited to, a separate processor, discrete components, or a combination of processors and discrete components. The processor can include a controller in an electronic device with instruction execution capabilities. The processor can be implemented in any suitable manner, for example, by one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors, or other electronic components. Within the processor, the executable instructions can be executed using hardware circuitry such as logic gates, switches, ASICs, programmable logic controllers, and embedded microcontrollers.

[0037] Preferably, the timing controller TCON may include a dedicated ASIC chip, or the TCON function may be implemented through a hardware description language (Verilog / VHDL).

[0038] For example, the timing controller TCON may include an input interface module that receives LVDS / Mobile Industry Processor Interface (MIPI) / High-Definition Multimedia Interface (HDMI) signals from the host, performs level conversion and data recovery, and may have a built-in CDR (Clock Data Recovery) circuit to extract the clock from the serial data stream; a core control module that may include a timing generator (generating a precise pixel clock based on a phase-locked loop (PLL) to drive row and column counters to generate synchronization signals), a state machine (coordinating the workflow of each stage to ensure strict synchronization between data and control signals), and a data processing unit (performing gamma correction, color space conversion, and data bit width adjustment); an output interface module that generates differential signals (such as mini LVDS / RSDS) and control signals required by the display driver chip; and a power management circuit that can provide various voltages (Gate High Voltage VGH / Gate Low Voltage VGL / Analog Power Supply Voltage AVDD) through DC-DC (Direct Current to Direct Current) conversion. VoltageDrain (DVDD) / Digital Voltage Drain (DVDD) / Common Electrode Voltage (Vcom); Gamma correction circuit, which can generate 256 grayscale voltage references to compensate for the nonlinear characteristics of liquid crystals, etc.

[0039] This disclosure does not limit the type or implementation method of the display driver chip. Those skilled in the art can refer to relevant technologies to implement it according to actual conditions and needs. For example, the display driver chip can be adapted to the type of display panel. For example, the display driver chip may include LCD (Liquid Crystal Display) driver chips, LED (Light-Emitting Diode) / OLED (Organic Light-Emitting Diode) driver chips, MicroLED (Micro Light-Emitting Diode) driver chips, etc.

[0040] For example, a display driver chip may include a gate driver, a source driver, etc.

[0041] For example, the timing controller TCON and the source driver in the display driver chip can be implemented based on the P2P (Point-to-Point) protocol. The specific details of the P2P protocol are briefly introduced below. For details, please refer to the relevant technical documentation on the protocol. It will not be elaborated here.

[0042] The core processes of the P2P protocol include:

[0043] Initialize synchronization (enter lock state):

[0044] The timing controller T-con sends a training code (calibration code) to the driver IC. After the driver IC completes frequency locking and data format matching, it enters the lock state. At this time, the P2P link is established and synchronized stably. T-con transmits RGB data and control signals to the driver IC through this link.

[0045] Error monitoring and unlock triggering:

[0046] The driver IC continuously verifies the received data in the P2P link. If the erroneous data accumulates to the "specified amount" specified by the protocol, it switches from the lock state to the unlock state. At this time, the P2P link synchronization is interrupted, and the driver IC stops normal output.

[0047] Resynchronization recovery:

[0048] After unlocking, the driver IC sends an abnormal signal back to the T-con, the T-con resends the training code, and the driver IC returns to the locked state after completing synchronization again, resuming normal data transmission.

[0049] Lock and unlock are two working states of the display driver IC during data transmission, which correspond to the data synchronization relationship between the driver IC and the transmitting end (such as T-con).

[0050] Lock (locked state) is the normal operating state of the driver IC. When the driver IC is in the lock state, it maintains a stable synchronization relationship with the data transmitter (such as T-con), and can properly latch and parse the received RGB data to ensure that the data is correctly processed and output, thereby ensuring normal screen display. Corresponding timing diagram: Before the "error data accumulates to a specified number", the driver IC is in the lock state. At this time, the LOCK signal maintains the initial level, and the RGB data on DATA0P / N can be correctly recognized and processed.

[0051] Unlock is an abnormal operating state of the driver IC: When the erroneous data received by the driver IC accumulates to the "specified amount" specified in the protocol, it will switch from the lock state to the unlock state. At this time, the synchronization relationship between the driver IC and the transmitter is broken, and subsequent data cannot be correctly parsed, which may lead to abnormal output and abnormal picture. The LOCK signal changes level (such as switching from low level to high level). This signal change is the identifier of the unlock state. At the same time, unlock will trigger subsequent actions (such as the driver IC sending an abnormal signal back to the T-con).

[0052] In related technologies, when the display driver chip detects that the count of erroneous data in the data stream has reached a preset value, it immediately switches the state of the lock signal. This triggers the mechanism in the P2P protocol to retransmit the training code to restore the lock. However, since the accumulated erroneous data cannot be parsed and converted into normal data, it will cause abnormal display of the screen.

[0053] In view of this, this disclosure proposes a display driving device that counts erroneous data received from the timing controller. When the count of erroneous data reaches a preset value and the timing of the display driving device enters the vertical blanking region (V-blanking region), the level state of the lock signal is changed from a first state to a second state. Because it is in the vertical blanking region, even if the erroneous data cannot be converted after the lock is restored during this period, it will not cause large-area display abnormalities. After the vertical blanking region, the display driving device of this disclosure can display valid data normally. Therefore, this disclosure can avoid display abnormalities that occur in the valid display area, improving display quality and user experience.

[0054] Please see Figure 1a , Figure 1a A block diagram of a display driver device according to an embodiment of the present disclosure is shown.

[0055] Please see Figure 1b , Figure 1b A flowchart illustrating the execution steps of a display driver chip according to an embodiment of the present disclosure is shown.

[0056] like Figure 1a As shown, the display driving device includes a connected timing controller and a display driving chip, wherein, as... Figure 1b As shown, the display driver chip is used for:

[0057] Step S11: Count the erroneous data received from the timing controller;

[0058] Step S12: When the number of error data reaches the pre-designed value and the timing of the display driver device enters the vertical blanking region (V-blanking region), the level of the lock signal is changed from the first state to the second state. The lock signal is used to control the communication link between the display driver chip and the timing controller. The levels of the first state and the second state are different.

[0059] The embodiments disclosed herein do not limit the type of level state of the lock signal. Those skilled in the art can set it according to actual conditions and needs. For example, the first state can be a high level and the second state can be a low level.

[0060] For example, the V-blanking area (Vertical Blanking Interval) is a "blank period" between the completion of one frame and the start of the next, serving as a window for transmitting non-valid image data in the P2P link. For instance, the screen display is updated frame by frame via "vertical scanning": after all rows (or columns) of a frame are displayed, the scanning circuit needs to "scan back" from the bottom to the top of the screen to prepare for the next frame. During this backscan, the screen does not output valid image data; the corresponding time period is the V-blanking area (i.e., the "gap between frames"). In the P2P point-to-point link between the timing controller and the display driver chip, the V-blanking area does not transmit valid RGB image data but is specifically used for transmitting control, synchronization, and configuration information—to prevent these instructions from interrupting the transmission of valid image data and to ensure smooth display.

[0061] This disclosure does not limit the error detection and counting methods for displayed data. Those skilled in the art can determine these methods based on actual circumstances and needs, referring to the P2P protocol. For example, "error" here may refer to data violating the provisions of the P2P protocol, and the counting method may be based on data blocks or other unit counting methods, which can be set by those skilled in the art as needed.

[0062] Of course, error data can include other types of errors besides violating the P2P protocol. This embodiment of the disclosure does not limit these types of errors. For example, error data can also include physical layer errors during data transmission (such as signal attenuation, bit flipping caused by electromagnetic interference), frame verification failures at the data link layer, or encoding / decoding anomalies at the application layer (such as garbled characters caused by character encoding mismatch, or failure to unpack compressed data); it can also be logical validity errors in the data itself (such as displayed data exceeding the preset reasonable range, missing fields, or formats that do not meet display requirements).

[0063] Please see Figure 2 , Figure 3 ,Figure 2 This diagram illustrates the timing of changing the state of the lock signal in related technologies. Figure 3 A timing diagram illustrating the change of the lock signal state in a display driver according to an embodiment of the present disclosure is shown.

[0064] Among them, the TP signal can be the data synchronization control signal between the driver IC (display driver chip) and the timing controller. The pulse waveform of TP corresponds to the transmission cycle of "RGB Data". Each TP pulse can correspond to a set of "latch-conversion-output" processes of RGB data, ensuring that the driver IC's data processing and display timing are strictly synchronized, avoiding data corruption or display abnormalities.

[0065] Here, DATA0P / N can represent the RGB Data received by the driver IC from the timing controller, which may contain erroneous data that does not conform to the protocol. Thus, when the count of erroneous data reaches a pre-designed value, the display driver chip can issue an error indication message (such as...). Figure 2 , Figure 3 Error Data in the middle.

[0066] Wherein, LOCK can represent the locking signal.

[0067] For example, such as Figure 2 As shown, when the number of erroneous data reaches the pre-designed value, the relevant technology directly lowers the level of the lock signal. As mentioned earlier, this operation method can easily lead to abnormal display phenomena on the screen.

[0068] For example, such as Figure 3 As shown, in this embodiment of the present disclosure, when the number of error data reaches a preset value, the level of the lock signal is not directly lowered. Instead, when it is determined that the display timing has entered the vertical blanking region (V-blanking region), the level of the lock signal is lowered. This operation is performed in the vertical blanking region. Compared with the operation of directly lowering the level of the lock signal in related technologies, it can avoid display abnormalities such as flickering and black screen in the effective display area, thereby improving display quality and user experience.

[0069] For example, when the display timing leaves the vertical blanking area (V-blanking area), the present disclosure embodiment can transmit display data normally according to the P2P protocol.

[0070] In one possible implementation, the timing controller can be used to:

[0071] If the level of the lock signal changes from the first state to the second state, a calibration code is sent to the display driver chip to restore the communication link between the display driver chip and the timing controller.

[0072] This disclosure does not limit the specific calibration code. Those skilled in the art can set it according to the actual situation and needs, referring to the P2P protocol. As an example, the calibration code can be 100001111.

[0073] For example, after transmitting one or more sets of calibration codes, the display driver chip and timing controller can relock.

[0074] Of course, after relocking, the display driver chip will continue to detect error data and perform counting operations according to the P2P protocol.

[0075] The embodiments disclosed herein do not limit the specific method for determining whether the timing of the display driving device has entered the vertical blanking region. Those skilled in the art can refer to relevant technologies to implement it according to actual conditions and needs.

[0076] For example, in one possible implementation, the display driver chip can also be used for:

[0077] The timing of the display driver is determined based on the level change of the first pin of the timing controller to determine whether the timing of the display driver has entered the vertical blanking region.

[0078] For example, the timing controller (TCON) serves as the timing core of the display system, monitoring its own output timing in real time. When it determines that the system has entered the V-blanking zone, it outputs a preset level signal (such as a high level) through a dedicated hardware pin (first pin) pulled out externally. The display driver chip directly determines whether it has entered the V-blanking zone by monitoring the level change of this pin.

[0079] Please see Figure 4 , Figure 4 This diagram illustrates how the system determines whether to enter the vertical blanking region based on the level change of the first pin.

[0080] For example, such as Figure 4 As shown, the level state of the first pin (Tx Pin) can indicate whether the display driver has entered the vertical blanking region. For example, when the level state of the first pin (Tx Pin) is low, it indicates that valid screen display data is being transmitted; when the level state of the first pin (Tx Pin) is high, it indicates that the device has entered the vertical blanking region.

[0081] In this embodiment of the present disclosure, when the number of error data reaches the pre-designed value (at Error Data), the level of the lock signal is not directly pulled low. Instead, when the display timing enters the vertical blanking region (V-blanking region) by judging the level of the first pin (Tx Pin), the level of the lock signal is pulled low, and the level switching operation of the lock signal is performed in the vertical blanking region.

[0082] In one possible implementation, the display driver chip can also be used for:

[0083] If a preset indication information is present in the received data signal, the timing of the display driving device is determined to enter the vertical blanking region.

[0084] The embodiments disclosed herein do not limit the specific type of preset indication information. Those skilled in the art can set it according to actual conditions and needs. For example, in one possible implementation, the preset indication information may be specific verification information set as needed, or the preset indication information may be a vertical blanking region start instruction array (CMD (Command) array).

[0085] For example, based on the P2P (Point-to-Point) data transmission protocol, the timing controller (Tx) can insert a specific V-blanking start instruction array (CMD array) according to the protocol specification while transmitting display data. When the driver IC (Rx) recognizes the preset CMD array in the received data stream, it determines that the system has entered the V-blanking zone.

[0086] For example, the Rx module (data receiving module) of the display driver chip can continuously parse the received bitstream into frames, split the data blocks according to the frame structure specified by the P2P protocol, and when the parsed "data type identifier" matches the preset identifier of the V-blanking start CMD array, the data block is extracted and the check bit is verified. If the verification passes, it can be immediately determined to enter the V-blanking area; if the verification fails, the subsequent bitstream is monitored.

[0087] Please see Figure 5 , Figure 5 A schematic diagram is shown illustrating the determination of whether to enter the vertical blanking region based on CMD array signal detection.

[0088] For example, such as Figure 5 As shown, once the display driver chip detects the CMD array, it can determine that it has entered the vertical blanking region.

[0089] In this embodiment of the present disclosure, when the number of error data reaches the pre-designed value (Error Data), the level of the lock signal is not directly pulled low. Instead, when the CMD array determines that the display timing has entered the vertical blanking region (V-blanking region), the level of the lock signal is pulled low, and the level switching operation of the lock signal is performed in the vertical blanking region.

[0090] Please see Figure 6a , Figure 6b , Figure 6a The diagram illustrates the image display effect without employing the related technologies of the embodiments of this disclosure. Figure 6b A schematic diagram illustrating the image display effect using the technical solution of this disclosure embodiment is shown.

[0091] like Figure 6a As shown, the related technology immediately switches the state of the lock signal after the number of erroneous data reaches a specified number, causing serious abnormalities in the display and affecting the display effect.

[0092] like Figure 6b As shown, in this embodiment of the disclosure, the state switching of the lock signal is delayed until the V-blanking region occurs after the number of erroneous data reaches a specified number, thereby optimizing the display effect. In addition, it can prevent the chip from operating in an uncertain state and improve the overall reliability of the final product.

[0093] According to another aspect of this disclosure, a driver chip is provided, the chip including the aforementioned display driver device.

[0094] According to another aspect of this disclosure, an electronic device is provided, the electronic device including the aforementioned driver chip and display panel.

[0095] In one possible implementation, the display panel includes any one of a liquid crystal display panel, an organic light-emitting diode display panel, a quantum dot light-emitting diode display panel, a mini light-emitting diode display panel, and a micro light-emitting diode display panel.

[0096] In one possible implementation, the electronic device includes any one of a stand-alone display, smartphone, smartwatch, smart bracelet, tablet, laptop, all-in-one computer, or access control device.

[0097] This disclosure does not limit the specific type of electronic device. Those skilled in the art can set it according to actual conditions and needs. For example, the electronic device can be user equipment (UE), mobile device, user terminal, terminal, handheld device, computing device, or vehicle-mounted device, etc. Examples of terminals include: mobile phone, tablet computer, laptop computer, handheld computer, mobile internet device (MID), wearable device, virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, wireless terminal in smart home, wireless terminal in vehicle network, etc.

[0098] The various embodiments of this disclosure have been described above. These descriptions are exemplary and not exhaustive, nor are they limited to the disclosed embodiments. Many modifications and variations will be apparent to those skilled in the art without departing from the scope and spirit of the described embodiments. The terminology used herein is chosen to best explain the principles, practical application, or technical improvements to the embodiments in the market, or to enable others skilled in the art to understand the embodiments disclosed herein.

Claims

1. A display driving device, characterized in that, The display driving device includes a timing controller and a display driving chip connected together, wherein the display driving chip is used for: Count the erroneous data received from the timing controller; When the number of error data reaches a pre-designed value and the timing of the display driver enters the vertical blanking region, the level of the lock signal is changed from the first state to the second state. The lock signal is used to control the communication link between the display driver chip and the timing controller. The levels of the first state and the second state are different.

2. The apparatus according to claim 1, characterized in that, The timing controller is used for: If the level of the lock signal changes from the first state to the second state, a calibration code is sent to the display driver chip to restore the communication link between the display driver chip and the timing controller.

3. The apparatus according to claim 1, characterized in that, The display driver chip is also used for: The timing of the display driver is determined based on the level change of the first pin of the timing controller to determine whether the timing of the display driver has entered the vertical blanking region.

4. The apparatus according to claim 1, characterized in that, The display driver chip is also used for: If a preset indication information is present in the received data signal, the timing of the display driving device is determined to enter the vertical blanking region.

5. The apparatus according to claim 4, characterized in that, The preset indication information is a vertical blanking region start instruction array.

6. The apparatus according to claim 1, characterized in that, The first state is a high level, and the second state is a low level.

7. A driver chip, characterized in that, The chip includes the display driver as described in any one of claims 1-6.

8. An electronic device, characterized in that, The electronic device includes the driver chip and display panel as described in claim 7.

9. The electronic device according to claim 8, characterized in that, The display panel includes any one of a liquid crystal display panel, an organic light-emitting diode display panel, a quantum dot light-emitting diode display panel, a mini light-emitting diode display panel, and a micro light-emitting diode display panel.

10. The electronic device according to claim 9, characterized in that, The electronic device includes any one of the following: stand-alone display, smartphone, smartwatch, smart bracelet, tablet computer, laptop computer, all-in-one computer, and access control device.

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