Impact negative charge driving circuit for suppressing crosstalk and switching power supply converter

Abstract

The invention relates to the technical field of semiconductors, and provides an impact negative charge driving circuit for suppressing crosstalk and a switching power supply converter, and the circuit comprises a driving module and an impact negative charge module. A first end of the driving module receives an input signal, and a second end of the driving module is connected with a grid node of the silicon carbide MOSFET and is used for controlling on and off of the silicon carbide MOSFET according to the input signal; a first end of the impact negative charge module receives an input signal, a second end of the impact negative charge module is connected with a power supply end, a third end of the impact negative charge module is connected with a ground end, and a fourth end of the impact negative charge module is connected with a grid node of the silicon carbide MOSFET. When the drain voltage of the silicon carbide MOSFET rises to cause the Miller current to flow backward to the gate node, negative charges are released to the gate node to neutralize the Miller current. Efficient crosstalk suppression is achieved through a physical mode of charge neutralization, dependence on a continuous negative voltage power supply is not needed, the system architecture is simplified, and the cost is reduced.

Description

TECHNICAL FIELD

[0001] The embodiment of the present application relates to the technical field of semiconductor technology, in particular to an impact negative charge driving circuit for suppressing crosstalk and a switching power supply converter. BACKGROUND

[0002] Silicon-carbide metal-oxide-semiconductor field-effect transistor (SiC MOSFET) is widely used in high-frequency power electronic converters due to its faster switching speed and higher voltage rate of change (dv / dt). However, during the off process, the drain voltage will rise sharply, and this rapid voltage change will be coupled to the gate through the device's inherent gate-drain capacitance (i.e. Miller capacitance), thereby generating a positive crosstalk voltage pulse at the gate, which is usually referred to as gate crosstalk caused by the "Miller effect".

[0003] This crosstalk voltage will cause the gate-source voltage (ΔV GS ) to rise, and if its amplitude exceeds the gate-source threshold voltage (V GS (th)) of the device, the power tube that should be turned off will be re-conducted, causing the risk of bridge arm shoot-through, circuit oscillation and additional switching loss, and in severe cases, even causing device damage. In addition, the threshold voltage of the silicon carbide MOSFET decreases with increasing temperature, further exacerbating the risk of mis-conduction due to crosstalk voltage at high temperature. Therefore, how to effectively suppress such gate crosstalk and prevent mis-conduction has become a technical problem to be solved to improve system reliability. SUMMARY

[0004] Therefore, the embodiment of the present application provides an impact negative charge driving circuit for suppressing crosstalk and a switching power supply converter to solve the technical defects in the prior art.

[0005] In a first aspect, the embodiment of the present application provides an impact negative charge driving circuit for suppressing crosstalk, comprising: a driving module and an impact negative charge module. The first end of the driving module receives an input signal, and the second end of the driving module is connected to the gate node of the silicon carbide MOSFET, for controlling the conduction and turn-off of the silicon carbide MOSFET according to the input signal. The first end of the impact negative charge module receives an input signal, the second end of the impact negative charge module is connected to a power supply end, the third end of the impact negative charge module is connected to a ground end, the fourth end of the impact negative charge module is connected to a gate node of the silicon carbide MOSFET, and is used for releasing negative charges to the gate node to neutralize a Miller current when the drain voltage of the silicon carbide MOSFET rises to cause the Miller current to backflow to the gate node in a turn-off process of the silicon carbide MOSFET.

[0006] In a possible implementation, the impact negative charge module comprises an impact capacitor, a signal receiving unit and a switch control unit. The first end of the impact capacitor is connected to the gate node of the silicon carbide MOSFET. The first end of the signal receiving unit receives the input signal, the second end of the signal receiving unit is connected to the power supply end, the third end of the signal receiving unit is connected to the ground end, and the fourth end of the signal receiving unit is electrically connected to the first end of the switch control unit. The second end of the switch control unit is connected to the power supply end, the third end of the switch control unit is connected to the ground end, and the fourth end of the switch control unit is connected to the second end of the impact capacitor, and is used for controlling a connection state of the second end of the impact capacitor.

[0007] In a possible implementation, the switch control unit is configured to: When the input signal is a first level, the second end of the impact capacitor is controlled to be connected to the power supply end to precharge the impact capacitor, and a precharge voltage difference is established between the first end and the second end of the impact capacitor; When the input signal changes to a second level and the Miller current is generated, the second end of the impact capacitor is controlled to be switched from the power supply end to the ground end.

[0008] In a possible implementation, the switch control unit comprises a first switch tube and a second switch tube. The drain of the first switch tube and the drain of the second switch tube are both connected to the second end of the impact capacitor, the source of the first switch tube is connected to the power supply end, the gate of the first switch tube is connected to the gate of the second switch tube, and the source of the second switch tube is connected to the ground end. When the input signal is the first level, the first switch tube is turned on and the second switch tube is turned off, and the second end of the impact capacitor is connected to the power supply end; When the input signal is the second level, the first switch tube is turned off and the second switch tube is turned on, and the second end of the impact capacitor is switched from the power supply end to the ground end.

[0009] In a possible implementation, the signal receiving unit comprises a third switch tube and a fourth switch tube. The source of the third switch tube is connected to a power supply end, the drain of the third switch tube and the fourth switch tube are both connected to the gate of the first switch tube; the gate of the third switch tube is electrically connected to the gate of the fourth switch tube; and the source of the fourth switch tube is connected to a ground end.

[0010] In a possible implementation, the impact negative charge module further comprises a timing control circuit. The input end of the timing control circuit is electrically connected to the drain of the third switch tube, and the output end of the timing control circuit is electrically connected to the gate of the first switch tube, for generating a timing control signal for controlling the switch control unit after a preset delay after detecting that the input signal changes from the first level to the second level, wherein the first switch tube is controlled to be turned off and the second switch tube is controlled to be turned on based on the timing control signal, so that the second end of the impact capacitor is switched to be connected to the ground end from the power supply end.

[0011] In a possible implementation, the impact negative charge driving circuit further comprises a pre-charge circuit. The pre-charge circuit is connected between the third end of the driving module and the second end of the impact negative charge module, for supplying power to the driving module, and for providing a pre-charge current to the impact capacitor during the conduction of the silicon carbide MOSFET, so that the voltage across the impact capacitor reaches a preset value.

[0012] In a possible implementation, the power supply end is an output end of the pre-charge circuit, and the preset value is greater than the voltage value of an off driving level output by the driving module; wherein the off driving level is a level output by the second end of the driving module, for controlling the off of the silicon carbide MOSFET.

[0013] In a possible implementation, the impact negative charge module comprises a plurality of parallel impact capacitor units, each impact capacitor unit comprising an impact capacitor and a corresponding switch control unit; and each impact capacitor unit is configured to independently release negative charges to the gate node.

[0014] In a second aspect, the embodiments of the present application provide a switching power supply converter, comprising: a switching power tube, a control circuit, a conversion circuit, and the impact negative charge driving circuit for suppressing crosstalk according to the first aspect of the embodiments of the present application; the switching power tube is a silicon carbide MOSFET; the output end of the impact negative charge driving circuit is connected to the gate of the silicon carbide MOSFET, for driving the silicon carbide MOSFET; the control circuit is used for generating a PWM control signal and sending the PWM control signal to the impact negative charge driving circuit; and the conversion circuit is connected to the drain of the silicon carbide MOSFET, for converting voltage or current.

[0015] The technical scheme provided by the embodiment of the application, the impact negative charge driving circuit constructs a two-stage transient response architecture by setting a driving module and an impact negative charge module which cooperate with each other. The driving module is responsible for performing basic switching control based on a PWM signal; and the impact negative charge module is triggered in the moment when the silicon carbide MOSFET is turned off and the drain voltage rises sharply, as a dedicated dynamic compensation unit. The module can accurately inject the negative charge reserved in advance or generated in real time into the gate node through the direct connection with the gate node, so as to directly offset the positive displacement current generated by the Miller capacitor coupling. This mechanism can effectively suppress the abnormal rise of the gate voltage, and fundamentally prevent the false turn-on and oscillation caused by the voltage exceeding the threshold. Based on the circuit structure, on the one hand, it realizes efficient crosstalk suppression through the physical method of charge neutralization, without relying on a continuous negative voltage power supply, simplifying the system architecture and reducing the cost; on the other hand, the module only works in the off transient state, avoiding the continuous loss or switch speed reduction problem that may be caused by the traditional crosstalk suppression scheme, improving the system reliability while ensuring the switching efficiency. BRIEF DESCRIPTION OF DRAWINGS

[0016] Figure 1 is a specific structure diagram of a Si driving circuit in the related art; Figure 2 is a structure schematic diagram of an impact negative charge driving circuit for suppressing crosstalk provided by an embodiment of the application; Figure 3 is a specific structure diagram of an impact negative charge driving circuit for suppressing crosstalk provided by an embodiment of the application; Figure 4 is a specific structure diagram of an impact negative charge driving circuit for suppressing crosstalk provided by an embodiment of the application; Figure 5 is a specific structure diagram of an impact negative charge module provided by an embodiment of the application; Figure 6 is a working schematic diagram of an impact negative charge module provided by an embodiment of the application; Figure 7 is a turn-off control schematic diagram of a silicon carbide MOSFET provided by an embodiment of the application. DETAILED DESCRIPTION

[0017] In the following description, a large number of specific details are set forth in order to facilitate a thorough understanding of the application. However, the application can be implemented in many different ways than those described herein, and those skilled in the art can make similar extensions without departing from the spirit of the application, so the application is not limited to the specific implementation disclosed below.

[0018] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of one or more embodiments of the present disclosure. As used in this disclosure and the appended claims, the singular forms “a,” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and / or” as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

[0019] It will be understood that, although the terms first, second, etc. can be used herein to describe various information, these

[0020] For the convenience of understanding the technical solutions of the embodiments of the present application, the nouns and terms related to one or more embodiments of the present application are explained.

[0021] 1, Miller current, when the power device (such as MOSFET) is turned off, the drain voltage rises sharply. This rapidly changing voltage will generate a displacement current through the device's inherent gate-drain capacitance (also known as Miller capacitance), which is coupled from the drain to the gate, which is the Miller current.

[0022] 2, neutralization, the same node is injected at the same time with equal size and opposite polarity of charge, so that their electrical effects are offset.

[0023] In the present application, a crosstalk suppression impact negative charge drive circuit and a switching power supply converter are provided, which are described in detail one by one in the following embodiments.

[0024] Figure 1 The structure diagram of Si drive circuit in related art.

[0025] Referring to Figure 1 As shown in the figure, the Si (silicon) drive circuit is used to drive the silicon carbide MOSFET. It includes the left side silicon drive circuit 101 and the right side silicon carbide MOSFET 103; the left side PWM control signal 111 is output through the drive module 112 via the equivalent internal resistance or on-resistance R DRV , the gate control signal; the right side silicon carbide MOSFET 103 contains the SiC MOSFET itself and the parasitic capacitance (C GS : gate-source capacitance, C GD: gate-drain capacitance (also known as Miller capacitance), C DS : drain-source capacitance, gate internal resistance R G , D, G, S respectively correspond to the drain node, gate node, source node of the silicon carbide MOSFET; when the silicon carbide MOSFET 103 is turned off, the drain voltage rises rapidly, and the dv / dt generates a positive cross-talk voltage at the gate through the Miller effect of the silicon carbide MOSFET. When ΔV GS >V GS (th), the power tube is turned on again, causing oscillation, resulting in efficiency loss, and even causing device damage. Where, here ΔV GS gs represents the gate-source voltage change of the silicon carbide MOSFET, V GS (th) represents the opening threshold voltage, which is the minimum gate-source voltage required for the silicon carbide MOSFET to turn from off to on.

[0026] In addition, the opening threshold voltage of the silicon carbide MOSFET decreases with the increase of temperature. Therefore, under the action of gate cross-talk, the risk of oscillation caused by the gate cross-talk voltage of the device at high temperature is further increased.

[0027] Current drive design to suppress cross-talk mainly includes two aspects: the first is to adjust the equivalent impedance between the gate and the source, and the second is to use the method of negative voltage turn-off. However, the method of adjusting the equivalent impedance between the gate and the source of the silicon carbide MOSFET suppresses cross-talk at the cost of increasing switching loss, switching delay, or increasing control complexity.

[0028] Therefore, in order to prevent the mis-conduction of the silicon carbide MOSFET, using negative voltage drive is a more suitable way. However, the chip structure supporting negative voltage drive is complex, increasing the cost of the chip.

[0029] To overcome the above technical problems, the embodiments of the present application provide an impact negative charge drive circuit for suppressing cross-talk, which will be described in detail below in conjunction with the drawings.

[0030] Figure 2 A simple structure diagram of the impact negative charge drive circuit for suppressing cross-talk provided by an embodiment of the present application is shown in the figure. Figure 3is a specific structure diagram of the impact negative charge drive circuit provided by an embodiment of the present application to suppress crosstalk, comprising: a drive module 201 and an impact negative charge module 202; the first end of the drive module 201 receives an input signal, the second end of the drive module 201 is connected to the gate node of a silicon carbide MOSFET, and is used to control the conduction and turn-off of the silicon carbide MOSFET 203 according to the input signal; the first end of the impact negative charge module 202 receives an input signal, the second end of the impact negative charge module 202 is connected to a power supply end, the third end of the impact negative charge module 202 is connected to a ground end, and the fourth end of the impact negative charge module 202 is connected to the gate node of the silicon carbide MOSFET 203, and is used to release negative charges to the gate node when the drain voltage of the silicon carbide MOSFET 203 rises to cause the Miller current to backflow to the gate node during the turn-off process of the silicon carbide MOSFET 203, so as to neutralize the Miller current.

[0031] In combination Figure 2 and Figure 3 As shown in the figure, the impact negative charge drive circuit 200 can include a drive module 201 and an impact negative charge module 202.

[0032] In some embodiments, the input end of the drive module 201 receives an input signal, and the output end is connected to the gate node G of the silicon carbide MOSFET 203, and is used to control the conduction and turn-off of the silicon carbide MOSFET 203 according to the PWM control signal; the impact negative charge module 202 is connected to the input signal, the power supply end, the ground end and the gate node G respectively, and is used to release negative charges to the gate node when the drain voltage of the silicon carbide MOSFET rises to cause the Miller current to backflow to the gate node during the turn-off process of the silicon carbide MOSFET 203, so as to neutralize the Miller current.

[0033] Specifically, the drive module 201 serves as the main control path, which usually contains a PWM generator 211, a level converter and a power amplifier 212 inside. The PWM generator 211 is used to generate a PWM control signal. When the input signal is high, the corresponding PWM control signal is controlled to be high, and the drive module 201 quickly lifts the gate node voltage to the conduction voltage (such as +18V), so that the silicon carbide MOSFET 203 is completely turned on; after the PWM control signal jumps to low, the drive module 201 actively pulls down the gate node voltage to the turn-off reference level (usually 0V or ground potential), forcing the device to enter the turn-off state. At the same time, the impact negative charge module 202 serves as a parallel auxiliary branch, which precharges the energy storage element (such as a dedicated capacitor) through the power supply end inside, and establishes a potential difference. In the key transient state of the turn-off process, that is, when the drain voltage of the silicon carbide MOSFET 203 begins to rise sharply, and the gate-drain capacitance (Cgd) of the silicon carbide MOSFET 203 is charged, the impact negative charge module 202 releases negative charges to the gate node, so as to neutralize the Miller current. GD) to the gate node, the module, through the rapid switching of its internal switch unit, directly injects the same amount of negative charge pre-stored in its energy storage element into the gate node via a low-impedance path. These negative charges achieve instantaneous and accurate charge neutralization with the Miller charge that is being backflowed, thereby effectively canceling the interference current that would otherwise cause the abnormal lifting of the gate voltage (ΔV GS Based on the above circuit, the crosstalk voltage is fundamentally suppressed through direct charge neutralization at the physical level, preventing the risk of mis-conduction and bridge arm through-conduction; without the need for additional independent negative voltage power supply or complex level shifting circuit, the system architecture is simplified and the cost is reduced; and only working in the microsecond window of the off transient state, the static loss caused by continuous conduction is avoided, and the normal switching speed is not affected, improving the system reliability while ensuring the overall conversion efficiency.

[0034] Reference Figure 4 , Figure 4 The specific structure diagram of the impact negative charge module is provided for an embodiment of the present application.

[0035] In a possible implementation, the impact negative charge module includes an impact capacitor, a signal receiving unit, and a switch control unit; a first end of the impact capacitor is connected to a gate node of a silicon carbide MOSFET; a first end of the signal receiving unit receives an input signal, a second end of the signal receiving unit is connected to a power supply end, a third end of the signal receiving unit is connected to a ground end, and a fourth end of the signal receiving unit is electrically connected to a first end of the switch control unit; a second end of the switch control unit is connected to the power supply end, a third end of the switch control unit is connected to the ground end, a fourth end of the switch control unit is connected to a second end of the impact capacitor, and the fourth end of the switch control unit is configured to control the connection state of the second end of the impact capacitor.

[0036] Further, the switch control unit is configured to: when the input signal is a first level, control the second end of the impact capacitor to be connected to the power supply end to pre-charge the impact capacitor, so as to establish a pre-charge voltage difference between the first end and the second end of the impact capacitor; and when the input signal changes to a second level and the Miller current is generated, control the second end of the impact capacitor to be switched from the power supply end to the ground end.

[0037] Specifically, when the PWM control signal is at a high level (a first level), the switch control unit turns on the path connected to the power supply end, so that the second end of the impact capacitor is connected to the positive voltage of the power supply, thereby pre-charging the impact capacitor and establishing a stable voltage difference (for example, 5V) between the upper and lower plates of the capacitor, and at this time, the potential of the upper plate of the capacitor (connected to the gate node) is higher than that of the lower plate; when the PWM signal jumps to a low level (a second level) and the drain voltage of the silicon carbide MOSFET begins to rise, at the critical moment when the Miller current is generated, the switch control unit quickly cuts off the connection to the power supply end and synchronously turns on the path to the ground end, so that the second end of the impact capacitor is temporarily connected to the ground. Because the voltage of the capacitor cannot change abruptly, the potential of the first end (the gate node side) is forced to be pulled down, and the charge stored in the capacitor is rapidly released to the gate node in the form of negative current. This current is equal in amount to the positive Miller current flowing through the gate-drain capacitor, thereby effectively clamping the rise of the gate voltage. Through this way, the negative voltage off effect is achieved without the need for an independent negative voltage power supply, the system architecture is simplified, and the cost is reduced. Moreover, the charge release action is precisely synchronized with the occurrence time of the Miller effect, dynamic and transient interference suppression is achieved, and the increase in switching loss or the decrease in speed caused by the traditional series resistor scheme is avoided.

[0038] In some embodiments, the switch control unit includes a first switch tube and a second switch tube, the first switch tube is a PMOS transistor, and the second switch tube is an NMOS transistor; the first switch tube is connected between the power supply end and the second end of the impact capacitor, and the second switch tube is connected between the ground end and the second end of the impact capacitor; when the PWM control signal is at the first level, the first switch tube is turned on and the second switch tube is turned off, and the second end of the impact capacitor is connected to the power supply end; when the PWM control signal is at the second level, the first switch tube is turned off and the second switch tube is turned on, and the second end of the impact capacitor is switched to be connected to the ground end from the power supply end.

[0039] Specifically, the switch control unit builds a complementary switching path by a first switch tube (such as a PMOS tube) and a second switch tube (an NMOS tube). When the PWM is at a high level (a first level), the first switch tube is turned on and the second switch tube is turned off, the power supply end charges the second end of the impact capacitor through the first switch tube, so that the potential of the second end of the impact capacitor is lifted to the power supply voltage, thereby establishing a stable voltage difference across the capacitor; when the PWM jumps to a low level (a second level), the first switch tube is turned off to cut off the power supply path, and the second switch tube is turned on to forcibly pull the second end of the impact capacitor to the ground potential. Since the voltage across the capacitor cannot be abruptly changed, the potential of the first end (connected to the gate node) thereof instantaneously decreases, and the charge stored in the capacitor is injected into the gate node in the form of a negative transient current. This hardware configuration realizes physical isolation and fast switching of the charging and discharging paths, avoids the risk of direct connection between the power supply and the ground by using the interlocking feature of complementary switches, improves the system reliability, and realizes nanosecond-level response speed by direct control of the hard switch, ensures accurate synchronization of the release of negative charges and the backflow of Miller current in time sequence, in addition, the structure only needs to be driven by a conventional logic signal without additional complex level conversion, and maintains the simplicity and low cost of the overall circuit while realizing efficient neutralization function.

[0040] In a possible implementation, the signal receiving unit includes a third switch tube and a fourth switch tube; a source of the third switch tube is connected to the power supply end, and drains of the third switch tube and the fourth switch tube are both connected to a gate of the first switch tube; a gate of the third switch tube is electrically connected to a gate of the fourth switch tube; and a source of the fourth switch tube is connected to the ground end.

[0041] Specifically, referring to Figure 4 , the impact negative charge module includes a plurality of switch tubes, a first switch tube M1, a second switch tube M2, a third switch tube M3, and a fourth switch tube M4, and an impact capacitor C IM , a first end of the impact capacitor C IM is connected to a gate of the silicon carbide MOSFET, and a second end of the impact capacitor C IMThe second end of the impact capacitor is connected to the drain of the first switch tube M1 and the drain of the second switch tube M2; the source of the first switch tube M1 is connected to the power supply end, and the gate of the first switch tube M1 is connected to the gate of the second switch tube M2; the source of the second switch tube M2 is connected to the ground end; the gates of the third switch tube M3 and the fourth switch tube M4 receive an input signal, the source of the third switch tube M3 is connected to the power supply end, the drain of the third switch tube M3 and the drain of the fourth switch tube M4 are both connected to the gates of the first switch tube M1 and the second switch tube M2, and the source of the fourth switch tube M4 is connected to the ground end; wherein the third switch tube M3 and the fourth switch tube M4 constitute a CMOS inverter, and can realize inversion processing of the input signal, and when the input is a high level, an output is a low level; and when the input is a low level, the output is a high level; and the static power consumption of this mode is extremely low.

[0042] In a possible implementation, the impact negative charge module further includes a timing control circuit; an input end of the timing control circuit is electrically connected to the drain of the third switch tube, and an output end of the timing control circuit is electrically connected to the gate of the first switch tube, for generating a timing control signal for controlling the switch control unit after a preset delay after detecting that the input signal changes from the first level to the second level, wherein the first switch tube is controlled to be turned off and the second switch tube is controlled to be turned on based on the timing control signal, so that the second end of the impact capacitor is switched to be connected to the ground end from the power supply end.

[0043] Specifically, the timing control circuit triggers by receiving a jump edge (changing from the first level to the second level) of a PWM signal, and generates a delay time that can be accurately set by using a resistance-capacitance delay network or a digital counter in the timing control circuit, and the delay time matches the time required for the drain voltage of the silicon carbide MOSFET to naturally rise to a time required for triggering significant Miller effect after the silicon carbide MOSFET is turned off; after the delay ends, the circuit generates a timing control signal with a steep edge to directly drive the switch control unit. The timing control signal can ensure that the first switch tube does not turn off immediately after the turn-off instruction is issued, but turns off rapidly at the end of the delay, and synchronously turns on the second switch tube, so that the connection of the second end of the impact capacitor is switched from the power supply end to the ground end. This mode realizes accurate synchronization of the negative charge release time and the peak time of the Miller current, avoids the decline of the suppression effect caused by switching too early (the charge is consumed too early) or too late (the suppression is not timely), can adapt to the differences in turn-off characteristics of different models of silicon carbide MOSFETs or under different working conditions through the preset delay, and can convert complex physical timing judgment into programmable or tunable circuit parameters, thereby improving the anti-interference ability to system noise and overall reliability.

[0044] Figure 5 A specific structure diagram of the impact negative charge driving circuit 300 for suppressing crosstalk is provided for an embodiment of the present application.

[0045] With reference to Figure 5 As shown in FIG. 3, in one possible implementation, the impulse negative charge driving circuit 300 further comprises a pre-charge circuit 304; the pre-charge circuit 304 is connected between the third end of the driving module 301 and the second end of the impulse negative charge module 302, for supplying power to the driving module 301, and for providing a pre-charge current to the impulse capacitor during conduction of the silicon carbide MOSFET 303, so that the voltage across the impulse capacitor reaches a preset value.

[0046] The driving module 301 can comprise a PWM generator 311 and a power amplifier 312, and the pre-charge circuit 304 can be a low dropout linear regulator (LDO).

[0047] Specifically, the pre-charge circuit 304 is usually composed of a controlled current source or a linear regulator with an enable control, the input end of which is connected to the power supply end, and the output end of which is directly connected to the second end of the impulse capacitor. When the system is in a working state and the silicon carbide MOSFET 303 is conducting, the pre-charge circuit 304 is activated to inject charges into the impulse capacitor in a constant current manner until the voltage across the capacitor reaches a preset accurate value; after the charging is completed, the circuit can automatically enter a high resistance state or a low power consumption monitoring mode. In this way, it is ensured that the impulse capacitor is in a state of energy saturation and consistent voltage before each switching cycle is turned off, eliminating the problem of insufficient charge reserve caused by process deviation, thereby ensuring the stability and repeatability of the suppression effect; by actively controlling the charging current, the large current impact and power supply noise caused by directly connecting the power supply end for instantaneous charging are avoided, and the electromagnetic compatibility of the system is improved; in addition, the circuit decouples the pre-charge process from the main power switch action, allowing the charging speed and accuracy to be optimized according to actual needs, enhancing the adaptability of the driving circuit to changes in working frequency and load, and further improving the overall reliability.

[0048] In some embodiments, the power supply end is the output end of the pre-charge circuit 304, and the preset value is greater than the voltage value of the off driving level output by the driving module 301; the off driving level is the level output by the second end of the driving module 301, for controlling the off of the silicon carbide MOSFET 303.

[0049] With reference to Figure 5As shown, the LDO is used as a dedicated power supply for pre-charging the impact capacitor, and its output provides a stable and low-noise DC voltage (e.g., 23V). The "preset value" (e.g., 5V) here refers to the precise voltage difference that needs to be reached across the impact capacitor, and its set value must be greater than the "off driving level" (usually 0V or close to ground potential) applied to the gate node by the driving module when it is off. During the conduction of the silicon carbide MOSFET 303, the LDO charges the impact capacitor, forming a stable preset voltage difference between its upper plate (connected to the gate node) and lower plate; when the off process is triggered and the lower plate of the capacitor is switched to ground, due to the fact that the capacitor voltage cannot change abruptly, the potential of its upper plate will be instantly pulled down by a negative voltage amplitude equal to the preset value (e.g., from 0V to -5V). In this way, the high precision and low ripple characteristics of the LDO are utilized to ensure the consistency and accuracy of the pre-charging voltage each time, thereby ensuring the stability and repeatability of the neutralization effect. Moreover, through the clear pressure difference design between the preset voltage difference and the off level, an equivalent and accurately controllable local negative pressure environment is created without the need for an independent negative voltage power supply, and high-efficiency charge neutralization is achieved.

[0050] In some embodiments, the impact negative charge module includes a plurality of parallel impact capacitor units, each impact capacitor unit including an impact capacitor and its corresponding switch control unit; each impact capacitor unit is configured to independently release negative charges to the gate node. Specifically, by connecting a plurality of independent impact capacitor units in parallel between the power supply end, the ground end, and the gate node, each unit contains an independent impact capacitor and a dedicated switch control unit, and the switch control units of each unit can receive independent control instructions from each other. During operation, the system can selectively trigger one, multiple, or all units to act synchronously or at different times according to the real-time detected crosstalk strength or preset strategy, so that the impact capacitors of each unit inject their stored negative charges into the gate node in sequence or simultaneously. Through the impact capacitor units of this structure, programmability and scalability of suppression strength are achieved, which can flexibly adapt to silicon carbide MOSFETs of different current levels and different parasitic parameters by adjusting the number of units put into work to match the actual required charge neutralization amount; and by triggering multiple units at different times, the large-current charge release process can be divided into several smaller-current releases, reducing the impact of switching transients on the power supply network and improving electromagnetic compatibility.

[0051] Figure 6 is a working schematic diagram of the impact negative charge module provided in an embodiment of the present application.

[0052] Referring to Figure 6 When the PWM control signal is at a high level (first level), the first switch M1 in the switch control unit is turned on to connect the power supply end, so that the second end of the impact capacitor C IM is connected to the positive voltage of the power supply, thereby pre-charging the impact capacitor CIM Pre-charge is performed to establish a stable voltage difference (e.g. 5V) between the upper and lower plates of the impulse capacitor C IM The upper plate (connected to the gate node) is higher than the lower plate. When the PWM signal jumps to low (second level) and the silicon carbide MOSFET drain voltage begins to rise, at the critical moment when the Miller current is generated, the first switch M1 in the switch control unit is quickly cut off to the power supply end and the path to the ground end is turned on through the second switch M2, so that the impulse capacitor C IM The second end is temporarily grounded. Because the capacitor voltage cannot be suddenly changed, the impulse capacitor C IM The first end (gate node side) is forced to be pulled low, and the impulse capacitor C IM The charge stored in the middle is quickly discharged to the gate node in the form of negative current, which is equal to the positive Miller current flowing through the gate-drain capacitor, thereby effectively clamping the rise of the gate voltage.

[0053] Figure 7 The silicon carbide MOSFET turn-off control schematic provided for an embodiment of the present application.

[0054] Referring to Figure 7 , in the initial state, the input signal A is high, and the voltage of the gate node B is 18V through the driving module. The NMOS device is turned off, the PMOS device is turned on, and the lower plate of the impulse capacitor C IM is connected to the C point of the LDO through the NMOS device, and the voltage of the C point is 23V. The upper plate of the impulse capacitor C IM is always connected to the gate node B. Therefore, the impulse capacitor The voltage difference between the plates at this time is =5V. The amount of charge accumulated is:

[0055] At time t0, the input signal A jumps from high to low, trying to turn off the silicon carbide MOSFET. The voltage of the gate node B is reduced from high 18V to 0V through the driving module.

[0056] At time t1, the silicon carbide MOSFET is turned off, causing the voltage at the drain D to rise rapidly, and the Miller current is generated through the gate-drain capacitor C GD, a large amount of charges will flow back to the gate, forming the so-called Miller current effect. Without the impact negative charge driving circuit provided by the present application, the voltage of the gate will be raised by the Miller current, and once the voltage value Vth is reached, the silicon carbide MOSFET will be turned on again. In the impact negative charge driving circuit provided by the present application, the PMOS device is turned off, the NMOS device is turned on, and the lower plate of the impact capacitor is grounded, so that the negative charge on the upper plate directly flows into the gate node B, and the negative charge and the positive charge of the Miller current are neutralized, so that the large current (i.e., the current flowing back to the device R DRV ) originally flowing back to the device R Figure 7 disappears to almost zero (the effect of the present application). Therefore, the gate node B does not generate a too high peak voltage.

[0057] At t2, after the transient Miller time interval impact, the stored charge is consumed, and the voltage of the gate node B continues to be kept at 0V.

[0058] The impact negative charge driving circuit for suppressing crosstalk provided by the embodiments of the present application is described below through a specific embodiment.

[0059] Embodiment One Based on the impact negative charge driving circuit for suppressing crosstalk provided by the embodiments of the present application, the driving module is composed of a dedicated gate driver chip (such as UCC5350), the input end of which receives a 100kHz PWM signal from a controller, and the output end of which is directly connected to the gate of the silicon carbide MOSFET. The impact negative charge module is integrated as a peripheral auxiliary circuit beside the driver. The core is an impact capacitor with a capacity of 1nF, the upper plate of which is connected to the gate node; the lower plate is selectively connected to a 23V LDO output end or a system ground through a complementary switching unit composed of a PMOS and an NMOS. The working process is as follows: during the high level of PWM, the PMOS is turned on and the NMOS is turned off, the LDO charges the impact capacitor to a constant current mode through a current limiting resistor (pre-charge circuit), and the voltage difference across the impact capacitor is stabilized at 5V; when the PWM jumps to low level, the gate voltage is quickly pulled down to 0V by the driving module, at the same time, a timing control circuit composed of RC and a Schmitt trigger is triggered, after a preset delay of 40ns (matching the drain voltage rising time of the silicon carbide MOSFET), a control signal is output to make the PMOS turn off and the NMOS turn on, and the lower plate of the impact capacitor is grounded instantaneously. Since the capacitor voltage cannot be abruptly changed, the potential of the upper plate (gate node) is forced to be pulled down by about 5V to -5V. At this time, the drain voltage of the silicon carbide MOSFET rises sharply, and the negative charge on the upper plate of the impact capacitor is directly injected into the gate node B through C GDThe large amplitude Miller current is backflowed to the gate, and the positive charge current is precisely neutralized with the negative charge released by the impact capacitor at the gate node, so that the gate voltage is clamped below 0V, and the risk of false turn-on is completely eliminated. Through a localized and transient charge dynamic balance mechanism, the inherent crosstalk problem caused by the high-speed switching of silicon carbide MOSFET is efficiently and low-costly solved without relying on an independent negative voltage power supply; the modular design has strong compatibility, which improves the system reliability and prevents bridge arm shoot-through, and avoids the problem of increased switching loss caused by the traditional active clamping or increased gate resistance scheme, thereby providing key technical support for high-frequency and high-density power supply design.

[0060] The application further provides a switching power supply converter, comprising a switching power tube, a control circuit, a conversion circuit, and the impact negative charge drive circuit for suppressing crosstalk provided by any of the embodiments of the application; the switching power tube is a silicon carbide MOSFET; the output end of the impact negative charge drive circuit is connected to the gate of the silicon carbide MOSFET, and is used for driving the silicon carbide MOSFET; the control circuit is used for generating a PWM control signal and sending the PWM control signal to the impact negative charge drive circuit; and the conversion circuit is connected to the drain of the silicon carbide MOSFET, and is used for conversion of voltage or current.

[0061] In some embodiments, the switching power supply converter integrates the impact negative charge drive circuit as a core driving unit into a complete power conversion system. The converter is composed of the following parts: a silicon carbide MOSFET as a power switch; a control circuit for generating and adjusting a pulse width modulation signal; a conversion circuit containing elements such as inductors, capacitors, and possibly transformers; and the drive circuit of the application. The working process of the switching power supply converter can specifically include: the control circuit generates a PWM signal according to output feedback and sends the PWM signal to the drive circuit; the drive circuit not only completes the conventional switching drive of the gate of the silicon carbide MOSFET, but also injects a negative charge into the gate through the built-in impact negative charge module in the off transient state, to accurately offset the interference current generated by the Miller capacitor coupling due to the dramatic change of the drain voltage. For example, in a 500W DC-DC module, the drive circuit enables the system to work stably at a higher switching frequency, effectively preventing false turn-on and bridge arm shoot-through caused by crosstalk. The switching power supply converter inherits all the technical advantages of the drive circuit, and achieves reliable negative voltage turn-off and crosstalk suppression without an independent negative voltage power supply, thereby significantly improving the power density, conversion efficiency, and long-term operation reliability of the whole machine, and having better cost control ability due to its simple and efficient architecture.

[0062] The above-described embodiments of the application have several aspects, no single one of which is solely responsible for the application's desirable attributes. Without limiting the scope of the application as expressed by the claims which follow, some further embodiments make these aspects even more useful. Other embodiments can result in less desirable attributes.

[0063] The computer readable medium can include any entity or apparatus capable of carrying the computer program code, recording medium, U disk, mobile hard disk, magnetic disk, optical disk, computer memory, Read-Only Memory (ROM), Random Access Memory (RAM), electrical carrier signal, telecommunication signal, software distribution medium, etc. It should be noted that the computer readable medium can include appropriate contents according to the requirements of legislation and patent practice in the jurisdiction, for example, in some jurisdictions, according to legislation and patent practice, the computer readable medium does not include electrical carrier signals and telecommunication signals.

[0064] It should be noted that for the foregoing method embodiments, the acts described therein can be performed in a different order from the order described, and that certain acts can be performed in parallel or concurrently. In addition, certain acts can be omitted, and other acts can be added. Furthermore, the acts described in the specification can be implemented as a set of computer readable instructions, software, or code stored in a computer readable medium or memory of a computer (e.g., RAM, ROM, EEPROM, flash memory, or the like) such that the various aspects of the present application can be incorporated into a computer readable medium or memory of a computer.

[0065] In the above embodiments, the description of each embodiment is focused on different aspects, and the parts not described in detail in a certain embodiment can be referred to the relevant description of other embodiments.

[0066] The preferred embodiments of the present application disclosed above are only used to help explain the present application. The alternative embodiments do not describe all the details and do not limit the application to the specific embodiments described. Obviously, according to the content of the embodiments of the present application, many modifications and changes can be made. The present application selects and describes these embodiments in order to better explain the principles and practical applications of the embodiments of the present application, so that those skilled in the art can well understand and utilize the present application. The present application is limited by the claims and their full scope and equivalents.

Claims

1. A negative charge driving circuit for suppressing crosstalk, characterized in that, include: Drive module and impact negative charge module; The first end of the driving module receives an input signal, and the second end of the driving module is connected to the gate node of the silicon carbide MOSFET, for controlling the turn-on and turn-off of the silicon carbide MOSFET according to the input signal; The first terminal of the impact negative charge module receives an input signal, the second terminal of the impact negative charge module is connected to a power supply terminal, the third terminal of the impact negative charge module is connected to a ground terminal, and the fourth terminal of the impact negative charge module is connected to the gate node of the silicon carbide MOSFET. It is used to release negative charge to the gate node to neutralize the Miller current when the drain voltage of the silicon carbide MOSFET rises during the turn-off process of the silicon carbide MOSFET, causing the Miller current to flow back to the gate node.

2. The impact negative charge driving circuit according to claim 1, characterized in that, The impact negative charge module includes an impact capacitor, a signal receiving unit, and a switch control unit; The first end of the impact capacitor is connected to the gate node of the silicon carbide MOSFET; The first end of the signal receiving unit receives the input signal, the second end of the signal receiving unit is connected to the power supply terminal, the third end of the signal receiving unit is connected to the ground terminal, and the fourth end of the signal receiving unit is electrically connected to the first end of the switch control unit. The second terminal of the switch control unit is connected to the power supply terminal, the third terminal of the switch control unit is connected to the ground terminal, and the fourth terminal of the switch control unit is connected to the second terminal of the impact capacitor, which is used to control the connection state of the second terminal of the impact capacitor.

3. The impact negative charge driving circuit according to claim 2, characterized in that, The switch control unit is configured to: When the input signal is at the first level, the second end of the impact capacitor is connected to the power supply terminal to precharge the impact capacitor, thereby establishing a precharge voltage difference between the first and second ends of the impact capacitor. When the input signal changes to the second level and the Miller current is generated, the second terminal of the impulse capacitor is switched from the power supply terminal to the ground terminal.

4. The impact negative charge driving circuit according to claim 3, characterized in that, The switch control unit includes a first switch transistor and a second switch transistor; The drains of both the first and second switching transistors are connected to the second terminal of the surge capacitor; the source of the first switching transistor is connected to the power supply terminal; the gate of the first switching transistor is connected to the gate of the second switching transistor; and the source of the second switching transistor is connected to ground. When the input signal is at the first level, the first switch is turned on and the second switch is turned off, and the second end of the surge capacitor is connected to the power supply terminal. When the input signal is at the second level, the first switch is turned off and the second switch is turned on, and the second terminal of the surge capacitor is switched from the power supply terminal to the ground terminal.

5. The impact negative charge driving circuit according to claim 4, characterized in that, The signal receiving unit includes a third switch and a fourth switch; The source of the third switch is connected to the power supply terminal, and the drains of both the third and fourth switches are connected to the gate of the first switch. The gate of the third switch is electrically connected to the gate of the fourth switch. The source of the fourth switch is connected to the ground terminal.

6. The impact negative charge driving circuit according to claim 5, characterized in that, The impact negative charge module also includes a timing control circuit; The input terminal of the timing control circuit is electrically connected to the drain of the third switching transistor, and the output terminal of the timing control circuit is electrically connected to the gate of the first switching transistor. After detecting that the input signal changes from the first level to the second level, the timing control circuit generates a timing control signal for controlling the switching control unit after a preset delay. The timing control signal controls the first switching transistor to turn off and the second switching transistor to turn on, so that the second terminal of the surge capacitor is switched from the power supply terminal to the ground terminal.

7. The impact negative charge driving circuit according to claim 2, characterized in that, The impact negative charge driving circuit also includes a pre-charging circuit; The pre-charging circuit is connected between the third terminal of the drive module and the second terminal of the impact negative charge module. It is used to power the drive module and to provide a pre-charging current to the impact capacitor during the conduction of the silicon carbide MOSFET, so that the voltage across its terminals reaches a preset value.

8. The impact negative charge driving circuit according to claim 7, characterized in that, The power supply terminal is the output terminal of the pre-charge circuit, and the preset value is greater than the voltage value of the turn-off drive level output by the drive module; wherein, the turn-off drive level is the level output by the second terminal of the drive module, which is used to control the turn-off of the silicon carbide MOSFET.

9. The impact negative charge driving circuit according to claim 2, characterized in that, The impact negative charge module includes multiple impact capacitor units connected in parallel, each impact capacitor unit including an impact capacitor and its corresponding switch control unit; each impact capacitor unit is configured to independently release negative charge to the gate node.

10. A switching power supply converter, characterized in that, include: The switching power transistor, the control circuit, the conversion circuit, and the impulse negative charge driving circuit for suppressing crosstalk as described in any one of claims 1-9; The switching power transistor is a silicon carbide MOSFET; The output terminal of the impact negative charge driving circuit is connected to the gate of the silicon carbide MOSFET and is used to drive the silicon carbide MOSFET. The control circuit is used to generate a PWM control signal and send it to the impact negative charge drive circuit; The conversion circuit is connected to the drain of the silicon carbide MOSFET and is used to control the conversion of voltage or current.

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