Analog orthogonal vector amplitude demodulation method and device

Abstract

The invention relates to the technical field of signal modulation, in particular to an analog orthogonal vector amplitude demodulation method and device. The method comprises the following steps of: firstly, performing orthogonal demodulation on a signal to be demodulated by combining an original reference signal VREF to obtain an in-phase signal VINX and an orthogonal signal VINY; and then amplitude demodulation is carried out on the in-phase signal VINX and the orthogonal signal VINY to obtain a final demodulation result VOUT. According to the invention, a first multiplication divider, a second multiplication divider and an addition unit are constructed for amplitude demodulation. According to the analog orthogonal vector amplitude demodulation method provided by the invention, two multiplication dividers and an addition unit are constructed, so that an implicit operation logic combining squaring, addition and feedback is realized, the dynamic range of a demodulation circuit is effectively expanded, and the demodulation efficiency is improved. The core problem that the analog demodulation dynamic range of a traditional explicit operation (direct extraction) structure is insufficient is solved.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of signal modulation, in particular to a method and device for analog quadrature vector amplitude demodulation. BACKGROUND

[0002] The amplitude demodulation function at the end of the lock amplifier is completed by using a digital machine in the existing products. The amplitude demodulation by using a digital machine has the advantages of flexibility, fast modification of calculation mode by program, simpler principle, and more stable digital circuit. However, in the case of high-speed operation, the ADC (analog-to-digital conversion) sampling rate has a high requirement, and in the case of real analog signal, a DAC (digital-to-analog converter) is needed for re-conversion, which has the problems of quantization error and complex structure and higher cost. The analog circuit has an advantage in processing high-speed analog signals because it directly operates on continuous analog signals and the response time of the analog circuit element can reach nanoseconds. Compared with the digital circuit, the analog circuit is greatly simplified, has a simpler structure and lower cost. The general analog amplitude demodulation circuit is an explicit operation structure, which has the problems of insufficient dynamic range and limited input range. SUMMARY

[0003] In order to overcome the defects of large quantization error of digital demodulation and small dynamic range of analog demodulation in the prior art, the present application provides an analog quadrature vector amplitude demodulation method, which completes amplitude demodulation by an implicit operation mode, solves the problem of insufficient dynamic range of general explicit amplitude demodulation circuit, and can realize higher demodulation speed and more stable working state.

[0004] The analog quadrature vector amplitude demodulation method provided by the present application first combines the original reference signal V REF with the input signal to be demodulated to obtain an in-phase signal V INX and a quadrature signal V INY ; then the in-phase signal V INX and the quadrature signal V INY are amplitude demodulated to obtain the final demodulation result V OUT . The amplitude demodulation steps are as follows: S21, a first multiplication divider, a second multiplication divider and an addition unit are constructed respectively; the first multiplication divider and the second multiplication divider are used to perform input signal square divided by feedback signal; the addition unit performs addition operation on the outputs of the first multiplication divider and the second multiplication divider; S22, the first multiplication divider and the second multiplication divider both take the initial demodulation signal V iOUT output by the addition unit as the feedback signal DEN, and take the in-phase signal V INX and the quadrature signal V INY as inputs for operation respectively; S23. Obtain the initial demodulated signal V output by the adder unit. iOUT The final demodulated result V is obtained by filtering. OUT .

[0005] Preferably, the orthogonal demodulation steps are as follows: S11, regarding the original reference signal V REF After processing, the orthogonal reference signal V is obtained. O_REF ; S12, Demodulate the signal V to be demodulated. IN Compared with the original reference signal V respectively REF and orthogonal reference signal V O_REF The multiplication operation yields the signal V. X and V Y ; S13, Extract V respectively X and V Y DC component, V X The DC component is denoted as the in-phase signal V. INX V Y The DC component is denoted as the quadrature signal V. INY .

[0006] The present invention proposes a demodulation device for the analog orthogonal vector amplitude demodulation method, comprising a multiplication and division unit, an addition unit, and a filtering unit; The multiplication and division unit is used for multiplication and division of in-phase signals V INX and the quadrature signal V INY Perform self-multiplication operations on each signal, and then divide them with the feedback signal to obtain the in-phase output signal W. X and quadrature output signal W Y ; The adder unit is used to add in-phase output signal W X and quadrature output signal W Y Perform addition to output the initial demodulated signal V. iOUT The initial demodulated signal V iOUT It is used as a feedback signal in the multiplication and division unit; The filtering unit is used to demodulate the initial signal V. iOUT Filtering is performed to obtain the amplitude-demodulated output signal V. OUT .

[0007] Preferably, the addition unit includes an operational amplifier, and the output terminal of the operational amplifier is the output terminal of the addition unit; the multiplication and division unit includes a first multiplier / divider and a second multiplier / divider, and the multiplication input terminals of the two are respectively connected to the in-phase signal V. INX and the quadrature signal V INYThe output ends of the two are connected to the positive feedback end of the operational amplifier, and the division operation input ends of the two are connected to the output end of the operational amplifier.

[0008] Preferably, the output end of the first multiplication-division device and the output end of the second multiplication-division device are connected to the positive feedback end of the operational amplifier through first and second resistors with equal resistance values respectively, the negative feedback end of the operational amplifier is connected to the ground through a third resistor, and the fourth resistor and the first capacitor are connected in parallel between the negative feedback end and the output end of the operational amplifier.

[0009] Preferably, the filtering unit adopts an RC filtering circuit.

[0010] Preferably, the method further comprises a quadrature vector type lock-in amplification unit, which is used for quadrature demodulation of the to-be-demodulated signal in combination with a reference signal to output in-phase signal V INX and quadrature signal V INY .

[0011] Preferably, the quadrature vector type lock-in amplification unit comprises two detection channels, each of which comprises a demodulator, and one of the two detection channels further comprises a 90° phase shifter connected to the front end of the demodulator; the two detection channels output in-phase signal V INX and quadrature signal V INY respectively.

[0012] The application provides an analog quadrature vector amplitude demodulation system, which comprises a memory and a processor.

[0013] The application provides a storage medium, which stores a computer program.

[0014] The application has the following advantages: (1) The application provides an analog quadrature vector amplitude demodulation method, which realizes the "implicit operation" logic of combination of squaring, adding and feedback by constructing two multiplication-division devices and an addition unit, effectively expands the dynamic range of the demodulation circuit, and solves the core problem of insufficient dynamic range of the traditional "explicit operation" (direct square root) structure of the analog demodulation.

[0015] (2) The application provides a demodulation device, and the whole demodulation process is completed by an analog circuit, which avoids the quantization error and delay caused by ADC / DAC conversion in a digital scheme, has the advantages of high speed and low cost of the analog circuit, and realizes the high-response demodulation process by using a simple analog circuit structure.

[0016] (3) In this invention, the zero bias correction circuit is implemented by an operational amplifier, which reduces the relative error, further improves the accuracy of the demodulation result, and enhances the system stability and accuracy.

[0017] (4) In this invention, the signal to be demodulated is first subjected to orthogonal vector locking amplification, which can accurately extract the amplitude information of weak signals from strong noise, with a high signal-to-noise ratio, and realize high-performance vector amplitude demodulation, which has important application value in fields such as weak signal detection.

[0018] (5) In summary, the amplitude demodulation circuit of the present invention can achieve relatively accurate amplitude demodulation using only a few simple chips, with a simpler structure and lower cost. Moreover, it uses analog circuits entirely, which, thanks to the higher limit response speed of analog circuits, has the advantages of higher demodulation speed and more stable operation compared to digital amplitude demodulation circuits. Attached Figure Description

[0019] Figure 1 This is a flowchart of a simulated orthogonal vector amplitude demodulation method proposed in this invention; Figure 2 This is a structural diagram of the analog orthogonal vector amplitude demodulation circuit of the present invention; Figure 3 This is a circuit diagram of a specific embodiment of the implicit amplitude demodulation circuit of the present invention; Figure 4 for Figure 3 A detailed view of part A in the middle; Figure 5 This is a comparison chart of the actual amplitude demodulation results and the ideal amplitude demodulation results obtained from the feasibility experiment. Figure 6 The figure shows the demodulation results of the amplitude demodulation circuit under different phase angles obtained from the feasibility experiment.

[0020] In the diagram: 1. Orthogonal vector type locked amplifier unit; 2. Multiplication and division unit; 21. First multiplier / divider; 22. Second multiplier / divider; 3. Adder unit; 4. Filtering unit. Detailed Implementation

[0021] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present invention.

[0022] like Figure 1 As shown, the present invention proposes an analog orthogonal vector amplitude demodulation method, which first combines the original reference signal V REFQuadrature demodulation of the signal to be demodulated yields the in-phase signal V. INX and the quadrature signal V INY Then, for the in-phase signal V... INX and the quadrature signal V INY Amplitude demodulation is performed to obtain the final demodulated result V. OUT .

[0023] The orthogonal demodulation process includes the following steps: S11, regarding the original reference signal V REF After processing, the orthogonal reference signal V is obtained. O_REF Among them, the orthogonal reference signal V O_REF It has a 90° phase difference with the original reference signal.

[0024] Right now: , ω0 is the angular frequency of the signal to be demodulated, and t is time.

[0025] S12, Demodulate the signal V to be demodulated. IN Compared with the original reference signal V respectively REF and orthogonal reference signal V O_REF Fusion processing yields signal V X and V Y ; ; ; ; in, V Let ω0 be the amplitude of the signal to be demodulated, and ω0 be the angular frequency of the signal to be demodulated. The initial phase of the signal to be demodulated.

[0026] S13, Extract V respectively X and V Y DC component, V X The DC component is denoted as the in-phase signal V. INX V Y The DC component is denoted as the quadrature signal V. INY ; ; ; The amplitude demodulation process is as follows: for the in-phase signal V INX and the quadrature signal V INY Taking the square root of the sum of squares yields the initial demodulated signal V. iOUT Then the initial demodulated signal V iOUT Filtering is performed to obtain the final demodulated result V. OUT .

[0027] The amplitude demodulation process specifically comprises the following steps: S21, a first multiplication-division device, a second multiplication-division device and an addition unit are respectively constructed; the first multiplication-division device and the second multiplication-division device both perform input-output relationship, wherein, DEN is a feedback signal, V IN and W are respectively input and output of the multiplication-division operation unit; the addition unit performs addition operation on the outputs of the first multiplication-division device and the second multiplication-division device to obtain an initial demodulation signal V iOUT and outputs the initial demodulation signal V S22, the first multiplication-division device and the second multiplication-division device both take the initial demodulation signal V iOUT output by the addition unit as a feedback signal DEN, and respectively take the in-phase signal V INX and the quadrature signal V INY as input to perform operation; S23, the following formulas are solved simultaneously to obtain the initial demodulation signal V iOUT ; the initial demodulation signal V iOUT is filtered to obtain a final demodulation result V OUT .

[0028] (1); (2); (3); (4); The formulas 1-2 can be obtained simultaneously: (5); The formulas 3-5 can be obtained simultaneously: ; The square root can be obtained: .

[0029] Lock-in amplifier is an instrument capable of achieving high-precision measurement in time and amplitude, with the advantages of stable center frequency, narrow frequency band, high quality factor, etc., and is applied to the fields of weak signal detection, impedance analysis, spectrum analysis, magnetic measurement, material tension experiment and metal detection. With the help of lock-in amplifier and other instruments, weak signals that are considered to be unable to be measured by traditional concepts, such as weak light, small displacement, micro-vibration, micro-temperature difference, small capacitance, weak magnetism, weak sound, micro-conductance and micro-current, can be measured, so that the measurement precision of weak signals is greatly improved.

[0030] The main idea of the lock-in amplifier is to multiply the input signal with a reference signal of a certain frequency, so that the part of the input signal with the same frequency as the reference signal generates a DC component, while the rest of the frequency components only generate AC components, and then low-pass filter to filter out the AC components. Thus, the weak signal of a specific frequency is extracted from the strong noise environment, and the signal-to-noise ratio can be greatly improved. This idea of detecting a specific frequency signal provides a good way to detect a weak signal submerged in strong noise, and thus has a wide range of applications in strong interference environments.

[0031] The dual-channel lock-in amplifier adds a detection channel based on the single-channel lock-in amplifier, also known as the quadrature vector lock-in amplifier. It detects the signal to be measured by multiplying it with two reference signals with a 90° phase difference, respectively, to obtain two quadrature signals. The amplitude of the quadrature signals is demodulated by the quadrature vector amplitude demodulation circuit, and the phase angle is demodulated by the phase angle demodulation circuit, so as to simultaneously detect the inductance, capacitance and resistance components in the signal, and realize vector tracking.

[0032] Referring to Figure 2 and Figure 3 、 Figure 4 , the embodiment proposes an analog quadrature vector amplitude demodulation device, which includes a quadrature vector lock-in amplification unit 1, a multiplication and division operation unit 2, an addition unit 3 and a filtering unit 4. The addition unit 3 can be implemented by an adder, and the filtering unit 4 can be implemented by a low-pass filtering algorithm.

[0033] The quadrature vector lock-in amplification unit 1 is used for quadrature demodulation of the signal to be demodulated, and the input signal is the signal to be demodulated V IN and the reference signal V REF , and the output signal is the in-phase signal V INX and the quadrature signal V INY after quadrature demodulation.

[0034] The multiplication and division operation unit 2 is used for self-multiplication operation of the in-phase signal V INX and the quadrature signal V INY , and division operation of the signal fed back by the addition unit 3. After processing the in-phase signal V INX by the multiplication and division operation unit 2, the in-phase output signal W X is generated, and after processing the quadrature signal V INY by the multiplication and division operation unit 2, the quadrature output signal W Y is generated.

[0035] The addition unit 3 is used for addition operation of the in-phase output signal W X and the quadrature output signal W Y , to output the initial demodulation signal V iOUT , and the initial demodulation signal V iOUTThe feedback signal DEN is input to the multiplication-division operation input end of the multiplication-division operation unit 2.

[0036] The filter unit 4 is used to filter the initial demodulation signal V iOUT output by the addition unit, and the output is the amplitude-adjusted output signal V OUT .

[0037] Specifically, in the embodiment, the quadrature vector type lock-in amplifier unit 1 includes two detection channels, which are used to output two signals, i.e. the in-phase signal V INX and the quadrature signal V INY . One detection channel is implemented as a demodulator I, and the other detection channel includes a demodulator Q and a 90° phase shifter connected to the front end of the demodulator Q.

[0038] The signal to be demodulated is denoted as , and the original reference signal is denoted as ; V is the amplitude of the signal to be demodulated, ω0 is the angular frequency of the signal to be demodulated, is the initial phase of the signal to be demodulated. The signal to be demodulated and the original reference signal are synchronously input to the input ends of the two detection channels of the quadrature vector type lock-in amplifier unit 1, i.e. in one detection channel, the signal to be demodulated V IN and the original reference signal V REF are both input to the demodulator I for processing, to obtain the in-phase signal ; in the other detection channel, the original reference signal V REF is first phase-shifted by the 90° phase shifter to generate the quadrature reference signal V REF which has a 90° phase difference with the original reference signal O_REF , and then the quadrature reference signal V O_REF is synchronously input to the demodulator Q with the signal to be demodulated V IN for processing, to obtain the quadrature signal .

[0039] The multiplication-division operation unit 2 includes a first multiplication-division unit 21 and a second multiplication-division unit 22. In the embodiment, the first multiplication-division unit 21 and the second multiplication-division unit 22 are selected from but not limited to integrated chips, such as AD637. As shown in Figure 3 , the multiplication operation input end (VIN end) of the first multiplication-division unit 21 receives the quadrature signal V INY , and the multiplication operation input end (VIN end) of the second multiplication-division unit 22 receives the in-phase signal VINX The outputs (OUT terminals) of the two multipliers and dividers are connected to the input of the adder unit 3 via resistors R1 and R2, respectively. A 10pF filter capacitor is connected between the output (OUT terminal) and the filter capacitor terminal (CAV terminal) to ensure a smoother signal. Figure 4 As shown, the chip select terminal (CS terminal) of the multiplier / divider can be connected to the DC drive power supply +Vcc through a pull-up resistor (4.7kΩ here). The output terminal of the adder unit 3 is connected to the division input terminal (DEN / INPUT terminal) of the first multiplier / divider 21 and the second multiplier / divider 22, respectively. Its COMMON terminal and OUTPUT / OFFSET terminal are grounded, while the BUFF, NC, and DB terminals are all left floating. The +VS terminal is connected to the positive terminal +Vcc of the DC drive power supply. CC The -VS terminal is connected to the negative terminal -V of the DC drive power supply. CC .

[0040] like Figure 3 As shown, the adder unit 3 includes an operational amplifier, specifically a low-noise precision operational amplifier in the form of an integrated chip, such as the OPA211. The output signals of the first multiplier / divider 21 and the second multiplier / divider 22 are simultaneously input to the non-inverting input of the operational amplifier through the first resistor R1 and the second resistor R2, respectively. The inverting input of the operational amplifier is grounded through the third resistor R3. The output of the operational amplifier is connected to the inverting input of the operational amplifier through the fourth resistor R4 in parallel and the first capacitor C1, and is connected to the division input (DEN / INPUT) of the first multiplier / divider 21 and the second multiplier / divider 22 through a feedback loop. At the same time, the output of the operational amplifier is connected to the input of the filter unit 4.

[0041] A typical set of component values ​​is as follows: the resistances of the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are all 10kΩ; the capacitance of the first capacitor C1 is 5pF. However, significant variations can occur in certain specific applications. For example, in the radio frequency range, the values ​​of R1, R2, and R3 can be as low as a typical 50Ω, while in some low-power, low-speed applications, they can be as high as a typical 100kΩ.

[0042] like Figure 3 As shown, adder unit 3 should be adjusted to ensure consistent resistor values ​​to adjust the operational amplifier's output zero bias, thereby improving the demodulation accuracy of the demodulation circuit and reducing relative error. In actual design, precision resistors can be used to improve accuracy, and a zero-bias correction circuit can be added to correct the adder's zero-point bias.

[0043] In this embodiment, filter unit 4 is an RC filter, with one end of its resistor (3.3kΩ here) connected to the output of the operational amplifier, and the other end of the resistor considered as the final demodulation result V. OUTthe output end of the demodulation result V, one end of the capacitor (the value of the capacitor is 47nF here) is connected with the output end of the demodulation result V, and the other end is grounded, and the bandwidth of the RC filter can be effectively reduced by reasonably setting the RC filter. The values of R and C are determined by the available bandwidth of the signal; if the frequency bandwidth of the signal is larger, R and C can be reduced; if a smaller bandwidth is required, R and C can be increased. OUT The above-mentioned analog quadrature vector amplitude demodulation method is verified by combining specific embodiments.

[0044] The above-mentioned analog quadrature vector amplitude demodulation method is verified by combining specific embodiments.

[0045] In this embodiment, first, a principle prototype as shown in the following figure is constructed. Figures 2-4 The circuit parameters are as shown in the above-mentioned demodulation device and the drawings.

[0046] In this embodiment, the circuit is powered by ±10V, and the output result is observed by an oscilloscope. The dynamic range of the principle prototype can reach 87.1dB, and the quadrature signal in the range of 0.42mV-9.44V can be accurately detected. Within its detection range, the maximum relative error of the demodulation result is about 4.1%.

[0047] As can be seen, the analog quadrature vector amplitude demodulation circuit of the present application adopts an implicit operation structure, which can improve the accuracy of the signal demodulation result to a certain extent. Compared with the general explicit amplitude demodulation circuit which directly uses the structure of squaring, adding and square root operation, the use of the implicit operation structure can improve the demodulation accuracy to a certain extent, and further avoid the large error caused by the small output signal of the adder when the input signal is too small. The input range of the analog quadrature vector amplitude demodulation circuit of the present application is obviously improved compared with the general explicit amplitude demodulation circuit. Since the output of the multiplier / divider is the square of the detection signal / demodulation result, the output result of the multiplier / divider will not increase or decrease with the square of the detection value when the detection signal is too large or too small, so that the dynamic range of 87.1dB can be obtained, and the detection signal of 0.42mV-9.44V can be detected.

[0048] As shown in the following figure, the comparison between the actual demodulation output result and the ideal demodulation result within the detection range of the principle prototype is shown, and it can be seen that the fitting plane of the actual output is basically consistent with the ideal output. Figure 6 The demodulation results of the principle prototype under different phase angles are shown, and it can be seen that the actual demodulation result under different phase angles is almost consistent with the ideal demodulation result.

[0049] ​Experiments show that the demodulation device and the analog quadrature vector amplitude demodulation method have excellent dynamic range index and small error.

[0050] Of course, the present application is not limited to the details of the above-described exemplary embodiments, but also includes the same or similar structures that can be implemented in other specific forms without departing from the spirit or essential characteristics of the present application. Therefore, the embodiments should be considered as exemplary and non-limiting, and the scope of the present application is defined by the appended claims rather than the above description, and thus all changes falling within the meaning and range of the equivalent elements of the claims are intended to be included in the present application. Any reference signs in the claims should not be considered as limiting the claims involved.

[0051] In addition, it should be understood that although the present specification is described in terms of embodiments, not every embodiment contains only one independent technical solution, and the description of the specification is only for the sake of clarity, and those skilled in the art should consider the specification as a whole, and the technical solutions in each embodiment can be properly combined to form other embodiments that those skilled in the art can understand.

[0052] The technologies, shapes, and structural parts not described in detail in the present application are well-known technologies.

Claims

1. A method for demodulating the amplitude of analog orthogonal vectors, characterized in that, First, combine the original reference signal V REF Quadrature demodulation of the signal to be demodulated yields the in-phase signal V. INX and the quadrature signal V INY Then, for the in-phase signal V... INX and the quadrature signal V INY Amplitude demodulation is performed to obtain the final demodulated result V. OUT ; The amplitude demodulation steps are as follows: S21. Construct a first multiplier / divider, a second multiplier / divider, and an adder unit respectively; the first multiplier / divider and the second multiplier / divider are used to perform the square of the input signal divided by the feedback signal; the adder unit performs the addition operation on the outputs of the first multiplier / divider and the second multiplier / divider; S22, the first multiplier / divider, and the second multiplier / divider both use the initial demodulated signal V output from the adder unit. iOUT As the feedback signal DEN, and respectively with in-phase signal V INX and the quadrature signal V INY Used as input for computation; S23. Obtain the initial demodulated signal V output by the adder unit. iOUT The final demodulated result V is obtained by filtering. OUT .

2. The analog orthogonal vector amplitude demodulation method as described in claim 1, characterized in that, The steps for orthogonal demodulation are as follows: S11, regarding the original reference signal V REF After processing, the orthogonal reference signal V is obtained. O_REF ; S12, Demodulate the signal V to be demodulated. IN Compared with the original reference signal V respectively REF and orthogonal reference signal V O_REF The multiplication operation yields the signal V. X and V Y ; S13, Extract V respectively X and V Y DC component, V X The DC component is denoted as the in-phase signal V. INX V Y The DC component is denoted as the quadrature signal V. INY .

3. A demodulation apparatus for the analog orthogonal vector amplitude demodulation method as described in claim 1 or 2, characterized in that, It includes a multiplication and division unit, an addition unit, and a filtering unit; The multiplication and division unit is used for multiplication and division of in-phase signals V INX and the quadrature signal V INY Perform self-multiplication operations on each signal, and then divide them with the feedback signal to obtain the in-phase output signal W. X and quadrature output signal W Y ; The adder unit is used to add in-phase output signal W X and quadrature output signal W Y Perform addition to output the initial demodulated signal V. iOUT The initial demodulated signal V iOUT It is used as a feedback signal in the multiplication and division unit; The filtering unit is used to demodulate the initial signal V. iOUT Filtering is performed to obtain the amplitude-demodulated output signal V. OUT .

4. The demodulation device as described in claim 3, characterized in that, The addition unit includes an operational amplifier, and the output of the operational amplifier is the output of the addition unit; the multiplication and division unit includes a first multiplier / divider and a second multiplier / divider, and the multiplication inputs of the two are respectively connected to the in-phase signal V. INX and the quadrature signal V INY Both outputs are connected to the positive feedback terminal of the operational amplifier, and both division inputs are connected to the output terminal of the operational amplifier.

5. The demodulation device as described in claim 4, characterized in that, The output terminals of the first multiplier / divider and the second multiplier / divider are connected to the positive feedback terminal of the operational amplifier through a first resistor and a second resistor of equal resistance, respectively. The negative feedback terminal of the operational amplifier is grounded through a third resistor. Furthermore, a fourth resistor and a first capacitor are connected in parallel between the negative feedback terminal and the output terminal of the operational amplifier.

6. The demodulation device as described in claim 3, characterized in that, The filtering unit uses an RC filter circuit.

7. The demodulation device as described in claim 3, characterized in that, It also includes a quadrature vector lock-in amplifier unit, used to perform quadrature demodulation of the signal to be demodulated in conjunction with a reference signal, so as to output an in-phase signal V. INX and the quadrature signal V INY .

8. The demodulation device as described in claim 7, characterized in that, The quadrature vector lock-in amplifier unit includes two detection channels, each containing a demodulator. One of the detection channels also includes a 90° phase shifter connected to the front end of the demodulator. The two detection channels output in-phase signals V. INX and the quadrature signal V INY .

9. A simulated orthogonal vector amplitude demodulation system, characterized in that, It includes a memory and a processor. The memory stores a computer program, and the processor is connected to the memory. The processor is used to execute the computer program to implement the analog orthogonal vector amplitude demodulation method as described in claim 1 or 2.

10. A storage medium, characterized in that, The system contains a computer program that, when executed, implements the analog orthogonal vector amplitude demodulation method as described in claim 1 or 2.

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