Method for manufacturing semiconductor device
By using the bonding and grinding processes of SiC single-crystal and polycrystalline substrates with constant thickness, the manufacturing process of semiconductor devices is simplified, the yield and reliability are improved, and the complexity caused by the variation of wafer source thickness in the prior art is solved.
Patent Information
- Application Number
- CN202510850262.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-08-09
- Filing Date
- 2025-06-24
- Publication Date
- 2026-02-13
AI Technical Summary
In existing technologies, when using wafer sources with varying thicknesses to manufacture semiconductor devices, the manufacturing process is complex and yield and reliability are difficult to guarantee.
A SiC single-crystal substrate and a polycrystalline substrate with constant thickness are bonded together, and an epitaxial layer and components are formed after bonding. Finally, the polycrystalline substrate interface is removed by a grinding process, which simplifies the manufacturing process.
It simplifies the manufacturing process, improves the yield and reliability of semiconductor devices, and avoids the risk of increased on-resistance due to voids and damage during use.
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Figure CN121531939A_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present disclosure relates to a manufacturing method of a semiconductor device using silicon carbide. BACKGROUND
[0002] Conventionally, a technology of repeatedly using one wafer source to manufacture semiconductor devices has been disclosed (for example, refer to Patent Literature 1).
[0003] Patent Literature 1: International Publication No. 2022 / 059473
[0004] A conventional manufacturing apparatus of a semiconductor device uses a wafer having a constant thickness to manufacture a semiconductor device.
[0005] In Patent Literature 1, one wafer source is cut and polished by a support member, and the cutting and polishing are repeatedly performed to reuse the wafer source, and thus the thickness of the wafer source varies each time the wafer source is used. Therefore, in order to use the conventional manufacturing apparatus, the manufacturing apparatus needs to be adjusted according to the thickness of the wafer source, and thus there is a problem that the manufacturing process becomes complicated. SUMMARY
[0006] The present disclosure is made to solve such a problem, and aims to provide a manufacturing method of a semiconductor device capable of simplifying a manufacturing process.
[0007] To solve the above problem, the manufacturing method of a semiconductor device of the present disclosure includes: a preparation step of preparing two crystal substrates each composed of silicon carbide and each having a constant thickness; a bonding step of bonding the two crystal substrates to form a bonded crystal substrate; an epitaxial growth step of forming an epitaxial layer on a first main surface of the bonded crystal substrate; a device formation step of forming a device on the epitaxial layer; and a grinding step of grinding a second main surface of the bonded crystal substrate, which is opposite to the first main surface, including an interface where the two crystal substrates are bonded, after the device formation step.
[0008] According to the present disclosure, it is possible to simplify the manufacturing process. BRIEF DESCRIPTION OF DRAWINGS
[0009] Figure 1 is a view for explaining the manufacturing method of a semiconductor device of Embodiment 1.
[0010] Figure 2 is a view for explaining the manufacturing method of a semiconductor device of Embodiment 1.
[0011] Figure 3 is a view for explaining the manufacturing method of a semiconductor device of Embodiment 1.
[0012] Figure 4 is a view for explaining the manufacturing method of a semiconductor device of Embodiment 1.
[0013] Figure 5 is a view for explaining a manufacturing method of a semiconductor device of Embodiment 1. The semiconductor device of Embodiment 1 is a SiC semiconductor device.
[0014] Explanation of Reference Numerals: 1... SiC single crystal substrate; 2... SiC polycrystal substrate; 3... epitaxial layer; 4... element. DETAILED DESCRIPTION
[0015] Embodiment 1
[0016] Hereinafter, a case where the thickness of a wafer required for an element forming process (WP) which is a standard manufacturing process using a 6-inch silicon carbide (hereinafter, referred to as "SiC") wafer is 350 μm and the thickness of a final chip (semiconductor device) is 100 μm will be explained.
[0017] Figures 1 to 5 is a view for explaining a manufacturing method of a semiconductor device of Embodiment 1. The semiconductor device of Embodiment 1 is a SiC semiconductor device.
[0018] First, in a preparation process shown in Figure 1 , SiC single crystal substrates 1 and SiC polycrystal substrates 2 each having a constant thickness are prepared. Since the thickness of a final chip is 100 μm, the thickness of the SiC single crystal substrates 1 is "100 μm + α". Further, since the thickness of a wafer required for an element forming process (WP) is 350 μm, the thickness of the SiC polycrystal substrates 2 is "250 μm - α". Here, "α" is a difference value for avoiding a concern that an interface between the SiC single crystal substrates 1 and the SiC polycrystal substrates 2 is left in a semiconductor device due to a processing difference of the SiC single crystal substrates 1 and a processing difference when the thickness of a wafer as a whole after element formation is set to 100 μm, and is, for example, 5 to 10 μm.
[0019] Next, in a bonding process shown in Figure 2 , the SiC single crystal substrates 1 and the SiC polycrystal substrates 2 are bonded to form a bonded crystal substrate. In Figure 2 , the thickness of the bonded crystal substrate is 350 μm.
[0020] Next, in an epitaxial growth process shown in Figure 3 , an epitaxial layer 3 is formed on a first main surface of the bonded crystal substrate (on the SiC single crystal substrate 1).
[0021] Next, in an element formation process shown in Figure 4 , an element 4 is formed on the epitaxial layer 3.
[0022] Next, in a separation process shown in Figure 5In the shown grinding process, the second main surface side (SiC polycrystal substrate 2 side) of the bonded crystal substrate opposite the first main surface is ground until the final thickness becomes 100 μm. At this time, the interface where the SiC single crystal substrate 1 and the SiC polycrystal substrate 2 are bonded is also ground. The wafer after the grinding process has the SiC single crystal substrate 1, the epitaxial layer 3, and the element 4.
[0023] After that, the semiconductor device is completed by performing a dicing process on the ground wafer.
[0024] <Effects>
[0025] In Embodiment 1, the thickness of the bonded crystal substrate where the SiC single crystal substrate 1 and the SiC polycrystal substrate 2 are bonded is constant (350 μm). Therefore, it is not necessary to adjust the manufacturing device depending on the thickness of the wafer source as in Patent Document 1, and thus the manufacturing process of the semiconductor device can be simplified.
[0026] If the SiC single crystal substrate 1 and the SiC polycrystal substrate 2 are bonded, a gap is generated at the interface thereof. The gap present in the semiconductor device hinders the current flowing in the semiconductor device, and thus the on-resistance of the semiconductor device increases. In addition, even if it passes the outgoing inspection, there is a possibility that a crack is generated at the bonding interface from the gap as a starting point due to a large stress applied to the semiconductor device by repeated temperature rising and falling at the time of use of the semiconductor device, and thus the semiconductor device is broken. In this way, if the semiconductor device has a gap, there is a concern that the yield of the semiconductor device and the reliability of the element decrease. In Embodiment 1, the interface where the SiC single crystal substrate 1 and the SiC polycrystal substrate 2 are bonded is ground in the grinding process, and thus the semiconductor device after the grinding does not have a gap. Therefore, it is possible to avoid the concern that the yield of the semiconductor device and the reliability of the element decrease.
[0027] In addition, in Embodiment 1, the bonded crystal substrate after the SiC single crystal substrate 1 and the SiC polycrystal substrate 2 are bonded is ground. Therefore, compared with the process of polishing after the wafer source is cut as in Patent Document 1, it is possible to simplify the manufacturing process of the semiconductor device.
[0028] In addition, the embodiments can be appropriately modified and omitted within the scope of the present disclosure.
[0029] <Supplementary Note>
[0030] Hereinafter, each aspect of the present disclosure will be collectively described as a supplementary note.
[0031] (Supplementary Note 1) A method of manufacturing a semiconductor device, including:
[0032] a preparation step of preparing two crystal substrates each having a constant thickness and composed of silicon carbide;
[0033] a bonding step of bonding the two crystal substrates to form a bonded crystal substrate;
[0034] an epitaxial growth step of forming an epitaxial layer on a first main surface of the bonded crystal substrate;
[0035] a device formation step of forming a device on the epitaxial layer; and
[0036] a polishing step of polishing a second main surface of the bonded crystal substrate, which is opposite to the first main surface, including an interface where the two crystal substrates are bonded, after the device formation step.
[0037] (Addendum 2) The method for manufacturing a semiconductor device according to Addendum 1, wherein
[0038] the two crystal substrates are a single crystal substrate and a polycrystal substrate.
[0039] (Addendum 3) The method for manufacturing a semiconductor device according to Addendum 2, wherein the epitaxial layer is formed on the single crystal substrate.
[0040] (Addendum 4) The method for manufacturing a semiconductor device according to Addendum 2 or 3, wherein a thickness of the single crystal substrate is 100 μm or more,
[0041] a thickness of the polycrystal substrate is 250 μm or less,
[0042] a thickness of the bonded crystal substrate is 350 μm.
Claims
1. A method of manufacturing a semiconductor device, characterized by, comprising the following steps: a preparation step of preparing two crystalline substrates each having a constant thickness composed of silicon carbide; a bonding step of bonding the two crystalline substrates to form a bonded crystalline substrate; an epitaxial growth step of forming an epitaxial layer on a first main surface of the bonded crystalline substrate; a device formation step of forming a device on the epitaxial layer; and a polishing step of polishing a second main surface of the bonded crystalline substrate opposite to the first main surface including an interface where the two crystalline substrates are bonded after the device formation step.
2. The method of manufacturing a semiconductor device according to claim 1, wherein the two crystalline substrates are a single-crystal substrate and a polycrystal substrate.
3. The method of manufacturing a semiconductor device according to claim 2, wherein the epitaxial layer is formed on the single-crystal substrate.
4. The method of manufacturing a semiconductor device according to claim 2 or 3, wherein the single-crystal substrate has a thickness of 100 μm or more, the polycrystal substrate has a thickness of 250 μm or less, the bonded crystalline substrate has a thickness of 350 μm.
Citation Information
Patent Citations
Semiconductor device manufacturing method and wafer structural object
WO2022059473A1