Interface circuit, driver and control method
By setting up DALI interfaces on the primary and secondary sides of the driver and using optocouplers and switches to achieve bidirectional signal transmission, the problem of DALI signals not being able to be transmitted bidirectionally is solved, the timing requirements of DALI signals are met, and the flexibility and convenience of the interface circuit are improved.
Patent Information
- Application Number
- CN202380098360.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-05-29
- Publication Date
- 2026-02-13
Smart Images
Figure CN121533140A_ABST
Abstract
Description
Technical Field
[0001] The embodiments disclosed herein relate generally to the field of lighting, and more specifically to interface circuits, drivers and control methods. Background Technology
[0002] This section provides information to aid in a better understanding of aspects of this disclosure. Therefore, the statements in this section should be read in this light and should not be construed as an admission of anything that is in the prior art or not in the prior art.
[0003] In standard Digital Addressable Lighting Interface (DALI) applications, the power line and DALI control line are run together in the same cable. The DALI interface on the driver printed circuit board (PCB) is also placed near the L and N lines, which are essentially insulated. Summary of the Invention
[0004] The inventors discovered that there is no DALI interface for client applications on the secondary side, and DALI control signals can only be transmitted from the main DALI bus.
[0005] Generally speaking, embodiments of this disclosure provide an interface circuit, a driver, and a control method. In an embodiment, a first DALI interface is disposed on the primary side of the driver, and a second DALI interface is disposed on the secondary side of the driver. DALI signals can be transmitted bidirectionally between the first DALI interface and the second interface, thereby satisfying DALI signal timing requirements (e.g., a maximum 15μs delay in the DALI signal link).
[0006] In a first aspect, an interface circuit is provided, the interface circuit comprising:
[0007] A first Digital Addressable Lighting Interface (DALI) interface circuit is configured to connect to a first data bus and a controller (MCU), send a first signal to the controller, and receive feedback signals from the controller; and
[0008] A second DALI interface circuit is configured to connect to the first DALI interface circuit and the second data bus.
[0009] Signals received from the second data bus are transmitted from the second DALI interface circuit to the first DALI interface circuit, and signals received from the first data bus can be transmitted to the second DALI interface circuit.
[0010] In at least one embodiment, the second DALI interface circuit includes:
[0011] The transport block performs bidirectional signal transmission between the first DALI interface circuit and the second DALI interface circuit.
[0012] In at least one implementation, the transport block includes:
[0013] A first optocoupler (U10, U94) is configured to output a first control signal based on a signal from a first DALI interface circuit.
[0014] The first switch (M10, M93) is configured to be coupled between the output terminals of the second DALI interface circuit and controlled by a first control signal;
[0015] A second optocoupler (U20, U92) is configured to output a second control signal based on a signal from the second DALI interface circuit; and
[0016] The second switch (M30, M91) is configured to be coupled to the first DALI interface circuit and controlled by the second control signal.
[0017] In at least one embodiment, when the signal from the first DALI interface circuit is high, the first optocoupler (U10, U94) is turned on and the first switch (M10, M93) is turned off, and the output terminal of the second DALI interface circuit outputs a high-level signal.
[0018] When the signal from the first DALI interface circuit is low, the first optocoupler (U10, U94) is disconnected and the first switch (M10, M93) is turned on, and the output terminal of the second DALI interface circuit outputs a low-level signal.
[0019] When the signal from the second DALI interface circuit is high, the second optocoupler (U20, U92) is turned on and the second switch (M30, M91) is turned off, and the first DALI interface circuit is provided with a high-level signal;
[0020] When the signal from the second DALI interface circuit is low, the second optocoupler (U20, U92) is disconnected and the second switch (M30, M91) is turned on, and the first DALI interface circuit is provided with a low-level signal.
[0021] In at least one embodiment, the second DALI interface circuit further includes:
[0022] A high-voltage protection circuit is configured to include protection switches (M31, M92) connected to the gate pins of the second switches (M30, M91) and to detect signals from the first DALI interface circuit.
[0023] When the signal from the first DALI interface circuit is high, the protection switches (M31, M92) are turned on and the second switches (M30, M91) are turned off.
[0024] In at least one embodiment, the second DALI interface circuit further includes:
[0025] An unlocking circuit is configured to disconnect the first switch (M10, M93) when a signal from the second DALI interface circuit is transmitted to the first DALI interface circuit, and / or disconnect the second switch (M30, M91) when a signal from the first DALI interface circuit is transmitted to the second DALI interface circuit.
[0026] In at least one embodiment, the unlocking circuit includes:
[0027] A first comparator (U1-a) and a third switch (M1), wherein the gate of the third switch (M1) is coupled to the output pin of the first comparator (U1-a), and the drain of the third switch is coupled to the gate of a second switch (M10). The first comparator (U1-a) compares a first reference voltage with a first voltage, which is correlated with a signal received from a second data bus; and
[0028] A second comparator (U2-a) and a fourth switch (M2), wherein the gate of the fourth switch is coupled to the output pin of the second comparator (U2-a) and the drain of the fourth switch is coupled to the gate of the first switch (M30). The second comparator (U2-a) compares a second reference voltage with a second voltage that is related to a signal received from the first bus.
[0029] In at least one embodiment, the unlocking circuit includes:
[0030] A first controller (U90) is configured to output a first unlock control signal and a second unlock control signal.
[0031] When the first controller (U90) detects that a signal from the second DALI interface circuit is transmitted to the first DALI interface circuit, it outputs a first unlock control signal to disconnect the first switch (M93).
[0032] When the first controller (U90) detects that a signal from the first DALI interface circuit is transmitted to the second DALI interface circuit, it outputs a second unlock control signal to disconnect the second switch (M91).
[0033] In a second aspect, a driver is provided for driving a lighting device, the driver including an interface circuit as described in any of the embodiments and a controller, the interface circuit sending a first signal to the controller and receiving a feedback signal from the controller.
[0034] In a second aspect, a control method for an interface circuit is provided, the interface circuit comprising:
[0035] A first Digital Addressable Lighting Interface (DALI) interface circuit is configured to connect to a first data bus and a controller (MCU), send a first signal to the controller, and receive feedback signals from the controller; and
[0036] A second DALI interface circuit is configured to connect to the first DALI interface circuit and the second data bus.
[0037] Control methods include:
[0038] Signals received from the second data bus are transmitted from the second DALI interface circuit to the first DALI interface circuit, and signals received from the first data bus are transmitted to the second DALI interface circuit. Attached Figure Description
[0039] The above and other aspects, features, and benefits of various embodiments of the present disclosure will become more apparent by way of example and through the following detailed description with reference to the accompanying drawings, wherein similar reference numerals or letters are used to denote similar or equivalent elements. The drawings are shown for the purpose of better understanding embodiments of the present disclosure and are not necessarily drawn to scale, wherein:
[0040] Figure 1 This is a block diagram of the interface circuit according to an embodiment of the present disclosure;
[0041] Figure 2 This is a circuit diagram of the interface circuit according to the embodiment of this disclosure;
[0042] Figure 3 This is a circuit diagram of an interface circuit according to another embodiment of this disclosure;
[0043] Figure 4 A flowchart of the control method for the interface circuit is shown. Detailed Implementation
[0044] This disclosure will now be discussed with reference to several example embodiments. It should be understood that the purpose of discussing these embodiments is solely to enable those skilled in the art to better understand and implement this disclosure, and not to impose any limitation on the scope of this disclosure.
[0045] As used herein, the terms “first” and “second” refer to distinct elements. Unless the context clearly indicates otherwise, the singular forms “an” and “a” are intended to include the plural forms as well. As used herein, the terms “comprising,” “including,” “having,” and / or “containing” specify the presence of stated features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof. The term “based on” should be understood as “at least partially based on.” The terms “one embodiment” and “implementation” should be understood as “at least one embodiment.” The term “another embodiment” should be understood as “at least one other embodiment.” Other explicit and implicit definitions may be included below.
[0046] The first aspect of the implementation plan
[0047] In the first embodiment, an interface circuit is provided.
[0048] Figure 1 This is a block diagram of the interface circuit according to the embodiments of this disclosure.
[0049] like Figure 1 As shown, the interface circuit 10 includes a first digitally addressable lighting interface (DALI) interface circuit 11 and a second DALI interface circuit 12.
[0050] In at least one embodiment, the first DALI interface circuit 11 is configured to connect to a first data bus DB1 and a controller 100 (e.g., the controller 100 is an MCU), send a first signal S1 to the controller 100, and receive a feedback signal FBS from the controller 100. The signal received by the first DALI interface 11 from the first data bus DB1 can be represented as a DALI signal received from the DALI_in terminal.
[0051] The second DALI interface circuit 12 is configured to connect to the first DALI interface circuit 11 and the second data bus DB2. The signal received by the second DALI interface from the second data bus DB2 can be represented as the DALI signal received from the pDALI_insulated terminal.
[0052] In at least one embodiment, a signal received from the second data bus DB2 (e.g., a DALI signal received from the pDALI_insulated terminal) can be transmitted by the second DALI interface circuit 12 to the first DALI interface circuit 11. A signal received from the first data bus DB1 (e.g., a DALI signal received from the DALI_in terminal) can be transmitted to the second DALI interface circuit 12. Therefore, DALI signals can be transmitted bidirectionally between the first and second DALI interfaces, thereby satisfying DALI signal timing requirements (e.g., a maximum 15μs delay in the DALI signal link).
[0053] In at least one embodiment, the first DALI interface 11 may be disposed on the primary side of the driver, and the second DALI interface 12 may be disposed on the secondary side of the driver. Customers can select either the first DALI interface 11 or the second DALI interface 12 for their applications, thus improving the flexibility and convenience of the interface circuit 10.
[0054] The first DALI interface circuit 11 can be a standard DALI interface circuit, which can be referenced in relevant technologies.
[0055] like Figure 1 As shown, the second DALI interface circuit 12 may include a transmission block 121. The transmission block 121 performs bidirectional signal transmission between the first DALI interface circuit 11 and the second DALI interface circuit 12.
[0056] like Figure 1 As shown, the second DALI interface circuit 12 may further include a high-voltage protection circuit 122. The high-voltage protection circuit 122 is configured to disconnect signal transmission between the first DALI interface circuits.
[0057] like Figure 1 As shown, the second DALI interface circuit 12 may also include an unlocking circuit 123. The unlocking circuit 123 is used to avoid the problem of high-level signal transmission failure after low-level signal transmission.
[0058] Figure 2 This is a circuit diagram of the interface circuit according to the embodiment of this disclosure. Figure 2 The following is shown in at least one embodiment: Figure 1 Details of the interface circuit 10.
[0059] like Figure 2 As shown, in the first DALI interface circuit 11, the DALI signal can be transmitted from DALI_in and enter the controller 100 through the optocoupler U141 (e.g., Figure 1(As shown). Then, the feedback signal is sent to the first DALI interface circuit 11 via U140 to the DALI bus (e.g., DB1).
[0060] like Figure 2 As shown, the second DALI interface circuit 12 includes a transmission block 121, a high-voltage protection circuit 122, and an unlocking circuit 123.
[0061] The transmission block 121 includes: a first optical coupler U10, a first switch M10, a second optical coupler U20, and a second switch M30.
[0062] The first optocoupler U10 is configured to output a first control signal CS1 based on a signal from the first DALI interface circuit 11.
[0063] The first switch M10 is configured to be coupled between the output terminals of the second DALI interface circuit 12 and controlled by the first control signal CS1.
[0064] The second optocoupler U20 is configured to output a second control signal CS2 based on a signal from the second DALI interface circuit 12.
[0065] The second switch M30 is configured to be coupled to the first DALI interface circuit 11 and controlled by the second control signal CS2.
[0066] The working principle of transport block 121 is described below.
[0067] Transmission from the first DALI interface circuit 11 to the second DALI interface circuit 12:
[0068] When the signal from the first DALI interface circuit 11 is high, the first optocoupler U10 is turned on and the first switch M10 is turned off, and the output terminals (e.g., X4-a, X4-b, X4-c, X4-d) of the second DALI interface circuit 12 output a high-level signal.
[0069] When the signal from the first DALI interface circuit 11 is low, the first optocoupler U10 is disconnected and the first switch M10 is turned on, and the output terminal of the second DALI interface circuit outputs a signal with a low level.
[0070] Transmission from the second DALI interface circuit 12 to the first DALI interface circuit 11:
[0071] When the signal from the second DALI interface circuit 12 is high, the second optocoupler U20 is turned on and the second switch M30 is turned off, and the first DALI interface circuit 11 is provided with a high-level signal.
[0072] When the signal from the second DALI interface circuit 12 is low, the second optocoupler U20 is disconnected and the second switch M30 is turned on, and the first DALI interface circuit 11 is provided with a low-level signal.
[0073] Therefore, the DALI signal can be transmitted bidirectionally between the first DALI interface circuit 11 and the second DALI interface circuit 12. The DALI signal in terminal DALI_in and terminal pDALI_insulated can be synchronized. When the client selects to use the second interface circuit 12 to receive the DALI signal from the second data bus DB2, the DALI signal can be synchronously transmitted to the first interface circuit 11; when the client selects to use the first interface circuit 11 to receive the DALI signal from the first data bus DB1, the DALI signal can be synchronously transmitted to the second interface circuit 12.
[0074] like Figure 2 As shown, the high-voltage protection circuit 122 may include a protection switch M31 connected to the gate pin of the second switch M30, and detect signals from the first DALI interface circuit 11. When the signal from the first DALI interface circuit 11 is high, the protection switch M31 is turned on and the second switch M30 is turned off.
[0075] like Figure 2 As shown, the unlocking circuit 123 is configured to disconnect the first switch M10 when a signal from the second DALI interface circuit 12 is transmitted to the first DALI interface circuit 11, and / or disconnect the second switch M30 when a signal from the first DALI interface circuit 12 is transmitted to the second DALI interface circuit 12.
[0076] The unlocking circuit 123 may include a first block 1231 and a second block 1232.
[0077] like Figure 2 As shown, the first block 1231 also includes a first comparator U1-a and a third switch M1. The gate of the third switch M1 is coupled to the output pin (e.g., pin 1) of the first comparator U1-a, and the drain of the third switch M1 is coupled to the gate of the second switch M10. The first comparator U1-a can compare a first reference voltage (e.g., the first voltage is provided by power supply U1-c and resistors R11 and R20) with a first voltage (e.g., the "+" pin 3 of the first comparator U1-a is coupled to resistor R15 and diode D13), which is related to a signal received from the second bus.
[0078] When a signal from the second DALI interface circuit 12 is transmitted to the first DALI interface circuit, the first block 1231 is used to disconnect the second switch M10, so that the voltage on M10 is set to a high level.
[0079] For example, for the first 1231, these signals are high before the signal from terminal pDALI_insulated goes low. When the current across D11 and M10 causes its voltage to rise slightly (e.g., change slightly), a current glow enters capacitor C11, then pin 3 of U1-a rises, and pin 1 of U1-a goes high, M1 turns on, M10 turns off, and the voltage on M10 is set high. At this time, C11 is charged to high, but pin 3 of U1-a returns to low, and the unlocking operation is complete.
[0080] like Figure 2 As shown, the second block 1232 may include a second comparator U2-a and a fourth switch M2. The gate of the fourth switch M2 is coupled to the output pin (e.g., pin 1) of the second comparator U2-a, and the drain of the fourth switch M2 is coupled to the gate of the first switch M30. The second comparator U2-a compares a second reference voltage (e.g., the second voltage is provided by power supply U2-c and resistors R18 and R19) with a second voltage (e.g., the second voltage can be expressed as...). Figure 2 The second voltage is compared with the signal received from the first data bus DB1 (DALI+).
[0081] When a signal from the first DALI interface circuit 11 is transmitted to the second DALI interface circuit 12, the second block 1232 is used to disconnect the first switch M30, so that the voltage on M30 is set to a high level.
[0082] For example, for the second 1232, these signals are high before the signal from terminal DALI_in changes to low. When the current across D30 and M30 causes its voltage to rise slightly (e.g., change slightly), a current glow enters capacitor C30, then pin 3 of U2-a rises, and pin 1 of U2-a goes high, M2 turns on, M30 turns off, and the voltage on M30 is set high. At this time, C30 is charged to high, but pin 3 of U2-a returns to low, and the unlocking operation is complete.
[0083] In this application, when a low-level signal is transmitted between the first DALI interface circuit 11 and the second DALI interface circuit 12, if both switches M10 and M30 are turned on, the transmitted signal cannot be high-level without the unlocking circuit 123. In other words, the unlocking circuit 123 is used to avoid the problem of high-level signal transmission failure after low-level signal transmission.
[0084] Figure 3 This is a circuit diagram of an interface circuit according to another embodiment of this disclosure. Figure 3In at least one other embodiment, it is shown Figure 1 Details of the interface circuit 10.
[0085] like Figure 3 As shown, a description of the first DALI interface circuit 11 can be found in [reference]. Figure 2 The same description.
[0086] like Figure 3 As shown, the second DALI interface circuit 12 includes a transmission block 121, a high-voltage protection circuit 122, and an unlocking circuit 123.
[0087] The transmission block 121 includes: a first optical coupler U94, a first switch M93, a second optical coupler U92, and a second switch M91.
[0088] The first optocoupler U94 is configured to output a first control signal CS1 based on a signal from the first DALI interface circuit 11.
[0089] The first switch M93 is configured to be coupled between the output terminals of the second DALI interface circuit 12 and controlled by the first control signal CS1.
[0090] The second optocoupler U92 is configured to output a second control signal CS2 based on a signal from the second DALI interface circuit 12.
[0091] The second switch M91 is configured to be coupled to the first DALI interface circuit 11 and controlled by the second control signal CS2.
[0092] Figure 3 The working principle of the transmission block 121 in the middle is described as follows.
[0093] Transmission from the first DALI interface circuit 11 to the second DALI interface circuit 12:
[0094] When the signal from the first DALI interface circuit 11 is high, the first optocoupler U94 is turned on and the first switch M93 is turned off, and the output terminals (e.g., X4-a, X4-b, X4-c, X4-d) of the second DALI interface circuit 12 output a high-level signal.
[0095] When the signal from the first DALI interface circuit 11 is low, the first optocoupler U94 is disconnected and the first switch M93 is turned on, and the output terminal of the second DALI interface circuit outputs a signal with a low level.
[0096] Transmission from the second DALI interface circuit 12 to the first DALI interface circuit 11:
[0097] When the signal from the second DALI interface circuit 12 is high, the second optocoupler U92 is turned on and the second switch M91 is turned off, and the first DALI interface circuit 11 is provided with a high-level signal.
[0098] When the signal from the second DALI interface circuit 12 is low, the second optocoupler U92 is disconnected and the second switch M91 is turned on, and the first DALI interface circuit 11 is provided with a low-level signal.
[0099] Therefore, the DALI signal can be transmitted bidirectionally between the first DALI interface circuit 11 and the second DALI interface circuit 12. The DALI signal in terminal DALI_in and terminal pDALI_insulated can be synchronized.
[0100] like Figure 3 As shown, the high-voltage protection circuit 122 may include a protection switch M31 connected to the gate pin of the second switch M91, and detect signals from the first DALI interface circuit 11. When the signal from the first DALI interface circuit 11 is high, the protection switch M31 is turned on and the second switch M91 is turned off.
[0101] like Figure 3 As shown, the unlocking circuit 123 is configured to disconnect the first switch M93 when a signal from the second DALI interface circuit 12 is transmitted to the first DALI interface circuit 11, and / or disconnect the second switch M91 when a signal from the first DALI interface circuit 12 is transmitted to the second DALI interface circuit 12.
[0102] Figure 3 The unlocking circuit 123 may include a first controller U90. The first controller U90 may be a microcontroller unit (MCU).
[0103] The first controller U90 is configured to output a first unlock control signal and a second unlock control signal. The first unlock control signal and the second unlock control signal can be output from separate pins of the first controller U90.
[0104] For example, the first unlock control signal is output from pin 1 of the first controller U90 to the gate of switch M94, and the drain of M94 is coupled to the gate of the first switch M93; the second unlock control signal is output from pin 5 of the first controller U90 to optocoupler U142, the output pin of optocoupler U142 is coupled to the gate of switch M95, and the drain of M95 is coupled to the gate of the second switch M91.
[0105] like Figure 3As shown, when the first controller U90 detects a signal from the second DALI interface circuit 12 being transmitted to the first DALI interface circuit 11, it outputs a first unlock control signal to disconnect the first switch M93. For example, when the first controller U90 detects a signal from the second DALI interface circuit 12 being transmitted to the first DALI interface circuit 11, the first controller U90 will generate a high pulse in pin 1 until the signal transmission terminal, and M94 will be turned on, M93 will be turned off, the voltage on M93 will be set to a high level, and the unlock operation will be completed.
[0106] like Figure 3 As shown, when the first controller U90 detects a signal from the first DALI interface circuit being transmitted to the second DALI interface circuit, it outputs a second unlock control signal to disconnect the second switch M91. For example, when the first controller U90 detects a signal from the first DALI interface circuit 11 being transmitted to the second DALI interface circuit 12, the first controller U90 will generate a high pulse in pin 5 until the signal transmission terminal, and M95 will be turned on, M91 will be turned off, the voltage on M91 will be set to a high level, and the unlock operation will be completed.
[0107] In this application, when a low-level signal is transmitted between the first DALI interface circuit 11 and the second DALI interface circuit 12, if both switches M93 and M91 are turned on, the transmitted signal cannot be high-level without the unlocking circuit 123. In other words, the unlocking circuit 123 is used to avoid the problem of high-level signal transmission failure after low-level signal transmission.
[0108] Other components of interface circuit 10 are in Figure 2 and Figure 3 The following is shown. For a description of these components, please refer to the relevant materials; the description of the components will not be repeated here.
[0109] The second aspect of the implementation plan
[0110] A driver is provided in the second aspect of the implementation scheme.
[0111] In a third aspect of the implementation, the driver is used to drive a lighting device, for example, the lighting device may be an LED.
[0112] The driver includes interface circuitry 10 according to a first aspect of the implementation.
[0113] The interface circuit 10 can send a first signal to the controller 100 and receive a feedback signal from the controller 100.
[0114] The third aspect of the implementation plan
[0115] A control method for an interface circuit. The interface circuit is provided in the first aspect of the embodiment. Content identical to that in the first aspect of the embodiment is omitted.
[0116] Figure 4 A flowchart of the control method for interface circuit 10 is shown.
[0117] like Figure 4 As shown, method 40 includes:
[0118] Box 41: Signals received from the second data bus are transmitted from the second DALI interface circuit to the first DALI interface circuit, and signals received from the first data bus are transmitted to the second DALI interface circuit.
[0119] According to a second aspect of the implementation scheme, the DALI signal can be transmitted bidirectionally between the first DALI interface and the second interface, thereby meeting the DALI signal timing requirements (e.g., a maximum 15μs delay in the DALI signal link).
[0120] Furthermore, although the operations are shown in a specific order, this should not be construed as requiring such operations to be performed in the shown specific order or in a sequential order, or as requiring all shown operations to achieve the desired result. In some cases, multitasking and parallel processing may be advantageous. Similarly, while several specific implementation details are included in the foregoing discussion, these specific implementation details should not be construed as limiting the scope of this disclosure, but rather as descriptions of features that may be specific to a particular embodiment. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.
[0121] Although this disclosure has been described in language specific to structural features and / or methodological actions, it should be understood that this disclosure, as defined by the appended claims, is not necessarily limited to the specific features or actions described above. Rather, the specific features and actions described above are disclosed as exemplary forms for implementing the claims.
Claims
1. An interface circuit, the interface circuit comprising: A first digital addressable lighting interface (DALI) interface circuit is configured to connect to a first data bus and a controller (MCU), send a first signal to the controller, and receive a feedback signal from the controller. and A second DALI interface circuit is configured to connect to the first DALI interface circuit and the second data bus. The signals received from the second data bus are transmitted from the second DALI interface circuit to the first DALI interface circuit, and the signals received from the first data bus can be transmitted to the second DALI interface circuit.
2. The interface circuit according to claim 1, wherein, The second DALI interface circuit includes: A transmission block that performs bidirectional signal transmission between the first DALI interface circuit and the second DALI interface circuit.
3. The interface circuit according to claim 2, wherein, The transport block includes: A first optocoupler (U10, U94) is configured to output a first control signal based on a signal from the first DALI interface circuit. The first switch (M10, M93) is configured to be coupled between the output terminals of the second DALI interface circuit and controlled by the first control signal; A second optocoupler (U20, U92), configured to output a second control signal based on a signal from the second DALI interface circuit; and The second switch (M30, M91) is configured to be coupled to the first DALI interface circuit and controlled by the second control signal.
4. The interface circuit according to claim 3, wherein, When the signal from the first DALI interface circuit is high, the first optocoupler (U10, U94) is turned on and the first switch (M10, M93) is turned off, and the output terminal of the second DALI interface circuit outputs a high-level signal. When the signal from the first DALI interface circuit is low, the first optocoupler (U10, U94) is disconnected and the first switch (M10, M93) is turned on, and the output terminal of the second DALI interface circuit outputs a low-level signal. When the signal from the second DALI interface circuit is high, the second optocoupler (U20, U92) is turned on and the second switch (M30, M91) is turned off, and the first DALI interface circuit is provided with a high-level signal; When the signal from the second DALI interface circuit is low, the second optocoupler (U20, U92) is disconnected and the second switch (M30, M91) is turned on, and the first DALI interface circuit is provided with a low-level signal.
5. The interface circuit according to claim 3, wherein, The second DALI interface circuit also includes: A high-voltage protection circuit is configured to include protection switches (M31, M92) connected to the gate pins of the second switches (M30, M91), and to detect signals from the first DALI interface circuit. When the signal from the first DALI interface circuit is high, the protection switch (M31, M92) is turned on and the second switch (M30, M91) is turned off.
6. The interface circuit according to claim 3, wherein, The second DALI interface circuit also includes: An unlocking circuit is configured to disconnect the first switch (M10, M93) when a signal from the second DALI interface circuit is transmitted to the first DALI interface circuit, and / or disconnect the second switch (M30, M91) when a signal from the first DALI interface circuit is transmitted to the second DALI interface circuit.
7. The interface circuit according to claim 6, wherein, The unlocking circuit includes: A first comparator (U1-a) and a third switch (M1), wherein the gate of the third switch (M1) is coupled to the output pin of the first comparator (U1-a), and the drain of the third switch is coupled to the gate of the second switch (M10), wherein the first comparator (U1-a) compares a first reference voltage with a first voltage, the first voltage being correlated with a signal received from the second data bus; and A second comparator (U2-a) and a fourth switch (M2), wherein the gate of the fourth switch is coupled to the output pin of the second comparator (U2-a), and the drain of the fourth switch is coupled to the gate of the first switch (M30). The second comparator (U2-a) compares a second reference voltage with a second voltage, which is related to a signal received from the first bus.
8. The interface circuit according to claim 6, wherein, The unlocking circuit includes: A first controller (U90) is configured to output a first unlock control signal and a second unlock control signal. When the first controller (U90) detects that a signal from the second DALI interface circuit is transmitted to the first DALI interface circuit, it outputs the first unlock control signal to disconnect the first switch (M93). When the first controller (U90) detects that a signal from the first DALI interface circuit is transmitted to the second DALI interface circuit, it outputs the second unlock control signal to disconnect the second switch (M91).
9. A driver for driving a lighting device, the driver comprising an interface circuit according to any one of claims 1 to 8 and a control element, wherein, The interface circuit sends a first signal to the controller and receives a feedback signal from the controller.
10. A control method for an interface circuit, the interface circuit comprising: A first digital addressable lighting interface (DALI) interface circuit is configured to connect to a first data bus and a controller (MCU), send a first signal to the controller, and receive a feedback signal from the controller. and A second DALI interface circuit is configured to connect to the first DALI interface circuit and the second data bus. The control method includes: Signals received from the second data bus are transmitted from the second DALI interface circuit to the first DALI interface circuit, and signals received from the first data bus are transmitted to the second DALI interface circuit.